// to use CUDA, uncomment the following line
#define USE_CUDA

#include <stdio.h>
#include <time.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cuComplex.h>

#define COLOR_DEPTH 256
#define DEFAULT_WIDTH 3840
#define DEFAULT_HEIGHT 2160
#define MAX_THREAD 65536


#ifndef USE_CUDA
void computePixelNoGPU(cuDoubleComplex a, cuDoubleComplex b, unsigned short n, unsigned char* r)
{
	int i, j;
	cuDoubleComplex c, z;
	for(unsigned int x=0; x<DEFAULT_WIDTH; x++)
    {
        for(unsigned int y=0; y<DEFAULT_HEIGHT; y++)
        {
			i = x + y * DEFAULT_WIDTH;
			c = make_cuDoubleComplex((double)x,(double)y);
			c = cuCadd(cuCmul(a, c), b);
            z = make_cuDoubleComplex(0.0,0.0);
			for(j = 0; j < n && cuCabs(z) < 2; j++)
			{
				z = cuCadd(cuCmul(z, z), c);
			}
			if(cuCabs(z) > 2)
			{
				r[i*3] = j * COLOR_DEPTH / n;
				r[i*3+1] = r[i*3];
				r[i*3+2] = r[i*3];
			}
			else
			{
				r[i*3] = 0;
				r[i*3+1] = 0;
				r[i*3+2] = 0;
			}
	     }
    }
}
#else
__global__ void computePixel(cuDoubleComplex* a_d, cuDoubleComplex* b_d, unsigned short n, unsigned char* r_d)
{
	int i,j,x,y;
	cuDoubleComplex z_d, c_d;
	i = blockIdx.x * blockDim.x + threadIdx.x;
	x = i % DEFAULT_WIDTH;
	y = i / DEFAULT_WIDTH;
	c_d = make_cuDoubleComplex((double)x,(double)y);
    c_d = cuCadd(cuCmul(a_d[0], c_d), b_d[0]);
	z_d = make_cuDoubleComplex(0.0,0.0);
	for(j = 0; j < n && cuCabs(z_d) < 2; j++)
	{
		z_d = cuCadd(cuCmul(z_d, z_d), c_d);
	}
	if(cuCabs(z_d) > 2)
	{
		r_d[i*3] = j * COLOR_DEPTH / n;
		r_d[i*3+1] = r_d[i*3];
		r_d[i*3+2] = r_d[i*3];
	}
	else
	{
		r_d[i*3] = 0;
		r_d[i*3+1] = 0;
		r_d[i*3+2] = 0;
	}
}
#endif


int main()
{
	// initializations
	struct timespec start, end;
	double time_elapsed;
	unsigned char* r;
	cuDoubleComplex a;
	cuDoubleComplex b;
#ifdef USE_CUDA
	unsigned char* r_device;
	cuDoubleComplex* a_device;
	cuDoubleComplex* b_device;
#endif
	
	// starting time measure
	clock_gettime(CLOCK_MONOTONIC, &start);
	
	// zoom and rotation parameters
	a = make_cuDoubleComplex(1.0/DEFAULT_WIDTH*3,0.0005);
    b = make_cuDoubleComplex(-1.5,-1.6);
	
	// allocating memory on RAM
	r = (unsigned char*) malloc(sizeof(unsigned char)*DEFAULT_WIDTH*DEFAULT_HEIGHT*3);
	
#ifdef USE_CUDA
	// allocating memory on GPU
    cudaMalloc((void**) &r_device, sizeof(unsigned char)*DEFAULT_WIDTH*DEFAULT_HEIGHT*3);
    cudaMalloc((void**) &a_device, sizeof(cuDoubleComplex));
    cudaMalloc((void**) &b_device, sizeof(cuDoubleComplex));
    
    // copy a and b
    cudaMemcpy(a_device, &a, sizeof(cuDoubleComplex), cudaMemcpyHostToDevice);
    cudaMemcpy(b_device, &b, sizeof(cuDoubleComplex), cudaMemcpyHostToDevice);
    

    // making the GPU do the job
    computePixel<<<DEFAULT_WIDTH*DEFAULT_HEIGHT/MAX_THREAD, MAX_THREAD>>>(a_device, b_device, 256, r_device);

    // copying result from GPU to RAM
    cudaMemcpy(r, r_device, sizeof(unsigned char)*DEFAULT_WIDTH*DEFAULT_HEIGHT*3, cudaMemcpyDeviceToHost);
#else
    // making the CPU do the job
    computePixelNoGPU(a, b, 256, r);
#endif
    
    // writing result in a file
    FILE* file = fopen("test.data", "wb");
    if(file == NULL)
    {
		return -1;
    }
    fwrite(r, sizeof(unsigned char), DEFAULT_WIDTH*DEFAULT_HEIGHT*3, file);
    fclose(file);
    
    // freeing GPU's and CPU's memory
#ifdef USE_CUDA
    cudaFree(a_device);
    cudaFree(b_device);
    cudaFree(r_device);
#endif
    free(r);
    
    // ending the timer and print the result
    clock_gettime(CLOCK_MONOTONIC, &end);
    time_elapsed = end.tv_nsec - start.tv_nsec;
    time_elapsed /= 1000000000.0;
    time_elapsed += (double) (end.tv_sec - start.tv_sec);
    printf("time elapsed : %f\n", time_elapsed);
    
    // return success state
    return 0;
}

	.file	"tmpxft_00312d34_00000000-6_fractaliseur.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2053:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2053:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z12computePixelP7double2S0_tPhP7double2S0_tPh
	.type	_Z45__device_stub__Z12computePixelP7double2S0_tPhP7double2S0_tPh, @function
_Z45__device_stub__Z12computePixelP7double2S0_tPhP7double2S0_tPh:
.LFB2075:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movw	%dx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12computePixelP7double2S0_tPh(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2075:
	.size	_Z45__device_stub__Z12computePixelP7double2S0_tPhP7double2S0_tPh, .-_Z45__device_stub__Z12computePixelP7double2S0_tPhP7double2S0_tPh
	.globl	_Z12computePixelP7double2S0_tPh
	.type	_Z12computePixelP7double2S0_tPh, @function
_Z12computePixelP7double2S0_tPh:
.LFB2076:
	.cfi_startproc
	endbr64
	movzwl	%dx, %edx
	jmp	_Z45__device_stub__Z12computePixelP7double2S0_tPhP7double2S0_tPh
	.cfi_endproc
.LFE2076:
	.size	_Z12computePixelP7double2S0_tPh, .-_Z12computePixelP7double2S0_tPh
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"wb"
.LC5:
	.string	"test.data"
.LC7:
	.string	"time elapsed : %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2050:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$1, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$136, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rsi
	call	clock_gettime@PLT
	movq	.LC0(%rip), %rax
	movl	$24883200, %edi
	movq	%rax, 48(%rsp)
	movq	.LC1(%rip), %rax
	movq	%rax, 56(%rsp)
	movq	.LC2(%rip), %rax
	movq	%rax, 64(%rsp)
	movq	.LC3(%rip), %rax
	movq	%rax, 72(%rsp)
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$24883200, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movl	$1, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	leaq	64(%rsp), %rsi
	movl	$1, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	$65537, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147483711, %edi
	salq	$16, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	movq	%rdx, 104(%rsp)
	movl	$1, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	8(%rsp), %rcx
	movq	24(%rsp), %rsi
	movl	$256, %edx
	movq	16(%rsp), %rdi
	call	_Z45__device_stub__Z12computePixelP7double2S0_tPhP7double2S0_tPh
.L9:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$24883200, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	leaq	.LC5(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbp
	orl	$-1, %eax
	testq	%rbp, %rbp
	je	.L8
	movq	%rbp, %rcx
	movl	$24883200, %edx
	movl	$1, %esi
	movq	%rbx, %rdi
	call	fwrite@PLT
	movq	%rbp, %rdi
	call	fclose@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	leaq	104(%rsp), %rsi
	movl	$1, %edi
	call	clock_gettime@PLT
	movq	112(%rsp), %rax
	subq	96(%rsp), %rax
	leaq	.LC7(%rip), %rsi
	cvtsi2sdq	%rax, %xmm1
	movq	104(%rsp), %rax
	subq	88(%rsp), %rax
	divsd	.LC6(%rip), %xmm1
	cvtsi2sdq	%rax, %xmm0
	movl	$2, %edi
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L8:
	movq	120(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2050:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z12computePixelP7double2S0_tPh"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2078:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12computePixelP7double2S0_tPh(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2078:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1717986918
	.long	1061788057
	.align 8
.LC1:
	.long	-755914244
	.long	1061184077
	.align 8
.LC2:
	.long	0
	.long	-1074266112
	.align 8
.LC3:
	.long	-1717986918
	.long	-1074161255
	.align 8
.LC6:
	.long	0
	.long	1104006501
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// to use CUDA, uncomment the following line
#define USE_CUDA

#include <stdio.h>
#include <time.h>
#include <hip/hip_runtime.h>

#include <hip/hip_complex.h>

#define COLOR_DEPTH 256
#define DEFAULT_WIDTH 3840
#define DEFAULT_HEIGHT 2160
#define MAX_THREAD 65536


#ifndef USE_CUDA
void computePixelNoGPU(hipDoubleComplex a, hipDoubleComplex b, unsigned short n, unsigned char* r)
{
	int i, j;
	hipDoubleComplex c, z;
	for(unsigned int x=0; x<DEFAULT_WIDTH; x++)
    {
        for(unsigned int y=0; y<DEFAULT_HEIGHT; y++)
        {
			i = x + y * DEFAULT_WIDTH;
			c = make_hipDoubleComplex((double)x,(double)y);
			c = hipCadd(hipCmul(a, c), b);
            z = make_hipDoubleComplex(0.0,0.0);
			for(j = 0; j < n && hipCabs(z) < 2; j++)
			{
				z = hipCadd(hipCmul(z, z), c);
			}
			if(hipCabs(z) > 2)
			{
				r[i*3] = j * COLOR_DEPTH / n;
				r[i*3+1] = r[i*3];
				r[i*3+2] = r[i*3];
			}
			else
			{
				r[i*3] = 0;
				r[i*3+1] = 0;
				r[i*3+2] = 0;
			}
	     }
    }
}
#else
__global__ void computePixel(hipDoubleComplex* a_d, hipDoubleComplex* b_d, unsigned short n, unsigned char* r_d)
{
	int i,j,x,y;
	hipDoubleComplex z_d, c_d;
	i = blockIdx.x * blockDim.x + threadIdx.x;
	x = i % DEFAULT_WIDTH;
	y = i / DEFAULT_WIDTH;
	c_d = make_hipDoubleComplex((double)x,(double)y);
    c_d = hipCadd(hipCmul(a_d[0], c_d), b_d[0]);
	z_d = make_hipDoubleComplex(0.0,0.0);
	for(j = 0; j < n && hipCabs(z_d) < 2; j++)
	{
		z_d = hipCadd(hipCmul(z_d, z_d), c_d);
	}
	if(hipCabs(z_d) > 2)
	{
		r_d[i*3] = j * COLOR_DEPTH / n;
		r_d[i*3+1] = r_d[i*3];
		r_d[i*3+2] = r_d[i*3];
	}
	else
	{
		r_d[i*3] = 0;
		r_d[i*3+1] = 0;
		r_d[i*3+2] = 0;
	}
}
#endif


int main()
{
	// initializations
	struct timespec start, end;
	double time_elapsed;
	unsigned char* r;
	hipDoubleComplex a;
	hipDoubleComplex b;
#ifdef USE_CUDA
	unsigned char* r_device;
	hipDoubleComplex* a_device;
	hipDoubleComplex* b_device;
#endif
	
	// starting time measure
	clock_gettime(CLOCK_MONOTONIC, &start);
	
	// zoom and rotation parameters
	a = make_hipDoubleComplex(1.0/DEFAULT_WIDTH*3,0.0005);
    b = make_hipDoubleComplex(-1.5,-1.6);
	
	// allocating memory on RAM
	r = (unsigned char*) malloc(sizeof(unsigned char)*DEFAULT_WIDTH*DEFAULT_HEIGHT*3);
	
#ifdef USE_CUDA
	// allocating memory on GPU
    hipMalloc((void**) &r_device, sizeof(unsigned char)*DEFAULT_WIDTH*DEFAULT_HEIGHT*3);
    hipMalloc((void**) &a_device, sizeof(hipDoubleComplex));
    hipMalloc((void**) &b_device, sizeof(hipDoubleComplex));
    
    // copy a and b
    hipMemcpy(a_device, &a, sizeof(hipDoubleComplex), hipMemcpyHostToDevice);
    hipMemcpy(b_device, &b, sizeof(hipDoubleComplex), hipMemcpyHostToDevice);
    

    // making the GPU do the job
    computePixel<<<DEFAULT_WIDTH*DEFAULT_HEIGHT/MAX_THREAD, MAX_THREAD>>>(a_device, b_device, 256, r_device);

    // copying result from GPU to RAM
    hipMemcpy(r, r_device, sizeof(unsigned char)*DEFAULT_WIDTH*DEFAULT_HEIGHT*3, hipMemcpyDeviceToHost);
#else
    // making the CPU do the job
    computePixelNoGPU(a, b, 256, r);
#endif
    
    // writing result in a file
    FILE* file = fopen("test.data", "wb");
    if(file == NULL)
    {
		return -1;
    }
    fwrite(r, sizeof(unsigned char), DEFAULT_WIDTH*DEFAULT_HEIGHT*3, file);
    fclose(file);
    
    // freeing GPU's and CPU's memory
#ifdef USE_CUDA
    hipFree(a_device);
    hipFree(b_device);
    hipFree(r_device);
#endif
    free(r);
    
    // ending the timer and print the result
    clock_gettime(CLOCK_MONOTONIC, &end);
    time_elapsed = end.tv_nsec - start.tv_nsec;
    time_elapsed /= 1000000000.0;
    time_elapsed += (double) (end.tv_sec - start.tv_sec);
    printf("time elapsed : %f\n", time_elapsed);
    
    // return success state
    return 0;
}

	.text
	.file	"fractaliseur.hip"
	.globl	_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh # -- Begin function _Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.type	_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh,@function
_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh: # @_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	6(%rsp), %rsi
	movw	%dx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh, .Lfunc_end0-_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %rsi
	movl	$1, %edi
	callq	clock_gettime
	movabsq	$4560344982675364250, %rax      # imm = 0x3F4999999999999A
	leaq	64(%rsp), %r15
	movq	%rax, (%r15)
	movabsq	$4557750909289998844, %rax      # imm = 0x3F40624DD2F1A9FC
	movq	%rax, 8(%r15)
	movabsq	$-4613937818241073152, %rax     # imm = 0xBFF8000000000000
	leaq	48(%rsp), %r14
	movq	%rax, (%r14)
	movabsq	$-4613487458278336102, %rax     # imm = 0xBFF999999999999A
	movq	%rax, 8(%r14)
	movl	$24883200, %edi                 # imm = 0x17BB000
	callq	malloc
	movq	%rax, %rbx
	leaq	8(%rsp), %rdi
	movl	$24883200, %esi                 # imm = 0x17BB000
	callq	hipMalloc
	leaq	24(%rsp), %r12
	movl	$16, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$16, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$16, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$16, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967422, %rdi               # imm = 0x10000007E
	leaq	65410(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rcx
	movl	$256, %edx                      # imm = 0x100
	callq	_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh
.LBB1_2:
	movq	8(%rsp), %rsi
	movl	$24883200, %edx                 # imm = 0x17BB000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_3
# %bb.4:
	movq	%rax, %r14
	movl	$1, %esi
	movl	$24883200, %edx                 # imm = 0x17BB000
	movq	%rbx, %rdi
	movq	%rax, %rcx
	callq	fwrite
	movq	%r14, %rdi
	callq	fclose
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	leaq	80(%rsp), %rbx
	movl	$1, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	40(%rsp), %rcx
	cvtsi2sd	%rcx, %xmm1
	divsd	.LCPI1_0(%rip), %xmm1
	subq	32(%rsp), %rax
	cvtsi2sd	%rax, %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	jmp	.LBB1_5
.LBB1_3:
	movl	$-1, %eax
.LBB1_5:
	addq	$96, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh,@object # @_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.section	.rodata,"a",@progbits
	.globl	_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.p2align	3, 0x0
_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh:
	.quad	_Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.size	_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"test.data"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"wb"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"time elapsed : %f\n"
	.size	.L.str.2, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh"
	.size	.L__unnamed_1, 48

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh ; -- Begin function _Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.globl	_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
	.p2align	8
	.type	_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh,@function
_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh: ; @_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x10
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	v_cmp_eq_u16_e64 s4, s3, 0
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	s_and_b32 s2, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s4
	s_mov_b32 s4, 0
	s_cbranch_vccnz .LBB0_6
; %bb.1:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_hi_i32 v0, 0x88888889, v4
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	s_mov_b32 s7, s4
	s_load_b128 s[8:11], s[0:1], 0x0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v4
	v_lshrrev_b32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v0, v1
	s_waitcnt lgkmcnt(0)
	s_load_b128 s[12:15], s[8:9], 0x0
	v_cvt_f64_i32_e32 v[0:1], v2
	v_mul_i32_i24_e32 v2, 0xf00, v2
	s_load_b128 s[8:11], s[10:11], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v4, v2
	v_cvt_f64_i32_e32 v[2:3], v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[5:6], s[14:15], v[0:1]
	v_mul_f64 v[0:1], s[12:13], v[0:1]
	v_fma_f64 v[5:6], s[12:13], v[2:3], -v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], s[14:15], v[2:3], v[0:1]
	v_add_f64 v[5:6], s[8:9], v[5:6]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[7:8], s[10:11], v[0:1]
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v3, s7
	v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s6
                                        ; implicit-def: $sgpr5
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[2:3], v[2:3]
	s_or_b32 s5, s5, exec_lo
	v_fma_f64 v[11:12], v[0:1], v[0:1], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[11:12]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v13, 8, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[11:12], v[11:12], v13
	v_rsq_f64_e32 v[13:14], v[11:12]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[15:16], v[11:12], v[13:14]
	v_mul_f64 v[13:14], v[13:14], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[13:14], v[15:16], 0.5
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	v_fma_f64 v[13:14], v[13:14], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[15:16], v[15:16], v[11:12]
	v_fma_f64 v[15:16], v[17:18], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[15:16], v[15:16], v[11:12]
	v_fma_f64 v[13:14], v[17:18], v[13:14], v[15:16]
	v_cndmask_b32_e64 v15, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[11:12], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[13:14], v[13:14], v15
	v_dual_cndmask_b32 v12, v14, v12 :: v_dual_cndmask_b32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 2.0, v[11:12]
	v_mov_b32_e32 v11, s3
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f64 v[11:12], v[0:1], v[0:1]
	v_mul_f64 v[2:3], v[2:3], v[0:1]
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s3
	s_cselect_b32 s7, -1, 0
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s7, s7, exec_lo
	s_or_b32 s5, s5, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[11:12], -v[9:10]
	v_fma_f64 v[2:3], v[2:3], 2.0, v[7:8]
	v_mov_b32_e32 v11, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[0:1], v[5:6], v[9:10]
.LBB0_4:                                ; %Flow114
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_2
; %bb.5:                                ; %.critedge.loopexit
	s_or_b32 exec_lo, exec_lo, s4
	v_lshlrev_b32_e32 v6, 8, v11
	s_branch .LBB0_7
.LBB0_6:
	v_mov_b32_e32 v0, v2
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v1, v3
.LBB0_7:                                ; %.critedge
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[2:3]
	s_load_b64 s[0:1], s[0:1], 0x18
	s_mov_b32 s4, 0
	v_fma_f64 v[0:1], v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_cndmask_b32_e64 v5, 0, 0xffffff80, vcc_lo
	v_lshlrev_b32_e32 v2, 8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], v2
	v_rsq_f64_e32 v[2:3], v[0:1]
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[7:8], v[0:1], v[2:3]
	v_mul_f64 v[2:3], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[2:3], v[7:8], 0.5
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[2:3], v[2:3], v[9:10], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[7:8], v[7:8], v[0:1]
	v_fma_f64 v[7:8], v[9:10], v[2:3], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[7:8], v[7:8], v[0:1]
	v_fma_f64 v[2:3], v[9:10], v[2:3], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v5
	v_dual_cndmask_b32 v1, v3, v1 :: v_dual_cndmask_b32 v0, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_nlt_f64_e32 vcc_lo, 2.0, v[0:1]
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s3, vcc_lo
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_lshl_add_u32 v0, v4, 1, v4
	v_mov_b32_e32 v2, 0
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr4_vgpr5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB0_9:                                ; %Flow
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v2, s4
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_cvt_f32_u32_e32 v0, s2
	s_sub_i32 s4, 0, s2
	v_lshl_add_u32 v4, v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, s4, v0
	v_mul_hi_u32 v1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v1
	v_mul_hi_u32 v0, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v0, s2
	v_add_nc_u32_e32 v2, 1, v0
	v_sub_nc_u32_e32 v1, v6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s2, v1
	v_cmp_le_u32_e32 vcc_lo, s2, v1
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v2
	v_ashrrev_i32_e32 v3, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s2, v1
	v_add_nc_u32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v0, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v3, 8, v2
	v_and_b32_e32 v2, 0xff, v2
	v_or_b32_e32 v2, v2, v3
	global_store_b16 v[0:1], v2, off offset:1
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh, .Lfunc_end0-_Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1112
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           2
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12computePixelP15HIP_vector_typeIdLj2EES1_tPh.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
