#include <cuda.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>

const int PARTITION_SIZE = 32;

#define AT(mtx, width, row, column)  \
        mtx[(row) * (width) + (column)]
	

inline double nowSec()
{
	struct timeval t;
	struct timezone tzp;
	gettimeofday(&t, &tzp);
	return t.tv_sec + t.tv_usec*1e-6;
}


__global__ void global_mmul (int *A, int *B, int *C, int N)
{
	int i = N-1 - (blockIdx.y * blockDim.y + threadIdx.y);
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	
	int i_part  = i % PARTITION_SIZE;
	int j_part = j % PARTITION_SIZE;
	
	int rowPerPart = N/PARTITION_SIZE;
	
	__shared__ int Apart[PARTITION_SIZE][PARTITION_SIZE];
	__shared__ int Bpart[PARTITION_SIZE][PARTITION_SIZE];
	
	AT(C, N, i, j) = 0;
	for (int n = 0; n < rowPerPart; n++)
	{
		Apart[i_part][j_part] = AT(A, N, i, n*PARTITION_SIZE + j_part);
		Bpart[i_part][j_part] = AT(B, N, n*PARTITION_SIZE + i_part, j);

		__syncthreads();
	 
		for (int k=0; k<PARTITION_SIZE; k++)
			AT(C, N, i, j) +=  Apart[i_part][k]*Bpart[k][j_part];
	}

}

#ifdef PRINT
void printMtx (int *m, int N)
{
	for (int i=0; i<N*N; i++)
	{
		if (i>0 && i%N == 0)
			fprintf(stderr, "\n");

		fprintf(stderr, "%d\t",*m);

		m++;
	}
}
#endif

int main(int argc, char **argv)
{
	if (argc != 2)
	{
		puts("Usage: Matrix_mult [N]\n");
		return -1;
	}
	
	int N=atoi(argv[1]);
	
	if (N % PARTITION_SIZE)
	{
		printf ("error: N must be a multiple of %d\n", PARTITION_SIZE);
		return -1;
	}
	
	unsigned NN=N*N;
	int Nblocks = N/PARTITION_SIZE;

	int *A, *B, *C;
	cudaMallocManaged(&A, NN*sizeof(int));
	cudaMallocManaged(&B, NN*sizeof(int));
	cudaMallocManaged(&C, NN*sizeof(int));
	cudaDeviceSynchronize();

	for (int i=0; i<N; i++)
	{
		for (int j=0; j<N; j++)
		{
			AT(A, N, i, j) = (i == j) ? 1 : 0;
			AT(B, N, i, j) = i*N + j;	
		}
	}

#ifdef PRINT
	fprintf(stderr,"A=\n");
	printMtx(A, N);
	fprintf(stderr,"\n\nB=\n");
	printMtx(B, N);
	fprintf(stderr,"\n\n");
#endif
	
	dim3 blockPerGrid(Nblocks,Nblocks);
	dim3 threadPerBlock(PARTITION_SIZE,PARTITION_SIZE);
	
	double t_begin = nowSec();
	global_mmul <<< blockPerGrid, threadPerBlock >>> (A,B,C,N);
	cudaDeviceSynchronize();
	double t_end = nowSec();

#ifdef PRINT
	fprintf(stderr,"\n\nC=\n");
	printMtx(C, N);
	fprintf(stderr,"\n");
#endif

	printf("Elapsed time: %f sec\n", t_end  - t_begin);

	cudaFree(A);
	cudaFree(B);
	cudaFree(C);
	
	return 0;
}


	.file	"tmpxft_002d8e7b_00000000-6_Matrix_mult.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text._Z6nowSecv,"axG",@progbits,_Z6nowSecv,comdat
	.weak	_Z6nowSecv
	.type	_Z6nowSecv, @function
_Z6nowSecv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z6nowSecv, .-_Z6nowSecv
	.text
	.globl	_Z36__device_stub__Z11global_mmulPiS_S_iPiS_S_i
	.type	_Z36__device_stub__Z11global_mmulPiS_S_iPiS_S_i, @function
_Z36__device_stub__Z11global_mmulPiS_S_iPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11global_mmulPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z36__device_stub__Z11global_mmulPiS_S_iPiS_S_i, .-_Z36__device_stub__Z11global_mmulPiS_S_iPiS_S_i
	.globl	_Z11global_mmulPiS_S_i
	.type	_Z11global_mmulPiS_S_i, @function
_Z11global_mmulPiS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z11global_mmulPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z11global_mmulPiS_S_i, .-_Z11global_mmulPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Usage: Matrix_mult [N]\n"
.LC2:
	.string	"error: N must be a multiple of %d\n"
.LC3:
	.string	"Elapsed time: %f sec\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L12
	leaq	.LC1(%rip), %rdi
	call	puts@PLT
	jmp	.L13
.L12:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %r12d
	movl	%eax, %ebx
	andl	$31, %r12d
	je	.L14
	movl	$32, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L13:
	orl	$-1, %r12d
	jmp	.L11
.L14:
	movl	$32, %ecx
	cltd
	leaq	24(%rsp), %rdi
	movl	%ebx, %ebp
	idivl	%ecx
	imull	%ebx, %ebp
	movl	$1, %edx
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	movl	%eax, %r13d
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	call	cudaDeviceSynchronize@PLT
	movslq	%ebx, %rdi
	movq	24(%rsp), %r9
	xorl	%edx, %edx
	movq	32(%rsp), %r10
	salq	$2, %rdi
	xorl	%r8d, %r8d
	xorl	%esi, %esi
.L16:
	cmpl	%ebx, %edx
	jge	.L23
	movq	%rsi, %rcx
	xorl	%eax, %eax
.L17:
	xorl	%r11d, %r11d
	cmpl	%edx, %eax
	sete	%r11b
	movl	%r11d, (%r9,%rcx)
	leal	(%rax,%r8), %r11d
	incl	%eax
	movl	%r11d, (%r10,%rcx)
	addq	$4, %rcx
	cmpl	%eax, %ebx
	jne	.L17
	incl	%edx
	addq	%rdi, %rsi
	addl	%ebx, %r8d
	jmp	.L16
.L23:
	movabsq	$137438953504, %rax
	movl	%r13d, 48(%rsp)
	movl	%r13d, 52(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	_Z6nowSecv
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z36__device_stub__Z11global_mmulPiS_S_iPiS_S_i
.L18:
	call	cudaDeviceSynchronize@PLT
	call	_Z6nowSecv
	subsd	8(%rsp), %xmm0
	leaq	.LC3(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.L11:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	movl	%r12d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z11global_mmulPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11global_mmulPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>

const int PARTITION_SIZE = 32;

#define AT(mtx, width, row, column)  \
        mtx[(row) * (width) + (column)]
	

inline double nowSec()
{
	struct timeval t;
	struct timezone tzp;
	gettimeofday(&t, &tzp);
	return t.tv_sec + t.tv_usec*1e-6;
}


__global__ void global_mmul (int *A, int *B, int *C, int N)
{
	int i = N-1 - (blockIdx.y * blockDim.y + threadIdx.y);
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	
	int i_part  = i % PARTITION_SIZE;
	int j_part = j % PARTITION_SIZE;
	
	int rowPerPart = N/PARTITION_SIZE;
	
	__shared__ int Apart[PARTITION_SIZE][PARTITION_SIZE];
	__shared__ int Bpart[PARTITION_SIZE][PARTITION_SIZE];
	
	AT(C, N, i, j) = 0;
	for (int n = 0; n < rowPerPart; n++)
	{
		Apart[i_part][j_part] = AT(A, N, i, n*PARTITION_SIZE + j_part);
		Bpart[i_part][j_part] = AT(B, N, n*PARTITION_SIZE + i_part, j);

		__syncthreads();
	 
		for (int k=0; k<PARTITION_SIZE; k++)
			AT(C, N, i, j) +=  Apart[i_part][k]*Bpart[k][j_part];
	}

}

#ifdef PRINT
void printMtx (int *m, int N)
{
	for (int i=0; i<N*N; i++)
	{
		if (i>0 && i%N == 0)
			fprintf(stderr, "\n");

		fprintf(stderr, "%d\t",*m);

		m++;
	}
}
#endif

int main(int argc, char **argv)
{
	if (argc != 2)
	{
		puts("Usage: Matrix_mult [N]\n");
		return -1;
	}
	
	int N=atoi(argv[1]);
	
	if (N % PARTITION_SIZE)
	{
		printf ("error: N must be a multiple of %d\n", PARTITION_SIZE);
		return -1;
	}
	
	unsigned NN=N*N;
	int Nblocks = N/PARTITION_SIZE;

	int *A, *B, *C;
	hipMallocManaged(&A, NN*sizeof(int));
	hipMallocManaged(&B, NN*sizeof(int));
	hipMallocManaged(&C, NN*sizeof(int));
	hipDeviceSynchronize();

	for (int i=0; i<N; i++)
	{
		for (int j=0; j<N; j++)
		{
			AT(A, N, i, j) = (i == j) ? 1 : 0;
			AT(B, N, i, j) = i*N + j;	
		}
	}

#ifdef PRINT
	fprintf(stderr,"A=\n");
	printMtx(A, N);
	fprintf(stderr,"\n\nB=\n");
	printMtx(B, N);
	fprintf(stderr,"\n\n");
#endif
	
	dim3 blockPerGrid(Nblocks,Nblocks);
	dim3 threadPerBlock(PARTITION_SIZE,PARTITION_SIZE);
	
	double t_begin = nowSec();
	global_mmul <<< blockPerGrid, threadPerBlock >>> (A,B,C,N);
	hipDeviceSynchronize();
	double t_end = nowSec();

#ifdef PRINT
	fprintf(stderr,"\n\nC=\n");
	printMtx(C, N);
	fprintf(stderr,"\n");
#endif

	printf("Elapsed time: %f sec\n", t_end  - t_begin);

	hipFree(A);
	hipFree(B);
	hipFree(C);
	
	return 0;
}


	.text
	.file	"Matrix_mult.hip"
	.globl	_Z26__device_stub__global_mmulPiS_S_i # -- Begin function _Z26__device_stub__global_mmulPiS_S_i
	.type	_Z26__device_stub__global_mmulPiS_S_i,@function
_Z26__device_stub__global_mmulPiS_S_i:  # @_Z26__device_stub__global_mmulPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11global_mmulPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__global_mmulPiS_S_i, .Lfunc_end0-_Z26__device_stub__global_mmulPiS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jne	.LBB1_3
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	testb	$31, %bl
	je	.LBB1_5
# %bb.2:
	movl	$.L.str.1, %edi
	movl	$32, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_4
.LBB1_3:
	movl	$.L.str, %edi
	callq	puts
.LBB1_4:
	movl	$-1, %r14d
.LBB1_13:
	movl	%r14d, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_5:
	.cfi_def_cfa_offset 96
	movl	%ebx, %r14d
	imull	%r14d, %r14d
	movl	%ebx, %ebp
	sarl	$5, %ebp
	shlq	$2, %r14
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	%rsp, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	callq	hipDeviceSynchronize
	testl	%ebx, %ebx
	jle	.LBB1_10
# %bb.6:                                # %.preheader.lr.ph
	movq	8(%rsp), %rax
	movq	(%rsp), %rcx
	movl	%ebx, %edx
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB1_7:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
	movl	%esi, %r8d
	shlq	$2, %r8
	leaq	(%rcx,%r8), %r9
	addq	%rax, %r8
	xorl	%r10d, %r10d
.LBB1_8:                                #   Parent Loop BB1_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%r11d, %r11d
	cmpq	%r10, %rdi
	sete	%r11b
	movl	%r11d, (%r8,%r10,4)
	leal	(%rsi,%r10), %r11d
	movl	%r11d, (%r9,%r10,4)
	incq	%r10
	cmpq	%r10, %rdx
	jne	.LBB1_8
# %bb.9:                                # %._crit_edge
                                        #   in Loop: Header=BB1_7 Depth=1
	incq	%rdi
	addq	%rdx, %rsi
	cmpq	%rdx, %rdi
	jne	.LBB1_7
.LBB1_10:                               # %._crit_edge46
	movl	%ebp, %eax
	movq	%rax, %r15
	shlq	$32, %r15
	orq	%rax, %r15
	leaq	40(%rsp), %r14
	leaq	32(%rsp), %rsi
	movq	%r14, %rdi
	callq	gettimeofday
	cvtsi2sdq	(%r14), %xmm0
	cvtsi2sdq	8(%r14), %xmm1
	mulsd	.LCPI1_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	xorl	%r14d, %r14d
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z26__device_stub__global_mmulPiS_S_i
.LBB1_12:
	callq	hipDeviceSynchronize
	leaq	40(%rsp), %rbx
	leaq	32(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%rbx), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	jmp	.LBB1_13
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11global_mmulPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11global_mmulPiS_S_i,@object  # @_Z11global_mmulPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z11global_mmulPiS_S_i
	.p2align	3, 0x0
_Z11global_mmulPiS_S_i:
	.quad	_Z26__device_stub__global_mmulPiS_S_i
	.size	_Z11global_mmulPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: Matrix_mult [N]\n"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"error: N must be a multiple of %d\n"
	.size	.L.str.1, 35

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Elapsed time: %f sec\n"
	.size	.L.str.2, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11global_mmulPiS_S_i"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__global_mmulPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11global_mmulPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11global_mmulPiS_S_i  ; -- Begin function _Z11global_mmulPiS_S_i
	.globl	_Z11global_mmulPiS_S_i
	.p2align	8
	.type	_Z11global_mmulPiS_S_i,@function
_Z11global_mmulPiS_S_i:                 ; @_Z11global_mmulPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_mov_b32_e32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_cmp_lt_i32 s4, 32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xad_u32 v4, v2, -1, s4
	v_mad_u64_u32 v[0:1], null, s14, s2, v[3:4]
	v_mul_lo_u32 v3, v4, s4
	s_load_b64 s[2:3], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v3, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v5, off
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_ashrrev_i32_e32 v5, 31, v0
	v_ashrrev_i32_e32 v6, 31, v4
	s_load_b128 s[0:3], s[0:1], 0x0
	s_ashr_i32 s5, s4, 31
	s_mov_b32 s6, 0
	v_lshrrev_b32_e32 v5, 27, v5
	v_lshrrev_b32_e32 v6, 27, v6
	s_lshr_b32 s5, s5, 27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_add_i32 s5, s4, s5
	v_add_nc_u32_e32 v5, v0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v4, v6
	s_ashr_i32 s5, s5, 5
	v_and_b32_e32 v5, 0xffffffe0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v6, 0xffffffe0, v6
	v_sub_nc_u32_e32 v5, v0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, v4, v6
	v_lshlrev_b32_e32 v4, 2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 7, v6
	v_add_nc_u32_e32 v9, v3, v5
	v_add_nc_u32_e32 v8, 0x1000, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v7, v4
	v_add_nc_u32_e32 v11, v8, v7
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_lshl_b32 s7, s6, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, s7, v6
	v_add_nc_u32_e32 v3, s7, v9
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[12:13], null, v4, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s2, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[12:13], off
	v_mov_b32_e32 v12, v8
	s_waitcnt vmcnt(1)
	ds_store_b32 v10, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v3, v[1:2], off
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v4, s7, v7
	s_add_i32 s7, s7, 4
	ds_load_b32 v13, v12
	ds_load_b32 v14, v4
	s_cmpk_eq_i32 s7, 0x80
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[4:5], null, v13, v14, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v4 :: v_dual_add_nc_u32 v12, 0x80, v12
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s6, s6, 1
	global_store_b32 v[1:2], v4, off
	s_cmp_eq_u32 s6, s5
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11global_mmulPiS_S_i
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11global_mmulPiS_S_i, .Lfunc_end0-_Z11global_mmulPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11global_mmulPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11global_mmulPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
