#include "includes.h"
__global__ void CalcTotEnergy(double *Etotal_d, double *GlobalE_d, double *Mh_d, double *W_d, double *Rho_d, double *temperature_d, double  Gravit, double  Cp, double  Rd, double  A, double *Altitude_d, double *Altitudeh_d, double *lonlat_d, double *areasT, double *func_r_d, int     num, bool    DeepModel) {

int id  = blockIdx.x * blockDim.x + threadIdx.x;
int nv  = gridDim.y;
int lev = blockIdx.y;

if (id < num) {
double Ek, Eint, Eg;
double wx, wy, wz;
double Cv = Cp - Rd;

//calculate control volume
double zup, zlow, Vol;
zup  = Altitudeh_d[lev + 1] + A;
zlow = Altitudeh_d[lev] + A;
if (DeepModel) {
Vol = areasT[id] / pow(A, 2) * (pow(zup, 3) - pow(zlow, 3)) / 3;
}
else {
Vol = areasT[id] * (zup - zlow);
}

//calc cartesian values of vertical wind
wx = W_d[id * nv + lev] * cos(lonlat_d[id * 2 + 1]) * cos(lonlat_d[id * 2]);
wy = W_d[id * nv + lev] * cos(lonlat_d[id * 2 + 1]) * sin(lonlat_d[id * 2]);
wz = W_d[id * nv + lev] * sin(lonlat_d[id * 2 + 1]);

//kinetic energy density 0.5*rho*v^2
Ek = 0.5
* ((Mh_d[id * 3 * nv + lev * 3 + 0] + wx) * (Mh_d[id * 3 * nv + lev * 3 + 0] + wx)
+ (Mh_d[id * 3 * nv + lev * 3 + 1] + wy) * (Mh_d[id * 3 * nv + lev * 3 + 1] + wy)
+ (Mh_d[id * 3 * nv + lev * 3 + 2] + wz) * (Mh_d[id * 3 * nv + lev * 3 + 2] + wz))
/ Rho_d[id * nv + lev];

//internal energy rho*Cv*T
Eint = Cv * temperature_d[id * nv + lev] * Rho_d[id * nv + lev];

//gravitation potential energy rho*g*altitude (assuming g = constant)
Eg = Rho_d[id * nv + lev] * Gravit * Altitude_d[lev];

//total energy in the control volume
Etotal_d[id * nv + lev] = (Ek + Eint + Eg) * Vol;

// printfn("E = %e\n",Etotal_d[id*nv+lev]);
}
}
	.file	"tmpxft_00318f1e_00000000-6_CalcTotEnergy.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z59__device_stub__Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ibPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.type	_Z59__device_stub__Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ibPdS_S_S_S_S_ddddS_S_S_S_S_ib, @function
_Z59__device_stub__Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ibPdS_S_S_S_S_ddddS_S_S_S_S_ib:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$344, %rsp
	.cfi_def_cfa_offset 352
	movq	352(%rsp), %rax
	movq	%rdi, 120(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rsi, 112(%rsp)
	leaq	156(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	360(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	128(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	368(%rsp), %rax
	movq	%rcx, 96(%rsp)
	leaq	136(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	376(%rsp), %rax
	movq	%r8, 88(%rsp)
	movq	%rax, 16(%rsp)
	movq	384(%rsp), %rax
	movq	%r9, 80(%rsp)
	movq	%rax, 8(%rsp)
	movl	400(%rsp), %eax
	movsd	%xmm0, 72(%rsp)
	movb	%al, 4(%rsp)
	movsd	%xmm1, 64(%rsp)
	movsd	%xmm2, 56(%rsp)
	movsd	%xmm3, 48(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	392(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 320(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$1, 164(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	136(%rsp)
	.cfi_def_cfa_offset 360
	leaq	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib(%rip), %rdi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 368
	movq	172(%rsp), %rcx
	movl	180(%rsp), %r8d
	movq	160(%rsp), %rsi
	movl	168(%rsp), %edx
	leaq	208(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 360
	popq	%rdx
	.cfi_def_cfa_offset 352
.L2:
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$344, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z59__device_stub__Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ibPdS_S_S_S_S_ddddS_S_S_S_S_ib, .-_Z59__device_stub__Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ibPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.globl	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.type	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib, @function
_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib:
.LFB2033:
	.cfi_startproc
	endbr64
	movzbl	56(%rsp), %eax
	movl	%eax, 56(%rsp)
	jmp	_Z59__device_stub__Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ibPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.cfi_endproc
.LFE2033:
	.size	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib, .-_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void CalcTotEnergy(double *Etotal_d, double *GlobalE_d, double *Mh_d, double *W_d, double *Rho_d, double *temperature_d, double  Gravit, double  Cp, double  Rd, double  A, double *Altitude_d, double *Altitudeh_d, double *lonlat_d, double *areasT, double *func_r_d, int     num, bool    DeepModel) {

int id  = blockIdx.x * blockDim.x + threadIdx.x;
int nv  = gridDim.y;
int lev = blockIdx.y;

if (id < num) {
double Ek, Eint, Eg;
double wx, wy, wz;
double Cv = Cp - Rd;

//calculate control volume
double zup, zlow, Vol;
zup  = Altitudeh_d[lev + 1] + A;
zlow = Altitudeh_d[lev] + A;
if (DeepModel) {
Vol = areasT[id] / pow(A, 2) * (pow(zup, 3) - pow(zlow, 3)) / 3;
}
else {
Vol = areasT[id] * (zup - zlow);
}

//calc cartesian values of vertical wind
wx = W_d[id * nv + lev] * cos(lonlat_d[id * 2 + 1]) * cos(lonlat_d[id * 2]);
wy = W_d[id * nv + lev] * cos(lonlat_d[id * 2 + 1]) * sin(lonlat_d[id * 2]);
wz = W_d[id * nv + lev] * sin(lonlat_d[id * 2 + 1]);

//kinetic energy density 0.5*rho*v^2
Ek = 0.5
* ((Mh_d[id * 3 * nv + lev * 3 + 0] + wx) * (Mh_d[id * 3 * nv + lev * 3 + 0] + wx)
+ (Mh_d[id * 3 * nv + lev * 3 + 1] + wy) * (Mh_d[id * 3 * nv + lev * 3 + 1] + wy)
+ (Mh_d[id * 3 * nv + lev * 3 + 2] + wz) * (Mh_d[id * 3 * nv + lev * 3 + 2] + wz))
/ Rho_d[id * nv + lev];

//internal energy rho*Cv*T
Eint = Cv * temperature_d[id * nv + lev] * Rho_d[id * nv + lev];

//gravitation potential energy rho*g*altitude (assuming g = constant)
Eg = Rho_d[id * nv + lev] * Gravit * Altitude_d[lev];

//total energy in the control volume
Etotal_d[id * nv + lev] = (Ek + Eint + Eg) * Vol;

// printfn("E = %e\n",Etotal_d[id*nv+lev]);
}
}
	.text
	.file	"CalcTotEnergy.hip"
	.globl	_Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib # -- Begin function _Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.type	_Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib,@function
_Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib: # @_Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$288, %rsp                      # imm = 0x120
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movb	384(%rsp), %al
	leaq	104(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	96(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	88(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	72(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	64(%rsp), %r8
	movq	%r9, (%r8)
	leaq	56(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	48(%rsp), %r11
	movsd	%xmm1, (%r11)
	leaq	40(%rsp), %r14
	movsd	%xmm2, (%r14)
	leaq	32(%rsp), %r15
	movsd	%xmm3, (%r15)
	leaq	15(%rsp), %r12
	movb	%al, (%r12)
	leaq	144(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r11, 56(%rbx)
	movq	%r14, 64(%rbx)
	movq	%r15, 72(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 120(%rbx)
	movq	%r12, 128(%rbx)
	leaq	128(%rsp), %r14
	leaq	112(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$304, %rsp                      # imm = 0x130
	.cfi_adjust_cfa_offset -304
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib, .Lfunc_end0-_Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib,@object # @_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.section	.rodata,"a",@progbits
	.globl	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.p2align	3, 0x0
_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib:
	.quad	_Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.size	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib"
	.size	.L__unnamed_1, 46

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib ; -- Begin function _Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.globl	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
	.p2align	8
	.type	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib,@function
_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib: ; @_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x8c
	s_load_b64 s[4:5], s[0:1], 0x78
	s_add_u32 s2, s0, 0x80
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s6, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s4, v2
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_27
; %bb.1:
	s_load_b256 s[24:31], s[0:1], 0x50
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s34, s15
	s_ashr_i32 s35, s15, 31
	s_and_b32 s33, s5, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s30, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s31, v1, vcc_lo
	s_lshl_b64 s[30:31], s[34:35], 3
	s_add_u32 s4, s26, s30
	global_load_b64 v[3:4], v[0:1], off
	s_addc_u32 s5, s27, s31
	s_load_b512 s[8:23], s[0:1], 0x10
	s_load_b128 s[4:7], s[4:5], 0x0
	s_cmp_eq_u32 s33, 0
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[7:8], s[6:7], s[22:23]
	v_add_f64 v[5:6], s[4:5], s[22:23]
	s_mov_b32 s4, 0
	s_cbranch_scc0 .LBB0_3
; %bb.2:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[7:8], -v[5:6]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[0:1], v[3:4]
	s_branch .LBB0_4
.LBB0_3:
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_4:                                ; %Flow175
	s_load_b32 s26, s[2:3], 0x4
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB0_6
; %bb.5:
	v_frexp_mant_f64_e64 v[0:1], |s[22:23]|
	s_mov_b32 s4, 0x55555555
	s_mov_b32 s5, 0x3fe55555
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_frexp_mant_f64_e64 v[17:18], |v[7:8]|
	v_frexp_mant_f64_e64 v[23:24], |v[5:6]|
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s36, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s37, 0x3fbdee67
	s_mov_b32 s38, 0x3abe935a
	s_mov_b32 s39, 0x3fbe25e4
	s_mov_b32 s40, 0x47e6c9c2
	s_mov_b32 s41, 0x3fc110ef
	s_mov_b32 s42, 0xcfa74449
	s_mov_b32 s43, 0x3fc3b13b
	s_mov_b32 s44, 0x71bf3c30
	s_mov_b32 s45, 0x3fc745d1
	s_mov_b32 s46, 0x1c7792ce
	s_mov_b32 s47, 0x3fcc71c7
	s_mov_b32 s48, 0x924920da
	s_mov_b32 s49, 0x3fd24924
	s_mov_b32 s50, 0x9999999c
	s_mov_b32 s51, 0x3fd99999
	s_mov_b32 s52, 0x55555511
	s_mov_b32 s53, 0x3fc55555
	s_mov_b32 s54, 11
	s_mov_b32 s55, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[0:1]
	v_cmp_gt_f64_e64 s2, s[4:5], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e64 s3, s[4:5], v[23:24]
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cndmask_b32_e64 v25, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[13:14], v[0:1], v9
	v_ldexp_f64 v[17:18], v[17:18], v25
	v_cndmask_b32_e64 v25, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_add_f64 v[15:16], v[13:14], 1.0
	v_add_f64 v[11:12], v[13:14], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[23:24], 1.0
	v_rcp_f64_e32 v[0:1], v[15:16]
	v_add_f64 v[19:20], v[15:16], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[31:32], v[25:26]
	v_add_f64 v[13:14], v[13:14], -v[19:20]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[15:16], v[0:1], 1.0
	v_add_f64 v[19:20], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[9:10], v[0:1], v[0:1]
	v_fma_f64 v[9:10], -v[15:16], v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[0:1], v[0:1]
	v_mul_f64 v[0:1], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[21:22], v[15:16], v[0:1]
	v_fma_f64 v[15:16], v[0:1], v[15:16], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[0:1], v[13:14], v[15:16]
	v_rcp_f64_e32 v[15:16], v[19:20]
	v_add_f64 v[27:28], v[21:22], v[13:14]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[29:30], -v[19:20], v[15:16], 1.0
	v_add_f64 v[33:34], v[11:12], -v[27:28]
	v_add_f64 v[21:22], v[27:28], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[29:30], v[15:16], v[15:16]
	v_fma_f64 v[29:30], -v[25:26], v[31:32], 1.0
	v_add_f64 v[11:12], v[11:12], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[13:14], v[21:22], -v[13:14]
	v_add_f64 v[21:22], v[17:18], -1.0
	v_fma_f64 v[35:36], -v[19:20], v[15:16], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[31:32]
	v_add_f64 v[31:32], v[23:24], -1.0
	v_add_f64 v[11:12], v[11:12], -v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[35:36], v[15:16], v[15:16]
	v_fma_f64 v[27:28], -v[25:26], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[13:14], v[11:12]
	v_mul_f64 v[13:14], v[21:22], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], v[27:28], v[29:30], v[29:30]
	v_add_f64 v[29:30], v[19:20], -1.0
	v_add_f64 v[11:12], v[33:34], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[33:34], v[19:20], v[13:14]
	v_mul_f64 v[35:36], v[31:32], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[17:18], -v[29:30]
	v_fma_f64 v[17:18], v[13:14], v[19:20], -v[33:34]
	v_add_f64 v[19:20], v[25:26], -1.0
	v_mul_f64 v[29:30], v[25:26], v[35:36]
	v_add_f64 v[37:38], v[0:1], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[11:12], v[13:14], v[11:12], v[17:18]
	v_add_f64 v[17:18], v[23:24], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[35:36], v[25:26], -v[29:30]
	v_add_f64 v[0:1], v[37:38], -v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[33:34], v[11:12]
	v_fma_f64 v[17:18], v[35:36], v[17:18], v[19:20]
	v_mul_f64 v[19:20], v[37:38], v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[0:1], v[9:10], -v[0:1]
	v_add_f64 v[9:10], v[21:22], -v[23:24]
	v_add_f64 v[33:34], v[23:24], -v[33:34]
	v_add_f64 v[25:26], v[29:30], v[17:18]
	v_fma_f64 v[39:40], v[37:38], v[37:38], -v[19:20]
	v_add_f64 v[41:42], v[0:1], v[0:1]
	v_add_f64 v[21:22], v[21:22], -v[9:10]
	v_add_f64 v[11:12], v[33:34], -v[11:12]
	v_add_f64 v[43:44], v[31:32], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[39:40], v[37:38], v[41:42], v[39:40]
	v_add_f64 v[21:22], v[21:22], -v[23:24]
	v_add_f64 v[23:24], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[31:32], -v[43:44]
	v_add_f64 v[31:32], v[19:20], v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[11:12], v[11:12], v[21:22]
	v_add_f64 v[17:18], v[23:24], -v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[29:30], -v[25:26]
	v_fma_f64 v[23:24], v[31:32], s[36:37], s[6:7]
	v_add_f64 v[19:20], v[31:32], -v[19:20]
	v_mul_f64 v[47:48], v[37:38], v[31:32]
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[17:18], v[21:22]
	v_fma_f64 v[17:18], v[31:32], v[23:24], s[38:39]
	v_add_f64 v[19:20], v[39:40], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[9:10], v[15:16], v[9:10]
	v_add_f64 v[11:12], v[43:44], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[31:32], v[17:18], s[40:41]
	v_add_f64 v[17:18], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[11:12], v[27:28], v[11:12]
	v_fma_f64 v[15:16], v[31:32], v[15:16], s[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[17:18], -v[13:14]
	v_mul_f64 v[23:24], v[17:18], v[17:18]
	v_add_f64 v[21:22], v[35:36], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[31:32], v[15:16], s[44:45]
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[17:18], v[17:18], -v[23:24]
	v_add_f64 v[13:14], v[21:22], -v[35:36]
	v_mul_f64 v[29:30], v[21:22], v[21:22]
	v_fma_f64 v[15:16], v[31:32], v[15:16], s[46:47]
	v_add_f64 v[27:28], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[13:14], v[31:32], v[15:16], s[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[17:18], v[27:28], v[25:26]
	v_fma_f64 v[25:26], v[21:22], v[21:22], -v[29:30]
	v_add_f64 v[27:28], v[11:12], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], v[31:32], v[13:14], s[50:51]
	v_add_f64 v[33:34], v[23:24], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[21:22], v[27:28], v[25:26]
	v_mul_f64 v[27:28], v[31:32], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[35:36], v[33:34], s[36:37], s[6:7]
	v_add_f64 v[23:24], v[33:34], -v[23:24]
	v_add_f64 v[41:42], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[39:40], v[31:32], v[13:14], -v[27:28]
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[15:16], -v[23:24]
	v_fma_f64 v[43:44], v[41:42], s[36:37], s[6:7]
	s_mov_b32 s7, 0xbfe55555
	s_mov_b32 s6, s4
	s_mov_b32 s36, 0xd5df274d
	s_mov_b32 s37, 0x3c8543b0
	v_add_f64 v[29:30], v[41:42], -v[29:30]
	v_fma_f64 v[13:14], v[19:20], v[13:14], v[39:40]
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[39:40], v[41:42], v[43:44], s[38:39]
	s_mov_b32 s38, 0x6a5dcb37
	s_mov_b32 s39, 0x3e5ade15
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[27:28], v[13:14]
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], v[41:42], v[39:40], s[40:41]
	s_mov_b32 s40, 0x623fde64
	s_mov_b32 s41, 0x3ec71dee
	v_add_f64 v[45:46], v[43:44], s[4:5]
	v_add_f64 v[27:28], v[43:44], -v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[44:45]
	v_fma_f64 v[39:40], v[41:42], v[39:40], s[42:43]
	s_mov_b32 s42, 0x7c89e6b0
	s_mov_b32 s43, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[49:50], v[45:46], s[6:7]
	v_add_f64 v[13:14], v[13:14], -v[27:28]
	v_fma_f64 v[27:28], v[31:32], v[37:38], -v[47:48]
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[46:47]
	v_fma_f64 v[39:40], v[41:42], v[39:40], s[44:45]
	s_mov_b32 s44, 0x14761f6e
	s_mov_b32 s45, 0x3f2a01a0
	v_add_f64 v[43:44], v[43:44], -v[49:50]
	v_add_f64 v[13:14], v[13:14], s[36:37]
	v_fma_f64 v[27:28], v[31:32], v[0:1], v[27:28]
	v_fma_f64 v[31:32], v[33:34], v[35:36], s[48:49]
	v_ldexp_f64 v[0:1], v[0:1], 1
	v_fma_f64 v[35:36], v[41:42], v[39:40], s[46:47]
	s_mov_b32 s46, 0x1852b7b0
	s_mov_b32 s47, 0x3f56c16c
	v_add_f64 v[13:14], v[13:14], v[43:44]
	v_fma_f64 v[19:20], v[19:20], v[37:38], v[27:28]
	v_fma_f64 v[27:28], v[33:34], v[31:32], s[50:51]
	v_ldexp_f64 v[37:38], v[37:38], 1
	v_fma_f64 v[31:32], v[41:42], v[35:36], s[48:49]
	s_mov_b32 s48, 0x11122322
	s_mov_b32 s49, 0x3f811111
	v_add_f64 v[35:36], v[45:46], v[13:14]
	v_add_f64 v[39:40], v[47:48], v[19:20]
	v_mul_f64 v[43:44], v[33:34], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[31:32], v[41:42], v[31:32], s[50:51]
	s_mov_b32 s50, 0x555502a1
	s_mov_b32 s51, 0x3fa55555
	v_add_f64 v[45:46], v[45:46], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[49:50], v[39:40], v[35:36]
	v_fma_f64 v[23:24], v[33:34], v[27:28], -v[43:44]
	v_add_f64 v[47:48], v[39:40], -v[47:48]
	v_mul_f64 v[51:52], v[41:42], v[31:32]
	v_add_f64 v[13:14], v[13:14], v[45:46]
	v_fma_f64 v[45:46], v[39:40], v[35:36], -v[49:50]
	v_fma_f64 v[23:24], v[15:16], v[27:28], v[23:24]
	v_add_f64 v[19:20], v[19:20], -v[47:48]
	v_fma_f64 v[27:28], v[41:42], v[31:32], -v[51:52]
	v_frexp_exp_i32_f64_e32 v47, s[22:23]
	v_fma_f64 v[13:14], v[39:40], v[13:14], v[45:46]
	v_add_f64 v[29:30], v[43:44], v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], v[25:26], v[31:32], v[27:28]
	v_subrev_co_ci_u32_e32 v55, vcc_lo, 0, v47, vcc_lo
	v_mul_f64 v[47:48], v[21:22], v[41:42]
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[55:56], v55
	v_fma_f64 v[13:14], v[19:20], v[35:36], v[13:14]
	v_add_f64 v[19:20], v[29:30], s[4:5]
	v_add_f64 v[31:32], v[29:30], -v[43:44]
	v_mul_f64 v[35:36], v[17:18], v[33:34]
	v_add_f64 v[39:40], v[51:52], v[27:28]
	v_add_f64 v[43:44], v[49:50], v[13:14]
	v_add_f64 v[45:46], v[19:20], s[6:7]
	v_add_f64 v[23:24], v[23:24], -v[31:32]
	v_fma_f64 v[31:32], v[33:34], v[17:18], -v[35:36]
	v_add_f64 v[53:54], v[39:40], s[4:5]
	v_add_f64 v[51:52], v[39:40], -v[51:52]
	s_mov_b32 s4, 0xfefa39ef
	s_mov_b32 s5, 0x3fe62e42
	v_add_f64 v[57:58], v[37:38], v[43:44]
	v_add_f64 v[49:50], v[43:44], -v[49:50]
	v_add_f64 v[29:30], v[29:30], -v[45:46]
	v_add_f64 v[23:24], v[23:24], s[36:37]
	v_fma_f64 v[31:32], v[33:34], v[9:10], v[31:32]
	v_fma_f64 v[33:34], v[41:42], v[21:22], -v[47:48]
	v_add_f64 v[45:46], v[53:54], s[6:7]
	v_add_f64 v[27:28], v[27:28], -v[51:52]
	v_mul_f64 v[51:52], v[55:56], s[4:5]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_add_f64 v[37:38], v[57:58], -v[37:38]
	v_add_f64 v[13:14], v[13:14], -v[49:50]
	v_add_f64 v[23:24], v[23:24], v[29:30]
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[31:32]
	v_fma_f64 v[29:30], v[41:42], v[11:12], v[33:34]
	v_add_f64 v[31:32], v[39:40], -v[45:46]
	v_add_f64 v[27:28], v[27:28], s[36:37]
	v_fma_f64 v[33:34], v[55:56], s[4:5], -v[51:52]
	v_ldexp_f64 v[17:18], v[17:18], 1
	v_ldexp_f64 v[11:12], v[11:12], 1
	s_mov_b32 s36, 0xfca7ab0c
	s_mov_b32 s37, 0x3e928af3
	v_add_f64 v[37:38], v[43:44], -v[37:38]
	v_add_f64 v[0:1], v[0:1], v[13:14]
	v_add_f64 v[13:14], v[19:20], v[23:24]
	v_add_f64 v[39:40], v[35:36], v[15:16]
	v_fma_f64 v[25:26], v[25:26], v[21:22], v[29:30]
	v_ldexp_f64 v[21:22], v[21:22], 1
	v_add_f64 v[27:28], v[27:28], v[31:32]
	v_fma_f64 v[29:30], v[55:56], s[6:7], v[33:34]
	v_add_f64 v[0:1], v[0:1], v[37:38]
	v_add_f64 v[19:20], v[19:20], -v[13:14]
	v_mul_f64 v[31:32], v[39:40], v[13:14]
	v_add_f64 v[37:38], v[47:48], v[25:26]
	v_add_f64 v[35:36], v[39:40], -v[35:36]
	v_add_f64 v[33:34], v[53:54], v[27:28]
	v_add_f64 v[41:42], v[51:52], v[29:30]
	v_add_f64 v[43:44], v[57:58], v[0:1]
	v_add_f64 v[19:20], v[23:24], v[19:20]
	v_fma_f64 v[23:24], v[39:40], v[13:14], -v[31:32]
	v_add_f64 v[15:16], v[15:16], -v[35:36]
	v_add_f64 v[45:46], v[53:54], -v[33:34]
	v_mul_f64 v[49:50], v[37:38], v[33:34]
	v_add_f64 v[53:54], v[41:42], v[43:44]
	v_fma_f64 v[19:20], v[39:40], v[19:20], v[23:24]
	v_add_f64 v[23:24], v[37:38], -v[47:48]
	v_add_f64 v[27:28], v[27:28], v[45:46]
	v_fma_f64 v[35:36], v[37:38], v[33:34], -v[49:50]
	v_add_f64 v[39:40], v[53:54], -v[41:42]
	v_fma_f64 v[13:14], v[15:16], v[13:14], v[19:20]
	v_add_f64 v[15:16], v[25:26], -v[23:24]
	v_add_f64 v[25:26], v[43:44], -v[57:58]
	v_add_f64 v[23:24], v[41:42], -v[51:52]
	v_fma_f64 v[19:20], v[37:38], v[27:28], v[35:36]
	v_frexp_exp_i32_f64_e32 v37, v[7:8]
	v_add_f64 v[27:28], v[53:54], -v[39:40]
	v_add_f64 v[35:36], v[31:32], v[13:14]
	v_add_f64 v[0:1], v[0:1], -v[25:26]
	v_fma_f64 v[15:16], v[15:16], v[33:34], v[19:20]
	v_add_f64 v[19:20], v[29:30], -v[23:24]
	v_add_f64 v[23:24], v[43:44], -v[39:40]
	v_frexp_exp_i32_f64_e32 v39, v[5:6]
	v_add_f64 v[25:26], v[41:42], -v[27:28]
	v_subrev_co_ci_u32_e64 v27, vcc_lo, 0, v37, s2
	v_add_f64 v[29:30], v[17:18], v[35:36]
	v_add_f64 v[31:32], v[35:36], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[27:28], v27
	v_add_f64 v[33:34], v[49:50], v[15:16]
	v_add_f64 v[37:38], v[19:20], v[0:1]
	v_subrev_co_ci_u32_e64 v39, vcc_lo, 0, v39, s3
	s_mov_b32 s2, 0x652b82fe
	s_mov_b32 s3, 0x3ff71547
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[17:18], v[29:30], -v[17:18]
	v_add_f64 v[13:14], v[13:14], -v[31:32]
	v_cvt_f64_i32_e32 v[31:32], v39
	v_mul_f64 v[25:26], v[27:28], s[4:5]
	v_add_f64 v[39:40], v[21:22], v[33:34]
	v_add_f64 v[41:42], v[33:34], -v[49:50]
	v_add_f64 v[43:44], v[37:38], -v[19:20]
	v_add_f64 v[23:24], v[37:38], v[23:24]
	v_add_f64 v[17:18], v[35:36], -v[17:18]
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_mul_f64 v[13:14], v[31:32], s[4:5]
	v_fma_f64 v[45:46], v[27:28], s[4:5], -v[25:26]
	v_add_f64 v[21:22], v[39:40], -v[21:22]
	v_add_f64 v[15:16], v[15:16], -v[41:42]
	v_add_f64 v[35:36], v[37:38], -v[43:44]
	v_add_f64 v[0:1], v[0:1], -v[43:44]
	v_add_f64 v[37:38], v[53:54], v[23:24]
	v_add_f64 v[9:10], v[9:10], v[17:18]
	v_fma_f64 v[17:18], v[31:32], s[4:5], -v[13:14]
	v_fma_f64 v[27:28], v[27:28], s[6:7], v[45:46]
	v_add_f64 v[21:22], v[33:34], -v[21:22]
	v_add_f64 v[11:12], v[11:12], v[15:16]
	v_add_f64 v[15:16], v[19:20], -v[35:36]
	s_mov_b32 s5, 0xbfe62e42
	v_add_f64 v[19:20], v[37:38], -v[53:54]
	v_add_f64 v[35:36], v[29:30], v[9:10]
	v_fma_f64 v[17:18], v[31:32], s[6:7], v[17:18]
	v_add_f64 v[33:34], v[25:26], v[27:28]
	s_mov_b32 s7, 0xbc7abc9e
	v_add_f64 v[11:12], v[11:12], v[21:22]
	v_add_f64 v[0:1], v[0:1], v[15:16]
	v_add_f64 v[15:16], v[23:24], -v[19:20]
	v_add_f64 v[29:30], v[35:36], -v[29:30]
	v_add_f64 v[21:22], v[13:14], v[17:18]
	v_add_f64 v[19:20], v[33:34], v[35:36]
	v_add_f64 v[25:26], v[33:34], -v[25:26]
	v_add_f64 v[23:24], v[39:40], v[11:12]
	v_add_f64 v[0:1], v[0:1], v[15:16]
	v_add_f64 v[9:10], v[9:10], -v[29:30]
	v_add_f64 v[13:14], v[21:22], -v[13:14]
	v_add_f64 v[15:16], v[19:20], -v[33:34]
	v_add_f64 v[25:26], v[27:28], -v[25:26]
	v_add_f64 v[31:32], v[21:22], v[23:24]
	v_add_f64 v[29:30], v[23:24], -v[39:40]
	v_add_f64 v[41:42], v[37:38], v[0:1]
	v_add_f64 v[13:14], v[17:18], -v[13:14]
	v_add_f64 v[43:44], v[19:20], -v[15:16]
	v_add_f64 v[15:16], v[35:36], -v[15:16]
	v_add_f64 v[45:46], v[31:32], -v[21:22]
	v_add_f64 v[11:12], v[11:12], -v[29:30]
	v_add_f64 v[37:38], v[41:42], -v[37:38]
	v_add_f64 v[47:48], v[41:42], v[41:42]
	v_add_f64 v[27:28], v[33:34], -v[43:44]
	v_add_f64 v[33:34], v[31:32], -v[45:46]
	v_add_f64 v[17:18], v[23:24], -v[45:46]
	v_add_f64 v[0:1], v[0:1], -v[37:38]
	v_fma_f64 v[35:36], v[41:42], 2.0, -v[47:48]
	v_add_f64 v[37:38], v[25:26], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[47:48], 0x204
	v_add_f64 v[15:16], v[15:16], v[27:28]
	v_add_f64 v[27:28], v[13:14], v[11:12]
	v_add_f64 v[21:22], v[21:22], -v[33:34]
	v_fma_f64 v[0:1], v[0:1], 2.0, v[35:36]
	v_add_f64 v[23:24], v[37:38], -v[25:26]
	v_add_f64 v[15:16], v[37:38], v[15:16]
	v_add_f64 v[35:36], v[27:28], -v[13:14]
	v_add_f64 v[17:18], v[17:18], v[21:22]
	v_add_f64 v[21:22], v[47:48], v[0:1]
	v_add_f64 v[29:30], v[37:38], -v[23:24]
	v_add_f64 v[9:10], v[9:10], -v[23:24]
	v_add_f64 v[33:34], v[19:20], v[15:16]
	v_add_f64 v[11:12], v[11:12], -v[35:36]
	v_add_f64 v[17:18], v[27:28], v[17:18]
	v_dual_cndmask_b32 v38, v22, v48 :: v_dual_cndmask_b32 v37, v21, v47
	v_add_f64 v[23:24], v[25:26], -v[29:30]
	v_add_f64 v[25:26], v[27:28], -v[35:36]
	v_add_f64 v[21:22], v[21:22], -v[47:48]
	v_add_f64 v[19:20], v[33:34], -v[19:20]
	v_mul_f64 v[39:40], v[37:38], s[2:3]
	v_add_f64 v[27:28], v[31:32], v[17:18]
	v_add_f64 v[9:10], v[9:10], v[23:24]
	v_add_f64 v[13:14], v[13:14], -v[25:26]
	v_add_f64 v[0:1], v[0:1], -v[21:22]
	v_add_f64 v[15:16], v[15:16], -v[19:20]
	v_rndne_f64_e32 v[29:30], v[39:40]
	v_add_f64 v[19:20], v[27:28], -v[31:32]
	v_add_f64 v[11:12], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], v[15:16]
	v_fma_f64 v[23:24], v[29:30], s[4:5], v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[17:18], -v[19:20]
	v_cvt_i32_f64_e32 v49, v[29:30]
	v_add_f64 v[17:18], v[33:34], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[29:30], s[6:7], v[23:24]
	v_add_f64 v[11:12], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[17:18], -v[33:34]
	v_mul_f64 v[23:24], 0x40080000, v[17:18]
	v_fma_f64 v[13:14], v[15:16], s[38:39], s[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[27:28], v[11:12]
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], 0x40080000, v[17:18], -v[23:24]
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[40:41]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[19:20], v[25:26], -v[27:28]
	v_mul_f64 v[27:28], 0x40080000, v[25:26]
	v_cmp_class_f64_e64 vcc_lo, v[23:24], 0x204
	v_fma_f64 v[9:10], 0x40080000, v[9:10], v[17:18]
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[42:43]
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	v_fma_f64 v[17:18], 0x40080000, v[25:26], -v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[23:24], v[9:10]
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], 0x40080000, v[11:12], v[17:18]
	v_dual_cndmask_b32 v18, v20, v24 :: v_dual_cndmask_b32 v17, v19, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[46:47]
	v_add_f64 v[31:32], v[27:28], v[11:12]
	v_cmp_class_f64_e64 vcc_lo, v[27:28], 0x204
	v_add_f64 v[19:20], v[19:20], -v[23:24]
	v_mul_f64 v[25:26], v[17:18], s[2:3]
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[48:49]
	v_dual_cndmask_b32 v34, v32, v28 :: v_dual_cndmask_b32 v33, v31, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_rndne_f64_e32 v[25:26], v[25:26]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[37:38]|
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	v_mul_f64 v[35:36], v[33:34], s[2:3]
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[37:38]
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[37:38]
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[50:51]
	v_fma_f64 v[39:40], v[25:26], s[4:5], v[17:18]
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
	v_rndne_f64_e32 v[35:36], v[35:36]
	s_and_b32 vcc_lo, s3, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[52:53]
	v_fma_f64 v[39:40], v[25:26], s[6:7], v[39:40]
	v_cvt_i32_f64_e32 v25, v[25:26]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[41:42], v[35:36], s[4:5], v[33:34]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[17:18]
	v_cmp_ngt_f64_e64 s5, 0xc090cc00, v[33:34]
	v_fma_f64 v[13:14], v[15:16], v[13:14], s[54:55]
	v_fma_f64 v[43:44], v[39:40], s[38:39], s[36:37]
	v_fma_f64 v[41:42], v[35:36], s[6:7], v[41:42]
	v_cmp_class_f64_e64 s6, v[7:8], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], v[15:16], v[13:14], 1.0
	v_fma_f64 v[43:44], v[39:40], v[43:44], s[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[41:42], s[38:39], s[36:37]
	v_fma_f64 v[13:14], v[15:16], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[39:40], v[43:44], s[42:43]
	v_fma_f64 v[29:30], v[41:42], v[45:46], s[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[13:14], v[13:14], v49
	v_fma_f64 v[15:16], v[39:40], v[15:16], s[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[41:42], v[29:30], s[42:43]
	v_cndmask_b32_e64 v29, 0x7ff00000, v14, s2
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |s[22:23]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[39:40], v[15:16], s[46:47]
	v_cndmask_b32_e64 v30, 0, v29, s3
	v_cndmask_b32_e32 v29, 0, v13, vcc_lo
	v_cmp_neq_f64_e64 s3, s[22:23], 0
	v_fma_f64 v[21:22], v[41:42], v[21:22], s[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[0:1], v[29:30], v[0:1], v[29:30]
	v_cmp_class_f64_e64 vcc_lo, v[29:30], 0x204
	v_fma_f64 v[13:14], v[39:40], v[14:15], s[48:49]
	v_fma_f64 v[15:16], v[41:42], v[21:22], s[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v1, v30 :: v_dual_cndmask_b32 v0, v0, v29
	s_and_b32 vcc_lo, s3, s2
	v_dual_cndmask_b32 v0, 0, v0 :: v_dual_and_b32 v1, 0x7fffffff, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v1, 0x7ff00000, v1, s2
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[17:18]|
	v_cndmask_b32_e64 v1, 0, v1, s3
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[17:18]
	v_add_f64 v[17:18], v[31:32], -v[27:28]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_div_scale_f64 v[21:22], null, v[0:1], v[0:1], v[3:4]
	v_div_scale_f64 v[19:20], vcc_lo, v[3:4], v[0:1], v[3:4]
	v_fma_f64 v[13:14], v[39:40], v[13:14], s[50:51]
	v_fma_f64 v[15:16], v[41:42], v[15:16], s[48:49]
	v_cndmask_b32_e64 v10, 0, v10, s2
	v_cndmask_b32_e64 v9, 0, v9, s2
	s_and_b32 s2, s4, s3
	v_add_f64 v[11:12], v[11:12], -v[17:18]
	v_rcp_f64_e32 v[29:30], v[21:22]
	v_fma_f64 v[13:14], v[39:40], v[13:14], s[52:53]
	v_fma_f64 v[15:16], v[41:42], v[15:16], s[50:51]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[37:38], -v[21:22], v[29:30], 1.0
	v_fma_f64 v[13:14], v[39:40], v[13:14], s[54:55]
	v_fma_f64 v[15:16], v[41:42], v[15:16], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[29:30], v[29:30], v[37:38], v[29:30]
	v_fma_f64 v[13:14], v[39:40], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[41:42], v[15:16], s[54:55]
	v_fma_f64 v[23:24], -v[21:22], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[39:40], v[13:14], 1.0
	v_fma_f64 v[15:16], v[41:42], v[15:16], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[29:30], v[23:24], v[29:30]
	v_ldexp_f64 v[13:14], v[13:14], v25
	v_cvt_i32_f64_e32 v25, v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[41:42], v[15:16], 1.0
	v_cndmask_b32_e64 v29, 0x7ff00000, v14, s3
	v_cmp_eq_f64_e64 s3, 0, v[7:8]
	v_cndmask_b32_e64 v27, 0, v13, s2
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[33:34]|
	v_ldexp_f64 v[14:15], v[15:16], v25
	v_mul_f64 v[25:26], v[19:20], v[23:24]
	v_cndmask_b32_e64 v28, 0, v29, s4
	v_cmp_nlt_f64_e64 s4, 0x40900000, v[33:34]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[9:10], v[27:28], v[9:10], v[27:28]
	s_or_b32 s6, s3, s6
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s7, 0, 0x7ff00000
	v_cndmask_b32_e64 v12, 0, v12, s2
	v_cndmask_b32_e64 v11, 0, v11, s2
	v_cmp_class_f64_e64 s2, v[27:28], 0x204
	v_cndmask_b32_e64 v7, 0x7ff00000, v15, s4
	v_fma_f64 v[15:16], -v[21:22], v[25:26], v[19:20]
	s_and_b32 s3, s5, s4
	v_cmp_eq_f64_e64 s4, 0, v[5:6]
	v_cndmask_b32_e64 v17, 0, v14, s3
	v_cndmask_b32_e64 v18, 0, v7, s5
	v_cmp_class_f64_e64 s5, v[5:6], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[17:18], v[11:12], v[17:18]
	v_cmp_class_f64_e64 s3, v[17:18], 0x204
	v_cndmask_b32_e64 v5, v10, v28, s2
	v_cndmask_b32_e64 v7, v9, v27, s2
	v_div_fmas_f64 v[13:14], v[15:16], v[23:24], v[25:26]
	v_bfi_b32 v9, 0x7fffffff, v5, v8
	v_bfi_b32 v8, 0x7fffffff, s7, v8
	s_or_b32 vcc_lo, s4, s5
	s_and_b32 s2, s4, exec_lo
	s_cselect_b32 s2, 0, 0x7ff00000
	v_cndmask_b32_e64 v5, v12, v18, s3
	v_cndmask_b32_e64 v10, v11, v17, s3
	v_bfi_b32 v11, 0x7fffffff, s2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_bfi_b32 v12, 0x7fffffff, v5, v6
	v_cndmask_b32_e64 v5, v7, 0, s6
	v_cndmask_b32_e64 v6, v9, v8, s6
	v_cndmask_b32_e64 v7, v10, 0, vcc_lo
	v_cndmask_b32_e32 v8, v12, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_div_fixup_f64 v[0:1], v[13:14], v[0:1], v[3:4]
	v_mul_f64 v[0:1], v[5:6], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[3:4], null, 0x40080000, 0x40080000, v[0:1]
	v_rcp_f64_e32 v[5:6], v[3:4]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[7:8], -v[3:4], v[5:6], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[5:6], v[7:8], v[5:6]
	v_fma_f64 v[7:8], -v[3:4], v[5:6], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[5:6], v[7:8], v[5:6]
	v_div_scale_f64 v[7:8], vcc_lo, v[0:1], 0x40080000, v[0:1]
	v_mul_f64 v[9:10], v[7:8], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[3:4], -v[3:4], v[9:10], v[7:8]
	v_div_fmas_f64 v[3:4], v[3:4], v[5:6], v[9:10]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[3:4], 0x40080000, v[0:1]
.LBB0_6:
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v3, 1, v2
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[8:9], null, v2, s26, s[34:35]
                                        ; implicit-def: $vgpr43
                                        ; implicit-def: $vgpr13_vgpr14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v11, vcc_lo, s28, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, s29, v4, vcc_lo
	v_lshlrev_b64 v[2:3], 3, v[8:9]
                                        ; implicit-def: $vgpr9_vgpr10
	global_load_b64 v[6:7], v[11:12], off offset:8
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[6:7]|
	v_trig_preop_f64 v[23:24], |v[6:7]|, 0
	v_trig_preop_f64 v[21:22], |v[6:7]|, 1
	v_ldexp_f64 v[27:28], |v[6:7]|, 0xffffff80
	v_trig_preop_f64 v[19:20], |v[6:7]|, 2
	v_and_b32_e32 v46, 0x7fffffff, v7
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[6:7]|
	v_mov_b32_e32 v39, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v10, v46, v28, vcc_lo
	v_cndmask_b32_e32 v9, v6, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[13:14], v[23:24], v[9:10]
	v_mul_f64 v[15:16], v[21:22], v[9:10]
	v_fma_f64 v[17:18], v[23:24], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[37:38], v[21:22], v[9:10], -v[15:16]
	v_add_f64 v[25:26], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[25:26], -v[15:16]
	v_add_f64 v[33:34], v[13:14], v[25:26]
	v_add_f64 v[31:32], v[25:26], -v[29:30]
	v_add_f64 v[17:18], v[17:18], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[29:30], v[33:34], -2
	v_add_f64 v[13:14], v[33:34], -v[13:14]
	v_add_f64 v[15:16], v[15:16], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[29:30]|
	v_add_f64 v[13:14], v[25:26], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[17:18], v[15:16]
	v_fract_f64_e32 v[17:18], v[29:30]
	v_dual_cndmask_b32 v18, 0, v18 :: v_dual_cndmask_b32 v17, 0, v17
	v_mul_f64 v[35:36], v[19:20], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[17:18], v[17:18], 2
	v_add_f64 v[31:32], v[35:36], v[37:38]
	v_fma_f64 v[9:10], v[19:20], v[9:10], -v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[31:32], v[15:16]
	v_add_f64 v[29:30], v[13:14], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[29:30], v[17:18]
	v_add_f64 v[13:14], v[29:30], -v[13:14]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[33:34]
	v_add_f64 v[33:34], v[31:32], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[25:26], -v[13:14]
	v_cndmask_b32_e64 v40, 0, 0x40100000, vcc_lo
	v_add_f64 v[44:45], v[31:32], -v[33:34]
	v_add_f64 v[33:34], v[37:38], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], v[39:40]
	v_add_f64 v[40:41], v[25:26], -v[31:32]
	v_add_f64 v[37:38], v[35:36], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[29:30], v[17:18]
	v_add_f64 v[47:48], v[25:26], -v[40:41]
	v_add_f64 v[15:16], v[15:16], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[33:34], v[37:38]
	v_cvt_i32_f64_e32 v42, v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], -v[47:48]
	v_cvt_f64_i32_e32 v[40:41], v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[31:32]
	v_add_f64 v[17:18], v[17:18], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[33:34], v[15:16]
	v_add_f64 v[31:32], v[29:30], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[15:16]
	v_add_f64 v[15:16], v[31:32], -v[17:18]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[13:14], v[9:10]
	v_add_f64 v[13:14], v[29:30], -v[15:16]
	v_cndmask_b32_e64 v40, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v43, s2, 0, v42, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_add_f64 v[13:14], v[31:32], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[13:14], v[9:10]
	v_mul_f64 v[17:18], v[15:16], s[6:7]
	v_add_f64 v[13:14], v[15:16], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], v[15:16], s[6:7], -v[17:18]
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[15:16], s[10:11], v[25:26]
	v_fma_f64 v[13:14], v[9:10], s[6:7], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[17:18], v[13:14]
	v_add_f64 v[15:16], v[9:10], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[15:16]
.LBB0_8:                                ; %Flow174
	s_and_not1_saveexec_b32 s2, s4
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[9:10], |v[6:7]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[9:10]
	v_fma_f64 v[9:10], v[15:16], s[4:5], |v[6:7]|
	v_mul_f64 v[13:14], v[15:16], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v43, v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[15:16], s[6:7], v[9:10]
	v_add_f64 v[17:18], v[9:10], v[13:14]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[17:18]
	v_add_f64 v[17:18], v[17:18], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_fma_f64 v[13:14], v[15:16], s[6:7], v[13:14]
	v_add_f64 v[9:10], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	v_fma_f64 v[13:14], v[15:16], s[4:5], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[25:26], v[13:14]
	v_add_f64 v[17:18], v[9:10], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[17:18]
.LBB0_10:                               ; %_ZL3cosd.exit
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b64 v[11:12], v[11:12], off
                                        ; implicit-def: $vgpr44
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $vgpr17_vgpr18
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f64_e64 s4, 0x41d00000, |v[11:12]|
	v_trig_preop_f64 v[39:40], |v[11:12]|, 0
	v_trig_preop_f64 v[37:38], |v[11:12]|, 1
	v_ldexp_f64 v[41:42], |v[11:12]|, 0xffffff80
	v_trig_preop_f64 v[35:36], |v[11:12]|, 2
	v_and_b32_e32 v48, 0x7fffffff, v12
	s_and_saveexec_b32 s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[11:12]|
	v_mov_b32_e32 v55, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v16, v48, v42 :: v_dual_cndmask_b32 v15, v11, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[17:18], v[39:40], v[15:16]
	v_mul_f64 v[25:26], v[37:38], v[15:16]
	v_mul_f64 v[51:52], v[35:36], v[15:16]
	v_fma_f64 v[29:30], v[39:40], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[37:38], v[15:16], -v[25:26]
	v_fma_f64 v[15:16], v[35:36], v[15:16], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[25:26], v[29:30]
	v_add_f64 v[33:34], v[31:32], -v[25:26]
	v_add_f64 v[49:50], v[17:18], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[31:32], -v[33:34]
	v_add_f64 v[29:30], v[29:30], -v[33:34]
	v_ldexp_f64 v[33:34], v[49:50], -2
	v_add_f64 v[17:18], v[49:50], -v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], -v[44:45]
	v_add_f64 v[44:45], v[51:52], v[53:54]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[33:34]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[31:32], -v[17:18]
	v_add_f64 v[25:26], v[29:30], v[25:26]
	v_fract_f64_e32 v[29:30], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[44:45], v[25:26]
	v_dual_cndmask_b32 v30, 0, v30 :: v_dual_cndmask_b32 v29, 0, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[29:30], v[29:30], 2
	v_add_f64 v[33:34], v[17:18], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[33:34], v[29:30]
	v_add_f64 v[17:18], v[33:34], -v[17:18]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[49:50]
	v_add_f64 v[49:50], v[44:45], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[31:32], -v[17:18]
	v_cndmask_b32_e64 v56, 0, 0x40100000, vcc_lo
	v_add_f64 v[60:61], v[44:45], -v[49:50]
	v_add_f64 v[49:50], v[53:54], -v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[29:30], v[55:56]
	v_add_f64 v[56:57], v[31:32], -v[44:45]
	v_add_f64 v[53:54], v[51:52], -v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[58:59], v[33:34], v[29:30]
	v_add_f64 v[62:63], v[31:32], -v[56:57]
	v_add_f64 v[25:26], v[25:26], -v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[49:50], v[49:50], v[53:54]
	v_cvt_i32_f64_e32 v47, v[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[44:45], -v[62:63]
	v_cvt_f64_i32_e32 v[56:57], v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[44:45]
	v_add_f64 v[29:30], v[29:30], -v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[49:50], v[25:26]
	v_add_f64 v[49:50], v[33:34], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[25:26]
	v_add_f64 v[25:26], v[49:50], -v[29:30]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[17:18], v[15:16]
	v_add_f64 v[17:18], v[33:34], -v[25:26]
	v_cndmask_b32_e64 v56, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v44, s2, 0, v47, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[15:16], v[17:18]
	v_add_f64 v[17:18], v[49:50], -v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[17:18], v[15:16]
	v_mul_f64 v[29:30], v[25:26], s[6:7]
	v_add_f64 v[17:18], v[25:26], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[25:26], s[6:7], -v[29:30]
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[25:26], s[10:11], v[31:32]
	v_fma_f64 v[17:18], v[15:16], s[6:7], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[29:30], v[17:18]
	v_add_f64 v[25:26], v[15:16], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[25:26]
.LBB0_12:                               ; %Flow173
	s_and_not1_saveexec_b32 s2, s5
	s_cbranch_execz .LBB0_14
; %bb.13:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[15:16], |v[11:12]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[25:26], v[15:16]
	v_fma_f64 v[15:16], v[25:26], s[6:7], |v[11:12]|
	v_mul_f64 v[17:18], v[25:26], s[10:11]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v44, v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[31:32], v[25:26], s[10:11], v[15:16]
	v_add_f64 v[29:30], v[15:16], v[17:18]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[15:16], -v[29:30]
	v_add_f64 v[29:30], v[29:30], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[17:18]
	v_fma_f64 v[17:18], v[25:26], s[10:11], v[17:18]
	v_add_f64 v[15:16], v[29:30], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	v_fma_f64 v[17:18], v[25:26], s[6:7], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[31:32], v[17:18]
	v_add_f64 v[29:30], v[15:16], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[29:30]
.LBB0_14:                               ; %_ZL3cosd.exit115
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr25_vgpr26
                                        ; implicit-def: $vgpr29_vgpr30
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[6:7]|
	v_mov_b32_e32 v61, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v26, v46, v28, vcc_lo
	v_cndmask_b32_e32 v25, v6, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[29:30], v[23:24], v[25:26]
	v_mul_f64 v[31:32], v[21:22], v[25:26]
	v_fma_f64 v[33:34], v[23:24], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[59:60], v[21:22], v[25:26], -v[31:32]
	v_add_f64 v[49:50], v[31:32], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[49:50], -v[31:32]
	v_add_f64 v[55:56], v[29:30], v[49:50]
	v_add_f64 v[53:54], v[49:50], -v[51:52]
	v_add_f64 v[33:34], v[33:34], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[51:52], v[55:56], -2
	v_add_f64 v[29:30], v[55:56], -v[29:30]
	v_add_f64 v[31:32], v[31:32], -v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[51:52]|
	v_add_f64 v[29:30], v[49:50], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[33:34], v[31:32]
	v_fract_f64_e32 v[33:34], v[51:52]
	v_dual_cndmask_b32 v34, 0, v34 :: v_dual_cndmask_b32 v33, 0, v33
	v_mul_f64 v[57:58], v[19:20], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[33:34], v[33:34], 2
	v_add_f64 v[53:54], v[57:58], v[59:60]
	v_fma_f64 v[25:26], v[19:20], v[25:26], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[53:54], v[31:32]
	v_add_f64 v[51:52], v[29:30], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[51:52], v[33:34]
	v_add_f64 v[29:30], v[51:52], -v[29:30]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[55:56]
	v_add_f64 v[55:56], v[53:54], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[49:50], -v[29:30]
	v_cndmask_b32_e64 v62, 0, 0x40100000, vcc_lo
	v_add_f64 v[66:67], v[53:54], -v[55:56]
	v_add_f64 v[55:56], v[59:60], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[33:34], v[61:62]
	v_add_f64 v[62:63], v[49:50], -v[53:54]
	v_add_f64 v[59:60], v[57:58], -v[66:67]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[64:65], v[51:52], v[33:34]
	v_add_f64 v[68:69], v[49:50], -v[62:63]
	v_add_f64 v[31:32], v[31:32], -v[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[55:56], v[55:56], v[59:60]
	v_cvt_i32_f64_e32 v45, v[64:65]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], -v[68:69]
	v_cvt_f64_i32_e32 v[62:63], v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[53:54]
	v_add_f64 v[33:34], v[33:34], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[55:56], v[31:32]
	v_add_f64 v[53:54], v[51:52], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[31:32]
	v_add_f64 v[31:32], v[53:54], -v[33:34]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[29:30], v[25:26]
	v_add_f64 v[29:30], v[51:52], -v[31:32]
	v_cndmask_b32_e64 v62, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v45, s2, 0, v45, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], v[29:30]
	v_add_f64 v[29:30], v[53:54], -v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[29:30], v[25:26]
	v_mul_f64 v[33:34], v[31:32], s[6:7]
	v_add_f64 v[29:30], v[31:32], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[31:32], s[6:7], -v[33:34]
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[31:32], s[10:11], v[49:50]
	v_fma_f64 v[29:30], v[25:26], s[6:7], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[33:34], v[29:30]
	v_add_f64 v[31:32], v[25:26], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[31:32]
.LBB0_16:                               ; %Flow172
	s_and_not1_saveexec_b32 s2, s5
	s_cbranch_execz .LBB0_18
; %bb.17:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[25:26], |v[6:7]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[31:32], v[25:26]
	v_fma_f64 v[25:26], v[31:32], s[6:7], |v[6:7]|
	v_mul_f64 v[29:30], v[31:32], s[10:11]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v45, v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[31:32], s[10:11], v[25:26]
	v_add_f64 v[33:34], v[25:26], v[29:30]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	v_add_f64 v[33:34], v[33:34], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[29:30]
	v_fma_f64 v[29:30], v[31:32], s[10:11], v[29:30]
	v_add_f64 v[25:26], v[33:34], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	v_fma_f64 v[29:30], v[31:32], s[6:7], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[49:50], v[29:30]
	v_add_f64 v[33:34], v[25:26], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[33:34]
.LBB0_18:                               ; %_ZL3cosd.exit120
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr47
                                        ; implicit-def: $vgpr31_vgpr32
                                        ; implicit-def: $vgpr33_vgpr34
	s_and_saveexec_b32 s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[11:12]|
	v_mov_b32_e32 v57, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v32, v48, v42 :: v_dual_cndmask_b32 v31, v11, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[33:34], v[39:40], v[31:32]
	v_mul_f64 v[41:42], v[37:38], v[31:32]
	v_mul_f64 v[55:56], v[35:36], v[31:32]
	v_fma_f64 v[39:40], v[39:40], v[31:32], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[37:38], v[31:32], -v[41:42]
	v_fma_f64 v[31:32], v[35:36], v[31:32], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[41:42], v[39:40]
	v_add_f64 v[49:50], v[47:48], -v[41:42]
	v_add_f64 v[53:54], v[33:34], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[47:48], -v[49:50]
	v_add_f64 v[39:40], v[39:40], -v[49:50]
	v_ldexp_f64 v[49:50], v[53:54], -2
	v_add_f64 v[33:34], v[53:54], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[41:42], -v[51:52]
	v_add_f64 v[51:52], v[55:56], v[37:38]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[49:50]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[47:48], -v[33:34]
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_fract_f64_e32 v[41:42], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[51:52], v[39:40]
	v_dual_cndmask_b32 v42, 0, v42 :: v_dual_cndmask_b32 v41, 0, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[41:42], v[41:42], 2
	v_add_f64 v[49:50], v[33:34], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[49:50], v[41:42]
	v_add_f64 v[33:34], v[49:50], -v[33:34]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[53:54]
	v_add_f64 v[53:54], v[51:52], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[47:48], -v[33:34]
	v_cndmask_b32_e64 v58, 0, 0x40100000, vcc_lo
	v_add_f64 v[62:63], v[51:52], -v[53:54]
	v_add_f64 v[37:38], v[37:38], -v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[41:42], v[57:58]
	v_add_f64 v[58:59], v[47:48], -v[51:52]
	v_add_f64 v[53:54], v[55:56], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[60:61], v[49:50], v[41:42]
	v_add_f64 v[64:65], v[47:48], -v[58:59]
	v_add_f64 v[39:40], v[39:40], -v[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[37:38], v[37:38], v[53:54]
	v_cvt_i32_f64_e32 v60, v[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], -v[64:65]
	v_cvt_f64_i32_e32 v[58:59], v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[51:52]
	v_add_f64 v[41:42], v[41:42], -v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[37:38], v[39:40]
	v_add_f64 v[37:38], v[49:50], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[35:36]
	v_add_f64 v[35:36], v[37:38], -v[41:42]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[33:34], v[31:32]
	v_add_f64 v[33:34], v[49:50], -v[35:36]
	v_cndmask_b32_e64 v58, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v47, s2, 0, v60, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[31:32], v[33:34]
	v_add_f64 v[33:34], v[37:38], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[33:34], v[31:32]
	v_mul_f64 v[37:38], v[35:36], s[6:7]
	v_add_f64 v[33:34], v[35:36], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[35:36], s[6:7], -v[37:38]
	v_add_f64 v[31:32], v[31:32], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[35:36], s[10:11], v[39:40]
	v_fma_f64 v[33:34], v[31:32], s[6:7], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[37:38], v[33:34]
	v_add_f64 v[35:36], v[31:32], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[33:34], v[33:34], -v[35:36]
.LBB0_20:                               ; %Flow171
	s_and_not1_saveexec_b32 s2, s4
	s_cbranch_execz .LBB0_22
; %bb.21:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[31:32], |v[11:12]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[35:36], v[31:32]
	v_fma_f64 v[31:32], v[35:36], s[4:5], |v[11:12]|
	v_mul_f64 v[33:34], v[35:36], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v47, v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], v[35:36], s[6:7], v[31:32]
	v_add_f64 v[37:38], v[31:32], v[33:34]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[31:32], -v[37:38]
	v_add_f64 v[37:38], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[33:34]
	v_fma_f64 v[33:34], v[35:36], s[6:7], v[33:34]
	v_add_f64 v[31:32], v[37:38], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], -v[33:34]
	v_fma_f64 v[33:34], v[35:36], s[4:5], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[39:40], v[33:34]
	v_add_f64 v[37:38], v[31:32], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[33:34], v[33:34], -v[37:38]
.LBB0_22:                               ; %_ZL3sind.exit
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr39
                                        ; implicit-def: $vgpr35_vgpr36
                                        ; implicit-def: $vgpr37_vgpr38
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB0_24
; %bb.23:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[6:7]|
	v_mov_b32_e32 v54, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_cndmask_b32_e32 v28, v46, v28, vcc_lo
	v_cndmask_b32_e32 v27, v6, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[35:36], v[23:24], v[27:28]
	v_mul_f64 v[37:38], v[21:22], v[27:28]
	v_fma_f64 v[23:24], v[23:24], v[27:28], -v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[21:22], v[27:28], -v[37:38]
	v_add_f64 v[39:40], v[37:38], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[39:40], -v[37:38]
	v_add_f64 v[50:51], v[35:36], v[39:40]
	v_add_f64 v[48:49], v[39:40], -v[41:42]
	v_add_f64 v[23:24], v[23:24], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[41:42], v[50:51], -2
	v_add_f64 v[35:36], v[50:51], -v[35:36]
	v_add_f64 v[37:38], v[37:38], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[41:42]|
	v_add_f64 v[35:36], v[39:40], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], v[37:38]
	v_fract_f64_e32 v[37:38], v[41:42]
	v_dual_cndmask_b32 v38, 0, v38 :: v_dual_cndmask_b32 v37, 0, v37
	v_mul_f64 v[52:53], v[19:20], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[37:38], v[37:38], 2
	v_add_f64 v[48:49], v[52:53], v[21:22]
	v_fma_f64 v[19:20], v[19:20], v[27:28], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[48:49], v[23:24]
	v_add_f64 v[41:42], v[35:36], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[41:42], v[37:38]
	v_add_f64 v[27:28], v[41:42], -v[35:36]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[50:51]
	v_add_f64 v[50:51], v[48:49], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[39:40], -v[27:28]
	v_cndmask_b32_e64 v55, 0, 0x40100000, vcc_lo
	v_add_f64 v[59:60], v[48:49], -v[50:51]
	v_add_f64 v[21:22], v[21:22], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[37:38], v[37:38], v[54:55]
	v_add_f64 v[55:56], v[39:40], -v[48:49]
	v_add_f64 v[50:51], v[52:53], -v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[41:42], v[37:38]
	v_add_f64 v[61:62], v[39:40], -v[55:56]
	v_add_f64 v[23:24], v[23:24], -v[55:56]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[21:22], v[50:51]
	v_cvt_i32_f64_e32 v46, v[57:58]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[48:49], -v[61:62]
	v_cvt_f64_i32_e32 v[55:56], v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[48:49]
	v_add_f64 v[37:38], v[37:38], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], v[23:24]
	v_add_f64 v[23:24], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_add_f64 v[21:22], v[23:24], -v[37:38]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[27:28], v[19:20]
	v_add_f64 v[21:22], v[41:42], -v[21:22]
	v_cndmask_b32_e64 v55, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v39, s2, 0, v46, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_add_f64 v[21:22], v[23:24], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[21:22], v[19:20]
	v_mul_f64 v[27:28], v[23:24], s[4:5]
	v_add_f64 v[21:22], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[35:36], v[23:24], s[4:5], -v[27:28]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[23:24], s[6:7], v[35:36]
	v_fma_f64 v[19:20], v[19:20], s[4:5], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[27:28], v[19:20]
	v_add_f64 v[21:22], v[35:36], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[19:20], -v[21:22]
.LBB0_24:                               ; %Flow
	s_and_not1_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_26
; %bb.25:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[19:20], |v[6:7]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[19:20], v[19:20]
	v_fma_f64 v[21:22], v[19:20], s[4:5], |v[6:7]|
	v_mul_f64 v[23:24], v[19:20], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v39, v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[19:20], s[6:7], v[21:22]
	v_add_f64 v[27:28], v[21:22], v[23:24]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_add_f64 v[27:28], v[27:28], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], v[23:24]
	v_fma_f64 v[23:24], v[19:20], s[6:7], v[23:24]
	v_add_f64 v[21:22], v[27:28], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[23:24]
	v_fma_f64 v[21:22], v[19:20], s[4:5], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[37:38], v[21:22]
	v_add_f64 v[23:24], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[21:22], -v[23:24]
.LBB0_26:                               ; %_ZL3sind.exit129
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[23:24], v[25:26], v[25:26]
	v_mul_f64 v[27:28], v[31:32], v[31:32]
	s_mov_b32 s2, 0x9037ab78
	s_mov_b32 s4, 0x46cc5e42
	s_mov_b32 s10, 0xb42fdfa7
	s_mov_b32 s22, 0xf9a43bb8
	s_mov_b32 s3, 0x3e21eeb6
	s_mov_b32 s5, 0xbda907db
	s_mov_b32 s11, 0xbe5ae600
	s_mov_b32 s23, 0x3de5e0b2
	s_mov_b32 s6, 0xa17f65f6
	s_mov_b32 s26, 0x796cde01
	s_mov_b32 s7, 0xbe927e4f
	s_mov_b32 s27, 0x3ec71de3
	v_mul_f64 v[56:57], v[9:10], v[9:10]
	v_lshl_add_u32 v60, v8, 1, v8
	s_mov_b32 s28, 0x19f4ec90
	s_mov_b32 s34, 0x19e83e5c
	s_mov_b32 s29, 0x3efa01a0
	s_mov_b32 s35, 0xbf2a01a0
	v_ashrrev_i32_e32 v61, 31, v60
	v_mul_f64 v[66:67], v[15:16], v[15:16]
	s_mov_b32 s36, 0x11110bb3
	s_mov_b32 s37, 0x3f811111
	s_mov_b32 s38, 0x55555555
	s_mov_b32 s39, 0x3fa55555
	v_mul_f64 v[82:83], v[35:36], v[35:36]
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mul_f64 v[40:41], v[23:24], 0.5
	v_fma_f64 v[19:20], v[23:24], s[4:5], s[2:3]
	v_fma_f64 v[21:22], v[23:24], s[22:23], s[10:11]
	v_mul_f64 v[48:49], v[27:28], 0.5
	v_fma_f64 v[50:51], v[27:28], s[4:5], s[2:3]
	v_fma_f64 v[52:53], v[27:28], s[22:23], s[10:11]
	v_mul_f64 v[74:75], v[25:26], -v[23:24]
	v_mul_f64 v[80:81], v[31:32], -v[27:28]
	v_mul_f64 v[86:87], v[23:24], v[23:24]
	v_fma_f64 v[68:69], v[56:57], s[22:23], s[10:11]
	v_mul_f64 v[76:77], v[56:57], 0.5
	v_fma_f64 v[84:85], v[56:57], s[4:5], s[2:3]
	v_fma_f64 v[78:79], v[66:67], s[22:23], s[10:11]
	v_mul_f64 v[88:89], v[66:67], 0.5
	v_fma_f64 v[92:93], v[66:67], s[4:5], s[2:3]
	v_add_f64 v[54:55], -v[40:41], 1.0
	v_fma_f64 v[19:20], v[23:24], v[19:20], s[6:7]
	v_fma_f64 v[21:22], v[23:24], v[21:22], s[26:27]
	v_add_f64 v[58:59], -v[48:49], 1.0
	v_fma_f64 v[50:51], v[27:28], v[50:51], s[6:7]
	v_fma_f64 v[52:53], v[27:28], v[52:53], s[26:27]
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[26:27]
	v_add_f64 v[90:91], -v[76:77], 1.0
	v_fma_f64 v[84:85], v[56:57], v[84:85], s[6:7]
	v_fma_f64 v[78:79], v[66:67], v[78:79], s[26:27]
	v_fma_f64 v[92:93], v[66:67], v[92:93], s[6:7]
	v_add_f64 v[62:63], -v[54:55], 1.0
	v_fma_f64 v[64:65], v[23:24], v[19:20], s[28:29]
	v_lshlrev_b64 v[19:20], 3, v[60:61]
	v_fma_f64 v[60:61], v[23:24], v[21:22], s[34:35]
	v_add_f64 v[70:71], -v[58:59], 1.0
	v_fma_f64 v[50:51], v[27:28], v[50:51], s[28:29]
	v_fma_f64 v[52:53], v[27:28], v[52:53], s[34:35]
	v_add_co_u32 v72, vcc_lo, s8, v19
	v_add_co_ci_u32_e32 v73, vcc_lo, s9, v20, vcc_lo
	s_mov_b32 s8, 0x16c16967
	s_mov_b32 s9, 0xbf56c16c
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[34:35]
	s_clause 0x1
	global_load_b128 v[19:22], v[72:73], off
	global_load_b64 v[72:73], v[72:73], off offset:16
	v_fma_f64 v[84:85], v[56:57], v[84:85], s[28:29]
	v_fma_f64 v[92:93], v[66:67], v[92:93], s[28:29]
	v_add_f64 v[40:41], v[62:63], -v[40:41]
	v_fma_f64 v[64:65], v[23:24], v[64:65], s[8:9]
	v_mul_f64 v[62:63], v[29:30], 0.5
	v_fma_f64 v[60:61], v[23:24], v[60:61], s[36:37]
	v_add_f64 v[48:49], v[70:71], -v[48:49]
	v_fma_f64 v[50:51], v[27:28], v[50:51], s[8:9]
	v_mul_f64 v[70:71], v[33:34], 0.5
	v_fma_f64 v[52:53], v[27:28], v[52:53], s[36:37]
	v_fma_f64 v[84:85], v[56:57], v[84:85], s[8:9]
	v_fma_f64 v[92:93], v[66:67], v[92:93], s[8:9]
	v_fma_f64 v[40:41], v[25:26], -v[29:30], v[40:41]
	v_fma_f64 v[64:65], v[23:24], v[64:65], s[38:39]
	v_fma_f64 v[60:61], v[74:75], v[60:61], v[62:63]
	v_mul_f64 v[62:63], v[27:28], v[27:28]
	v_fma_f64 v[50:51], v[27:28], v[50:51], s[38:39]
	v_fma_f64 v[48:49], v[31:32], -v[33:34], v[48:49]
	v_fma_f64 v[52:53], v[80:81], v[52:53], v[70:71]
	v_fma_f64 v[70:71], v[82:83], s[22:23], s[10:11]
	v_fma_f64 v[84:85], v[56:57], v[84:85], s[38:39]
	v_fma_f64 v[40:41], v[86:87], v[64:65], v[40:41]
	v_add_f64 v[64:65], -v[88:89], 1.0
	v_add_f64 v[86:87], -v[90:91], 1.0
	v_fma_f64 v[23:24], v[23:24], v[60:61], -v[29:30]
	v_mul_f64 v[29:30], v[13:14], 0.5
	v_fma_f64 v[60:61], v[66:67], v[78:79], s[34:35]
	v_fma_f64 v[48:49], v[62:63], v[50:51], v[48:49]
	v_mul_f64 v[50:51], v[9:10], -v[56:57]
	v_fma_f64 v[62:63], v[56:57], v[68:69], s[36:37]
	v_mul_f64 v[68:69], v[82:83], 0.5
	v_fma_f64 v[78:79], v[82:83], s[4:5], s[2:3]
	v_fma_f64 v[27:28], v[27:28], v[52:53], -v[33:34]
	v_mul_f64 v[52:53], v[17:18], 0.5
	v_fma_f64 v[70:71], v[82:83], v[70:71], s[26:27]
	v_cmp_class_f64_e64 s2, v[6:7], 0x1f8
	v_cmp_class_f64_e64 s3, v[11:12], 0x1f8
	v_add_f64 v[40:41], v[54:55], v[40:41]
	v_add_f64 v[33:34], -v[64:65], 1.0
	v_add_f64 v[76:77], v[86:87], -v[76:77]
	v_mul_f64 v[86:87], v[15:16], -v[66:67]
	v_fma_f64 v[60:61], v[66:67], v[60:61], s[36:37]
	v_add_f64 v[48:49], v[58:59], v[48:49]
	v_fma_f64 v[29:30], v[50:51], v[62:63], v[29:30]
	v_add_f64 v[62:63], -v[68:69], 1.0
	v_fma_f64 v[78:79], v[82:83], v[78:79], s[6:7]
	s_mov_b32 s7, 0xbfc55555
	s_mov_b32 s6, s38
	v_fma_f64 v[70:71], v[82:83], v[70:71], s[34:35]
	v_fma_f64 v[23:24], v[74:75], s[6:7], v[23:24]
	v_mul_f64 v[74:75], v[37:38], 0.5
	v_fma_f64 v[27:28], v[80:81], s[6:7], v[27:28]
	v_add_f64 v[33:34], v[33:34], -v[88:89]
	v_fma_f64 v[76:77], v[9:10], -v[13:14], v[76:77]
	v_add_co_u32 v88, vcc_lo, s12, v2
	v_fma_f64 v[52:53], v[86:87], v[60:61], v[52:53]
	v_add_co_ci_u32_e32 v89, vcc_lo, s13, v3, vcc_lo
	v_fma_f64 v[13:14], v[56:57], v[29:30], -v[13:14]
	v_add_f64 v[29:30], -v[62:63], 1.0
	v_fma_f64 v[78:79], v[82:83], v[78:79], s[28:29]
	v_mul_f64 v[56:57], v[56:57], v[56:57]
	global_load_b64 v[88:89], v[88:89], off
	v_mul_f64 v[60:61], v[35:36], -v[82:83]
	v_add_f64 v[23:24], v[25:26], -v[23:24]
	v_mul_f64 v[25:26], v[66:67], v[66:67]
	v_fma_f64 v[70:71], v[82:83], v[70:71], s[36:37]
	v_add_f64 v[27:28], v[31:32], -v[27:28]
	v_and_b32_e32 v8, 1, v45
	v_mul_f64 v[31:32], v[82:83], v[82:83]
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_fma_f64 v[52:53], v[66:67], v[52:53], -v[17:18]
	v_fma_f64 v[17:18], v[15:16], -v[17:18], v[33:34]
	v_fma_f64 v[13:14], v[50:51], s[6:7], v[13:14]
	v_fma_f64 v[50:51], v[66:67], v[92:93], s[38:39]
	v_add_f64 v[29:30], v[29:30], -v[68:69]
	v_fma_f64 v[54:55], v[82:83], v[78:79], s[8:9]
	v_fma_f64 v[56:57], v[56:57], v[84:85], v[76:77]
	v_cndmask_b32_e32 v40, v23, v40, vcc_lo
	v_fma_f64 v[33:34], v[60:61], v[70:71], v[74:75]
	v_fma_f64 v[52:53], v[86:87], s[6:7], v[52:53]
	v_add_f64 v[8:9], v[9:10], -v[13:14]
	v_fma_f64 v[17:18], v[25:26], v[50:51], v[17:18]
	v_fma_f64 v[13:14], v[35:36], -v[37:38], v[29:30]
	v_and_b32_e32 v29, 1, v47
	v_xor_b32_e32 v10, 0x80000000, v24
	v_add_f64 v[25:26], v[90:91], v[56:57]
	v_fma_f64 v[23:24], v[82:83], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v41, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v29
	v_lshlrev_b32_e32 v29, 30, v43
	v_lshlrev_b32_e32 v6, 30, v45
	v_fma_f64 v[45:46], v[82:83], v[54:55], s[38:39]
	v_cndmask_b32_e32 v27, v48, v27, vcc_lo
	v_add_f64 v[15:16], v[15:16], -v[52:53]
	v_xor_b32_e32 v9, 0x80000000, v9
	v_add_f64 v[17:18], v[64:65], v[17:18]
	v_and_b32_e32 v6, 0x80000000, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v6, v10, v6
	v_cndmask_b32_e64 v10, 0, v40, s2
	v_fma_f64 v[23:24], v[60:61], s[6:7], v[23:24]
	v_cndmask_b32_e64 v11, 0x7ff80000, v6, s2
	v_lshlrev_b32_e32 v6, 30, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[4:5], v[10:11]
	v_xor_b32_e32 v6, v6, v12
	v_and_b32_e32 v12, 1, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v6, 0x80000000, v6
	v_cmp_eq_u32_e64 s4, 0, v12
	v_fma_f64 v[12:13], v[31:32], v[45:46], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v14, v8, v25, s4
	v_cndmask_b32_e64 v8, v9, v26, s4
	v_cndmask_b32_e32 v9, v49, v28, vcc_lo
	v_cndmask_b32_e64 v25, 0, v14, s2
	v_xor_b32_e32 v14, 0x80000000, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v6, v9, v6
	v_and_b32_e32 v16, 1, v39
	v_cndmask_b32_e64 v9, 0x7ff80000, v6, s3
	v_and_b32_e32 v6, 1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_dual_cndmask_b32 v14, v14, v18 :: v_dual_and_b32 v29, 0x80000000, v29
	v_xor_b32_e32 v26, v8, v29
	v_cndmask_b32_e64 v8, 0, v27, s3
	v_cndmask_b32_e32 v15, v15, v17, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, 0x7ff80000, v26, s2
	s_waitcnt vmcnt(2)
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[21:22]
	v_lshlrev_b32_e32 v10, 30, v44
	v_mul_f64 v[25:26], v[4:5], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_and_b32_e32 v6, 0x80000000, v10
	v_add_f64 v[10:11], v[62:63], v[12:13]
	v_add_f64 v[12:13], v[35:36], -v[23:24]
	v_xor_b32_e32 v6, v14, v6
	v_cndmask_b32_e64 v14, 0, v15, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v15, 0x7ff80000, v6, s3
	v_lshlrev_b32_e32 v6, 30, v39
	v_xor_b32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, 0x80000000, v6
	v_mul_f64 v[8:9], v[8:9], v[8:9]
	v_fma_f64 v[14:15], v[25:26], v[14:15], v[19:20]
	v_dual_cndmask_b32 v7, v10, v12 :: v_dual_cndmask_b32 v10, v11, v13
	v_xor_b32_e32 v10, v10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, 0, v7, s2
	v_cndmask_b32_e64 v7, 0x7ff80000, v10, s2
	s_add_u32 s2, s24, s30
	s_addc_u32 s3, s25, s31
	s_load_b64 s[2:3], s[2:3], 0x0
	s_waitcnt vmcnt(1)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[72:73]
	v_fma_f64 v[6:7], v[14:15], v[14:15], v[8:9]
	v_add_co_u32 v8, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s15, v3, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	v_fma_f64 v[4:5], v[4:5], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], 0.5
	s_waitcnt vmcnt(1)
	v_div_scale_f64 v[6:7], null, v[88:89], v[88:89], v[4:5]
	v_div_scale_f64 v[14:15], vcc_lo, v[4:5], v[88:89], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[6:7], v[6:7], v[10:11], v[12:13]
	v_add_f64 v[10:11], s[18:19], -s[20:21]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_div_fixup_f64 v[4:5], v[6:7], v[88:89], v[4:5]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[6:7], v[10:11], v[8:9]
	v_mul_f64 v[8:9], v[88:89], s[16:17]
	v_fma_f64 v[4:5], v[88:89], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[8:9], s[2:3], v[4:5]
	v_mul_f64 v[0:1], v[0:1], v[4:5]
	global_store_b64 v[2:3], v[0:1], off
.LBB0_27:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 384
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 94
		.amdhsa_next_free_sgpr 56
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib, .Lfunc_end0-_Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 11700
; NumSgprs: 58
; NumVgprs: 94
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 58
; NumVGPRsForWavesPerEU: 94
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .offset:         120
        .size:           4
        .value_kind:     by_value
      - .offset:         124
        .size:           1
        .value_kind:     by_value
      - .offset:         128
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         132
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         140
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         142
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         144
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         146
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         148
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         150
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         192
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 384
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib
    .private_segment_fixed_size: 0
    .sgpr_count:     58
    .sgpr_spill_count: 0
    .symbol:         _Z13CalcTotEnergyPdS_S_S_S_S_ddddS_S_S_S_S_ib.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     94
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
