#include <iostream>
#include <math.h>
#include <stdio.h>
#include <cuda.h>
using namespace std;
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with variable coefficient- term in momentum eqn   !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void DivGPU(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){
  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){


   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
//{printf("Hi:DivGPU:");}
}
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with No-coefficient- in continuity & source term  !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

__global__ void DivergenceGPU(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

   //double Ve = 0.5*(VE+VP);
   //double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
  
 }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Laplacian of a Scalar                                                    !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void LaplacianGPU(double* Ln, double *Phi, int row, int col, double delX, double delY){
  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;

  // Do for only inner points
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);


//{printf("Hi:Laplacian %6.3f\n",Ee);}

}
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient                                                                 !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void gradientGPU(double* gradxPhi1,double* gradyPhi1,double* Phi,
                        int row, int col, double delX, double delY){
  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;
  
  // Do for only inner points
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];
   double PhiP = Phi[k];

   double Phie = 0.5*(PhiE + PhiP);
   double Phiw = 0.5*(PhiW + PhiP);
   double Phin = 0.5*(PhiN + PhiP);
   double Phis = 0.5*(PhiS + PhiP);

   gradxPhi1[k] = (Phie-Phiw)/delX;
   gradyPhi1[k] = (Phin-Phis)/delY;
 
//{printf("Hi:gradient:%6.4f:",gradxPhi1[k]);}

 }
}

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with variable coefficient- term in momentum eqn   !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void Div(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){

for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
      int k    = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
  // double US = U[k+col];

   double VP = V[k];
  // double VE = V[k+1];
  // double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
      }
   }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with No-coefficient- in continuity & source term  !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

void Divergence(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
       int k = i*col+j;
   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

   //double Ve = 0.5*(VE+VP);
   //double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
   }
 }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Laplacian of a Scalar                                                    !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void Laplacian(double* Ln, double *Phi, int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); i++){
 for(int j =1; j<(col-1); j++){
   int k = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
     }
  }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient                                                                 !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void gradient(double* gradxPhi,double* gradyPhi,double* Phi,
                        int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){

   int       k = i*col+j;
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];
   double PhiP = Phi[k];

   double Phie = 0.5*(PhiE + PhiP);
   double Phiw = 0.5*(PhiW + PhiP);
   double Phin = 0.5*(PhiN + PhiP);
   double Phis = 0.5*(PhiS + PhiP);

   gradxPhi[k] = (Phie-Phiw)/delX;
   gradyPhi[k] = (Phin-Phis)/delY;
    }
  }
}


	.file	"tmpxft_0026c6da_00000000-6_finiteVolumeOperators.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3DivPdS_S_S_iidd
	.type	_Z3DivPdS_S_S_iidd, @function
_Z3DivPdS_S_S_iidd:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movsd	.LC0(%rip), %xmm3
	movq	%rcx, %r10
	movaps	%xmm0, %xmm4
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	decl	%r8d
	movslq	%r9d, %r14
	leal	-1(%r9), %r15d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$1, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movq	%rdx, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
.L3:
	cmpl	%r13d, %r8d
	jle	.L2
	movslq	%r12d, %rax
	movl	$1, %ebx
	movq	%rax, %rcx
	leaq	0(,%rax,8), %rdx
	addq	%r14, %rax
	subq	%r14, %rcx
	salq	$3, %rax
	movq	%rdx, %r11
	salq	$3, %rcx
.L6:
	addq	$8, %rdx
	addq	$8, %rcx
	addq	$8, %rax
	addq	$8, %r11
	cmpl	%ebx, %r15d
	jle	.L9
	movsd	(%rsi,%rdx), %xmm5
	movsd	(%rdi,%rdx), %xmm6
	incl	%ebx
	movsd	(%rsi,%rcx), %xmm0
	movsd	(%rsi,%rax), %xmm2
	mulsd	%xmm5, %xmm6
	mulsd	(%r10,%rcx), %xmm0
	mulsd	(%r10,%r11), %xmm5
	mulsd	(%r10,%rax), %xmm2
	addsd	%xmm5, %xmm0
	addsd	%xmm5, %xmm2
	movsd	-8(%rsi,%rdx), %xmm5
	mulsd	-8(%rdi,%rdx), %xmm5
	mulsd	%xmm3, %xmm0
	mulsd	%xmm3, %xmm2
	addsd	%xmm6, %xmm5
	subsd	%xmm2, %xmm0
	movsd	8(%rsi,%rdx), %xmm2
	mulsd	8(%rdi,%rdx), %xmm2
	mulsd	%xmm3, %xmm5
	mulsd	%xmm4, %xmm0
	addsd	%xmm6, %xmm2
	mulsd	%xmm3, %xmm2
	subsd	%xmm5, %xmm2
	mulsd	%xmm1, %xmm2
	addsd	%xmm2, %xmm0
	movsd	%xmm0, 0(%rbp,%r11)
	jmp	.L6
.L9:
	incl	%r13d
	addl	%r9d, %r12d
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z3DivPdS_S_S_iidd, .-_Z3DivPdS_S_S_iidd
	.globl	_Z10DivergencePdS_S_iidd
	.type	_Z10DivergencePdS_S_iidd, @function
_Z10DivergencePdS_S_iidd:
.LFB3636:
	.cfi_startproc
	endbr64
	movslq	%r8d, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movsd	.LC0(%rip), %xmm4
	movq	%rdi, %r10
	imulq	$-8, %rax, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	movaps	%xmm0, %xmm5
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%r8d, %edi
	movl	$1, %r9d
	leal	-1(%rcx), %r11d
	leal	-1(%r8), %r12d
	leaq	(%rdx,%rax), %rbx
	subq	%rax, %rbp
.L11:
	cmpl	%r9d, %r11d
	jle	.L10
	movslq	%edi, %rax
	movl	$1, %ecx
	salq	$3, %rax
.L14:
	addq	$8, %rax
	cmpl	%ecx, %r12d
	jle	.L16
	movsd	(%rsi,%rax), %xmm2
	movsd	8(%rsi,%rax), %xmm0
	incl	%ecx
	movsd	(%rdx,%rax), %xmm3
	addsd	%xmm2, %xmm0
	addsd	-8(%rsi,%rax), %xmm2
	mulsd	%xmm4, %xmm0
	mulsd	%xmm4, %xmm2
	subsd	%xmm2, %xmm0
	movsd	(%rbx,%rax), %xmm2
	addsd	%xmm3, %xmm2
	addsd	0(%rbp,%rax), %xmm3
	mulsd	%xmm1, %xmm0
	mulsd	%xmm4, %xmm2
	mulsd	%xmm4, %xmm3
	subsd	%xmm3, %xmm2
	mulsd	%xmm5, %xmm2
	addsd	%xmm2, %xmm0
	movsd	%xmm0, (%r10,%rax)
	jmp	.L14
.L16:
	incl	%r9d
	addl	%r8d, %edi
	jmp	.L11
.L10:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10DivergencePdS_S_iidd, .-_Z10DivergencePdS_S_iidd
	.globl	_Z9LaplacianPdS_iidd
	.type	_Z9LaplacianPdS_iidd, @function
_Z9LaplacianPdS_iidd:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r8
	movaps	%xmm0, %xmm4
	movl	%ecx, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	$1, %r10d
	leal	-1(%rdx), %r11d
	leal	-1(%rcx), %r12d
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movslq	%ecx, %rbx
	imulq	$-8, %rbx, %rbp
.L18:
	cmpl	%r10d, %r11d
	jle	.L17
	movslq	%r9d, %rdx
	xorl	%esi, %esi
	salq	$3, %rdx
	leaq	(%r8,%rdx), %rax
	addq	%rdi, %rdx
.L21:
	incq	%rsi
	addq	$8, %rax
	cmpl	%esi, %r12d
	jle	.L23
	movsd	(%rax), %xmm3
	movsd	(%rax,%rbp), %xmm0
	movaps	%xmm3, %xmm2
	subsd	%xmm3, %xmm0
	subsd	(%rax,%rbx,8), %xmm2
	divsd	%xmm1, %xmm0
	divsd	%xmm1, %xmm2
	subsd	%xmm2, %xmm0
	movsd	8(%rax), %xmm2
	subsd	%xmm3, %xmm2
	subsd	-8(%rax), %xmm3
	mulsd	%xmm4, %xmm0
	divsd	%xmm4, %xmm2
	divsd	%xmm4, %xmm3
	subsd	%xmm3, %xmm2
	mulsd	%xmm1, %xmm2
	addsd	%xmm2, %xmm0
	movsd	%xmm0, (%rdx,%rsi,8)
	jmp	.L21
.L23:
	incl	%r10d
	addl	%ecx, %r9d
	jmp	.L18
.L17:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z9LaplacianPdS_iidd, .-_Z9LaplacianPdS_iidd
	.globl	_Z8gradientPdS_S_iidd
	.type	_Z8gradientPdS_S_iidd, @function
_Z8gradientPdS_S_iidd:
.LFB3638:
	.cfi_startproc
	endbr64
	movslq	%r8d, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movsd	.LC0(%rip), %xmm4
	movq	%rdi, %r9
	imulq	$-8, %rax, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	movq	%rsi, %r10
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movaps	%xmm0, %xmm5
	movl	%r8d, %esi
	movl	$1, %edi
	leal	-1(%rcx), %r11d
	leal	-1(%r8), %r12d
	leaq	(%rdx,%rax), %rbx
	subq	%rax, %rbp
.L25:
	cmpl	%edi, %r11d
	jle	.L24
	movslq	%esi, %rax
	movl	$1, %ecx
	salq	$3, %rax
.L28:
	addq	$8, %rax
	cmpl	%ecx, %r12d
	jle	.L30
	movsd	(%rdx,%rax), %xmm0
	movsd	(%rbx,%rax), %xmm2
	incl	%ecx
	movsd	0(%rbp,%rax), %xmm6
	movsd	8(%rdx,%rax), %xmm3
	addsd	%xmm0, %xmm2
	addsd	%xmm0, %xmm6
	addsd	%xmm0, %xmm3
	addsd	-8(%rdx,%rax), %xmm0
	mulsd	%xmm4, %xmm2
	mulsd	%xmm4, %xmm6
	mulsd	%xmm4, %xmm0
	mulsd	%xmm4, %xmm3
	subsd	%xmm6, %xmm2
	subsd	%xmm0, %xmm3
	movaps	%xmm2, %xmm0
	divsd	%xmm1, %xmm0
	divsd	%xmm5, %xmm3
	movsd	%xmm3, (%r9,%rax)
	movsd	%xmm0, (%r10,%rax)
	jmp	.L28
.L30:
	incl	%edi
	addl	%r8d, %esi
	jmp	.L25
.L24:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z8gradientPdS_S_iidd, .-_Z8gradientPdS_S_iidd
	.globl	_Z35__device_stub__Z6DivGPUPdS_S_S_iiddPdS_S_S_iidd
	.type	_Z35__device_stub__Z6DivGPUPdS_S_S_iiddPdS_S_S_iidd, @function
_Z35__device_stub__Z6DivGPUPdS_S_S_iiddPdS_S_S_iidd:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 28(%rsp)
	movl	%r9d, 24(%rsp)
	movsd	%xmm0, 16(%rsp)
	movsd	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z6DivGPUPdS_S_S_iidd(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L31:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z35__device_stub__Z6DivGPUPdS_S_S_iiddPdS_S_S_iidd, .-_Z35__device_stub__Z6DivGPUPdS_S_S_iiddPdS_S_S_iidd
	.globl	_Z6DivGPUPdS_S_S_iidd
	.type	_Z6DivGPUPdS_S_S_iidd, @function
_Z6DivGPUPdS_S_S_iidd:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z6DivGPUPdS_S_S_iiddPdS_S_S_iidd
	.cfi_endproc
.LFE3664:
	.size	_Z6DivGPUPdS_S_S_iidd, .-_Z6DivGPUPdS_S_S_iidd
	.globl	_Z41__device_stub__Z13DivergenceGPUPdS_S_iiddPdS_S_iidd
	.type	_Z41__device_stub__Z13DivergenceGPUPdS_S_iiddPdS_S_iidd, @function
_Z41__device_stub__Z13DivergenceGPUPdS_S_iiddPdS_S_iidd:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13DivergenceGPUPdS_S_iidd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L36:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z41__device_stub__Z13DivergenceGPUPdS_S_iiddPdS_S_iidd, .-_Z41__device_stub__Z13DivergenceGPUPdS_S_iiddPdS_S_iidd
	.globl	_Z13DivergenceGPUPdS_S_iidd
	.type	_Z13DivergenceGPUPdS_S_iidd, @function
_Z13DivergenceGPUPdS_S_iidd:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z13DivergenceGPUPdS_S_iiddPdS_S_iidd
	.cfi_endproc
.LFE3666:
	.size	_Z13DivergenceGPUPdS_S_iidd, .-_Z13DivergenceGPUPdS_S_iidd
	.globl	_Z38__device_stub__Z12LaplacianGPUPdS_iiddPdS_iidd
	.type	_Z38__device_stub__Z12LaplacianGPUPdS_iiddPdS_iidd, @function
_Z38__device_stub__Z12LaplacianGPUPdS_iiddPdS_iidd:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, 16(%rsp)
	movsd	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12LaplacianGPUPdS_iidd(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L41:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z38__device_stub__Z12LaplacianGPUPdS_iiddPdS_iidd, .-_Z38__device_stub__Z12LaplacianGPUPdS_iiddPdS_iidd
	.globl	_Z12LaplacianGPUPdS_iidd
	.type	_Z12LaplacianGPUPdS_iidd, @function
_Z12LaplacianGPUPdS_iidd:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12LaplacianGPUPdS_iiddPdS_iidd
	.cfi_endproc
.LFE3668:
	.size	_Z12LaplacianGPUPdS_iidd, .-_Z12LaplacianGPUPdS_iidd
	.globl	_Z39__device_stub__Z11gradientGPUPdS_S_iiddPdS_S_iidd
	.type	_Z39__device_stub__Z11gradientGPUPdS_S_iiddPdS_S_iidd, @function
_Z39__device_stub__Z11gradientGPUPdS_S_iiddPdS_S_iidd:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11gradientGPUPdS_S_iidd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L46:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z39__device_stub__Z11gradientGPUPdS_S_iiddPdS_S_iidd, .-_Z39__device_stub__Z11gradientGPUPdS_S_iiddPdS_S_iidd
	.globl	_Z11gradientGPUPdS_S_iidd
	.type	_Z11gradientGPUPdS_S_iidd, @function
_Z11gradientGPUPdS_S_iidd:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z11gradientGPUPdS_S_iiddPdS_S_iidd
	.cfi_endproc
.LFE3670:
	.size	_Z11gradientGPUPdS_S_iidd, .-_Z11gradientGPUPdS_S_iidd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z11gradientGPUPdS_S_iidd"
.LC2:
	.string	"_Z12LaplacianGPUPdS_iidd"
.LC3:
	.string	"_Z13DivergenceGPUPdS_S_iidd"
.LC4:
	.string	"_Z6DivGPUPdS_S_S_iidd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3672:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11gradientGPUPdS_S_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12LaplacianGPUPdS_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13DivergenceGPUPdS_S_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6DivGPUPdS_S_S_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3672:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1071644672
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <math.h>
#include <stdio.h>
#include <hip/hip_runtime.h>
using namespace std;
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with variable coefficient- term in momentum eqn   !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void DivGPU(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){
  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){


   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
//{printf("Hi:DivGPU:");}
}
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with No-coefficient- in continuity & source term  !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

__global__ void DivergenceGPU(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

   //double Ve = 0.5*(VE+VP);
   //double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
  
 }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Laplacian of a Scalar                                                    !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void LaplacianGPU(double* Ln, double *Phi, int row, int col, double delX, double delY){
  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;

  // Do for only inner points
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);


//{printf("Hi:Laplacian %6.3f\n",Ee);}

}
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient                                                                 !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void gradientGPU(double* gradxPhi1,double* gradyPhi1,double* Phi,
                        int row, int col, double delX, double delY){
  // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int c = k%col;
  int r = k/col;
  
  // Do for only inner points
  if(c>0 && c<(col-1) && r>0 && r<(row-1)){
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];
   double PhiP = Phi[k];

   double Phie = 0.5*(PhiE + PhiP);
   double Phiw = 0.5*(PhiW + PhiP);
   double Phin = 0.5*(PhiN + PhiP);
   double Phis = 0.5*(PhiS + PhiP);

   gradxPhi1[k] = (Phie-Phiw)/delX;
   gradyPhi1[k] = (Phin-Phis)/delY;
 
//{printf("Hi:gradient:%6.4f:",gradxPhi1[k]);}

 }
}

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with variable coefficient- term in momentum eqn   !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void Div(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){

for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
      int k    = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
  // double US = U[k+col];

   double VP = V[k];
  // double VE = V[k+1];
  // double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
      }
   }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with No-coefficient- in continuity & source term  !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

void Divergence(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
       int k = i*col+j;
   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

   //double Ve = 0.5*(VE+VP);
   //double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
   }
 }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Laplacian of a Scalar                                                    !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void Laplacian(double* Ln, double *Phi, int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); i++){
 for(int j =1; j<(col-1); j++){
   int k = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
     }
  }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient                                                                 !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void gradient(double* gradxPhi,double* gradyPhi,double* Phi,
                        int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){

   int       k = i*col+j;
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];
   double PhiP = Phi[k];

   double Phie = 0.5*(PhiE + PhiP);
   double Phiw = 0.5*(PhiW + PhiP);
   double Phin = 0.5*(PhiN + PhiP);
   double Phis = 0.5*(PhiS + PhiP);

   gradxPhi[k] = (Phie-Phiw)/delX;
   gradyPhi[k] = (Phin-Phis)/delY;
    }
  }
}


	.text
	.file	"finiteVolumeOperators.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__DivGPUPdS_S_S_iidd # -- Begin function _Z21__device_stub__DivGPUPdS_S_S_iidd
	.type	_Z21__device_stub__DivGPUPdS_S_S_iidd,@function
_Z21__device_stub__DivGPUPdS_S_S_iidd:  # @_Z21__device_stub__DivGPUPdS_S_S_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	32(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6DivGPUPdS_S_S_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__DivGPUPdS_S_S_iidd, .Lfunc_end0-_Z21__device_stub__DivGPUPdS_S_S_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__DivergenceGPUPdS_S_iidd # -- Begin function _Z28__device_stub__DivergenceGPUPdS_S_iidd
	.type	_Z28__device_stub__DivergenceGPUPdS_S_iidd,@function
_Z28__device_stub__DivergenceGPUPdS_S_iidd: # @_Z28__device_stub__DivergenceGPUPdS_S_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13DivergenceGPUPdS_S_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__DivergenceGPUPdS_S_iidd, .Lfunc_end1-_Z28__device_stub__DivergenceGPUPdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__LaplacianGPUPdS_iidd # -- Begin function _Z27__device_stub__LaplacianGPUPdS_iidd
	.type	_Z27__device_stub__LaplacianGPUPdS_iidd,@function
_Z27__device_stub__LaplacianGPUPdS_iidd: # @_Z27__device_stub__LaplacianGPUPdS_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12LaplacianGPUPdS_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__LaplacianGPUPdS_iidd, .Lfunc_end2-_Z27__device_stub__LaplacianGPUPdS_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gradientGPUPdS_S_iidd # -- Begin function _Z26__device_stub__gradientGPUPdS_S_iidd
	.type	_Z26__device_stub__gradientGPUPdS_S_iidd,@function
_Z26__device_stub__gradientGPUPdS_S_iidd: # @_Z26__device_stub__gradientGPUPdS_S_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gradientGPUPdS_S_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__gradientGPUPdS_S_iidd, .Lfunc_end3-_Z26__device_stub__gradientGPUPdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z3DivPdS_S_S_iidd
.LCPI4_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z3DivPdS_S_S_iidd
	.type	_Z3DivPdS_S_S_iidd,@function
_Z3DivPdS_S_S_iidd:                     # @_Z3DivPdS_S_S_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $r9d killed $r9d def $r9
                                        # kill: def $r8d killed $r8d def $r8
	cmpl	$3, %r8d
	jl	.LBB4_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	decl	%r8d
	leal	-1(%r9), %r15d
	movslq	%r9d, %r14
	leaq	(,%r14,8), %rax
	leaq	(%rdi,%r14,8), %rdi
	addq	$8, %rdi
	leaq	(%rcx,%r14,8), %r10
	addq	$8, %r10
	leaq	(%rdx,%r14,8), %rdx
	addq	$16, %rdx
	leaq	(%rsi,%r14,8), %r11
	addq	$16, %r11
	shlq	$4, %r14
	leaq	(%rcx,%r14), %rbx
	addq	$8, %rbx
	addq	$8, %rcx
	addq	%rsi, %r14
	addq	$8, %r14
	leaq	-8(,%r15,8), %r15
	movl	$1, %r12d
	movsd	.LCPI4_0(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	cmpl	$3, %r9d
	jl	.LBB4_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%r13d, %r13d
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-16(%r11,%r13), %xmm7           # xmm7 = mem[0],zero
	movsd	-8(%r11,%r13), %xmm6            # xmm6 = mem[0],zero
	movsd	(%r11,%r13), %xmm3              # xmm3 = mem[0],zero
	movsd	8(%rsi,%r13), %xmm4             # xmm4 = mem[0],zero
	movsd	(%r14,%r13), %xmm5              # xmm5 = mem[0],zero
	mulsd	(%rdx,%r13), %xmm3
	movsd	-8(%rdx,%r13), %xmm8            # xmm8 = mem[0],zero
	mulsd	%xmm6, %xmm8
	addsd	%xmm8, %xmm3
	mulsd	%xmm2, %xmm3
	mulsd	-16(%rdx,%r13), %xmm7
	addsd	%xmm8, %xmm7
	mulsd	%xmm2, %xmm7
	mulsd	(%rcx,%r13), %xmm4
	subsd	%xmm7, %xmm3
	mulsd	(%r10,%r13), %xmm6
	addsd	%xmm6, %xmm4
	mulsd	%xmm2, %xmm4
	mulsd	(%rbx,%r13), %xmm5
	addsd	%xmm6, %xmm5
	mulsd	%xmm2, %xmm5
	subsd	%xmm5, %xmm4
	mulsd	%xmm0, %xmm4
	mulsd	%xmm1, %xmm3
	addsd	%xmm4, %xmm3
	movsd	%xmm3, (%rdi,%r13)
	addq	$8, %r13
	cmpq	%r13, %r15
	jne	.LBB4_4
.LBB4_5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%r12
	addq	%rax, %rdi
	addq	%rax, %r10
	addq	%rax, %rdx
	addq	%rax, %r11
	addq	%rax, %rsi
	addq	%rax, %rcx
	addq	%rax, %rbx
	addq	%rax, %r14
	cmpq	%r8, %r12
	jne	.LBB4_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB4_7:                                # %._crit_edge61
	retq
.Lfunc_end4:
	.size	_Z3DivPdS_S_S_iidd, .Lfunc_end4-_Z3DivPdS_S_S_iidd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10DivergencePdS_S_iidd
.LCPI5_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z10DivergencePdS_S_iidd
	.type	_Z10DivergencePdS_S_iidd,@function
_Z10DivergencePdS_S_iidd:               # @_Z10DivergencePdS_S_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	cmpl	$3, %ecx
	jl	.LBB5_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	decl	%ecx
	leal	-1(%r8), %r11d
	movslq	%r8d, %r10
	leaq	(,%r10,8), %rax
	leaq	(%rdi,%r10,8), %rdi
	addq	$8, %rdi
	leaq	(%rdx,%r10,8), %r9
	addq	$8, %r9
	leaq	(%rsi,%r10,8), %rsi
	addq	$16, %rsi
	shlq	$4, %r10
	addq	%rdx, %r10
	addq	$8, %r10
	addq	$8, %rdx
	leaq	-8(,%r11,8), %r11
	movl	$1, %ebx
	movsd	.LCPI5_0(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	cmpl	$3, %r8d
	jl	.LBB5_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB5_2 Depth=1
	xorl	%r14d, %r14d
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-8(%rsi,%r14), %xmm3            # xmm3 = mem[0],zero
	movsd	(%r9,%r14), %xmm4               # xmm4 = mem[0],zero
	movsd	(%rsi,%r14), %xmm5              # xmm5 = mem[0],zero
	addsd	%xmm3, %xmm5
	addsd	-16(%rsi,%r14), %xmm3
	mulsd	%xmm2, %xmm5
	mulsd	%xmm2, %xmm3
	subsd	%xmm3, %xmm5
	movsd	(%rdx,%r14), %xmm3              # xmm3 = mem[0],zero
	addsd	%xmm4, %xmm3
	mulsd	%xmm2, %xmm3
	addsd	(%r10,%r14), %xmm4
	mulsd	%xmm2, %xmm4
	subsd	%xmm4, %xmm3
	mulsd	%xmm1, %xmm5
	mulsd	%xmm0, %xmm3
	addsd	%xmm5, %xmm3
	movsd	%xmm3, (%rdi,%r14)
	addq	$8, %r14
	cmpq	%r14, %r11
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incq	%rbx
	addq	%rax, %r10
	addq	%rax, %rdi
	addq	%rax, %r9
	addq	%rax, %rsi
	addq	%rax, %rdx
	cmpq	%rcx, %rbx
	jne	.LBB5_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB5_7:                                # %._crit_edge41
	retq
.Lfunc_end5:
	.size	_Z10DivergencePdS_S_iidd, .Lfunc_end5-_Z10DivergencePdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z9LaplacianPdS_iidd            # -- Begin function _Z9LaplacianPdS_iidd
	.type	_Z9LaplacianPdS_iidd,@function
_Z9LaplacianPdS_iidd:                   # @_Z9LaplacianPdS_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $edx killed $edx def $rdx
	cmpl	$3, %edx
	jl	.LBB6_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	decl	%edx
	leal	-1(%rcx), %r10d
	movslq	%ecx, %r9
	leaq	(,%r9,8), %rax
	leaq	(%rdi,%r9,8), %rdi
	addq	$8, %rdi
	leaq	(%rsi,%r9,8), %r8
	addq	$16, %r8
	shlq	$4, %r9
	addq	%rsi, %r9
	addq	$8, %r9
	leaq	-8(,%r10,8), %r10
	movl	$1, %r11d
.LBB6_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_4 Depth 2
	cmpl	$3, %ecx
	jl	.LBB6_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB6_2 Depth=1
	xorl	%ebx, %ebx
.LBB6_4:                                #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-8(%r8,%rbx), %xmm2             # xmm2 = mem[0],zero
	movsd	(%r8,%rbx), %xmm3               # xmm3 = mem[0],zero
	movsd	8(%rsi,%rbx), %xmm4             # xmm4 = mem[0],zero
	subsd	%xmm2, %xmm3
	divsd	%xmm0, %xmm3
	movapd	%xmm2, %xmm5
	subsd	-16(%r8,%rbx), %xmm5
	divsd	%xmm0, %xmm5
	subsd	%xmm5, %xmm3
	subsd	%xmm2, %xmm4
	divsd	%xmm1, %xmm4
	subsd	(%r9,%rbx), %xmm2
	divsd	%xmm1, %xmm2
	subsd	%xmm2, %xmm4
	mulsd	%xmm0, %xmm4
	mulsd	%xmm1, %xmm3
	addsd	%xmm4, %xmm3
	movsd	%xmm3, (%rdi,%rbx)
	addq	$8, %rbx
	cmpq	%rbx, %r10
	jne	.LBB6_4
.LBB6_5:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	incq	%r11
	addq	%rax, %r9
	addq	%rax, %rdi
	addq	%rax, %r8
	addq	%rax, %rsi
	cmpq	%rdx, %r11
	jne	.LBB6_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB6_7:                                # %._crit_edge43
	retq
.Lfunc_end6:
	.size	_Z9LaplacianPdS_iidd, .Lfunc_end6-_Z9LaplacianPdS_iidd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8gradientPdS_S_iidd
.LCPI7_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z8gradientPdS_S_iidd
	.type	_Z8gradientPdS_S_iidd,@function
_Z8gradientPdS_S_iidd:                  # @_Z8gradientPdS_S_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	cmpl	$3, %ecx
	jl	.LBB7_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	decl	%ecx
	leal	-1(%r8), %r11d
	movslq	%r8d, %r10
	leaq	(,%r10,8), %rax
	leaq	(%rdi,%r10,8), %rdi
	addq	$8, %rdi
	leaq	(%rsi,%r10,8), %rsi
	addq	$8, %rsi
	leaq	(%rdx,%r10,8), %r9
	addq	$16, %r9
	shlq	$4, %r10
	addq	%rdx, %r10
	addq	$8, %r10
	leaq	-8(,%r11,8), %r11
	movl	$1, %ebx
	movsd	.LCPI7_0(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB7_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	cmpl	$3, %r8d
	jl	.LBB7_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB7_2 Depth=1
	xorl	%r14d, %r14d
.LBB7_4:                                #   Parent Loop BB7_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-8(%r9,%r14), %xmm3             # xmm3 = mem[0],zero
	movsd	(%r9,%r14), %xmm4               # xmm4 = mem[0],zero
	addsd	%xmm3, %xmm4
	mulsd	%xmm2, %xmm4
	movsd	-16(%r9,%r14), %xmm5            # xmm5 = mem[0],zero
	addsd	%xmm3, %xmm5
	mulsd	%xmm2, %xmm5
	subsd	%xmm5, %xmm4
	movsd	8(%rdx,%r14), %xmm5             # xmm5 = mem[0],zero
	addsd	%xmm3, %xmm5
	mulsd	%xmm2, %xmm5
	addsd	(%r10,%r14), %xmm3
	mulsd	%xmm2, %xmm3
	subsd	%xmm3, %xmm5
	divsd	%xmm0, %xmm4
	movsd	%xmm4, (%rdi,%r14)
	divsd	%xmm1, %xmm5
	movsd	%xmm5, (%rsi,%r14)
	addq	$8, %r14
	cmpq	%r14, %r11
	jne	.LBB7_4
.LBB7_5:                                # %._crit_edge
                                        #   in Loop: Header=BB7_2 Depth=1
	incq	%rbx
	addq	%rax, %r10
	addq	%rax, %rdi
	addq	%rax, %rsi
	addq	%rax, %r9
	addq	%rax, %rdx
	cmpq	%rcx, %rbx
	jne	.LBB7_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB7_7:                                # %._crit_edge41
	retq
.Lfunc_end7:
	.size	_Z8gradientPdS_S_iidd, .Lfunc_end7-_Z8gradientPdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6DivGPUPdS_S_S_iidd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13DivergenceGPUPdS_S_iidd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12LaplacianGPUPdS_iidd, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gradientGPUPdS_S_iidd, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6DivGPUPdS_S_S_iidd,@object   # @_Z6DivGPUPdS_S_S_iidd
	.section	.rodata,"a",@progbits
	.globl	_Z6DivGPUPdS_S_S_iidd
	.p2align	3, 0x0
_Z6DivGPUPdS_S_S_iidd:
	.quad	_Z21__device_stub__DivGPUPdS_S_S_iidd
	.size	_Z6DivGPUPdS_S_S_iidd, 8

	.type	_Z13DivergenceGPUPdS_S_iidd,@object # @_Z13DivergenceGPUPdS_S_iidd
	.globl	_Z13DivergenceGPUPdS_S_iidd
	.p2align	3, 0x0
_Z13DivergenceGPUPdS_S_iidd:
	.quad	_Z28__device_stub__DivergenceGPUPdS_S_iidd
	.size	_Z13DivergenceGPUPdS_S_iidd, 8

	.type	_Z12LaplacianGPUPdS_iidd,@object # @_Z12LaplacianGPUPdS_iidd
	.globl	_Z12LaplacianGPUPdS_iidd
	.p2align	3, 0x0
_Z12LaplacianGPUPdS_iidd:
	.quad	_Z27__device_stub__LaplacianGPUPdS_iidd
	.size	_Z12LaplacianGPUPdS_iidd, 8

	.type	_Z11gradientGPUPdS_S_iidd,@object # @_Z11gradientGPUPdS_S_iidd
	.globl	_Z11gradientGPUPdS_S_iidd
	.p2align	3, 0x0
_Z11gradientGPUPdS_S_iidd:
	.quad	_Z26__device_stub__gradientGPUPdS_S_iidd
	.size	_Z11gradientGPUPdS_S_iidd, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z6DivGPUPdS_S_S_iidd"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13DivergenceGPUPdS_S_iidd"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12LaplacianGPUPdS_iidd"
	.size	.L__unnamed_3, 25

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11gradientGPUPdS_S_iidd"
	.size	.L__unnamed_4, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__DivGPUPdS_S_S_iidd
	.addrsig_sym _Z28__device_stub__DivergenceGPUPdS_S_iidd
	.addrsig_sym _Z27__device_stub__LaplacianGPUPdS_iidd
	.addrsig_sym _Z26__device_stub__gradientGPUPdS_S_iidd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6DivGPUPdS_S_S_iidd
	.addrsig_sym _Z13DivergenceGPUPdS_S_iidd
	.addrsig_sym _Z12LaplacianGPUPdS_iidd
	.addrsig_sym _Z11gradientGPUPdS_S_iidd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6DivGPUPdS_S_S_iidd   ; -- Begin function _Z6DivGPUPdS_S_S_iidd
	.globl	_Z6DivGPUPdS_S_S_iidd
	.p2align	8
	.type	_Z6DivGPUPdS_S_S_iidd,@function
_Z6DivGPUPdS_S_S_iidd:                  ; @_Z6DivGPUPdS_S_S_iidd
; %bb.0:
	s_clause 0x1
	s_load_b64 s[12:13], s[0:1], 0x20
	s_load_b32 s2, s[0:1], 0x44
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s17, s13, 31
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s3, s13, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s17
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_sub_i32 s2, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s2, v3
	s_add_i32 s2, s13, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s3
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s17, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_add_i32 s3, s12, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v5
	v_mul_lo_u32 v3, v0, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v1, v3
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	v_cmp_lt_i32_e64 s4, 0, v3
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_lshlrev_b64 v[10:11], 3, v[1:2]
	s_mov_b32 s16, s13
	v_subrev_nc_u32_e32 v0, s13, v1
	s_lshl_b64 s[2:3], s[16:17], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v11, vcc_lo
	v_add_co_u32 v6, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, v12, s2
	global_load_b128 v[2:5], v[12:13], off offset:-8
	global_load_b64 v[14:15], v[6:7], off
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v13, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, s2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	v_add_co_u32 v16, vcc_lo, s8, v10
	v_add_co_ci_u32_e32 v17, vcc_lo, s9, v11, vcc_lo
	global_load_b64 v[18:19], v[8:9], off
	global_load_b64 v[20:21], v[6:7], off
	global_load_b128 v[6:9], v[16:17], off offset:-8
	v_add_co_u32 v22, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v23, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b64 v[22:23], v[22:23], off
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[12:13], v[12:13], off offset:8
	global_load_b64 v[16:17], v[16:17], off offset:8
	s_load_b128 s[0:3], s[0:1], 0x28
	s_waitcnt vmcnt(7)
	v_mul_f64 v[14:15], v[4:5], v[14:15]
	s_waitcnt vmcnt(4)
	v_mul_f64 v[4:5], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[14:15]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[0:1], v[22:23], v[0:1], v[14:15]
	v_fma_f64 v[2:3], v[2:3], v[6:7], v[4:5]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[12:13], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[8:9], v[18:19], 0.5
	v_mul_f64 v[2:3], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], v[0:1], 0.5, -v[8:9]
	v_fma_f64 v[2:3], v[4:5], 0.5, -v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], s[0:1]
	v_fma_f64 v[0:1], v[2:3], s[2:3], v[0:1]
	v_add_co_u32 v2, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v11, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6DivGPUPdS_S_S_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6DivGPUPdS_S_S_iidd, .Lfunc_end0-_Z6DivGPUPdS_S_S_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 688
; NumSgprs: 20
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13DivergenceGPUPdS_S_iidd ; -- Begin function _Z13DivergenceGPUPdS_S_iidd
	.globl	_Z13DivergenceGPUPdS_S_iidd
	.p2align	8
	.type	_Z13DivergenceGPUPdS_S_iidd,@function
_Z13DivergenceGPUPdS_S_iidd:            ; @_Z13DivergenceGPUPdS_S_iidd
; %bb.0:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x18
	s_load_b32 s2, s[0:1], 0x3c
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s7, s5, 31
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s3, s5, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s7
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_sub_i32 s2, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s2, v3
	s_add_i32 s2, s5, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s3
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_add_i32 s3, s4, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v5
	v_mul_lo_u32 v3, v0, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v1, v3
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	v_cmp_lt_i32_e64 s4, 0, v3
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[8:11], s[0:1], 0x0
	v_lshlrev_b64 v[4:5], 3, v[1:2]
	s_mov_b32 s6, s5
	v_subrev_nc_u32_e32 v0, s5, v1
	s_lshl_b64 s[6:7], s[6:7], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s10, v4
	s_clause 0x1
	global_load_b64 v[8:9], v[2:3], off
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v5, vcc_lo
	v_add_co_u32 v12, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v1, vcc_lo
	global_load_b128 v[0:3], v[10:11], off offset:-8
	global_load_b64 v[12:13], v[12:13], off
	global_load_b64 v[10:11], v[10:11], off offset:8
	s_load_b128 s[0:3], s[0:1], 0x20
	s_waitcnt vmcnt(3)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	s_waitcnt vmcnt(2)
	v_add_f64 v[0:1], v[2:3], v[0:1]
	s_waitcnt vmcnt(1)
	v_add_f64 v[8:9], v[8:9], v[12:13]
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[6:7], v[6:7], 0.5
	v_mul_f64 v[0:1], v[0:1], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], 0.5, -v[6:7]
	v_fma_f64 v[0:1], v[2:3], 0.5, -v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[6:7], s[0:1]
	v_fma_f64 v[0:1], v[0:1], s[2:3], v[2:3]
	v_add_co_u32 v2, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v5, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13DivergenceGPUPdS_S_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13DivergenceGPUPdS_S_iidd, .Lfunc_end1-_Z13DivergenceGPUPdS_S_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 616
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12LaplacianGPUPdS_iidd ; -- Begin function _Z12LaplacianGPUPdS_iidd
	.globl	_Z12LaplacianGPUPdS_iidd
	.p2align	8
	.type	_Z12LaplacianGPUPdS_iidd,@function
_Z12LaplacianGPUPdS_iidd:               ; @_Z12LaplacianGPUPdS_iidd
; %bb.0:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s13, s9, 31
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s3, s9, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s13
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_sub_i32 s2, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s2, v3
	s_add_i32 s2, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s3
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s13, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_add_i32 s3, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v5
	v_mul_lo_u32 v3, v0, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v1, v3
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	v_cmp_lt_i32_e64 s4, 0, v3
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_subrev_nc_u32_e32 v3, s9, v1
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	s_mov_b32 s12, s9
	s_load_b128 s[8:11], s[0:1], 0x18
	s_lshl_b64 s[0:1], s[12:13], 3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[11:12], v[7:8], off offset:8
	global_load_b128 v[0:3], v[7:8], off offset:-8
	v_add_co_u32 v7, vcc_lo, v7, s0
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_clause 0x1
	global_load_b64 v[9:10], v[9:10], off
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[11:12], v[11:12], -v[2:3]
	v_add_f64 v[0:1], v[2:3], -v[0:1]
	s_waitcnt vmcnt(1)
	v_add_f64 v[9:10], v[9:10], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], -v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[7:8], null, s[8:9], s[8:9], v[11:12]
	v_div_scale_f64 v[13:14], null, s[8:9], s[8:9], v[0:1]
	v_div_scale_f64 v[35:36], vcc_lo, v[11:12], s[8:9], v[11:12]
	v_div_scale_f64 v[15:16], null, s[10:11], s[10:11], v[9:10]
	v_div_scale_f64 v[17:18], null, s[10:11], s[10:11], v[2:3]
	v_rcp_f64_e32 v[19:20], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[21:22], v[13:14]
	v_rcp_f64_e32 v[23:24], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_3)
	v_rcp_f64_e32 v[25:26], v[17:18]
	v_fma_f64 v[27:28], -v[7:8], v[19:20], 1.0
	v_fma_f64 v[29:30], -v[13:14], v[21:22], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[15:16], v[23:24], 1.0
	v_fma_f64 v[33:34], -v[17:18], v[25:26], 1.0
	v_fma_f64 v[19:20], v[19:20], v[27:28], v[19:20]
	v_fma_f64 v[21:22], v[21:22], v[29:30], v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[23:24], v[23:24], v[31:32], v[23:24]
	v_fma_f64 v[25:26], v[25:26], v[33:34], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], -v[7:8], v[19:20], 1.0
	v_fma_f64 v[29:30], -v[13:14], v[21:22], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[31:32], -v[15:16], v[23:24], 1.0
	v_fma_f64 v[33:34], -v[17:18], v[25:26], 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[19:20], v[19:20], v[27:28], v[19:20]
	v_div_scale_f64 v[27:28], s0, v[0:1], s[8:9], v[0:1]
	v_fma_f64 v[21:22], v[21:22], v[29:30], v[21:22]
	v_div_scale_f64 v[29:30], s1, v[9:10], s[10:11], v[9:10]
	v_fma_f64 v[23:24], v[23:24], v[31:32], v[23:24]
	v_div_scale_f64 v[31:32], s2, v[2:3], s[10:11], v[2:3]
	v_fma_f64 v[25:26], v[25:26], v[33:34], v[25:26]
	v_mul_f64 v[33:34], v[35:36], v[19:20]
	v_mul_f64 v[37:38], v[27:28], v[21:22]
	v_mul_f64 v[39:40], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[41:42], v[31:32], v[25:26]
	v_fma_f64 v[7:8], -v[7:8], v[33:34], v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], -v[13:14], v[37:38], v[27:28]
	v_fma_f64 v[15:16], -v[15:16], v[39:40], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], -v[17:18], v[41:42], v[31:32]
	v_div_fmas_f64 v[7:8], v[7:8], v[19:20], v[33:34]
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[13:14], v[13:14], v[21:22], v[37:38]
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[15:16], v[15:16], v[23:24], v[39:40]
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[17:18], v[17:18], v[25:26], v[41:42]
	v_div_fixup_f64 v[7:8], v[7:8], s[8:9], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[0:1], v[13:14], s[8:9], v[0:1]
	v_div_fixup_f64 v[9:10], v[15:16], s[10:11], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[2:3], v[17:18], s[10:11], v[2:3]
	v_add_f64 v[0:1], v[7:8], -v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[9:10], -v[2:3]
	v_mul_f64 v[2:3], v[2:3], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[10:11], v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v6, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12LaplacianGPUPdS_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 43
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12LaplacianGPUPdS_iidd, .Lfunc_end2-_Z12LaplacianGPUPdS_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 968
; NumSgprs: 18
; NumVgprs: 43
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 43
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gradientGPUPdS_S_iidd ; -- Begin function _Z11gradientGPUPdS_S_iidd
	.globl	_Z11gradientGPUPdS_S_iidd
	.p2align	8
	.type	_Z11gradientGPUPdS_S_iidd,@function
_Z11gradientGPUPdS_S_iidd:              ; @_Z11gradientGPUPdS_S_iidd
; %bb.0:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x18
	s_load_b32 s2, s[0:1], 0x3c
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s7, s5, 31
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s3, s5, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s7
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_sub_i32 s2, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s2, v3
	s_add_i32 s2, s5, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s3
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_add_i32 s3, s4, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v5
	v_mul_lo_u32 v3, v0, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v1, v3
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	v_cmp_lt_i32_e64 s4, 0, v3
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshlrev_b64 v[6:7], 3, v[1:2]
	s_mov_b32 s6, s5
	v_subrev_nc_u32_e32 v0, s5, v1
	s_lshl_b64 s[6:7], s[6:7], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v9, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_clause 0x1
	global_load_b128 v[2:5], v[8:9], off offset:-8
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[8:9], v[8:9], off offset:8
	global_load_b64 v[0:1], v[0:1], off
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt vmcnt(3)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_waitcnt vmcnt(2)
	v_add_f64 v[10:11], v[10:11], v[4:5]
	s_waitcnt vmcnt(1)
	v_add_f64 v[8:9], v[8:9], v[4:5]
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_mul_f64 v[4:5], v[10:11], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[8:9], 0.5, -v[2:3]
	v_fma_f64 v[0:1], v[0:1], 0.5, -v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[4:5], null, s[4:5], s[4:5], v[2:3]
	v_div_scale_f64 v[8:9], null, s[6:7], s[6:7], v[0:1]
	v_div_scale_f64 v[18:19], vcc_lo, v[2:3], s[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[10:11], v[4:5]
	v_rcp_f64_e32 v[12:13], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_div_scale_f64 v[14:15], s2, v[0:1], s[6:7], v[0:1]
	v_fma_f64 v[12:13], v[12:13], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[18:19], v[10:11]
	v_mul_f64 v[20:21], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], -v[4:5], v[16:17], v[18:19]
	v_fma_f64 v[8:9], -v[8:9], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[16:17]
	s_mov_b32 vcc_lo, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_div_fmas_f64 v[8:9], v[8:9], v[12:13], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[2:3], v[4:5], s[4:5], v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v6
	v_div_fixup_f64 v[0:1], v[8:9], s[6:7], v[0:1]
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_store_b64 v[4:5], v[2:3], off
	global_store_b64 v[6:7], v[0:1], off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gradientGPUPdS_S_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11gradientGPUPdS_S_iidd, .Lfunc_end3-_Z11gradientGPUPdS_S_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 812
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6DivGPUPdS_S_S_iidd
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z6DivGPUPdS_S_S_iidd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13DivergenceGPUPdS_S_iidd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13DivergenceGPUPdS_S_iidd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12LaplacianGPUPdS_iidd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12LaplacianGPUPdS_iidd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     43
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11gradientGPUPdS_S_iidd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11gradientGPUPdS_S_iidd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
