#include<stdio.h> 
#include<stdlib.h>


 /*the gpu kernel, to be launched on threads + blocks + grid heirarchy*/
__global__ 
void KERNEL_max(float *d_out, float *d_in, int DIM)
{ 
        int idx = threadIdx.x; //threadIdx is a struct with 3 members, x,y, and z.  

        int max_value = *(d_in + idx*DIM + 0);  
        for(int j=0; j<DIM; j++){

                if (max_value<*(d_in + idx*DIM + j))
                {
                        max_value = *(d_in + idx*DIM + j);
                }
        }

        d_out[idx] = max_value;
}

float random_number(int min, int max)
{
        float num = rand() % (max + 1 - min) + min; 
        return num;
}

int main()
{

        const int NUM_SAMPLES=10; 
        const int DIM=16; 

        // 1. HOST CODE
        // input array (host)
        float * h_in = (float *)malloc(NUM_SAMPLES*DIM*sizeof(float)); 
        for(int i=0; i<NUM_SAMPLES; i++){
                for(int j=0; j<DIM; j++){
                        *(h_in + i*DIM + j) = random_number(1,100); 
                }
        }

        // print the input array 
        for(int i=0; i<NUM_SAMPLES; i++){
                printf("\nRow %d \n", i);
                for(int j=0; j<DIM; j++){
                        printf(" %f ", *(h_in + i*DIM + j)); 
                }
                printf("\n");
        }
        // output array (host)
        float * h_out = (float *)malloc(NUM_SAMPLES*sizeof(float));
        for(int i=0; i<NUM_SAMPLES; i++){
                h_out[i] = 0.0; 
        }

        
        // 2. DEVICE CODE
        float * d_in; 
        float * d_out; 

        // copy h_in to d_in 
        cudaMalloc((void **) &d_in, NUM_SAMPLES*DIM*sizeof(float));
        cudaMalloc((void **) &d_out, NUM_SAMPLES*sizeof(float));
        cudaMemcpy(d_in, h_in, NUM_SAMPLES*DIM*sizeof(float), cudaMemcpyHostToDevice); 

        // launch the kernel 
        KERNEL_max<<<1, NUM_SAMPLES>>>(d_out, d_in, DIM);

        // copy the output back to host memory 
        cudaMemcpy(h_out, d_out, NUM_SAMPLES*sizeof(float), cudaMemcpyDeviceToHost);

        // print the resultant 
        for(int i=0; i<NUM_SAMPLES; i++){
                printf("Row %d : %f \n", i, h_out[i]); 
        }
        
        /*// free GPU memory allocation */
        cudaFree(d_in); 
        cudaFree(d_out); 


    return 0;
} 



	.file	"tmpxft_00370068_00000000-6_max.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13random_numberii
	.type	_Z13random_numberii, @function
_Z13random_numberii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%esi, %ebx
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	rand@PLT
	leal	1(%rbx), %esi
	subl	%ebp, %esi
	cltd
	idivl	%esi
	addl	%ebp, %edx
	cvtsi2ssl	%edx, %xmm0
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13random_numberii, .-_Z13random_numberii
	.globl	_Z33__device_stub__Z10KERNEL_maxPfS_iPfS_i
	.type	_Z33__device_stub__Z10KERNEL_maxPfS_iPfS_i, @function
_Z33__device_stub__Z10KERNEL_maxPfS_iPfS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10KERNEL_maxPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L4:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z33__device_stub__Z10KERNEL_maxPfS_iPfS_i, .-_Z33__device_stub__Z10KERNEL_maxPfS_iPfS_i
	.globl	_Z10KERNEL_maxPfS_i
	.type	_Z10KERNEL_maxPfS_i, @function
_Z10KERNEL_maxPfS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10KERNEL_maxPfS_iPfS_i
	.cfi_endproc
.LFE2054:
	.size	_Z10KERNEL_maxPfS_i, .-_Z10KERNEL_maxPfS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\nRow %d \n"
.LC1:
	.string	" %f "
.LC2:
	.string	"\n"
.LC3:
	.string	"Row %d : %f \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$640, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%rax, %r12
.L11:
	leaq	(%r12,%rbp,4), %r13
	xorl	%ebx, %ebx
.L12:
	movl	$100, %esi
	movl	$1, %edi
	call	_Z13random_numberii
	movss	%xmm0, 0(%r13,%rbx,4)
	incq	%rbx
	cmpq	$16, %rbx
	jne	.L12
	addq	$16, %rbp
	cmpq	$160, %rbp
	jne	.L11
	xorl	%ebx, %ebx
	leaq	.LC0(%rip), %r14
.L13:
	movq	%rbx, %r13
	movl	%ebx, %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	salq	$6, %r13
	xorl	%ebp, %ebp
	leaq	.LC1(%rip), %r15
	call	__printf_chk@PLT
	addq	%r12, %r13
.L14:
	cvtss2sd	0(%r13,%rbp,4), %xmm0
	movq	%r15, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbp
	cmpq	$16, %rbp
	jne	.L14
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$10, %rbx
	jne	.L13
	movl	$40, %edi
	call	malloc@PLT
	movq	%rbx, %rcx
	movl	$640, %esi
	movq	%rax, %rbp
	xorl	%eax, %eax
	movq	%rbp, %rdi
	rep stosl
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$640, %edx
	call	cudaMemcpy@PLT
	movl	$2147483653, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$16, %edx
	call	_Z33__device_stub__Z10KERNEL_maxPfS_iPfS_i
.L15:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$40, %edx
	leaq	.LC3(%rip), %r12
	call	cudaMemcpy@PLT
.L16:
	movl	%ebx, %edx
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r12, %rsi
	movb	$1, %al
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$10, %rbx
	jne	.L16
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z10KERNEL_maxPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10KERNEL_maxPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h> 
#include<stdlib.h>


 /*the gpu kernel, to be launched on threads + blocks + grid heirarchy*/
__global__ 
void KERNEL_max(float *d_out, float *d_in, int DIM)
{ 
        int idx = threadIdx.x; //threadIdx is a struct with 3 members, x,y, and z.  

        int max_value = *(d_in + idx*DIM + 0);  
        for(int j=0; j<DIM; j++){

                if (max_value<*(d_in + idx*DIM + j))
                {
                        max_value = *(d_in + idx*DIM + j);
                }
        }

        d_out[idx] = max_value;
}

float random_number(int min, int max)
{
        float num = rand() % (max + 1 - min) + min; 
        return num;
}

int main()
{

        const int NUM_SAMPLES=10; 
        const int DIM=16; 

        // 1. HOST CODE
        // input array (host)
        float * h_in = (float *)malloc(NUM_SAMPLES*DIM*sizeof(float)); 
        for(int i=0; i<NUM_SAMPLES; i++){
                for(int j=0; j<DIM; j++){
                        *(h_in + i*DIM + j) = random_number(1,100); 
                }
        }

        // print the input array 
        for(int i=0; i<NUM_SAMPLES; i++){
                printf("\nRow %d \n", i);
                for(int j=0; j<DIM; j++){
                        printf(" %f ", *(h_in + i*DIM + j)); 
                }
                printf("\n");
        }
        // output array (host)
        float * h_out = (float *)malloc(NUM_SAMPLES*sizeof(float));
        for(int i=0; i<NUM_SAMPLES; i++){
                h_out[i] = 0.0; 
        }

        
        // 2. DEVICE CODE
        float * d_in; 
        float * d_out; 

        // copy h_in to d_in 
        hipMalloc((void **) &d_in, NUM_SAMPLES*DIM*sizeof(float));
        hipMalloc((void **) &d_out, NUM_SAMPLES*sizeof(float));
        hipMemcpy(d_in, h_in, NUM_SAMPLES*DIM*sizeof(float), hipMemcpyHostToDevice); 

        // launch the kernel 
        KERNEL_max<<<1, NUM_SAMPLES>>>(d_out, d_in, DIM);

        // copy the output back to host memory 
        hipMemcpy(h_out, d_out, NUM_SAMPLES*sizeof(float), hipMemcpyDeviceToHost);

        // print the resultant 
        for(int i=0; i<NUM_SAMPLES; i++){
                printf("Row %d : %f \n", i, h_out[i]); 
        }
        
        /*// free GPU memory allocation */
        hipFree(d_in); 
        hipFree(d_out); 


    return 0;
} 



	.text
	.file	"max.hip"
	.globl	_Z25__device_stub__KERNEL_maxPfS_i # -- Begin function _Z25__device_stub__KERNEL_maxPfS_i
	.type	_Z25__device_stub__KERNEL_maxPfS_i,@function
_Z25__device_stub__KERNEL_maxPfS_i:     # @_Z25__device_stub__KERNEL_maxPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10KERNEL_maxPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__KERNEL_maxPfS_i, .Lfunc_end0-_Z25__device_stub__KERNEL_maxPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z13random_numberii             # -- Begin function _Z13random_numberii
	.type	_Z13random_numberii,@function
_Z13random_numberii:                    # @_Z13random_numberii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movl	%edi, %ebp
	callq	rand
	subl	%ebp, %ebx
	incl	%ebx
	cltd
	idivl	%ebx
	addl	%ebp, %edx
	cvtsi2ss	%edx, %xmm0
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13random_numberii, .Lfunc_end1-_Z13random_numberii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$640, %edi                      # imm = 0x280
	callq	malloc
	movq	%rax, %rbx
	xorl	%r14d, %r14d
	movq	%rax, %r15
.LBB2_1:                                # %.preheader36
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%r12d, %r12d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%r14
	addq	$64, %r15
	cmpq	$10, %r14
	jne	.LBB2_1
# %bb.4:                                # %.preheader.preheader
	movq	%rbx, %r15
	xorl	%r14d, %r14d
.LBB2_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	movl	$.L.str, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	xorl	%r12d, %r12d
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r12,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$64, %r15
	cmpq	$10, %r14
	jne	.LBB2_5
# %bb.8:
	movl	$1, %edi
	movl	$40, %esi
	callq	calloc@PLT
	movq	%rax, %r14
	leaq	16(%rsp), %r15
	movl	$640, %esi                      # imm = 0x280
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$40, %esi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$640, %edx                      # imm = 0x280
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	9(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$16, %edx
	callq	_Z25__device_stub__KERNEL_maxPfS_i
.LBB2_10:
	movq	8(%rsp), %rsi
	movl	$40, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
.LBB2_11:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%rbx,4), %xmm0
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB2_11
# %bb.12:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10KERNEL_maxPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10KERNEL_maxPfS_i,@object     # @_Z10KERNEL_maxPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z10KERNEL_maxPfS_i
	.p2align	3, 0x0
_Z10KERNEL_maxPfS_i:
	.quad	_Z25__device_stub__KERNEL_maxPfS_i
	.size	_Z10KERNEL_maxPfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nRow %d \n"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" %f "
	.size	.L.str.1, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Row %d : %f \n"
	.size	.L.str.3, 14

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10KERNEL_maxPfS_i"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__KERNEL_maxPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10KERNEL_maxPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10KERNEL_maxPfS_i     ; -- Begin function _Z10KERNEL_maxPfS_i
	.globl	_Z10KERNEL_maxPfS_i
	.p2align	8
	.type	_Z10KERNEL_maxPfS_i,@function
_Z10KERNEL_maxPfS_i:                    ; @_Z10KERNEL_maxPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, v0, s4
	s_cmp_lt_i32 s4, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v3, v3
	s_cbranch_scc1 .LBB0_2
.LBB0_1:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[1:2], off
	v_cvt_f32_i32_e32 v5, v3
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s4, 0
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v6, v4
	v_cmp_gt_f32_e32 vcc_lo, v4, v5
	v_cndmask_b32_e32 v3, v3, v6, vcc_lo
	s_cbranch_scc0 .LBB0_1
.LBB0_2:                                ; %Flow31
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_i32_e32 v1, v3
	v_lshlrev_b32_e32 v0, 2, v0
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10KERNEL_maxPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 5
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10KERNEL_maxPfS_i, .Lfunc_end0-_Z10KERNEL_maxPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 7
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 7
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10KERNEL_maxPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     7
    .sgpr_spill_count: 0
    .symbol:         _Z10KERNEL_maxPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
