#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <sys/time.h>
#include <cuda_runtime.h>

__global__ void Convolution(double* A, double* B, int I, int J)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	double c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.1;

	if (i>J && i<I*J-J && (i%J!=0) && ((i+1)%J!=0)) {
		B[i] = c11 * A[i-J-1]  +  c12 * A[i-1]  +  c13 * A[i+J-1]
				 + c21 * A[i-J]  +  c22 * A[i]  +  c23 * A[i+J]
				 + c31 * A[i-J+1]  +  c32 * A[i+1]  +  c33 * A[i+J+1];
	}

}

void init(double* A, int I, int J)
{
	int i, j;

	for (i = 0; i < I; ++i) {
		for (j = 0; j < J; ++j) {
			A[i*J + j] = (double)rand()/RAND_MAX;
        	}
    	}
}

int main(int argc, char *argv[])
{
	FILE		*output1;
	double		*A;
	double		*B;
	cudaEvent_t start, stop;
 	float elapsedTime;

	output1 = fopen("convgpu.out", "w");

	int I = atoi(argv[1]), J = atoi(argv[2]);
	int size = I*J*sizeof(double);

	A = (double*)malloc(size);
	B = (double*)malloc(size);

	cudaError_t err = cudaSuccess;
	double *d_A = NULL;
	err = cudaMalloc((void **)&d_A, size);
	if (err != cudaSuccess)
	{
			fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
			exit(EXIT_FAILURE);
	}
	double *d_B = NULL;
	err = cudaMalloc((void **)&d_B, size);

	if (err != cudaSuccess)
	{
			fprintf(stderr, "Failed to allocate device vector B (error code %s)!\n", cudaGetErrorString(err));
			exit(EXIT_FAILURE);
	}


	//initialize the arrays
	init(A, I, J);

	//host to Device
	err = cudaMemcpy(d_A, A, size, cudaMemcpyHostToDevice);

		if (err != cudaSuccess)
		{
				fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", cudaGetErrorString(err));
				exit(EXIT_FAILURE);
		}
		int threadsPerBlock=128;
		int blocksPerGrid;
		if (I*J%threadsPerBlock != 0){
			blocksPerGrid = I*J/threadsPerBlock+1;
		}else {
			blocksPerGrid=I*J/threadsPerBlock;
		}

		printf("blocksPerGrid: %d\n", blocksPerGrid);
		printf("threadsPerBlock: %d\n", threadsPerBlock);

		cudaEventCreate(&start);
		cudaEventCreate(&stop);
		cudaEventRecord(start,0);
		Convolution<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, I, J);
		cudaEventRecord(stop,0);
		cudaEventSynchronize(stop);
		cudaEventElapsedTime(&elapsedTime, start,stop);

		err = cudaMemcpy(B, d_B, size, cudaMemcpyDeviceToHost);

		if (err != cudaSuccess)
		{
				fprintf(stderr, "Failed to copy vector B from device to host (error code %s)!\n", cudaGetErrorString(err));
				exit(EXIT_FAILURE);
		}

		err = cudaGetLastError();
		if (err != cudaSuccess)
		{
				fprintf(stderr, "error code %s\n", cudaGetErrorString(err));
				exit(EXIT_FAILURE);
		}

		for (int i = 0; i < I; i++) {
			for (int j = 0; j < J; j++) {
				fprintf(output1, "%f ", B[i*J+j]);
			}
			fprintf(output1, "\n");
		}

	printf("Elapsed time : %f s\n" ,elapsedTime/1000);

	free(A);
	free(B);
	cudaFree(d_A);
	cudaFree(d_B);
	fclose(output1);
	return 0;
}

	.file	"tmpxft_002e2354_00000000-6_Convolution.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2044:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2044:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4initPdii
	.type	_Z4initPdii, @function
_Z4initPdii:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L3:
	cmpl	%r15d, %r14d
	jge	.L2
	movslq	%r13d, %rax
	xorl	%ebx, %ebx
	leaq	(%r12,%rax,8), %rdx
.L6:
	cmpl	%ebx, %ebp
	jle	.L9
	movq	%rdx, 8(%rsp)
	call	rand@PLT
	movq	8(%rsp), %rdx
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC0(%rip), %xmm0
	movsd	%xmm0, (%rdx,%rbx,8)
	incq	%rbx
	jmp	.L6
.L9:
	incl	%r14d
	addl	%ebp, %r13d
	jmp	.L3
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z4initPdii, .-_Z4initPdii
	.globl	_Z35__device_stub__Z11ConvolutionPdS_iiPdS_ii
	.type	_Z35__device_stub__Z11ConvolutionPdS_iiPdS_ii, @function
_Z35__device_stub__Z11ConvolutionPdS_iiPdS_ii:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11ConvolutionPdS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z35__device_stub__Z11ConvolutionPdS_iiPdS_ii, .-_Z35__device_stub__Z11ConvolutionPdS_iiPdS_ii
	.globl	_Z11ConvolutionPdS_ii
	.type	_Z11ConvolutionPdS_ii, @function
_Z11ConvolutionPdS_ii:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11ConvolutionPdS_iiPdS_ii
	.cfi_endproc
.LFE2067:
	.size	_Z11ConvolutionPdS_ii, .-_Z11ConvolutionPdS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"w"
.LC2:
	.string	"convgpu.out"
.LC3:
	.string	"Failed to allocate device vector A (error code %s)!\n"
.LC4:
	.string	"Failed to allocate device vector B (error code %s)!\n"
.LC5:
	.string	"Failed to copy vector A from host to device (error code %s)!\n"
.LC6:
	.string	"blocksPerGrid: %d\n"
.LC7:
	.string	"threadsPerBlock: %d\n"
.LC8:
	.string	"Failed to copy vector B from device to host (error code %s)!\n"
.LC9:
	.string	"error code %s\n"
.LC10:
	.string	"%f "
.LC11:
	.string	"\n"
.LC13:
	.string	"Elapsed time : %f s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC2(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	leaq	.LC1(%rip), %rsi
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movq	8(%rbx), %rdi
	movq	%rax, 8(%rsp)
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movl	%r12d, %r14d
	imull	%eax, %r14d
	movl	%eax, %ebp
	leal	0(,%r14,8), %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	xorl	%edx, %edx
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rdx, 48(%rsp)
	movq	%rax, %r13
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L16
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L31
.L16:
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rax, 56(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L17
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rcx
.L31:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L17:
	movq	16(%rsp), %rdi
	movl	%ebp, %edx
	movl	%r12d, %esi
	call	_Z4initPdii
	movq	48(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
	call	cudaGetErrorString@PLT
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L31
.L18:
	movl	%r14d, %eax
	movl	$128, %ecx
	movl	$2, %edi
	cltd
	leaq	.LC6(%rip), %rsi
	idivl	%ecx
	movl	%r14d, %edx
	andl	$127, %edx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, %edx
	movl	%eax, %r14d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$128, %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r14d, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$33554433, %edx
	movl	$1, %ecx
	movl	$1, 84(%rsp)
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	salq	$7, %rdx
	movl	72(%rsp), %esi
	movq	%rdx, 76(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%r12d, %edx
	call	_Z35__device_stub__Z11ConvolutionPdS_iiPdS_ii
.L20:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L21
	call	cudaGetErrorString@PLT
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L31
.L21:
	call	cudaGetLastError@PLT
	xorl	%r14d, %r14d
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L23
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L31
.L32:
	movq	8(%rsp), %rdi
	leaq	.LC11(%rip), %rdx
	xorl	%eax, %eax
	addl	%ebp, %ebx
	movl	$2, %esi
	incl	%r14d
	call	__fprintf_chk@PLT
.L23:
	cmpl	%r12d, %r14d
	jge	.L25
	movslq	%ebx, %rax
	xorl	%r15d, %r15d
	leaq	0(%r13,%rax,8), %r8
.L26:
	cmpl	%r15d, %ebp
	jle	.L32
	movsd	(%r8,%r15,8), %xmm0
	movq	8(%rsp), %rdi
	movb	$1, %al
	incq	%r15
	leaq	.LC10(%rip), %rdx
	movl	$2, %esi
	movq	%r8, 24(%rsp)
	call	__fprintf_chk@PLT
	movq	24(%rsp), %r8
	jmp	.L26
.L25:
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	76(%rsp), %xmm0
	divss	.LC12(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z11ConvolutionPdS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2069:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11ConvolutionPdS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2069:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-4194304
	.long	1105199103
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC12:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

__global__ void Convolution(double* A, double* B, int I, int J)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	double c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.1;

	if (i>J && i<I*J-J && (i%J!=0) && ((i+1)%J!=0)) {
		B[i] = c11 * A[i-J-1]  +  c12 * A[i-1]  +  c13 * A[i+J-1]
				 + c21 * A[i-J]  +  c22 * A[i]  +  c23 * A[i+J]
				 + c31 * A[i-J+1]  +  c32 * A[i+1]  +  c33 * A[i+J+1];
	}

}

void init(double* A, int I, int J)
{
	int i, j;

	for (i = 0; i < I; ++i) {
		for (j = 0; j < J; ++j) {
			A[i*J + j] = (double)rand()/RAND_MAX;
        	}
    	}
}

int main(int argc, char *argv[])
{
	FILE		*output1;
	double		*A;
	double		*B;
	hipEvent_t start, stop;
 	float elapsedTime;

	output1 = fopen("convgpu.out", "w");

	int I = atoi(argv[1]), J = atoi(argv[2]);
	int size = I*J*sizeof(double);

	A = (double*)malloc(size);
	B = (double*)malloc(size);

	hipError_t err = hipSuccess;
	double *d_A = NULL;
	err = hipMalloc((void **)&d_A, size);
	if (err != hipSuccess)
	{
			fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
			exit(EXIT_FAILURE);
	}
	double *d_B = NULL;
	err = hipMalloc((void **)&d_B, size);

	if (err != hipSuccess)
	{
			fprintf(stderr, "Failed to allocate device vector B (error code %s)!\n", hipGetErrorString(err));
			exit(EXIT_FAILURE);
	}


	//initialize the arrays
	init(A, I, J);

	//host to Device
	err = hipMemcpy(d_A, A, size, hipMemcpyHostToDevice);

		if (err != hipSuccess)
		{
				fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", hipGetErrorString(err));
				exit(EXIT_FAILURE);
		}
		int threadsPerBlock=128;
		int blocksPerGrid;
		if (I*J%threadsPerBlock != 0){
			blocksPerGrid = I*J/threadsPerBlock+1;
		}else {
			blocksPerGrid=I*J/threadsPerBlock;
		}

		printf("blocksPerGrid: %d\n", blocksPerGrid);
		printf("threadsPerBlock: %d\n", threadsPerBlock);

		hipEventCreate(&start);
		hipEventCreate(&stop);
		hipEventRecord(start,0);
		Convolution<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, I, J);
		hipEventRecord(stop,0);
		hipEventSynchronize(stop);
		hipEventElapsedTime(&elapsedTime, start,stop);

		err = hipMemcpy(B, d_B, size, hipMemcpyDeviceToHost);

		if (err != hipSuccess)
		{
				fprintf(stderr, "Failed to copy vector B from device to host (error code %s)!\n", hipGetErrorString(err));
				exit(EXIT_FAILURE);
		}

		err = hipGetLastError();
		if (err != hipSuccess)
		{
				fprintf(stderr, "error code %s\n", hipGetErrorString(err));
				exit(EXIT_FAILURE);
		}

		for (int i = 0; i < I; i++) {
			for (int j = 0; j < J; j++) {
				fprintf(output1, "%f ", B[i*J+j]);
			}
			fprintf(output1, "\n");
		}

	printf("Elapsed time : %f s\n" ,elapsedTime/1000);

	free(A);
	free(B);
	hipFree(d_A);
	hipFree(d_B);
	fclose(output1);
	return 0;
}

	.text
	.file	"Convolution.hip"
	.globl	_Z26__device_stub__ConvolutionPdS_ii # -- Begin function _Z26__device_stub__ConvolutionPdS_ii
	.type	_Z26__device_stub__ConvolutionPdS_ii,@function
_Z26__device_stub__ConvolutionPdS_ii:   # @_Z26__device_stub__ConvolutionPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11ConvolutionPdS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__ConvolutionPdS_ii, .Lfunc_end0-_Z26__device_stub__ConvolutionPdS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4initPdii
.LCPI1_0:
	.quad	0x41dfffffffc00000              # double 2147483647
	.text
	.globl	_Z4initPdii
	.type	_Z4initPdii,@function
_Z4initPdii:                            # @_Z4initPdii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB1_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %r14
	xorl	%r15d, %r15d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movsd	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	%xmm1, %xmm0
	movsd	%xmm0, (%r14,%r15,8)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z4initPdii, .Lfunc_end1-_Z4initPdii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movq	8(%r14), %rdi
	callq	atoi
	movq	16(%r14), %rdi
	movl	%eax, %r14d
	callq	atoi
	movl	%eax, %ebp
	movl	%eax, %r12d
	imull	%r14d, %r12d
	leal	(,%r12,8), %eax
	movslq	%eax, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leaq	32(%rsp), %rdi
	movq	$0, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.3:
	leaq	24(%rsp), %rdi
	movq	$0, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.5:
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	callq	_Z4initPdii
	movq	32(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.7:
	movl	%r14d, 16(%rsp)                 # 4-byte Spill
	testb	$127, %r12b
	je	.LBB2_9
# %bb.8:
	leal	127(%r12), %r14d
	testl	%r12d, %r12d
	cmovnsl	%r12d, %r14d
	sarl	$7, %r14d
	incl	%r14d
	jmp	.LBB2_10
.LBB2_9:
	sarl	$7, %r12d
	movl	%r12d, %r14d
.LBB2_10:
	movl	$.L.str.5, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	movl	$128, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	64(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%r14d, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$128, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	16(%rsp), %r14d                 # 4-byte Reload
	jne	.LBB2_12
# %bb.11:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%r14d, %edx
	movl	%ebp, %ecx
	callq	_Z26__device_stub__ConvolutionPdS_ii
.LBB2_12:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	leaq	52(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.14:
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.15:                               # %.preheader74
	testl	%r14d, %r14d
	jle	.LBB2_21
# %bb.16:                               # %.preheader.lr.ph
	movl	%r14d, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebp, %r12d
	xorl	%r13d, %r13d
	xorl	%r15d, %r15d
	movl	%ebp, 48(%rsp)                  # 4-byte Spill
.LBB2_17:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_19 Depth 2
	testl	%ebp, %ebp
	jle	.LBB2_20
# %bb.18:                               # %.lr.ph
                                        #   in Loop: Header=BB2_17 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %rbp
	xorl	%r14d, %r14d
.LBB2_19:                               #   Parent Loop BB2_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rbp,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.9, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB2_19
.LBB2_20:                               # %._crit_edge
                                        #   in Loop: Header=BB2_17 Depth=1
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	incq	%r15
	movl	48(%rsp), %ebp                  # 4-byte Reload
	addl	%ebp, %r13d
	cmpq	16(%rsp), %r15                  # 8-byte Folded Reload
	jne	.LBB2_17
.LBB2_21:                               # %._crit_edge77
	movss	52(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	fclose
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 128
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	jmp	.LBB2_2
.LBB2_4:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	jmp	.LBB2_2
.LBB2_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	jmp	.LBB2_2
.LBB2_13:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	jmp	.LBB2_2
.LBB2_22:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
.LBB2_2:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11ConvolutionPdS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11ConvolutionPdS_ii,@object   # @_Z11ConvolutionPdS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z11ConvolutionPdS_ii
	.p2align	3, 0x0
_Z11ConvolutionPdS_ii:
	.quad	_Z26__device_stub__ConvolutionPdS_ii
	.size	_Z11ConvolutionPdS_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"convgpu.out"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device vector A (error code %s)!\n"
	.size	.L.str.2, 53

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device vector B (error code %s)!\n"
	.size	.L.str.3, 53

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to copy vector A from host to device (error code %s)!\n"
	.size	.L.str.4, 62

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"blocksPerGrid: %d\n"
	.size	.L.str.5, 19

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"threadsPerBlock: %d\n"
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to copy vector B from device to host (error code %s)!\n"
	.size	.L.str.7, 62

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"error code %s\n"
	.size	.L.str.8, 15

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%f "
	.size	.L.str.9, 4

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Elapsed time : %f s\n"
	.size	.L.str.11, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11ConvolutionPdS_ii"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__ConvolutionPdS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11ConvolutionPdS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11ConvolutionPdS_ii   ; -- Begin function _Z11ConvolutionPdS_ii
	.globl	_Z11ConvolutionPdS_ii
	.p2align	8
	.type	_Z11ConvolutionPdS_ii,@function
_Z11ConvolutionPdS_ii:                  ; @_Z11ConvolutionPdS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e64 s5, v1
	s_cbranch_execz .LBB0_5
; %bb.1:
	s_add_i32 s2, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s2, s5
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.2:
	s_ashr_i32 s7, s5, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s2, s5, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s2, s2, s7
	v_add_nc_u32_e32 v4, v1, v2
	v_cvt_f32_u32_e32 v0, s2
	s_sub_i32 s3, 0, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v2
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v3, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v0, v3
	v_add_nc_u32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v4, v0
	v_mul_lo_u32 v3, v3, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v4, v3
	v_subrev_nc_u32_e32 v4, s2, v3
	v_cmp_le_u32_e32 vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s2, v3
	v_cmp_le_u32_e32 vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v2
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.3:
	v_add_nc_u32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v4
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s2
	v_sub_nc_u32_e32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s2, v0
	v_cmp_le_u32_e32 vcc_lo, s2, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s2, v0
	v_cmp_le_u32_e32 vcc_lo, s2, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v4
	v_sub_nc_u32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b64 v[14:15], 3, v[1:2]
	v_subrev_nc_u32_e32 v0, s5, v1
	s_mov_b32 s6, s5
	s_mov_b32 s5, 0x3fc99999
	s_mov_b32 s4, 0x9999999a
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v16, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v17, vcc_lo, s1, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b128 v[2:5], v[16:17], off offset:-8
	s_lshl_b64 s[0:1], s[6:7], 3
	global_load_b128 v[6:9], v[0:1], off offset:-8
	v_add_co_u32 v18, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v19, vcc_lo, s1, v17, vcc_lo
	s_clause 0x3
	global_load_b128 v[10:13], v[18:19], off offset:-8
	global_load_b64 v[0:1], v[0:1], off offset:8
	global_load_b64 v[16:17], v[16:17], off offset:8
	global_load_b64 v[18:19], v[18:19], off offset:8
	s_mov_b32 s1, 0xbfd33333
	s_mov_b32 s0, 0x33333333
	s_waitcnt vmcnt(5)
	v_mul_f64 v[2:3], v[2:3], s[0:1]
	s_mov_b32 s1, 0x3fe33333
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[6:7], s[4:5], v[2:3]
	s_mov_b32 s5, 0x3fd99999
	s_waitcnt vmcnt(3)
	v_fma_f64 v[2:3], v[10:11], s[4:5], v[2:3]
	s_mov_b32 s5, 0xbfe99999
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[8:9], 0.5, v[2:3]
	v_fma_f64 v[2:3], v[4:5], s[0:1], v[2:3]
	s_mov_b32 s0, 0x66666666
	s_mov_b32 s1, 0x3fe66666
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[2:3], v[12:13], s[0:1], v[2:3]
	s_mov_b32 s0, 0xcccccccd
	s_mov_b32 s1, 0xbfeccccc
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[0:1], v[0:1], s[4:5], v[2:3]
	s_mov_b32 s5, 0x3fb99999
	v_add_co_u32 v2, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v15, vcc_lo
	s_waitcnt vmcnt(1)
	v_fma_f64 v[0:1], v[16:17], s[0:1], v[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[18:19], s[4:5], v[0:1]
	global_store_b64 v[2:3], v[0:1], off
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11ConvolutionPdS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11ConvolutionPdS_ii, .Lfunc_end0-_Z11ConvolutionPdS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 748
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11ConvolutionPdS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11ConvolutionPdS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
