#include<iostream>
#include<vector>
#include<cstdlib>

__global__ void convolution_kernel(double *arr, double *mask, double *output, int N, int M){
	auto i = blockDim.x*blockIdx.x+threadIdx.x;
	
	auto start = i - (M/2);
	
	auto temp = 0.0;
	for(auto k = 0; k < M; k++){
		if((start+k >=0) && (start+k <N)){
			temp += arr[start+k]*mask[k];
		}
	}
	output[i] = temp;
}

int main(){

int N = 1048576;	// size of the array = 2^20
size_t size_N = N*sizeof(double);
int M = 7;	// size of the mask
size_t size_M = M*sizeof(double);
std::vector<double> h_array(N);
std::vector<double> h_mask(M);
std::vector<double> h_output(N);

for(auto& i:h_array){i = rand()%100;}
for(auto& j:h_mask){j = rand()%10;}

double *d_array, *d_mask, *d_output;
cudaMalloc(&d_array, size_N);
cudaMalloc(&d_output, size_N);
cudaMalloc(&d_mask, size_M);

cudaMemcpy(d_array, h_array.data(), size_N, cudaMemcpyHostToDevice);
cudaMemcpy(d_mask, h_mask.data(), size_M, cudaMemcpyHostToDevice);

int threadsPerBlock = 32;
int blocksPerGrid = (N+threadsPerBlock-1)/threadsPerBlock;
convolution_kernel<<<blocksPerGrid, threadsPerBlock>>>(d_array, d_mask, d_output, N, M);

cudaMemcpy(h_output.data(), d_output, size_N, cudaMemcpyDeviceToHost);

// Uncomment to print the output
// for(auto& i:h_output){std::cout << i << std::endl;}

cudaFree(d_array);
cudaFree(d_output);
cudaFree(d_mask);

return 0;
}

	.file	"tmpxft_00243832_00000000-6_convulation_simple.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4001:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4001:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z44__device_stub__Z18convolution_kernelPdS_S_iiPdS_S_ii
	.type	_Z44__device_stub__Z18convolution_kernelPdS_S_iiPdS_S_ii, @function
_Z44__device_stub__Z18convolution_kernelPdS_S_iiPdS_S_ii:
.LFB4023:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18convolution_kernelPdS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4023:
	.size	_Z44__device_stub__Z18convolution_kernelPdS_S_iiPdS_S_ii, .-_Z44__device_stub__Z18convolution_kernelPdS_S_iiPdS_S_ii
	.globl	_Z18convolution_kernelPdS_S_ii
	.type	_Z18convolution_kernelPdS_S_ii, @function
_Z18convolution_kernelPdS_S_ii:
.LFB4024:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z18convolution_kernelPdS_S_iiPdS_S_ii
	.cfi_endproc
.LFE4024:
	.size	_Z18convolution_kernelPdS_S_ii, .-_Z18convolution_kernelPdS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z18convolution_kernelPdS_S_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4026:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18convolution_kernelPdS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4026:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIdSaIdEEC2EmRKS0_.str1.1,"aMS",@progbits,1
.LC1:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIdSaIdEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIdSaIdEEC5EmRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIdSaIdEEC2EmRKS0_
	.type	_ZNSt6vectorIdSaIdEEC2EmRKS0_, @function
_ZNSt6vectorIdSaIdEEC2EmRKS0_:
.LFB4333:
	.cfi_startproc
	endbr64
	movabsq	$1152921504606846975, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpq	%rsi, %rax
	jnb	.L11
	leaq	.LC1(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L11:
	xorl	%eax, %eax
	movq	%rdi, %rbx
	leaq	0(,%rsi,8), %r12
	movq	%rsi, %rbp
	movq	%rax, (%rdi)
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	xorl	%eax, %eax
	testq	%rsi, %rsi
	je	.L12
	movq	%r12, %rdi
	call	_Znwm@PLT
.L12:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L13
	movq	$0x000000000, (%rax)
	addq	$8, %rax
	decq	%rbp
	je	.L13
.L14:
	cmpq	%rax, %r12
	je	.L13
	movq	$0x000000000, (%rax)
	addq	$8, %rax
	jmp	.L14
.L13:
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4333:
	.size	_ZNSt6vectorIdSaIdEEC2EmRKS0_, .-_ZNSt6vectorIdSaIdEEC2EmRKS0_
	.weak	_ZNSt6vectorIdSaIdEEC1EmRKS0_
	.set	_ZNSt6vectorIdSaIdEEC1EmRKS0_,_ZNSt6vectorIdSaIdEEC2EmRKS0_
	.section	.text._ZNSt6vectorIdSaIdEED2Ev,"axG",@progbits,_ZNSt6vectorIdSaIdEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIdSaIdEED2Ev
	.type	_ZNSt6vectorIdSaIdEED2Ev, @function
_ZNSt6vectorIdSaIdEED2Ev:
.LFB4336:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L25
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L25:
	ret
	.cfi_endproc
.LFE4336:
	.size	_ZNSt6vectorIdSaIdEED2Ev, .-_ZNSt6vectorIdSaIdEED2Ev
	.weak	_ZNSt6vectorIdSaIdEED1Ev
	.set	_ZNSt6vectorIdSaIdEED1Ev,_ZNSt6vectorIdSaIdEED2Ev
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3998:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3998
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1048576, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	112(%rsp), %rax
	leaq	88(%rsp), %rbp
	movq	%rax, (%rsp)
	leaq	64(%rsp), %rax
	movq	(%rsp), %rdx
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt6vectorIdSaIdEEC1EmRKS0_
.LEHE0:
	movq	(%rsp), %rdx
	movl	$7, %esi
	movq	%rbp, %rdi
.LEHB1:
	call	_ZNSt6vectorIdSaIdEEC1EmRKS0_
.LEHE1:
	movq	(%rsp), %rdi
	leaq	52(%rsp), %rdx
	movl	$1048576, %esi
.LEHB2:
	call	_ZNSt6vectorIdSaIdEEC1EmRKS0_
.LEHE2:
	movq	64(%rsp), %r13
	movq	72(%rsp), %r14
	movl	$100, %r12d
	movq	%r13, %r15
.L28:
	cmpq	%r15, %r14
	je	.L43
	call	rand@PLT
	addq	$8, %r15
	cltd
	idivl	%r12d
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, -8(%r15)
	jmp	.L28
.L43:
	movq	88(%rsp), %r12
	movq	96(%rsp), %r15
	movl	$10, %r14d
	movq	%r12, %rbx
.L30:
	cmpq	%rbx, %r15
	je	.L44
	call	rand@PLT
	addq	$8, %rbx
	cltd
	idivl	%r14d
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, -8(%rbx)
	jmp	.L30
.L44:
	leaq	16(%rsp), %rdi
	movl	$8388608, %esi
.LEHB3:
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$56, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$8388608, %edx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$56, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	movl	$131073, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	salq	$15, %rdi
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	32(%rsp), %rdx
	testl	%eax, %eax
	jne	.L32
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$7, %r8d
	movl	$1048576, %ecx
	call	_Z44__device_stub__Z18convolution_kernelPdS_S_iiPdS_S_ii
.L32:
	movq	32(%rsp), %rsi
	movq	112(%rsp), %rdi
	movl	$2, %ecx
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
.LEHE3:
	movq	(%rsp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	%rbp, %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	jmp	.L41
.L40:
	endbr64
	movq	%rax, %r12
.L33:
	movq	(%rsp), %rdi
	movq	%r12, %rbx
	call	_ZNSt6vectorIdSaIdEED1Ev
	jmp	.L34
.L39:
	endbr64
	movq	%rax, %rbx
.L34:
	movq	%rbp, %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	jmp	.L35
.L38:
	endbr64
	movq	%rax, %rbx
.L35:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L41
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L41:
	call	__stack_chk_fail@PLT
.L37:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3998:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3998:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3998-.LLSDACSB3998
.LLSDACSB3998:
	.uleb128 .LEHB0-.LFB3998
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3998
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L38-.LFB3998
	.uleb128 0
	.uleb128 .LEHB2-.LFB3998
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L39-.LFB3998
	.uleb128 0
	.uleb128 .LEHB3-.LFB3998
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L40-.LFB3998
	.uleb128 0
	.uleb128 .LEHB4-.LFB3998
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE3998:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<iostream>
#include<vector>
#include<cstdlib>

__global__ void convolution_kernel(double *arr, double *mask, double *output, int N, int M){
	auto i = blockDim.x*blockIdx.x+threadIdx.x;
	
	auto start = i - (M/2);
	
	auto temp = 0.0;
	for(auto k = 0; k < M; k++){
		if((start+k >=0) && (start+k <N)){
			temp += arr[start+k]*mask[k];
		}
	}
	output[i] = temp;
}

int main(){

int N = 1048576;	// size of the array = 2^20
size_t size_N = N*sizeof(double);
int M = 7;	// size of the mask
size_t size_M = M*sizeof(double);
std::vector<double> h_array(N);
std::vector<double> h_mask(M);
std::vector<double> h_output(N);

for(auto& i:h_array){i = rand()%100;}
for(auto& j:h_mask){j = rand()%10;}

double *d_array, *d_mask, *d_output;
hipMalloc(&d_array, size_N);
hipMalloc(&d_output, size_N);
hipMalloc(&d_mask, size_M);

hipMemcpy(d_array, h_array.data(), size_N, hipMemcpyHostToDevice);
hipMemcpy(d_mask, h_mask.data(), size_M, hipMemcpyHostToDevice);

int threadsPerBlock = 32;
int blocksPerGrid = (N+threadsPerBlock-1)/threadsPerBlock;
convolution_kernel<<<blocksPerGrid, threadsPerBlock>>>(d_array, d_mask, d_output, N, M);

hipMemcpy(h_output.data(), d_output, size_N, hipMemcpyDeviceToHost);

// Uncomment to print the output
// for(auto& i:h_output){std::cout << i << std::endl;}

hipFree(d_array);
hipFree(d_output);
hipFree(d_mask);

return 0;
}

	.text
	.file	"convulation_simple.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__convolution_kernelPdS_S_ii # -- Begin function _Z33__device_stub__convolution_kernelPdS_S_ii
	.type	_Z33__device_stub__convolution_kernelPdS_S_ii,@function
_Z33__device_stub__convolution_kernelPdS_S_ii: # @_Z33__device_stub__convolution_kernelPdS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convolution_kernelPdS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convolution_kernelPdS_S_ii, .Lfunc_end0-_Z33__device_stub__convolution_kernelPdS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znwm
	movq	%rax, %rbx
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movl	$56, %edi
	callq	_Znwm
.Ltmp1:
# %bb.1:
	movq	%rax, %r14
	xorpd	%xmm0, %xmm0
	movupd	%xmm0, 32(%rax)
	movupd	%xmm0, 16(%rax)
	movupd	%xmm0, (%rax)
	movq	$0, 48(%rax)
.Ltmp3:
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znwm
.Ltmp4:
# %bb.2:
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%rbx,%r12)
	addq	$8, %r12
	cmpq	$8388608, %r12                  # imm = 0x800000
	jne	.LBB1_3
# %bb.4:                                # %.preheader.preheader
	xorl	%r12d, %r12d
.LBB1_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%r14,%r12)
	addq	$8, %r12
	cmpq	$56, %r12
	jne	.LBB1_5
# %bb.6:
.Ltmp6:
	leaq	16(%rsp), %rdi
	movl	$8388608, %esi                  # imm = 0x800000
	callq	hipMalloc
.Ltmp7:
# %bb.7:                                # %_ZL9hipMallocIdE10hipError_tPPT_m.exit
.Ltmp8:
	movq	%rsp, %rdi
	movl	$8388608, %esi                  # imm = 0x800000
	callq	hipMalloc
.Ltmp9:
# %bb.8:                                # %_ZL9hipMallocIdE10hipError_tPPT_m.exit38
.Ltmp10:
	leaq	8(%rsp), %rdi
	movl	$56, %esi
	callq	hipMalloc
.Ltmp11:
# %bb.9:                                # %_ZL9hipMallocIdE10hipError_tPPT_m.exit39
	movq	16(%rsp), %rdi
.Ltmp12:
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp13:
# %bb.10:
	movq	8(%rsp), %rdi
.Ltmp14:
	movl	$56, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp15:
# %bb.11:
.Ltmp17:
	movabsq	$4295000064, %rdi               # imm = 0x100008000
	movabsq	$4294967328, %rdx               # imm = 0x100000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp18:
# %bb.12:
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.13:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
.Ltmp19:
	movl	$1048576, %ecx                  # imm = 0x100000
	movl	$7, %r8d
	callq	_Z33__device_stub__convolution_kernelPdS_S_ii
.Ltmp20:
.LBB1_14:
	movq	(%rsp), %rsi
.Ltmp21:
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp22:
# %bb.15:
	movq	16(%rsp), %rdi
.Ltmp23:
	callq	hipFree
.Ltmp24:
# %bb.16:
	movq	(%rsp), %rdi
.Ltmp25:
	callq	hipFree
.Ltmp26:
# %bb.17:
	movq	8(%rsp), %rdi
.Ltmp27:
	callq	hipFree
.Ltmp28:
# %bb.18:                               # %_ZNSt6vectorIdSaIdEED2Ev.exit43
	movq	%r15, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_20:
	.cfi_def_cfa_offset 64
.Ltmp5:
	movq	%rax, %r12
	jmp	.LBB1_23
.LBB1_19:
.Ltmp2:
	movq	%rax, %r12
	jmp	.LBB1_24
.LBB1_21:
.Ltmp16:
	jmp	.LBB1_22
.LBB1_25:
.Ltmp29:
.LBB1_22:                               # %_ZNSt6vectorIdSaIdEED2Ev.exit45
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB1_23:                               # %_ZNSt6vectorIdSaIdEED2Ev.exit47
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB1_24:                               # %_ZNSt6vectorIdSaIdEED2Ev.exit49
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r12, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp15-.Ltmp6                 #   Call between .Ltmp6 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp28-.Ltmp17                #   Call between .Ltmp17 and .Ltmp28
	.uleb128 .Ltmp29-.Lfunc_begin0          #     jumps to .Ltmp29
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Lfunc_end1-.Ltmp28            #   Call between .Ltmp28 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convolution_kernelPdS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convolution_kernelPdS_S_ii,@object # @_Z18convolution_kernelPdS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z18convolution_kernelPdS_S_ii
	.p2align	3, 0x0
_Z18convolution_kernelPdS_S_ii:
	.quad	_Z33__device_stub__convolution_kernelPdS_S_ii
	.size	_Z18convolution_kernelPdS_S_ii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z18convolution_kernelPdS_S_ii"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convolution_kernelPdS_S_ii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z18convolution_kernelPdS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convolution_kernelPdS_S_ii ; -- Begin function _Z18convolution_kernelPdS_S_ii
	.globl	_Z18convolution_kernelPdS_S_ii
	.p2align	8
	.type	_Z18convolution_kernelPdS_S_ii,@function
_Z18convolution_kernelPdS_S_ii:         ; @_Z18convolution_kernelPdS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_cmp_lt_i32 s7, 1
	s_mul_i32 s15, s15, s8
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph.preheader
	s_lshr_b32 s8, s7, 31
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 0
	s_add_i32 s8, s7, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s8, s8, 1
	s_sub_i32 s8, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s8, v0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s6, v3
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	s_load_b64 s[10:11], s[2:3], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[1:2], v[5:6], s[10:11], v[1:2]
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s7, s7, -1
	v_add_nc_u32_e32 v3, 1, v3
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s7, 0
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
.LBB0_6:                                ; %Flow42
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, s15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_store_b64 v[3:4], v[1:2], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convolution_kernelPdS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convolution_kernelPdS_S_ii, .Lfunc_end0-_Z18convolution_kernelPdS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convolution_kernelPdS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18convolution_kernelPdS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
