/*
 * Alexandre Maros - 2016
 *
 * Cuda Matrix Multiplication with Global Memory.
 *
 * nvcc cuda_matrix_global.cu -o cg.o
 *
 * Implemented by Alexandre Maros for learning purposes.
 * A version of this code using Shared Memory is in here:
 * https://github.com/alepmaros/cuda_matrix_multiplication
 *
 * Distributed under the MIT Lincese.
 */

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>

//32x32
#define NTHREADS_X 32
#define NTHREADS_Y 32
#define THREADS_PER_BLOCK NTHREADS_X * NTHREADS_Y

/* A macro used for error checking in CUDA function calls
 * Credit to: http://stackoverflow.com/a/14038590 for the gpuErrchk macro.
 */
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

__global__ void matrix_mul(int *a, int *b, int *c, int a_ncolumns, int c_nlines, int c_ncolumns)
{

    int column = blockIdx.x * blockDim.x + threadIdx.x;
    int line =  blockIdx.y * blockDim.y + threadIdx.y;

    if (column  >= c_ncolumns || line >= c_nlines)
        return;

    int i, sum = 0;


    int beginA = a_ncolumns * line;
    int beginB = column;

    for (i = 0; i < a_ncolumns; i++)
    {
        sum += a[beginA + i] * b[i * c_ncolumns + beginB];
    }

    c[line * c_ncolumns + column] = sum;
}

int main(){
    int *a, *b, *c;
    int *d_a, *d_b, *d_c;
    int a_nlines, a_ncolumns;
    int b_nlines, b_ncolumns;
    int c_nlines, c_ncolumns;

    size_t a_size, b_size, c_size;
    int i, j;

    cudaEvent_t start, stop;
    gpuErrchk( cudaEventCreate(&start) );
    gpuErrchk( cudaEventCreate(&stop) );

    scanf("%d", &a_nlines);
    scanf("%d", &a_ncolumns);
    scanf("%d", &b_nlines);
    scanf("%d", &b_ncolumns);

    c_nlines = a_nlines;
    c_ncolumns = b_ncolumns;

#ifdef __DEBUG
    printf("a_nlines: %d\na_ncolumns: %d\nb_nlines: %d\nb_ncolumns: %d\nc_nlines: %d\nc_ncolumns: %d\n", a_nlines, a_ncolumns, b_nlines, b_ncolumns, c_nlines, c_ncolumns);
#endif

    if ( a_ncolumns != b_nlines )
    {
        printf("Number of columns in Matrix A should be equals to number of lines in Matrix B\n");
        return EXIT_FAILURE;
    }

    a_size = a_nlines * a_ncolumns * sizeof(int);
    b_size = b_nlines * b_ncolumns * sizeof(int);
    c_size = c_nlines * c_ncolumns * sizeof(int);

    gpuErrchk( cudaMalloc((void **) &d_a, a_size) );
    gpuErrchk( cudaMalloc((void **) &d_b, b_size) );
    gpuErrchk( cudaMalloc((void **) &d_c, c_size) );

    a = (int *)malloc(a_size);
    b = (int *)malloc(b_size);
    c = (int *)malloc(c_size);

    memset(c, 0, c_nlines*c_ncolumns*sizeof(int));

    for (i = 0; i < a_nlines; i++)
    {
        for (j = 0; j < a_ncolumns; j++)
        {
            scanf("%d", &a[i * a_ncolumns + j]);
        }
    }

    for (i = 0; i < b_nlines; i++)
    {
        for (j = 0; j < b_ncolumns; j++)
        {
            scanf("%d", &b[i * b_ncolumns + j]);
        }
    }

    gpuErrchk( cudaMemcpy(d_a, a, a_size, cudaMemcpyHostToDevice) );
    gpuErrchk( cudaMemcpy(d_b, b, b_size, cudaMemcpyHostToDevice) );

    dim3 tbloco = dim3(
                    (int) std::ceil( (double) c_ncolumns / NTHREADS_X ),
                    (int) std::ceil ( (double) c_nlines / NTHREADS_Y ),
                    1
                );

    dim3 tthreads = dim3(
                        NTHREADS_X,
                        NTHREADS_Y,
                        1
                    );

#ifdef __DEBUG
    printf("tbloco.x: %d tbloco.y: %d tbloco.z: %d\n", tbloco.x, tbloco.y, tbloco.z);
    printf("tthreads.x: %d tthreads.y: %d\n", tthreads.x, tthreads.y);
#endif

    cudaEventRecord(start);

    // kernel call
    matrix_mul<<<tbloco,tthreads>>>(d_a, d_b, d_c, a_ncolumns, c_nlines, c_ncolumns);
    gpuErrchk( cudaPeekAtLastError() );
    gpuErrchk( cudaEventRecord(stop) );
    gpuErrchk( cudaMemcpy(c, d_c, c_size, cudaMemcpyDeviceToHost) );
    gpuErrchk( cudaEventSynchronize(stop) );


#ifndef __NO_OUTPUT
    // print Matrix
    for (i = 0; i < c_nlines; i++)
    {
        for (j = 0; j < c_ncolumns; j++)
        {
            printf("%d ", c[i * c_ncolumns + j]);
        }
        printf("\n");
    }
    printf("\n");
#endif

#ifdef __TIME
        float milliseconds = 0;
        gpuErrchk( cudaEventElapsedTime(&milliseconds, start, stop) );
        printf("%.5f\n", milliseconds);
#endif

    free(a); free(b); free(c);

    gpuErrchk( cudaFree(d_a) );
    gpuErrchk( cudaFree(d_b) );
    gpuErrchk( cudaFree(d_c) );

    return 0;
}

	.file	"tmpxft_002c12bb_00000000-6_mm_omp_vs_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z37__device_stub__Z10matrix_mulPiS_S_iiiPiS_S_iii
	.type	_Z37__device_stub__Z10matrix_mulPiS_S_iiiPiS_S_iii, @function
_Z37__device_stub__Z10matrix_mulPiS_S_iiiPiS_S_iii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10matrix_mulPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z37__device_stub__Z10matrix_mulPiS_S_iiiPiS_S_iii, .-_Z37__device_stub__Z10matrix_mulPiS_S_iiiPiS_S_iii
	.globl	_Z10matrix_mulPiS_S_iii
	.type	_Z10matrix_mulPiS_S_iii, @function
_Z10matrix_mulPiS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z10matrix_mulPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2054:
	.size	_Z10matrix_mulPiS_S_iii, .-_Z10matrix_mulPiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/roboGen8/MPPI-Codes/master/research/trial/mm_omp_vs_cuda.cu"
.LC2:
	.string	"%d"
.LC3:
	.string	"Number of columns in Matrix A should be equals to number of lines in Matrix B\n"
.LC5:
	.string	"%d "
.LC6:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$72, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$73, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	40(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	44(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	48(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	52(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	40(%rsp), %r13d
	movl	52(%rsp), %ebx
	movl	44(%rsp), %eax
	cmpl	48(%rsp), %eax
	je	.L18
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L17
.L18:
	movl	%eax, %edx
	imull	%ebx, %eax
	leaq	56(%rsp), %rdi
	xorl	%r14d, %r14d
	imull	%r13d, %edx
	cltq
	salq	$2, %rax
	movslq	%edx, %rdx
	movq	%rax, 24(%rsp)
	movl	%r13d, %eax
	leaq	0(,%rdx,4), %rcx
	imull	%ebx, %eax
	movq	%rcx, %rsi
	movq	%rcx, 16(%rsp)
	cltq
	salq	$2, %rax
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$97, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$98, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$99, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	16(%rsp), %rdi
	call	malloc@PLT
	movq	24(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	(%rsp), %rcx
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	movq	%rcx, %rdx
	call	__memset_chk@PLT
.L20:
	xorl	%r15d, %r15d
	cmpl	%r14d, 40(%rsp)
	jle	.L23
.L22:
	movl	44(%rsp), %eax
	cmpl	%r15d, %eax
	jle	.L35
	imull	%r14d, %eax
	leaq	.LC2(%rip), %rdi
	addl	%r15d, %eax
	incl	%r15d
	cltq
	leaq	(%r12,%rax,4), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	jmp	.L22
.L35:
	incl	%r14d
	jmp	.L20
.L37:
	incl	%r15d
.L23:
	cmpl	%r15d, 48(%rsp)
	jle	.L36
	xorl	%r14d, %r14d
.L25:
	movl	52(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L37
	imull	%r15d, %eax
	leaq	.LC2(%rip), %rdi
	addl	%r14d, %eax
	incl	%r14d
	cltq
	leaq	0(%rbp,%rax,4), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	jmp	.L25
.L36:
	movq	16(%rsp), %rdx
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$123, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdx
	movq	64(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$124, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	cvtsi2sdl	%r13d, %xmm0
	mulsd	.LC4(%rip), %xmm0
	call	ceil@PLT
	movq	%xmm0, %r14
	cvtsi2sdl	%ebx, %xmm0
	mulsd	.LC4(%rip), %xmm0
	call	ceil@PLT
	movq	%r14, %xmm1
	xorl	%esi, %esi
	movq	80(%rsp), %rdi
	cvttsd2sil	%xmm0, %eax
	movl	$1, 104(%rsp)
	movl	$1, 116(%rsp)
	movl	%eax, 96(%rsp)
	cvttsd2sil	%xmm1, %eax
	movl	%eax, 100(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 108(%rsp)
	call	cudaEventRecord@PLT
	movl	116(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movl	44(%rsp), %ecx
	movq	72(%rsp), %rdx
	movl	%ebx, %r9d
	movl	%r13d, %r8d
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z37__device_stub__Z10matrix_mulPiS_S_iiiPiS_S_iii
.L26:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	movl	%eax, %edi
	movl	$147, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$148, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$149, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	$1, %ecx
	movl	$150, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
.L27:
	cmpl	%r13d, %r15d
	jge	.L29
	movq	8(%rsp), %rcx
	movslq	%r14d, %rax
	leaq	(%rcx,%rax,4), %r8
	xorl	%ecx, %ecx
.L30:
	cmpl	%ecx, %ebx
	jle	.L38
	movl	(%r8,%rcx,4), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r8, 16(%rsp)
	leaq	.LC5(%rip), %rsi
	movq	%rcx, (%rsp)
	call	__printf_chk@PLT
	movq	(%rsp), %rcx
	movq	16(%rsp), %r8
	incq	%rcx
	jmp	.L30
.L38:
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	incl	%r15d
	addl	%ebx, %r14d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L27
.L29:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$174, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$175, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$176, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	xorl	%eax, %eax
.L17:
	movq	120(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z10matrix_mulPiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10matrix_mulPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1067450368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * Alexandre Maros - 2016
 *
 * Cuda Matrix Multiplication with Global Memory.
 *
 * nvcc cuda_matrix_global.cu -o cg.o
 *
 * Implemented by Alexandre Maros for learning purposes.
 * A version of this code using Shared Memory is in here:
 * https://github.com/alepmaros/cuda_matrix_multiplication
 *
 * Distributed under the MIT Lincese.
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>

//32x32
#define NTHREADS_X 32
#define NTHREADS_Y 32
#define THREADS_PER_BLOCK NTHREADS_X * NTHREADS_Y

/* A macro used for error checking in CUDA function calls
 * Credit to: http://stackoverflow.com/a/14038590 for the gpuErrchk macro.
 */
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

__global__ void matrix_mul(int *a, int *b, int *c, int a_ncolumns, int c_nlines, int c_ncolumns)
{

    int column = blockIdx.x * blockDim.x + threadIdx.x;
    int line =  blockIdx.y * blockDim.y + threadIdx.y;

    if (column  >= c_ncolumns || line >= c_nlines)
        return;

    int i, sum = 0;


    int beginA = a_ncolumns * line;
    int beginB = column;

    for (i = 0; i < a_ncolumns; i++)
    {
        sum += a[beginA + i] * b[i * c_ncolumns + beginB];
    }

    c[line * c_ncolumns + column] = sum;
}

int main(){
    int *a, *b, *c;
    int *d_a, *d_b, *d_c;
    int a_nlines, a_ncolumns;
    int b_nlines, b_ncolumns;
    int c_nlines, c_ncolumns;

    size_t a_size, b_size, c_size;
    int i, j;

    hipEvent_t start, stop;
    gpuErrchk( hipEventCreate(&start) );
    gpuErrchk( hipEventCreate(&stop) );

    scanf("%d", &a_nlines);
    scanf("%d", &a_ncolumns);
    scanf("%d", &b_nlines);
    scanf("%d", &b_ncolumns);

    c_nlines = a_nlines;
    c_ncolumns = b_ncolumns;

#ifdef __DEBUG
    printf("a_nlines: %d\na_ncolumns: %d\nb_nlines: %d\nb_ncolumns: %d\nc_nlines: %d\nc_ncolumns: %d\n", a_nlines, a_ncolumns, b_nlines, b_ncolumns, c_nlines, c_ncolumns);
#endif

    if ( a_ncolumns != b_nlines )
    {
        printf("Number of columns in Matrix A should be equals to number of lines in Matrix B\n");
        return EXIT_FAILURE;
    }

    a_size = a_nlines * a_ncolumns * sizeof(int);
    b_size = b_nlines * b_ncolumns * sizeof(int);
    c_size = c_nlines * c_ncolumns * sizeof(int);

    gpuErrchk( hipMalloc((void **) &d_a, a_size) );
    gpuErrchk( hipMalloc((void **) &d_b, b_size) );
    gpuErrchk( hipMalloc((void **) &d_c, c_size) );

    a = (int *)malloc(a_size);
    b = (int *)malloc(b_size);
    c = (int *)malloc(c_size);

    memset(c, 0, c_nlines*c_ncolumns*sizeof(int));

    for (i = 0; i < a_nlines; i++)
    {
        for (j = 0; j < a_ncolumns; j++)
        {
            scanf("%d", &a[i * a_ncolumns + j]);
        }
    }

    for (i = 0; i < b_nlines; i++)
    {
        for (j = 0; j < b_ncolumns; j++)
        {
            scanf("%d", &b[i * b_ncolumns + j]);
        }
    }

    gpuErrchk( hipMemcpy(d_a, a, a_size, hipMemcpyHostToDevice) );
    gpuErrchk( hipMemcpy(d_b, b, b_size, hipMemcpyHostToDevice) );

    dim3 tbloco = dim3(
                    (int) std::ceil( (double) c_ncolumns / NTHREADS_X ),
                    (int) std::ceil ( (double) c_nlines / NTHREADS_Y ),
                    1
                );

    dim3 tthreads = dim3(
                        NTHREADS_X,
                        NTHREADS_Y,
                        1
                    );

#ifdef __DEBUG
    printf("tbloco.x: %d tbloco.y: %d tbloco.z: %d\n", tbloco.x, tbloco.y, tbloco.z);
    printf("tthreads.x: %d tthreads.y: %d\n", tthreads.x, tthreads.y);
#endif

    hipEventRecord(start);

    // kernel call
    matrix_mul<<<tbloco,tthreads>>>(d_a, d_b, d_c, a_ncolumns, c_nlines, c_ncolumns);
    gpuErrchk( hipPeekAtLastError() );
    gpuErrchk( hipEventRecord(stop) );
    gpuErrchk( hipMemcpy(c, d_c, c_size, hipMemcpyDeviceToHost) );
    gpuErrchk( hipEventSynchronize(stop) );


#ifndef __NO_OUTPUT
    // print Matrix
    for (i = 0; i < c_nlines; i++)
    {
        for (j = 0; j < c_ncolumns; j++)
        {
            printf("%d ", c[i * c_ncolumns + j]);
        }
        printf("\n");
    }
    printf("\n");
#endif

#ifdef __TIME
        float milliseconds = 0;
        gpuErrchk( hipEventElapsedTime(&milliseconds, start, stop) );
        printf("%.5f\n", milliseconds);
#endif

    free(a); free(b); free(c);

    gpuErrchk( hipFree(d_a) );
    gpuErrchk( hipFree(d_b) );
    gpuErrchk( hipFree(d_c) );

    return 0;
}

	.text
	.file	"mm_omp_vs_cuda.hip"
	.globl	_Z25__device_stub__matrix_mulPiS_S_iii # -- Begin function _Z25__device_stub__matrix_mulPiS_S_iii
	.type	_Z25__device_stub__matrix_mulPiS_S_iii,@function
_Z25__device_stub__matrix_mulPiS_S_iii: # @_Z25__device_stub__matrix_mulPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matrix_mulPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__matrix_mulPiS_S_iii, .Lfunc_end0-_Z25__device_stub__matrix_mulPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3fa0000000000000              # double 0.03125
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	96(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.2:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.4:                                # %_Z9gpuAssert10hipError_tPKcib.exit66
	leaq	12(%rsp), %rsi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	leaq	8(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	leaq	28(%rsp), %r14
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	leaq	4(%rsp), %rsi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %r15d
	cmpl	(%r14), %r15d
	jne	.LBB1_5
# %bb.7:
	movl	12(%rsp), %ecx
	movl	4(%rsp), %r14d
	movl	%r15d, %eax
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	imull	%ecx, %eax
	movslq	%eax, %r12
	shlq	$2, %r12
	leaq	64(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.10:                               # %_Z9gpuAssert10hipError_tPKcib.exit68
	imull	%r14d, %r15d
	movslq	%r15d, %r13
	shlq	$2, %r13
	leaq	56(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKcib.exit70
	movl	%r14d, %eax
	imull	16(%rsp), %eax                  # 4-byte Folded Reload
	movslq	%eax, %rbx
	shlq	$2, %rbx
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit72
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, 88(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movl	$1, %edi
	movq	%rbx, 80(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	callq	calloc@PLT
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	12(%rsp), %ecx
	testl	%ecx, %ecx
	jle	.LBB1_22
# %bb.16:                               # %.preheader95.preheader
	movl	8(%rsp), %eax
	xorl	%ebp, %ebp
.LBB1_17:                               # %.preheader95
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_19 Depth 2
	testl	%eax, %eax
	jle	.LBB1_21
# %bb.18:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_17 Depth=1
	xorl	%r13d, %r13d
.LBB1_19:                               # %.lr.ph
                                        #   Parent Loop BB1_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	cltq
	addq	%r13, %rax
	leaq	(%r15,%rax,4), %rsi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	8(%rsp), %eax
	incq	%r13
	cmpl	%eax, %r13d
	jl	.LBB1_19
# %bb.20:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_17 Depth=1
	movl	12(%rsp), %ecx
.LBB1_21:                               # %._crit_edge
                                        #   in Loop: Header=BB1_17 Depth=1
	incl	%ebp
	cmpl	%ecx, %ebp
	jl	.LBB1_17
.LBB1_22:                               # %.preheader94
	movl	28(%rsp), %ecx
	testl	%ecx, %ecx
	jle	.LBB1_29
# %bb.23:                               # %.preheader93.preheader
	movl	4(%rsp), %eax
	xorl	%ebp, %ebp
.LBB1_24:                               # %.preheader93
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_26 Depth 2
	testl	%eax, %eax
	jle	.LBB1_28
# %bb.25:                               # %.lr.ph99.preheader
                                        #   in Loop: Header=BB1_24 Depth=1
	xorl	%r13d, %r13d
.LBB1_26:                               # %.lr.ph99
                                        #   Parent Loop BB1_24 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	cltq
	addq	%r13, %rax
	leaq	(%r12,%rax,4), %rsi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	4(%rsp), %eax
	incq	%r13
	cmpl	%eax, %r13d
	jl	.LBB1_26
# %bb.27:                               # %._crit_edge100.loopexit
                                        #   in Loop: Header=BB1_24 Depth=1
	movl	28(%rsp), %ecx
.LBB1_28:                               # %._crit_edge100
                                        #   in Loop: Header=BB1_24 Depth=1
	incl	%ebp
	cmpl	%ecx, %ebp
	jl	.LBB1_24
.LBB1_29:                               # %._crit_edge102
	movq	64(%rsp), %rdi
	movq	%r15, %rsi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_30
# %bb.31:                               # %_Z9gpuAssert10hipError_tPKcib.exit74
	movq	56(%rsp), %rdi
	movq	%r12, %rsi
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_32
# %bb.33:                               # %_Z9gpuAssert10hipError_tPKcib.exit76
	cvtsi2sd	%r14d, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %ebx
	xorps	%xmm0, %xmm0
	cvtsi2sdl	16(%rsp), %xmm0         # 4-byte Folded Reload
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %ebp
	shlq	$32, %rbp
	orq	%rbx, %rbp
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_35
# %bb.34:
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	movl	8(%rsp), %ecx
	movq	16(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	%r14d, %r9d
	callq	_Z25__device_stub__matrix_mulPiS_S_iii
.LBB1_35:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB1_36
# %bb.37:                               # %_Z9gpuAssert10hipError_tPKcib.exit78
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB1_38
# %bb.39:                               # %_Z9gpuAssert10hipError_tPKcib.exit80
	movq	%r15, 32(%rsp)                  # 8-byte Spill
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_40
# %bb.41:                               # %_Z9gpuAssert10hipError_tPKcib.exit82
	movq	72(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB1_55
# %bb.42:                               # %_Z9gpuAssert10hipError_tPKcib.exit84.preheader
	cmpl	$0, 16(%rsp)                    # 4-byte Folded Reload
	jle	.LBB1_48
# %bb.43:                               # %.preheader.lr.ph
	xorl	%ebp, %ebp
	xorl	%r13d, %r13d
.LBB1_44:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_46 Depth 2
	testl	%r14d, %r14d
	movq	%r14, %r15
	jle	.LBB1_47
# %bb.45:                               # %.lr.ph104
                                        #   in Loop: Header=BB1_44 Depth=1
	movl	%ebp, %eax
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	xorl	%r14d, %r14d
.LBB1_46:                               #   Parent Loop BB1_44 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB1_46
.LBB1_47:                               # %_Z9gpuAssert10hipError_tPKcib.exit84
                                        #   in Loop: Header=BB1_44 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	%r15d, %ebp
	cmpq	16(%rsp), %r13                  # 8-byte Folded Reload
	movq	%r15, %r14
	jne	.LBB1_44
.LBB1_48:                               # %_Z9gpuAssert10hipError_tPKcib.exit84._crit_edge
	movl	$10, %edi
	callq	putchar@PLT
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	64(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_49
# %bb.50:                               # %_Z9gpuAssert10hipError_tPKcib.exit86
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_51
# %bb.52:                               # %_Z9gpuAssert10hipError_tPKcib.exit88
	movq	48(%rsp), %rdi
	callq	hipFree
	movl	%eax, %ebx
	xorl	%eax, %eax
	testl	%ebx, %ebx
	je	.LBB1_6
# %bb.53:
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$178, %r8d
	jmp	.LBB1_54
.LBB1_5:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %eax
.LBB1_6:                                # %_Z9gpuAssert10hipError_tPKcib.exit90
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 160
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$74, %r8d
	jmp	.LBB1_54
.LBB1_3:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$75, %r8d
	jmp	.LBB1_54
.LBB1_8:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$99, %r8d
	jmp	.LBB1_9
.LBB1_11:
	movl	%eax, %r15d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$100, %r8d
	jmp	.LBB1_12
.LBB1_14:
	movl	%eax, %r15d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$101, %r8d
.LBB1_12:
	xorl	%eax, %eax
	callq	fprintf
	movl	%r15d, %edi
	callq	exit
.LBB1_30:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$125, %r8d
	jmp	.LBB1_9
.LBB1_32:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$126, %r8d
	jmp	.LBB1_9
.LBB1_36:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$149, %r8d
	jmp	.LBB1_9
.LBB1_38:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$150, %r8d
	jmp	.LBB1_9
.LBB1_40:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$151, %r8d
	jmp	.LBB1_9
.LBB1_55:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$152, %r8d
.LBB1_9:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB1_49:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$176, %r8d
	jmp	.LBB1_54
.LBB1_51:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$177, %r8d
.LBB1_54:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matrix_mulPiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10matrix_mulPiS_S_iii,@object # @_Z10matrix_mulPiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z10matrix_mulPiS_S_iii
	.p2align	3, 0x0
_Z10matrix_mulPiS_S_iii:
	.quad	_Z25__device_stub__matrix_mulPiS_S_iii
	.size	_Z10matrix_mulPiS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/roboGen8/MPPI-Codes/master/research/trial/mm_omp_vs_cuda.hip"
	.size	.L.str, 123

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d "
	.size	.L.str.3, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.5, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10matrix_mulPiS_S_iii"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Number of columns in Matrix A should be equals to number of lines in Matrix B"
	.size	.Lstr, 78

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__matrix_mulPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10matrix_mulPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10matrix_mulPiS_S_iii ; -- Begin function _Z10matrix_mulPiS_S_iii
	.globl	_Z10matrix_mulPiS_S_iii
	.p2align	8
	.type	_Z10matrix_mulPiS_S_iii,@function
_Z10matrix_mulPiS_S_iii:                ; @_Z10matrix_mulPiS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	v_mul_lo_u32 v2, v1, s4
	v_mov_b32_e32 v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s4, s4, -1
	s_cmp_lg_u32 s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s6, v5
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %._crit_edge
	v_mad_u64_u32 v[3:4], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matrix_mulPiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10matrix_mulPiS_S_iii, .Lfunc_end0-_Z10matrix_mulPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10matrix_mulPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10matrix_mulPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
