#include<cuda.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecMulMatrixKernel(float* A, float* B, float* C, int n){
	//each block loads the corresponding row of blocks of A matrix and column of blocks of B matrix, one block at a time and then clculates the product for that part then product of a  the parts is added.
	// each thread loads 2 elements one from A and one from B in each phase
	// there are total gridDim.x phases
	// the element loaded is the element at the same position as this thread but in a different block
	//if run more thread than max then not run
	int tx=threadIdx.x; int ty=threadIdx.y;
	int bx=blockIdx.x; int by=blockIdx.y;
	
	int row=by*blockDim.y+ty;
	int col=bx*blockDim.x+tx;
	
	__shared__ float Ads[TILEWIDTH][TILEWIDTH];
	__shared__ float Bds[TILEWIDTH][TILEWIDTH];
	
	if(row<n && col <n){
		int i; float val=0.0;
		for(i=0;i<gridDim.x-1;i++){
			Ads[ty][tx] = A[ row*n + i*TILEWIDTH + tx];
			Bds[ty][tx] = B[ (i*TILEWIDTH + ty)*n + col];
			__syncthreads();
			for(int k=0;k<TILEWIDTH;k++){
				val+= Ads[ty][k]*Bds[tx][k];	
			}
			__syncthreads();
			
		}

		if(i*TILEWIDTH + tx <n )		//if n was a multiple of blockDim then this was not required
			Ads[ty][tx] = A[ row*n + i*TILEWIDTH + tx];
		if(i*TILEWIDTH + ty <n )
			Bds[ty][tx] = B[ (i*TILEWIDTH + ty)*n + col];
		__syncthreads();
		int m =n%TILEWIDTH;
		if(m==0)
			m=TILEWIDTH;
		for(int k=0;k<m;k++){//printf("add");
			val+= Ads[ty][k]*Bds[tx][k];	
		}
		__syncthreads();
		C[row*n + col]= val;
	}
}

int min2Power(int x){
	int res=1;
	while(res<x){
		res*=2;	
	}
	return res/2;
}

__host__
void vecMulMatrix(float* A,float* B,float* C, int n){
	int size = n * n * sizeof(float);
	float *d_A, *d_B, *d_C;
	
	//Allocate device memory for A,B,C
	cudaMalloc((void**)&d_A, size);
	cudaMalloc((void**)&d_B, size);
	cudaMalloc((void**)&d_C, size);

	//copy A,B to device memory
	cudaMemcpy(d_A, A, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice);
	
	//call kernal function that the calculates the product and stores it in C
	dim3 dimBlock(TILEWIDTH,TILEWIDTH,1);
	dim3 dimGrid(ceil(n/(float)TILEWIDTH),ceil(n/(float)TILEWIDTH),1);
	vecMulMatrixKernel<<<dimGrid,dimBlock >>>(d_A,d_B,d_C,n);		

	//copy C from devce memory
	cudaMemcpy(C, d_C, size, cudaMemcpyDeviceToHost);
	
	//free device memories
	cudaFree(d_A);
	cudaFree(d_B);
	cudaFree(d_C);
}

//Kernal function that runs in each thread


int main(){
	int n=10;
	int i,j;
	float A[n][n],C[n][n],B[n][n];
	
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			A[i][j]=i+j;
			B[i][j]=i*j;
		}
	}
	
	vecMulMatrix(&A[0][0],&B[0][0],&C[0][0],n);
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			printf("%.3f ",A[i][j]);
		}
		printf("\n");
	}
	printf("---\n");
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			printf("%.3f ",B[i][j]);
		}
		printf("\n");
	}
	printf("---\n");
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			printf("%.3f ",C[i][j]);
		}
		printf("\n");
	}
	
	return 0;
}





	.file	"tmpxft_0021e660_00000000-6_matrixmul_tiled.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9min2Poweri
	.type	_Z9min2Poweri, @function
_Z9min2Poweri:
.LFB2027:
	.cfi_startproc
	endbr64
	movl	$1, %eax
.L3:
	cmpl	%edi, %eax
	jge	.L6
	addl	%eax, %eax
	jmp	.L3
.L6:
	movl	$2, %ecx
	cltd
	idivl	%ecx
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9min2Poweri, .-_Z9min2Poweri
	.globl	_Z43__device_stub__Z18vecMulMatrixKernelPfS_S_iPfS_S_i
	.type	_Z43__device_stub__Z18vecMulMatrixKernelPfS_S_iPfS_S_i, @function
_Z43__device_stub__Z18vecMulMatrixKernelPfS_S_iPfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18vecMulMatrixKernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L7:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z43__device_stub__Z18vecMulMatrixKernelPfS_S_iPfS_S_i, .-_Z43__device_stub__Z18vecMulMatrixKernelPfS_S_iPfS_S_i
	.globl	_Z18vecMulMatrixKernelPfS_S_i
	.type	_Z18vecMulMatrixKernelPfS_S_i, @function
_Z18vecMulMatrixKernelPfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z18vecMulMatrixKernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z18vecMulMatrixKernelPfS_S_i, .-_Z18vecMulMatrixKernelPfS_S_i
	.globl	_Z12vecMulMatrixPfS_S_i
	.type	_Z12vecMulMatrixPfS_S_i, @function
_Z12vecMulMatrixPfS_S_i:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%ecx, %ebx
	imull	%ecx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	sall	$2, %ebx
	leaq	8(%rsp), %rdi
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC0(%rip), %xmm0
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	cvttss2siq	%xmm0, %rax
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	%eax, 44(%rsp)
	movl	%eax, 48(%rsp)
	movq	44(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebp, %ecx
	movq	8(%rsp), %rdi
	call	_Z43__device_stub__Z18vecMulMatrixKernelPfS_S_iPfS_S_i
.L13:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12vecMulMatrixPfS_S_i, .-_Z12vecMulMatrixPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%.3f "
.LC2:
	.string	"\n"
.LC3:
	.string	"---\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	movq	%rsp, %rax
.L17:
	cmpq	%rax, %rsp
	je	.L18
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L17
.L18:
	subq	$400, %rsp
	orq	$0, 392(%rsp)
	movq	%rsp, %r12
	movq	%rsp, %rax
.L20:
	cmpq	%rax, %rsp
	je	.L21
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L20
.L21:
	subq	$400, %rsp
	orq	$0, 392(%rsp)
	movq	%rsp, %rbx
	movq	%rsp, %rax
.L23:
	cmpq	%rax, %rsp
	je	.L24
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L23
.L24:
	subq	$400, %rsp
	orq	$0, 392(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %r15
.L26:
	imulq	$40, %rax, %rcx
	movl	%eax, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
.L27:
	leal	(%rdx,%rdi), %r8d
	incl	%edx
	cvtsi2ssl	%r8d, %xmm0
	movss	%xmm0, (%r12,%rcx)
	cvtsi2ssl	%esi, %xmm0
	addl	%edi, %esi
	movss	%xmm0, (%r15,%rcx)
	addq	$4, %rcx
	cmpl	$10, %edx
	jne	.L27
	incq	%rax
	cmpq	$10, %rax
	jne	.L26
	movl	$10, %ecx
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movq	%r12, %rdi
	call	_Z12vecMulMatrixPfS_S_i
	leaq	400(%r12), %r14
.L29:
	xorl	%r13d, %r13d
.L30:
	cvtss2sd	(%r12,%r13,4), %xmm0
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r13
	cmpq	$10, %r13
	jne	.L30
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$40, %r12
	call	__printf_chk@PLT
	cmpq	%r14, %r12
	jne	.L29
	leaq	.LC3(%rip), %r14
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r15, %r13
	movq	%r14, %rsi
	leaq	400(%r15), %r15
	call	__printf_chk@PLT
.L32:
	xorl	%r12d, %r12d
.L33:
	cvtss2sd	0(%r13,%r12,4), %xmm0
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r12
	cmpq	$10, %r12
	jne	.L33
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$40, %r13
	call	__printf_chk@PLT
	cmpq	%r15, %r13
	jne	.L32
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	400(%rbx), %r15
.L35:
	xorl	%r14d, %r14d
.L36:
	cvtss2sd	(%rbx,%r14,4), %xmm0
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r14
	cmpq	$10, %r14
	jne	.L36
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$40, %rbx
	call	__printf_chk@PLT
	cmpq	%r15, %rbx
	jne	.L35
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z18vecMulMatrixKernelPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18vecMulMatrixKernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1023410176
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#define TILEWIDTH 32
__global__
void vecMulMatrixKernel(float* A, float* B, float* C, int n){
	//each block loads the corresponding row of blocks of A matrix and column of blocks of B matrix, one block at a time and then clculates the product for that part then product of a  the parts is added.
	// each thread loads 2 elements one from A and one from B in each phase
	// there are total gridDim.x phases
	// the element loaded is the element at the same position as this thread but in a different block
	//if run more thread than max then not run
	int tx=threadIdx.x; int ty=threadIdx.y;
	int bx=blockIdx.x; int by=blockIdx.y;
	
	int row=by*blockDim.y+ty;
	int col=bx*blockDim.x+tx;
	
	__shared__ float Ads[TILEWIDTH][TILEWIDTH];
	__shared__ float Bds[TILEWIDTH][TILEWIDTH];
	
	if(row<n && col <n){
		int i; float val=0.0;
		for(i=0;i<gridDim.x-1;i++){
			Ads[ty][tx] = A[ row*n + i*TILEWIDTH + tx];
			Bds[ty][tx] = B[ (i*TILEWIDTH + ty)*n + col];
			__syncthreads();
			for(int k=0;k<TILEWIDTH;k++){
				val+= Ads[ty][k]*Bds[tx][k];	
			}
			__syncthreads();
			
		}

		if(i*TILEWIDTH + tx <n )		//if n was a multiple of blockDim then this was not required
			Ads[ty][tx] = A[ row*n + i*TILEWIDTH + tx];
		if(i*TILEWIDTH + ty <n )
			Bds[ty][tx] = B[ (i*TILEWIDTH + ty)*n + col];
		__syncthreads();
		int m =n%TILEWIDTH;
		if(m==0)
			m=TILEWIDTH;
		for(int k=0;k<m;k++){//printf("add");
			val+= Ads[ty][k]*Bds[tx][k];	
		}
		__syncthreads();
		C[row*n + col]= val;
	}
}

int min2Power(int x){
	int res=1;
	while(res<x){
		res*=2;	
	}
	return res/2;
}

__host__
void vecMulMatrix(float* A,float* B,float* C, int n){
	int size = n * n * sizeof(float);
	float *d_A, *d_B, *d_C;
	
	//Allocate device memory for A,B,C
	hipMalloc((void**)&d_A, size);
	hipMalloc((void**)&d_B, size);
	hipMalloc((void**)&d_C, size);

	//copy A,B to device memory
	hipMemcpy(d_A, A, size, hipMemcpyHostToDevice);
	hipMemcpy(d_B, B, size, hipMemcpyHostToDevice);
	
	//call kernal function that the calculates the product and stores it in C
	dim3 dimBlock(TILEWIDTH,TILEWIDTH,1);
	dim3 dimGrid(ceil(n/(float)TILEWIDTH),ceil(n/(float)TILEWIDTH),1);
	vecMulMatrixKernel<<<dimGrid,dimBlock >>>(d_A,d_B,d_C,n);		

	//copy C from devce memory
	hipMemcpy(C, d_C, size, hipMemcpyDeviceToHost);
	
	//free device memories
	hipFree(d_A);
	hipFree(d_B);
	hipFree(d_C);
}

//Kernal function that runs in each thread


int main(){
	int n=10;
	int i,j;
	float A[n][n],C[n][n],B[n][n];
	
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			A[i][j]=i+j;
			B[i][j]=i*j;
		}
	}
	
	vecMulMatrix(&A[0][0],&B[0][0],&C[0][0],n);
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			printf("%.3f ",A[i][j]);
		}
		printf("\n");
	}
	printf("---\n");
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			printf("%.3f ",B[i][j]);
		}
		printf("\n");
	}
	printf("---\n");
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			printf("%.3f ",C[i][j]);
		}
		printf("\n");
	}
	
	return 0;
}





	.text
	.file	"matrixmul_tiled.hip"
	.globl	_Z33__device_stub__vecMulMatrixKernelPfS_S_i # -- Begin function _Z33__device_stub__vecMulMatrixKernelPfS_S_i
	.type	_Z33__device_stub__vecMulMatrixKernelPfS_S_i,@function
_Z33__device_stub__vecMulMatrixKernelPfS_S_i: # @_Z33__device_stub__vecMulMatrixKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18vecMulMatrixKernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__vecMulMatrixKernelPfS_S_i, .Lfunc_end0-_Z33__device_stub__vecMulMatrixKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9min2Poweri                   # -- Begin function _Z9min2Poweri
	.type	_Z9min2Poweri,@function
_Z9min2Poweri:                          # @_Z9min2Poweri
	.cfi_startproc
# %bb.0:
	movl	$1, %ecx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, %eax
	leal	(%rax,%rax), %ecx
	cmpl	%edi, %eax
	jl	.LBB1_1
# %bb.2:
	shrl	%eax
                                        # kill: def $eax killed $eax killed $rax
	retq
.Lfunc_end1:
	.size	_Z9min2Poweri, .Lfunc_end1-_Z9min2Poweri
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12vecMulMatrixPfS_S_i
.LCPI2_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z12vecMulMatrixPfS_S_i
	.type	_Z12vecMulMatrixPfS_S_i,@function
_Z12vecMulMatrixPfS_S_i:                # @_Z12vecMulMatrixPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	%ecx, %eax
	imull	%ecx, %eax
	shll	$2, %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	movl	%edi, %eax
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebp, %ecx
	callq	_Z33__device_stub__vecMulMatrixKernelPfS_S_i
.LBB2_2:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12vecMulMatrixPfS_S_i, .Lfunc_end2-_Z12vecMulMatrixPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$1200, %rsp                     # imm = 0x4B0
	.cfi_def_cfa_offset 1248
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsp, %rax
	leaq	400(%rsp), %rcx
	xorl	%edx, %edx
.LBB3_1:                                # %.preheader58
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%rdi), %r8d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r8d, %xmm0
	movss	%xmm0, (%rcx,%rdi,4)
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	%xmm0, (%rax,%rdi,4)
	incq	%rdi
	addl	%edx, %esi
	cmpq	$10, %rdi
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rdx
	addq	$40, %rax
	addq	$40, %rcx
	cmpq	$10, %rdx
	jne	.LBB3_1
# %bb.4:
	leaq	400(%rsp), %r15
	movq	%rsp, %r14
	leaq	800(%rsp), %rbx
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$10, %ecx
	callq	_Z12vecMulMatrixPfS_S_i
	xorl	%r12d, %r12d
.LBB3_5:                                # %.preheader57
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
	xorl	%r13d, %r13d
.LBB3_6:                                #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r13,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r13
	cmpq	$10, %r13
	jne	.LBB3_6
# %bb.7:                                #   in Loop: Header=BB3_5 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addq	$40, %r15
	cmpq	$10, %r12
	jne	.LBB3_5
# %bb.8:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
.LBB3_9:                                # %.preheader56
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_10 Depth 2
	xorl	%r12d, %r12d
.LBB3_10:                               #   Parent Loop BB3_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r12,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB3_10
# %bb.11:                               #   in Loop: Header=BB3_9 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r15
	addq	$40, %r14
	cmpq	$10, %r15
	jne	.LBB3_9
# %bb.12:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
.LBB3_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_14 Depth 2
	xorl	%r15d, %r15d
.LBB3_14:                               #   Parent Loop BB3_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$10, %r15
	jne	.LBB3_14
# %bb.15:                               #   in Loop: Header=BB3_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$40, %rbx
	cmpq	$10, %r14
	jne	.LBB3_13
# %bb.16:
	xorl	%eax, %eax
	addq	$1200, %rsp                     # imm = 0x4B0
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18vecMulMatrixKernelPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18vecMulMatrixKernelPfS_S_i,@object # @_Z18vecMulMatrixKernelPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z18vecMulMatrixKernelPfS_S_i
	.p2align	3, 0x0
_Z18vecMulMatrixKernelPfS_S_i:
	.quad	_Z33__device_stub__vecMulMatrixKernelPfS_S_i
	.size	_Z18vecMulMatrixKernelPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%.3f "
	.size	.L.str, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18vecMulMatrixKernelPfS_S_i"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"---"
	.size	.Lstr.1, 4

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__vecMulMatrixKernelPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18vecMulMatrixKernelPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18vecMulMatrixKernelPfS_S_i ; -- Begin function _Z18vecMulMatrixKernelPfS_S_i
	.globl	_Z18vecMulMatrixKernelPfS_S_i
	.p2align	8
	.type	_Z18vecMulMatrixKernelPfS_S_i,@function
_Z18vecMulMatrixKernelPfS_S_i:          ; @_Z18vecMulMatrixKernelPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s5, v[3:4]
	v_mad_u64_u32 v[1:2], null, s14, s4, v[4:5]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s8, v2
	s_cbranch_execz .LBB0_15
; %bb.1:                                ; %.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b32_e32 v7, 7, v3
	v_lshl_add_u32 v8, v4, 7, 0x1000
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_7
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 7, v3
	v_mad_u64_u32 v[5:6], null, v0, s8, v[4:5]
	v_lshl_add_u32 v10, v4, 7, 0x1000
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v9, v4, 2, v2
	v_add_nc_u32_e32 v11, 0x1000, v9
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_lshl_b32 s9, s3, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, s9, v3
	v_add_nc_u32_e32 v12, s9, v5
	s_mov_b32 s9, 0
	v_mad_u64_u32 v[14:15], null, v13, s8, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_co_u32 v12, vcc_lo, s4, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	global_load_b32 v12, v[12:13], off
	global_load_b32 v13, v[14:15], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v12
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_4:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s9, v2
	v_add_nc_u32_e32 v13, s9, v10
	s_add_i32 s9, s9, 4
	ds_load_b32 v12, v12
	ds_load_b32 v13, v13
	s_cmpk_eq_i32 s9, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v6, v12, v13
	s_cbranch_scc0 .LBB0_4
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, s2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_3
; %bb.6:                                ; %._crit_edge.loopexit
	s_lshl_b32 s3, s2, 5
	s_branch .LBB0_8
.LBB0_7:
	v_mov_b32_e32 v6, 0
.LBB0_8:                                ; %._crit_edge
	v_add_nc_u32_e32 v2, s3, v4
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v2
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mad_u64_u32 v[9:10], null, v0, s8, v[2:3]
	v_lshlrev_b32_e32 v5, 2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v5, v3, 7, v5
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	global_load_b32 v2, v[9:10], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v2
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v2, s3, v3
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v2
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_mad_u64_u32 v[9:10], null, v2, s8, v[1:2]
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v3, v3, 7, v4
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s6, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v2, v[9:10], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2 offset:4096
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s2
	s_ashr_i32 s2, s8, 31
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s2, 27
	s_barrier
	s_add_i32 s2, s8, s2
	buffer_gl0_inv
	s_and_not1_b32 s2, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s8, s2
	s_cmp_lg_u32 s2, 0
	s_cselect_b32 s2, s2, 32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_14
.LBB0_13:                               ; %.lr.ph84
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v2, v7
	ds_load_b32 v3, v8
	v_add_nc_u32_e32 v7, 4, v7
	v_add_nc_u32_e32 v8, 4, v8
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v6, v2, v3
	s_cbranch_scc0 .LBB0_13
.LBB0_14:                               ; %Flow119
	v_mad_u64_u32 v[2:3], null, v0, s8, v[1:2]
	s_barrier
	buffer_gl0_inv
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_15:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18vecMulMatrixKernelPfS_S_i
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18vecMulMatrixKernelPfS_S_i, .Lfunc_end0-_Z18vecMulMatrixKernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 836
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18vecMulMatrixKernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18vecMulMatrixKernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
