#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>

/* demo to show the usage of share memory*/

#define DEBUG

typedef float dataType;

void checkCudaError(cudaError_t error, const char* filename, const int linenum)
{
  if(error != cudaSuccess){
    printf("File: %s, line: %d, CUDA error: %s\n", filename, linenum, cudaGetErrorString(error));
    exit(EXIT_FAILURE);
  }
}

#define CHECK_CUDA_ERROR(error) checkCudaError(error, __FILE__, __LINE__)
#define BLOCK_SIZE 16

typedef struct Matrix
{
  int width;
  int height;
  int stride;
  dataType* element;
}Matrix;

__device__ dataType getElement(Matrix x, int row, int col)
{
  return x.element[row * x.stride + col];
}

__device__ void setElement(Matrix x, int row, int col, dataType val)
{
  x.element[col + row * x.stride] = val;
}

__device__ Matrix getSubMatrix(Matrix x, int row, int col)
{
  Matrix subX;
  
  int row_ = (row + 1) * BLOCK_SIZE, col_ = (col + 1) * BLOCK_SIZE;

  subX.height = ((row_ <= x.height) ? BLOCK_SIZE : x.height%BLOCK_SIZE);
  subX.width  = ((col_ <= x.width)  ? BLOCK_SIZE : x.width%BLOCK_SIZE);
  //subX.height = subX.width = BLOCK_SIZE;
  subX.stride = x.stride;

  subX.element = &x.element[x.stride * row * BLOCK_SIZE + col * BLOCK_SIZE];

  return subX;
}

__device__ int divCeil(int x, int y)
{
  return (x%y == 0) ? x/y : (x/y+1);
}

// no shared memory
__global__ void MatMulKernel(Matrix x, Matrix y, Matrix z)
{
  int col = threadIdx.x + blockIdx.x * blockDim.x;
  int row = threadIdx.y + blockIdx.y * blockDim.y;

  dataType ret = 0;
  int i = 0;
  
  if(col < z.width && row < z.height){
     for(i = 0; i < x.width; ++i)
        ret += getElement(x, row, i) * getElement(y, i, col);

     setElement(z, row, col, ret);
  }
}

// shared memory
__global__ void MatMulSharedMemory1(Matrix x, Matrix y, Matrix z)
{
  int blockRow = blockIdx.y;
  int blockCol = blockIdx.x;

  Matrix subZ = getSubMatrix(z, blockRow, blockCol);

  int row = threadIdx.y;
  int col = threadIdx.x;
  if(row >= subZ.height || col >= subZ.width)
      return;
  dataType val = 0.0;

  int i = 0;
  int size = divCeil(x.width, BLOCK_SIZE);
  for(; i < size; ++i){
    Matrix subX = getSubMatrix(x, blockRow, i);
    Matrix subY = getSubMatrix(y, i, blockCol);
    
    __shared__ dataType tmpX[BLOCK_SIZE][BLOCK_SIZE]; 
    __shared__ dataType tmpY[BLOCK_SIZE][BLOCK_SIZE];

    tmpX[row][col] = getElement(subX, row, col);
    tmpY[row][col] = getElement(subY, row, col);

    __syncthreads();

    int j = 0;
    for(;j < subX.width; ++j)
      val += tmpX[row][j] * tmpY[j][col];

    __syncthreads();
  }

  setElement(subZ, row, col, val);
}

bool checkCorrectness(Matrix x, Matrix y, Matrix z)
{
  Matrix z_;

  z_.width = z.width;
  z_.height = z.height;
  z_.stride = z.stride;
  z_.element = (dataType*)malloc(sizeof(dataType) * z_.width * z_.height);
  
  for(int i = 0; i < z_.height; ++i){
    for(int j = 0; j < z_.width; ++j){
      dataType val = 0;
      for(int k = 0; k < x.width; ++k)
		val += x.element[i*x.stride+k] * y.element[k*y.stride+j];
      z_.element[j + i * z_.stride] = val;
    }
  }

  bool flag;

  if(memcmp(z_.element, z.element, z_.width * z_.height * sizeof(dataType)) == 0)
    flag = true;
  else
    flag = false;

  free(z_.element);

  return flag;
} 

void MatMul(Matrix x, Matrix y, Matrix z)
{
  Matrix dev_x, dev_y, dev_z;
  
  dev_x.width  = x.width;
  dev_x.height = x.height;
  dev_x.stride = x.stride;

  dev_y.width  = y.width;
  dev_y.height = y.height;
  dev_y.stride = y.stride;

  dev_z.width  = z.width;
  dev_z.height = z.height; 
  dev_z.stride = z.stride;

  int nByte = sizeof(dataType) * dev_x.width * dev_x.height; 

  CHECK_CUDA_ERROR(cudaMalloc((void**)(&dev_x.element), nByte));
  CHECK_CUDA_ERROR(cudaMemcpy(dev_x.element, x.element, nByte, cudaMemcpyHostToDevice));

  nByte = sizeof(dataType) * dev_y.width * dev_y.height; 
  CHECK_CUDA_ERROR(cudaMalloc((void**)&dev_y.element, nByte));
  CHECK_CUDA_ERROR(cudaMemcpy(dev_y.element, y.element, nByte, cudaMemcpyHostToDevice));

  nByte = sizeof(dataType) * dev_z.width * dev_z.height; 
  CHECK_CUDA_ERROR(cudaMalloc((void**)&dev_z.element, nByte));

  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(dev_z.width/dimBlock.x + (dev_z.width%dimBlock.x == 0 ? 0 : 1), dev_z.height/dimBlock.y + (dev_z.height%dimBlock.y == 0 ? 0 : 1));

  //MatMulKernel<<<dimGrid, dimBlock>>>(dev_x, dev_y, dev_z);
  MatMulSharedMemory1<<<dimGrid, dimBlock>>>(dev_x, dev_y, dev_z);

  CHECK_CUDA_ERROR(cudaMemcpy(z.element, dev_z.element, nByte, cudaMemcpyDeviceToHost));

  if(checkCorrectness(x, y, z) == false)
    printf("Error occur\n");
  else
    printf("Correct\n");

  CHECK_CUDA_ERROR(cudaFree(dev_x.element));
  CHECK_CUDA_ERROR(cudaFree(dev_y.element));
  CHECK_CUDA_ERROR(cudaFree(dev_z.element));
}

void randomFillMatrix(Matrix x)
{
  int size = x.width*x.height;
  
  for(int i = 0; i < size; ++i){
    srand(time(NULL)+i);
    x.element[i] = rand()%100;
  }
}

int main(void)
{
  Matrix x, y, z;

  x.width = x.height = x.stride = 32;
  y.width = y.height = y.stride = 32;
  z.width = z.height = z.stride = 32;

  int nByte = sizeof(dataType) * x.width * x. height;

  x.element = (dataType*)malloc(nByte);
  y.element = (dataType*)malloc(nByte);
  z.element = (dataType*)malloc(nByte);

  randomFillMatrix(x);
  randomFillMatrix(y);

  MatMul(x, y, z);

  free(x.element);
  free(y.element);
  free(z.element);

  return 0;
}

	.file	"tmpxft_0035b8d0_00000000-6_MatMul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"File: %s, line: %d, CUDA error: %s\n"
	.text
	.globl	_Z14checkCudaError9cudaErrorPKci
	.type	_Z14checkCudaError9cudaErrorPKci, @function
_Z14checkCudaError9cudaErrorPKci:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	%ebp, %ecx
	movq	%rbx, %rdx
	movq	%rax, %r8
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14checkCudaError9cudaErrorPKci, .-_Z14checkCudaError9cudaErrorPKci
	.globl	_Z10getElement6Matrixii
	.type	_Z10getElement6Matrixii, @function
_Z10getElement6Matrixii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10getElement6Matrixii, .-_Z10getElement6Matrixii
	.globl	_Z10setElement6Matrixiif
	.type	_Z10setElement6Matrixiif, @function
_Z10setElement6Matrixiif:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z10setElement6Matrixiif, .-_Z10setElement6Matrixiif
	.globl	_Z12getSubMatrix6Matrixii
	.type	_Z12getSubMatrix6Matrixii, @function
_Z12getSubMatrix6Matrixii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z12getSubMatrix6Matrixii, .-_Z12getSubMatrix6Matrixii
	.globl	_Z7divCeilii
	.type	_Z7divCeilii, @function
_Z7divCeilii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z7divCeilii, .-_Z7divCeilii
	.globl	_Z16checkCorrectness6MatrixS_S_
	.type	_Z16checkCorrectness6MatrixS_S_, @function
_Z16checkCorrectness6MatrixS_S_:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movslq	144(%rsp), %rax
	movslq	148(%rsp), %rdx
	movl	152(%rsp), %r13d
	movq	%rax, %rbp
	imulq	%rdx, %rax
	movq	%rdx, %r12
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	112(%rsp), %r10
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movq	%rax, %rbx
	movl	96(%rsp), %eax
	movq	136(%rsp), %r14
	xorl	%edi, %edi
	movl	104(%rsp), %r15d
	movl	%eax, 12(%rsp)
	movslq	128(%rsp), %rax
	salq	$2, %rax
	movq	%rax, 16(%rsp)
.L17:
	cmpl	%edi, %r12d
	jle	.L21
	movslq	%esi, %rax
	leaq	(%rbx,%rax,4), %r11
	movslq	%ecx, %rax
	leaq	(%r10,%rax,4), %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
.L22:
	cmpl	%eax, %ebp
	jle	.L19
	leaq	(%r14,%rax,4), %r8
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L20:
	cmpl	%edx, 12(%rsp)
	jle	.L24
	movq	24(%rsp), %r9
	movss	(%r9,%rdx,4), %xmm1
	mulss	(%r8), %xmm1
	incq	%rdx
	movq	16(%rsp), %r9
	addq	%r9, %r8
	addss	%xmm1, %xmm0
	jmp	.L20
.L24:
	movss	%xmm0, (%r11,%rax,4)
	incq	%rax
	jmp	.L22
.L19:
	incl	%edi
	addl	%r13d, %esi
	addl	%r15d, %ecx
	jmp	.L17
.L21:
	movq	(%rsp), %rdx
	movq	160(%rsp), %rsi
	movq	%rbx, %rdi
	call	memcmp@PLT
	movq	%rbx, %rdi
	movl	%eax, %ebp
	call	free@PLT
	testl	%ebp, %ebp
	sete	%al
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z16checkCorrectness6MatrixS_S_, .-_Z16checkCorrectness6MatrixS_S_
	.globl	_Z16randomFillMatrix6Matrix
	.type	_Z16randomFillMatrix6Matrix, @function
_Z16randomFillMatrix6Matrix:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$100, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	32(%rsp), %ebp
	xorl	%ebx, %ebx
	imull	36(%rsp), %ebp
.L26:
	cmpl	%ebx, %ebp
	jle	.L29
	xorl	%edi, %edi
	call	time@PLT
	leal	(%rax,%rbx), %edi
	call	srand@PLT
	call	rand@PLT
	cltd
	idivl	%r12d
	movq	48(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	jmp	.L26
.L29:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z16randomFillMatrix6Matrix, .-_Z16randomFillMatrix6Matrix
	.globl	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L30:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.type	_Z12MatMulKernel6MatrixS_S_, @function
_Z12MatMulKernel6MatrixS_S_:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	64(%rsp), %rdx
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z12MatMulKernel6MatrixS_S_, .-_Z12MatMulKernel6MatrixS_S_
	.globl	_Z48__device_stub__Z19MatMulSharedMemory16MatrixS_S_R6MatrixS0_S0_
	.type	_Z48__device_stub__Z19MatMulSharedMemory16MatrixS_S_R6MatrixS0_S0_, @function
_Z48__device_stub__Z19MatMulSharedMemory16MatrixS_S_R6MatrixS0_S0_:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z19MatMulSharedMemory16MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L36:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z48__device_stub__Z19MatMulSharedMemory16MatrixS_S_R6MatrixS0_S0_, .-_Z48__device_stub__Z19MatMulSharedMemory16MatrixS_S_R6MatrixS0_S0_
	.globl	_Z19MatMulSharedMemory16MatrixS_S_
	.type	_Z19MatMulSharedMemory16MatrixS_S_, @function
_Z19MatMulSharedMemory16MatrixS_S_:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	64(%rsp), %rdx
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z48__device_stub__Z19MatMulSharedMemory16MatrixS_S_R6MatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z19MatMulSharedMemory16MatrixS_S_, .-_Z19MatMulSharedMemory16MatrixS_S_
	.section	.rodata.str1.1
.LC2:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/shaoguangcheng/ToyCode/master/cpp/cuda/MatMul.cu"
.LC3:
	.string	"Error occur\n"
.LC4:
	.string	"Correct\n"
	.text
	.globl	_Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_, @function
_Z6MatMul6MatrixS_S_:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	.LC2(%rip), %rbx
	subq	$184, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	216(%rsp), %edx
	leaq	40(%rsp), %rdi
	movl	208(%rsp), %ebp
	movl	212(%rsp), %eax
	movl	%edx, 32(%rsp)
	movq	232(%rsp), %rdx
	movl	%ebp, 24(%rsp)
	imull	%eax, %ebp
	movq	%rdx, 48(%rsp)
	movl	240(%rsp), %edx
	movl	%eax, 28(%rsp)
	movl	%edx, 56(%rsp)
	movq	256(%rsp), %rdx
	sall	$2, %ebp
	movslq	%ebp, %rbp
	movq	%rdx, 72(%rsp)
	movl	264(%rsp), %edx
	movq	%rbp, %rsi
	movl	%edx, 80(%rsp)
	call	cudaMalloc@PLT
	movl	$165, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	224(%rsp), %rsi
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$166, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movl	52(%rsp), %ebp
	imull	48(%rsp), %ebp
	leaq	64(%rsp), %rdi
	sall	$2, %ebp
	movslq	%ebp, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	$169, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	248(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$170, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movl	76(%rsp), %ebp
	imull	72(%rsp), %ebp
	leaq	88(%rsp), %rdi
	sall	$2, %ebp
	movslq	%ebp, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	$173, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movl	72(%rsp), %edx
	xorl	%ecx, %ecx
	movl	76(%rsp), %eax
	movl	$1, %esi
	testb	$15, %dl
	setne	%cl
	shrl	$4, %edx
	addl	%ecx, %edx
	movl	$1, %ecx
	movl	%edx, 12(%rsp)
	xorl	%edx, %edx
	testb	$15, %al
	setne	%dl
	shrl	$4, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addl	%edx, %eax
	movabsq	$68719476752, %rdx
	movl	%eax, 16(%rsp)
	movq	12(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	40(%rsp), %rax
	movups	24(%rsp), %xmm0
	leaq	144(%rsp), %rdx
	leaq	120(%rsp), %rsi
	movups	48(%rsp), %xmm1
	movups	72(%rsp), %xmm2
	leaq	96(%rsp), %rdi
	movq	%rax, 112(%rsp)
	movq	64(%rsp), %rax
	movups	%xmm0, 96(%rsp)
	movq	%rax, 136(%rsp)
	movq	88(%rsp), %rax
	movups	%xmm1, 120(%rsp)
	movq	%rax, 160(%rsp)
	movups	%xmm2, 144(%rsp)
	call	_Z48__device_stub__Z19MatMulSharedMemory16MatrixS_S_R6MatrixS0_S0_
.L43:
	movq	88(%rsp), %rsi
	movq	272(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbp, %rdx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movl	$181, %edx
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	subq	$80, %rsp
	.cfi_def_cfa_offset 288
	movq	352(%rsp), %rax
	movups	336(%rsp), %xmm3
	movups	312(%rsp), %xmm4
	movups	288(%rsp), %xmm5
	movq	%rax, 64(%rsp)
	movq	328(%rsp), %rax
	movups	%xmm3, 48(%rsp)
	movq	%rax, 40(%rsp)
	movq	304(%rsp), %rax
	movups	%xmm4, 24(%rsp)
	movq	%rax, 16(%rsp)
	movups	%xmm5, (%rsp)
	call	_Z16checkCorrectness6MatrixS_S_
	addq	$80, %rsp
	.cfi_def_cfa_offset 208
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	testb	%al, %al
	je	.L48
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
.L48:
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	$188, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	$189, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	$190, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$184, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z6MatMul6MatrixS_S_, .-_Z6MatMul6MatrixS_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$4096, %edi
	movabsq	$137438953504, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%r13, 8(%rsp)
	subq	$32, %rsp
	.cfi_def_cfa_offset 160
	movq	%rbp, 56(%rsp)
	movq	%rax, %r12
	movl	$32, 48(%rsp)
	movups	40(%rsp), %xmm0
	movq	%rbp, 16(%rsp)
	movups	%xmm0, (%rsp)
	call	_Z16randomFillMatrix6Matrix
	movq	%r13, 64(%rsp)
	movl	$32, 72(%rsp)
	movups	64(%rsp), %xmm1
	movq	%rbx, 16(%rsp)
	movups	%xmm1, (%rsp)
	movq	%rbx, 80(%rsp)
	call	_Z16randomFillMatrix6Matrix
	movq	%r13, 88(%rsp)
	subq	$48, %rsp
	.cfi_def_cfa_offset 208
	movl	$32, 144(%rsp)
	movups	112(%rsp), %xmm3
	movq	128(%rsp), %rax
	movups	88(%rsp), %xmm4
	movq	%r12, 64(%rsp)
	movups	136(%rsp), %xmm2
	movups	%xmm3, 24(%rsp)
	movq	%rax, 40(%rsp)
	movq	104(%rsp), %rax
	movups	%xmm2, 48(%rsp)
	movq	%rax, 16(%rsp)
	movups	%xmm4, (%rsp)
	call	_Z6MatMul6MatrixS_S_
	addq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z19MatMulSharedMemory16MatrixS_S_"
.LC6:
	.string	"_Z12MatMulKernel6MatrixS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z19MatMulSharedMemory16MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>

/* demo to show the usage of share memory*/

#define DEBUG

typedef float dataType;

void checkCudaError(hipError_t error, const char* filename, const int linenum)
{
  if(error != hipSuccess){
    printf("File: %s, line: %d, CUDA error: %s\n", filename, linenum, hipGetErrorString(error));
    exit(EXIT_FAILURE);
  }
}

#define CHECK_CUDA_ERROR(error) checkCudaError(error, __FILE__, __LINE__)
#define BLOCK_SIZE 16

typedef struct Matrix
{
  int width;
  int height;
  int stride;
  dataType* element;
}Matrix;

__device__ dataType getElement(Matrix x, int row, int col)
{
  return x.element[row * x.stride + col];
}

__device__ void setElement(Matrix x, int row, int col, dataType val)
{
  x.element[col + row * x.stride] = val;
}

__device__ Matrix getSubMatrix(Matrix x, int row, int col)
{
  Matrix subX;
  
  int row_ = (row + 1) * BLOCK_SIZE, col_ = (col + 1) * BLOCK_SIZE;

  subX.height = ((row_ <= x.height) ? BLOCK_SIZE : x.height%BLOCK_SIZE);
  subX.width  = ((col_ <= x.width)  ? BLOCK_SIZE : x.width%BLOCK_SIZE);
  //subX.height = subX.width = BLOCK_SIZE;
  subX.stride = x.stride;

  subX.element = &x.element[x.stride * row * BLOCK_SIZE + col * BLOCK_SIZE];

  return subX;
}

__device__ int divCeil(int x, int y)
{
  return (x%y == 0) ? x/y : (x/y+1);
}

// no shared memory
__global__ void MatMulKernel(Matrix x, Matrix y, Matrix z)
{
  int col = threadIdx.x + blockIdx.x * blockDim.x;
  int row = threadIdx.y + blockIdx.y * blockDim.y;

  dataType ret = 0;
  int i = 0;
  
  if(col < z.width && row < z.height){
     for(i = 0; i < x.width; ++i)
        ret += getElement(x, row, i) * getElement(y, i, col);

     setElement(z, row, col, ret);
  }
}

// shared memory
__global__ void MatMulSharedMemory1(Matrix x, Matrix y, Matrix z)
{
  int blockRow = blockIdx.y;
  int blockCol = blockIdx.x;

  Matrix subZ = getSubMatrix(z, blockRow, blockCol);

  int row = threadIdx.y;
  int col = threadIdx.x;
  if(row >= subZ.height || col >= subZ.width)
      return;
  dataType val = 0.0;

  int i = 0;
  int size = divCeil(x.width, BLOCK_SIZE);
  for(; i < size; ++i){
    Matrix subX = getSubMatrix(x, blockRow, i);
    Matrix subY = getSubMatrix(y, i, blockCol);
    
    __shared__ dataType tmpX[BLOCK_SIZE][BLOCK_SIZE]; 
    __shared__ dataType tmpY[BLOCK_SIZE][BLOCK_SIZE];

    tmpX[row][col] = getElement(subX, row, col);
    tmpY[row][col] = getElement(subY, row, col);

    __syncthreads();

    int j = 0;
    for(;j < subX.width; ++j)
      val += tmpX[row][j] * tmpY[j][col];

    __syncthreads();
  }

  setElement(subZ, row, col, val);
}

bool checkCorrectness(Matrix x, Matrix y, Matrix z)
{
  Matrix z_;

  z_.width = z.width;
  z_.height = z.height;
  z_.stride = z.stride;
  z_.element = (dataType*)malloc(sizeof(dataType) * z_.width * z_.height);
  
  for(int i = 0; i < z_.height; ++i){
    for(int j = 0; j < z_.width; ++j){
      dataType val = 0;
      for(int k = 0; k < x.width; ++k)
		val += x.element[i*x.stride+k] * y.element[k*y.stride+j];
      z_.element[j + i * z_.stride] = val;
    }
  }

  bool flag;

  if(memcmp(z_.element, z.element, z_.width * z_.height * sizeof(dataType)) == 0)
    flag = true;
  else
    flag = false;

  free(z_.element);

  return flag;
} 

void MatMul(Matrix x, Matrix y, Matrix z)
{
  Matrix dev_x, dev_y, dev_z;
  
  dev_x.width  = x.width;
  dev_x.height = x.height;
  dev_x.stride = x.stride;

  dev_y.width  = y.width;
  dev_y.height = y.height;
  dev_y.stride = y.stride;

  dev_z.width  = z.width;
  dev_z.height = z.height; 
  dev_z.stride = z.stride;

  int nByte = sizeof(dataType) * dev_x.width * dev_x.height; 

  CHECK_CUDA_ERROR(hipMalloc((void**)(&dev_x.element), nByte));
  CHECK_CUDA_ERROR(hipMemcpy(dev_x.element, x.element, nByte, hipMemcpyHostToDevice));

  nByte = sizeof(dataType) * dev_y.width * dev_y.height; 
  CHECK_CUDA_ERROR(hipMalloc((void**)&dev_y.element, nByte));
  CHECK_CUDA_ERROR(hipMemcpy(dev_y.element, y.element, nByte, hipMemcpyHostToDevice));

  nByte = sizeof(dataType) * dev_z.width * dev_z.height; 
  CHECK_CUDA_ERROR(hipMalloc((void**)&dev_z.element, nByte));

  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(dev_z.width/dimBlock.x + (dev_z.width%dimBlock.x == 0 ? 0 : 1), dev_z.height/dimBlock.y + (dev_z.height%dimBlock.y == 0 ? 0 : 1));

  //MatMulKernel<<<dimGrid, dimBlock>>>(dev_x, dev_y, dev_z);
  MatMulSharedMemory1<<<dimGrid, dimBlock>>>(dev_x, dev_y, dev_z);

  CHECK_CUDA_ERROR(hipMemcpy(z.element, dev_z.element, nByte, hipMemcpyDeviceToHost));

  if(checkCorrectness(x, y, z) == false)
    printf("Error occur\n");
  else
    printf("Correct\n");

  CHECK_CUDA_ERROR(hipFree(dev_x.element));
  CHECK_CUDA_ERROR(hipFree(dev_y.element));
  CHECK_CUDA_ERROR(hipFree(dev_z.element));
}

void randomFillMatrix(Matrix x)
{
  int size = x.width*x.height;
  
  for(int i = 0; i < size; ++i){
    srand(time(NULL)+i);
    x.element[i] = rand()%100;
  }
}

int main(void)
{
  Matrix x, y, z;

  x.width = x.height = x.stride = 32;
  y.width = y.height = y.stride = 32;
  z.width = z.height = z.stride = 32;

  int nByte = sizeof(dataType) * x.width * x. height;

  x.element = (dataType*)malloc(nByte);
  y.element = (dataType*)malloc(nByte);
  z.element = (dataType*)malloc(nByte);

  randomFillMatrix(x);
  randomFillMatrix(y);

  MatMul(x, y, z);

  free(x.element);
  free(y.element);
  free(z.element);

  return 0;
}

	.text
	.file	"MatMul.hip"
	.globl	_Z14checkCudaError10hipError_tPKci # -- Begin function _Z14checkCudaError10hipError_tPKci
	.type	_Z14checkCudaError10hipError_tPKci,@function
_Z14checkCudaError10hipError_tPKci:     # @_Z14checkCudaError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB0_2
# %bb.1:
	retq
.LBB0_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edx, %ebx
	movq	%rsi, %r14
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%r14, %rsi
	movl	%ebx, %edx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z14checkCudaError10hipError_tPKci, .Lfunc_end0-_Z14checkCudaError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__MatMulKernel6MatrixS_S_ # -- Begin function _Z27__device_stub__MatMulKernel6MatrixS_S_
	.type	_Z27__device_stub__MatMulKernel6MatrixS_S_,@function
_Z27__device_stub__MatMulKernel6MatrixS_S_: # @_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12MatMulKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__MatMulKernel6MatrixS_S_, .Lfunc_end1-_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__MatMulSharedMemory16MatrixS_S_ # -- Begin function _Z34__device_stub__MatMulSharedMemory16MatrixS_S_
	.type	_Z34__device_stub__MatMulSharedMemory16MatrixS_S_,@function
_Z34__device_stub__MatMulSharedMemory16MatrixS_S_: # @_Z34__device_stub__MatMulSharedMemory16MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19MatMulSharedMemory16MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z34__device_stub__MatMulSharedMemory16MatrixS_S_, .Lfunc_end2-_Z34__device_stub__MatMulSharedMemory16MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z16checkCorrectness6MatrixS_S_ # -- Begin function _Z16checkCorrectness6MatrixS_S_
	.type	_Z16checkCorrectness6MatrixS_S_,@function
_Z16checkCorrectness6MatrixS_S_:        # @_Z16checkCorrectness6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	112(%rsp), %rax
	movslq	(%rax), %rdi
	movl	%edi, %r15d
	movslq	4(%rax), %r14
	movslq	8(%rax), %r12
	imulq	%r14, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %rbx
	movl	%r14d, %eax
	testq	%r14, %r14
	jle	.LBB3_9
# %bb.1:                                # %.preheader26.lr.ph
	leaq	88(%rsp), %r8
	leaq	64(%rsp), %rsi
	movl	(%rsi), %ecx
	movq	16(%rsi), %rdx
	movslq	8(%rsi), %rsi
	movq	16(%r8), %rdi
	movslq	8(%r8), %r8
	shlq	$2, %rsi
	shlq	$2, %r8
	xorl	%r9d, %r9d
.LBB3_2:                                # %.preheader26
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
                                        #       Child Loop BB3_6 Depth 3
	testl	%r15d, %r15d
	jle	.LBB3_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	%r9, %r10
	imulq	%r12, %r10
	leaq	(%rbx,%r10,4), %r10
	movq	%rdi, %r11
	xorl	%r13d, %r13d
.LBB3_4:                                # %.preheader
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_6 Depth 3
	xorps	%xmm0, %xmm0
	testl	%ecx, %ecx
	jle	.LBB3_7
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_4 Depth=2
	movq	%r11, %rbp
	xorl	%r14d, %r14d
.LBB3_6:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdx,%r14,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	incq	%r14
	addq	%r8, %rbp
	cmpq	%r14, %rcx
	jne	.LBB3_6
.LBB3_7:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=2
	movss	%xmm0, (%r10,%r13,4)
	incq	%r13
	addq	$4, %r11
	cmpq	%r15, %r13
	jne	.LBB3_4
.LBB3_8:                                # %._crit_edge30
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r9
	addq	%rsi, %rdx
	cmpq	%rax, %r9
	jne	.LBB3_2
.LBB3_9:                                # %._crit_edge32
	leaq	112(%rsp), %rcx
	movq	16(%rcx), %rsi
	imull	%r15d, %eax
	movslq	%eax, %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	callq	bcmp@PLT
	testl	%eax, %eax
	sete	%bpl
	movq	%rbx, %rdi
	callq	free
	movl	%ebp, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z16checkCorrectness6MatrixS_S_, .Lfunc_end3-_Z16checkCorrectness6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6MatMul6MatrixS_S_            # -- Begin function _Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_,@function
_Z6MatMul6MatrixS_S_:                   # @_Z6MatMul6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 384
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	432(%rsp), %rsi
	leaq	408(%rsp), %rdi
	leaq	384(%rsp), %rbx
	movl	(%rbx), %eax
	movl	4(%rbx), %ecx
	leaq	152(%rsp), %r15
	movl	%eax, -16(%r15)
	movl	%ecx, -12(%r15)
	movl	8(%rbx), %edx
	movl	%edx, -8(%r15)
	movl	(%rdi), %r13d
	movl	4(%rdi), %r14d
	movq	%rdi, %rdx
	leaq	128(%rsp), %rdi
	movl	%r13d, -16(%rdi)
	movl	%r14d, -12(%rdi)
	movl	8(%rdx), %edx
	movl	%edx, -8(%rdi)
	movl	(%rsi), %ebp
	movl	4(%rsi), %edx
	movl	%edx, 84(%rsp)                  # 4-byte Spill
	leaq	104(%rsp), %rdi
	movl	%ebp, -16(%rdi)
	movl	%edx, -12(%rdi)
	movl	8(%rsi), %edx
	movl	%edx, -8(%rdi)
	imull	%ecx, %eax
	shll	$2, %eax
	movslq	%eax, %r12
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$167, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%r15), %rdi
	movq	16(%rbx), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$168, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	imull	%r14d, %r13d
	leaq	408(%rsp), %r14
	shll	$2, %r13d
	movslq	%r13d, %r15
	leaq	128(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$171, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%rbx), %rdi
	movq	16(%r14), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$172, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	imull	84(%rsp), %ebp                  # 4-byte Folded Reload
	shll	$2, %ebp
	movslq	%ebp, %rbx
	leaq	104(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$175, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movl	-16(%r15), %eax
	movl	-12(%r15), %ecx
	movl	%eax, %edx
	shrl	$4, %edx
	andl	$15, %eax
	cmpl	$1, %eax
	sbbl	$-1, %edx
	movl	%ecx, %edi
	shrl	$4, %edi
	andl	$15, %ecx
	cmpl	$1, %ecx
	sbbl	$-1, %edi
	shlq	$32, %rdi
	orq	%rdx, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	152(%rsp), %rax
	leaq	208(%rsp), %rcx
	movq	%rax, 16(%rcx)
	movups	136(%rsp), %xmm0
	movaps	%xmm0, (%rcx)
	movq	128(%rsp), %rax
	leaq	240(%rsp), %rdx
	movq	%rax, 16(%rdx)
	movups	112(%rsp), %xmm0
	movaps	%xmm0, (%rdx)
	movq	104(%rsp), %rax
	leaq	272(%rsp), %rsi
	movq	%rax, 16(%rsi)
	movups	88(%rsp), %xmm0
	movaps	%xmm0, (%rsi)
	leaq	304(%rsp), %r14
	movq	%rcx, (%r14)
	movq	%rdx, 8(%r14)
	movq	%rsi, 16(%r14)
	leaq	192(%rsp), %r15
	leaq	176(%rsp), %r12
	leaq	168(%rsp), %r13
	leaq	160(%rsp), %rbp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r13), %rax
	movq	(%rbp), %rdi
	movq	(%r15), %rsi
	movl	8(%r15), %edx
	movq	(%r12), %rcx
	movl	8(%r12), %r8d
	movq	%rdi, 8(%rsp)
	movq	%rax, (%rsp)
	movl	$_Z19MatMulSharedMemory16MatrixS_S_, %edi
	movq	%r14, %r9
	leaq	408(%rsp), %r14
	callq	hipLaunchKernel
.LBB4_2:
	leaq	432(%rsp), %r15
	movq	16(%r15), %rdi
	movq	104(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$183, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	16(%r15), %rax
	movq	%rax, 64(%rsp)
	movups	(%r15), %xmm0
	movups	%xmm0, 48(%rsp)
	movq	16(%r14), %rax
	movq	%rax, 40(%rsp)
	movups	(%r14), %xmm0
	movups	%xmm0, 24(%rsp)
	leaq	384(%rsp), %rcx
	movq	16(%rcx), %rax
	movq	%rax, 16(%rsp)
	movups	(%rcx), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z16checkCorrectness6MatrixS_S_
	movl	$.Lstr, %ecx
	movl	$.Lstr.1, %edi
	testb	%al, %al
	cmovneq	%rcx, %rdi
	callq	puts@PLT
	movq	152(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$190, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	128(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$191, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	104(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	movl	$192, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	addq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z6MatMul6MatrixS_S_, .Lfunc_end4-_Z6MatMul6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z16randomFillMatrix6Matrix     # -- Begin function _Z16randomFillMatrix6Matrix
	.type	_Z16randomFillMatrix6Matrix,@function
_Z16randomFillMatrix6Matrix:            # @_Z16randomFillMatrix6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	36(%rsp), %eax
	imull	32(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph
	leaq	32(%rsp), %rcx
	movq	16(%rcx), %rbx
	movl	%eax, %r14d
	xorl	%r15d, %r15d
.LBB5_2:                                # =>This Inner Loop Header: Depth=1
	xorl	%edi, %edi
	callq	time
	leal	(%r15,%rax), %edi
	callq	srand
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB5_2
.LBB5_3:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z16randomFillMatrix6Matrix, .Lfunc_end5-_Z16randomFillMatrix6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %rbx
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r14
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r15
	movabsq	$137438953504, %r12             # imm = 0x2000000020
	movq	%r12, 168(%rsp)
	movl	$32, %ebp
	movl	%ebp, 176(%rsp)
	movq	%rbx, 184(%rsp)
	movq	%rbx, 16(%rsp)
	movups	168(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z16randomFillMatrix6Matrix
	movq	%r12, 144(%rsp)
	movl	%ebp, 152(%rsp)
	movq	%r14, 160(%rsp)
	movq	%r14, 16(%rsp)
	movups	144(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z16randomFillMatrix6Matrix
	movq	%r12, 96(%rsp)
	movl	%ebp, 104(%rsp)
	movq	%rbx, 112(%rsp)
	movq	%r12, 72(%rsp)
	movl	%ebp, 80(%rsp)
	movq	%r14, 88(%rsp)
	movq	%r12, 120(%rsp)
	movl	%ebp, 128(%rsp)
	movq	%r15, 136(%rsp)
	movq	%r15, 64(%rsp)
	movups	120(%rsp), %xmm0
	movups	%xmm0, 48(%rsp)
	movq	88(%rsp), %rax
	movq	%rax, 40(%rsp)
	movups	72(%rsp), %xmm0
	movups	%xmm0, 24(%rsp)
	movq	112(%rsp), %rax
	movq	%rax, 16(%rsp)
	movups	96(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z6MatMul6MatrixS_S_
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$192, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12MatMulKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19MatMulSharedMemory16MatrixS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"File: %s, line: %d, CUDA error: %s\n"
	.size	.L.str, 36

	.type	_Z12MatMulKernel6MatrixS_S_,@object # @_Z12MatMulKernel6MatrixS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	3, 0x0
_Z12MatMulKernel6MatrixS_S_:
	.quad	_Z27__device_stub__MatMulKernel6MatrixS_S_
	.size	_Z12MatMulKernel6MatrixS_S_, 8

	.type	_Z19MatMulSharedMemory16MatrixS_S_,@object # @_Z19MatMulSharedMemory16MatrixS_S_
	.globl	_Z19MatMulSharedMemory16MatrixS_S_
	.p2align	3, 0x0
_Z19MatMulSharedMemory16MatrixS_S_:
	.quad	_Z34__device_stub__MatMulSharedMemory16MatrixS_S_
	.size	_Z19MatMulSharedMemory16MatrixS_S_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/shaoguangcheng/ToyCode/master/cpp/cuda/MatMul.hip"
	.size	.L.str.1, 112

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12MatMulKernel6MatrixS_S_"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z19MatMulSharedMemory16MatrixS_S_"
	.size	.L__unnamed_2, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Correct"
	.size	.Lstr, 8

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Error occur"
	.size	.Lstr.1, 12

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__MatMulKernel6MatrixS_S_
	.addrsig_sym _Z34__device_stub__MatMulSharedMemory16MatrixS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12MatMulKernel6MatrixS_S_
	.addrsig_sym _Z19MatMulSharedMemory16MatrixS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12MatMulKernel6MatrixS_S_ ; -- Begin function _Z12MatMulKernel6MatrixS_S_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	8
	.type	_Z12MatMulKernel6MatrixS_S_,@function
_Z12MatMulKernel6MatrixS_S_:            ; @_Z12MatMulKernel6MatrixS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b128 s[4:7], s[0:1], 0x30
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_add_u32 s8, s0, 48
	s_addc_u32 s9, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x0
	s_load_b64 s[2:3], s[8:9], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	s_clause 0x3
	s_load_b32 s7, s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b32 s5, s[0:1], 0x20
	s_load_b64 s[0:1], s[0:1], 0x28
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v2, v1, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s4, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %._crit_edge
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12MatMulKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12MatMulKernel6MatrixS_S_, .Lfunc_end0-_Z12MatMulKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z19MatMulSharedMemory16MatrixS_S_ ; -- Begin function _Z19MatMulSharedMemory16MatrixS_S_
	.globl	_Z19MatMulSharedMemory16MatrixS_S_
	.p2align	8
	.type	_Z19MatMulSharedMemory16MatrixS_S_,@function
_Z19MatMulSharedMemory16MatrixS_S_:     ; @_Z19MatMulSharedMemory16MatrixS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x30
	s_add_u32 s8, s0, 48
	s_addc_u32 s9, s1, 0
	s_lshl_b32 s3, s15, 4
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s7, s14, 4
	s_add_i32 s3, s3, 16
	s_add_i32 s7, s7, 16
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_ashr_i32 s2, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s2, s2, 28
	s_add_i32 s2, s5, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, -16
	s_sub_i32 s2, s5, s2
	s_cmp_gt_i32 s3, s5
	s_cselect_b32 s2, s2, 16
	s_ashr_i32 s3, s4, 31
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_lshr_b32 s3, s3, 28
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s4, s3
	s_and_b32 s3, s3, -16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_sub_i32 s3, s4, s3
	s_cmp_gt_i32 s7, s4
	s_cselect_b32 s3, s3, 16
	v_cmp_gt_i32_e64 s2, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_13
; %bb.1:
	s_load_b32 s4, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s4, 15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	s_mov_b32 s2, 0
	s_cbranch_scc0 .LBB1_3
; %bb.2:
	s_ashr_i32 s3, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s3, s3, 28
	s_add_i32 s3, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s3, 4
	s_add_i32 s5, s3, 1
	s_branch .LBB1_4
.LBB1_3:
	s_mov_b32 s2, -1
                                        ; implicit-def: $sgpr5
.LBB1_4:                                ; %Flow123
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_6
; %bb.5:
	s_ashr_i32 s5, s4, 4
.LBB1_6:                                ; %_Z7divCeilii.exit
	s_load_b64 s[2:3], s[8:9], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB1_11
; %bb.7:                                ; %.lr.ph103
	s_clause 0x3
	s_load_b32 s7, s[0:1], 0x20
	s_load_b32 s10, s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x28
	v_lshlrev_b32_e32 v2, 2, v0
	s_ashr_i32 s11, s4, 31
	v_lshlrev_b32_e32 v3, 6, v1
	s_lshr_b32 s11, s11, 28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, 0x400, v2
	s_add_i32 s11, s4, s11
	s_and_b32 s11, s11, -16
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[7:8], null, s7, v1, v[0:1]
	v_mad_u64_u32 v[5:6], null, s10, v1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, v3, v2
	v_add_nc_u32_e32 v6, v4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s8, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s0, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v12, vcc_lo
	s_sub_i32 s0, s4, s11
	s_mul_i32 s1, s10, s15
	s_mov_b32 s8, 0
.LBB1_8:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_9 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s9, s8, 4
	s_mul_i32 s10, s8, s7
	s_add_i32 s9, s9, 16
	s_cmp_gt_i32 s9, s4
	s_cselect_b32 s9, s0, 16
	s_add_i32 s11, s8, s1
	s_add_i32 s12, s10, s14
	s_lshl_b32 s10, s11, 4
	s_lshl_b32 s12, s12, 4
	s_ashr_i32 s11, s10, 31
	s_ashr_i32 s13, s12, 31
	s_lshl_b64 s[10:11], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v11, vcc_lo, v7, s10
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v8, vcc_lo
	s_lshl_b64 s[10:11], s[12:13], 2
	s_cmp_lt_i32 s9, 1
	v_add_co_u32 v13, vcc_lo, v9, s10
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v10, vcc_lo
	global_load_b32 v15, v[11:12], off
	global_load_b32 v13, v[13:14], off
	v_dual_mov_b32 v11, v4 :: v_dual_mov_b32 v12, v3
	s_waitcnt vmcnt(1)
	ds_store_b32 v5, v15
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_10
.LBB1_9:                                ; %.lr.ph
                                        ;   Parent Loop BB1_8 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v13, v12
	ds_load_b32 v14, v11
	v_add_nc_u32_e32 v12, 4, v12
	v_add_nc_u32_e32 v11, 64, v11
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s9, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v13, v14
	s_cbranch_scc1 .LBB1_9
.LBB1_10:                               ; %._crit_edge
                                        ;   in Loop: Header=BB1_8 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, s5
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_8
	s_branch .LBB1_12
.LBB1_11:
	v_mov_b32_e32 v2, 0
.LBB1_12:                               ; %._crit_edge104
	v_mad_u64_u32 v[3:4], null, s6, v1, v[0:1]
	s_mul_i32 s0, s6, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s14
	s_lshl_b32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s1, s0, 31
	v_ashrrev_i32_e32 v4, 31, v3
	s_lshl_b64 s[0:1], s[0:1], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19MatMulSharedMemory16MatrixS_S_
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z19MatMulSharedMemory16MatrixS_S_, .Lfunc_end1-_Z19MatMulSharedMemory16MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 764
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           24
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12MatMulKernel6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12MatMulKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           24
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 72
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19MatMulSharedMemory16MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19MatMulSharedMemory16MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
