#include <stdio.h>
#include <time.h>

__global__ void matrixMultiply(int *matrix1, int *matrix2, int *matrix3, int m, int p) {
    int sum=0;
    int i =  blockIdx.x*64 + threadIdx.x; 
    for (int j = 0; j < p; j++) 
    {
        for (int k = 0; k < m; k++) 
        {
            sum = sum + matrix1[m*i+k]*matrix2[p*k+j];
        }
        matrix3[p*i+j] = sum;
        sum = 0;
     }    
}

int main(int argc, char **argv)
{   
    clock_t start_cpu,stop_cpu,start_gpu,stop_gpu;
    srand(time(NULL));
    int n = 0,m,p;
    if (argc>1) {n=strtol(argv[1],NULL,10);}
    m=n;
    p=n;
    //if (argc>2) {m=strtol(argv[2],NULL,10);}
    //if (argc>3) {p=strtol(argv[3],NULL,10);}
    //printf("n: %d, m:%d, p:%d\n",n,m,p);
    int *mat1 = (int *)malloc(n*m*sizeof(int));
    int *mat2 = (int *)malloc(m*p*sizeof(int));
    int *mat3 = (int *)malloc(n*p*sizeof(int));
        
    for (int i = 0; i < n; i++)
    {
        for (int j = 0; j < m; j++)
        {
            mat1[m*i+j] = (int) rand()%5;
        }
    }
    for (int i = 0; i < m; i++)
    {
        for (int j = 0; j < p; j++)
        {
            mat2[p*i+j] = (int) rand()%5;
        }
    }
    int *c_mat1;
    cudaMalloc(&c_mat1,n*m*sizeof(int));
    int *c_mat2;
    cudaMalloc(&c_mat2,m*p*sizeof(int));
    int *c_mat3;
    cudaMalloc(&c_mat3,n*p*sizeof(int));
    cudaMemcpy(c_mat1, mat1, n*m*sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(c_mat2, mat2, m*p*sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(c_mat3, mat3, n*p*sizeof(int), cudaMemcpyHostToDevice);
    start_cpu = clock();
    int sum=0;
    for (int i = 0; i < n; i++) 
    {
        for (int j = 0; j < p; j++) 
        {
            for (int k = 0; k < m; k++) 
            {
                sum = sum + mat1[m*i+k]*mat2[p*k+j];
            }
            mat3[p*i+j] = sum;
            //printf("%d, ",mat3[p*i+j]);
            sum = 0;
        }
        //printf("\n");
    }
    stop_cpu = clock();
    int time_spent = (int)(1000 * (stop_cpu - start_cpu) / CLOCKS_PER_SEC);
    printf("%d  ",time_spent);
    start_gpu = clock();
    int bloki = n / 64;
    int watki =  64;
    if (n%64 != 0 ) bloki++;   
    matrixMultiply<<<bloki,watki>>>(c_mat1,c_mat2,c_mat3,m,p);
    cudaDeviceSynchronize();
    stop_gpu = clock();
    int time_spent2 = (int)(1000 * (stop_gpu - start_gpu) / CLOCKS_PER_SEC);
    printf("%d\n",time_spent2);
    cudaMemcpy(mat3, c_mat3, n*p*sizeof(int), cudaMemcpyDeviceToHost);
    /*for (int i = 0; i < n; i++) 
    {
        for (int j = 0; j < p; j++) 
        {
            printf("%d, ",mat3[p*i+j]);
        }
        printf("\n");
    }*/
 return 0;
}


	.file	"tmpxft_0029ab9e_00000000-6_Lab_5.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z40__device_stub__Z14matrixMultiplyPiS_S_iiPiS_S_ii
	.type	_Z40__device_stub__Z14matrixMultiplyPiS_S_iiPiS_S_ii, @function
_Z40__device_stub__Z14matrixMultiplyPiS_S_iiPiS_S_ii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14matrixMultiplyPiS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z40__device_stub__Z14matrixMultiplyPiS_S_iiPiS_S_ii, .-_Z40__device_stub__Z14matrixMultiplyPiS_S_iiPiS_S_ii
	.globl	_Z14matrixMultiplyPiS_S_ii
	.type	_Z14matrixMultiplyPiS_S_ii, @function
_Z14matrixMultiplyPiS_S_ii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z14matrixMultiplyPiS_S_iiPiS_S_ii
	.cfi_endproc
.LFE2053:
	.size	_Z14matrixMultiplyPiS_S_ii, .-_Z14matrixMultiplyPiS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d  "
.LC1:
	.string	"%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	decl	%r12d
	jle	.L30
	movq	8(%rbp), %rdi
	movl	$10, %edx
	xorl	%esi, %esi
	call	__isoc23_strtol@PLT
	movl	%eax, %ebx
	jmp	.L9
.L30:
	xorl	%ebx, %ebx
.L9:
	movl	%ebx, %eax
	movslq	%ebx, %rbp
	xorl	%r15d, %r15d
	imull	%ebx, %eax
	salq	$2, %rbp
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%r13, %rcx
	movq	%rax, %r12
.L10:
	cmpl	%r15d, %ebx
	jle	.L32
	leaq	(%rcx,%rbp), %rdi
.L11:
	movq	%rdi, 24(%rsp)
	movq	%rcx, 16(%rsp)
	call	rand@PLT
	movl	$5, %esi
	movq	16(%rsp), %rcx
	movq	24(%rsp), %rdi
	cltd
	idivl	%esi
	addq	$4, %rcx
	movl	%edx, -4(%rcx)
	cmpq	%rdi, %rcx
	jne	.L11
	incl	%r15d
	jmp	.L10
.L32:
	movq	%r14, %rcx
	xorl	%r15d, %r15d
.L13:
	cmpl	%r15d, %ebx
	jle	.L33
	leaq	(%rcx,%rbp), %rdi
.L14:
	movq	%rdi, 24(%rsp)
	movq	%rcx, 16(%rsp)
	call	rand@PLT
	movl	$5, %esi
	movq	16(%rsp), %rcx
	movq	24(%rsp), %rdi
	cltd
	idivl	%esi
	addq	$4, %rcx
	movl	%edx, -4(%rcx)
	cmpq	%rdi, %rcx
	jne	.L14
	incl	%r15d
	jmp	.L13
.L33:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	call	clock@PLT
	xorl	%edx, %edx
	xorl	%esi, %esi
	movq	%rax, %r15
.L16:
	cmpl	%esi, %ebx
	jle	.L34
	xorl	%eax, %eax
	leaq	0(%r13,%rdx), %r10
	leaq	(%r12,%rdx), %r11
.L19:
	leaq	(%r14,%rax,4), %r8
	xorl	%ecx, %ecx
	xorl	%edi, %edi
.L17:
	movl	(%r10,%rcx,4), %r9d
	imull	(%r8), %r9d
	incq	%rcx
	addq	%rbp, %r8
	addl	%r9d, %edi
	cmpl	%ecx, %ebx
	jg	.L17
	movl	%edi, (%r11,%rax,4)
	incq	%rax
	cmpl	%eax, %ebx
	jg	.L19
	incl	%esi
	addq	%rbp, %rdx
	jmp	.L16
.L34:
	call	clock@PLT
	movl	$1000, %ecx
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	subq	%r15, %rax
	cqto
	idivq	%rcx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	$64, %ecx
	movq	%rax, %rbp
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	movl	%ebx, %edx
	movl	$1, %ecx
	andl	$63, %edx
	cmpl	$1, %edx
	movl	$67108865, %edx
	sbbl	$-1, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$6, %rdx
	movl	%eax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z40__device_stub__Z14matrixMultiplyPiS_S_iiPiS_S_ii
.L21:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movl	$1000, %ecx
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	subq	%rbp, %rax
	cqto
	idivq	%rcx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z14matrixMultiplyPiS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14matrixMultiplyPiS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>

__global__ void matrixMultiply(int *matrix1, int *matrix2, int *matrix3, int m, int p) {
    int sum=0;
    int i =  blockIdx.x*64 + threadIdx.x; 
    for (int j = 0; j < p; j++) 
    {
        for (int k = 0; k < m; k++) 
        {
            sum = sum + matrix1[m*i+k]*matrix2[p*k+j];
        }
        matrix3[p*i+j] = sum;
        sum = 0;
     }    
}

int main(int argc, char **argv)
{   
    clock_t start_cpu,stop_cpu,start_gpu,stop_gpu;
    srand(time(NULL));
    int n = 0,m,p;
    if (argc>1) {n=strtol(argv[1],NULL,10);}
    m=n;
    p=n;
    //if (argc>2) {m=strtol(argv[2],NULL,10);}
    //if (argc>3) {p=strtol(argv[3],NULL,10);}
    //printf("n: %d, m:%d, p:%d\n",n,m,p);
    int *mat1 = (int *)malloc(n*m*sizeof(int));
    int *mat2 = (int *)malloc(m*p*sizeof(int));
    int *mat3 = (int *)malloc(n*p*sizeof(int));
        
    for (int i = 0; i < n; i++)
    {
        for (int j = 0; j < m; j++)
        {
            mat1[m*i+j] = (int) rand()%5;
        }
    }
    for (int i = 0; i < m; i++)
    {
        for (int j = 0; j < p; j++)
        {
            mat2[p*i+j] = (int) rand()%5;
        }
    }
    int *c_mat1;
    hipMalloc(&c_mat1,n*m*sizeof(int));
    int *c_mat2;
    hipMalloc(&c_mat2,m*p*sizeof(int));
    int *c_mat3;
    hipMalloc(&c_mat3,n*p*sizeof(int));
    hipMemcpy(c_mat1, mat1, n*m*sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(c_mat2, mat2, m*p*sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(c_mat3, mat3, n*p*sizeof(int), hipMemcpyHostToDevice);
    start_cpu = clock();
    int sum=0;
    for (int i = 0; i < n; i++) 
    {
        for (int j = 0; j < p; j++) 
        {
            for (int k = 0; k < m; k++) 
            {
                sum = sum + mat1[m*i+k]*mat2[p*k+j];
            }
            mat3[p*i+j] = sum;
            //printf("%d, ",mat3[p*i+j]);
            sum = 0;
        }
        //printf("\n");
    }
    stop_cpu = clock();
    int time_spent = (int)(1000 * (stop_cpu - start_cpu) / CLOCKS_PER_SEC);
    printf("%d  ",time_spent);
    start_gpu = clock();
    int bloki = n / 64;
    int watki =  64;
    if (n%64 != 0 ) bloki++;   
    matrixMultiply<<<bloki,watki>>>(c_mat1,c_mat2,c_mat3,m,p);
    hipDeviceSynchronize();
    stop_gpu = clock();
    int time_spent2 = (int)(1000 * (stop_gpu - start_gpu) / CLOCKS_PER_SEC);
    printf("%d\n",time_spent2);
    hipMemcpy(mat3, c_mat3, n*p*sizeof(int), hipMemcpyDeviceToHost);
    /*for (int i = 0; i < n; i++) 
    {
        for (int j = 0; j < p; j++) 
        {
            printf("%d, ",mat3[p*i+j]);
        }
        printf("\n");
    }*/
 return 0;
}


	.text
	.file	"Lab_5.hip"
	.globl	_Z29__device_stub__matrixMultiplyPiS_S_ii # -- Begin function _Z29__device_stub__matrixMultiplyPiS_S_ii
	.type	_Z29__device_stub__matrixMultiplyPiS_S_ii,@function
_Z29__device_stub__matrixMultiplyPiS_S_ii: # @_Z29__device_stub__matrixMultiplyPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14matrixMultiplyPiS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__matrixMultiplyPiS_S_ii, .Lfunc_end0-_Z29__device_stub__matrixMultiplyPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	cmpl	$2, %ebp
	jl	.LBB1_2
# %bb.1:
	movq	8(%rbx), %rdi
	xorl	%esi, %esi
	movl	$10, %edx
	callq	__isoc23_strtol
	movq	%rax, %r14
.LBB1_2:
	movl	%r14d, %ebx
	imull	%ebx, %ebx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%r14d, %ebp
	testl	%r14d, %r14d
	jle	.LBB1_12
# %bb.3:                                # %.preheader102.lr.ph
	movq	%r13, (%rsp)                    # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%r15d, %r15d
.LBB1_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	movl	%ebx, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	xorl	%r12d, %r12d
.LBB1_5:                                #   Parent Loop BB1_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$33, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%r13,%r12,4)
	incq	%r12
	cmpq	%r12, %rbp
	jne	.LBB1_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=1
	incq	%r15
	addl	%r14d, %ebx
	cmpq	%rbp, %r15
	jne	.LBB1_4
# %bb.7:                                # %.preheader101
	testl	%r14d, %r14d
	movq	(%rsp), %r13                    # 8-byte Reload
	jle	.LBB1_12
# %bb.8:                                # %.preheader100.lr.ph
	xorl	%ebx, %ebx
	xorl	%r15d, %r15d
.LBB1_9:                                # %.lr.ph106
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
	movl	%ebx, %eax
	leaq	(%r13,%rax,4), %r13
	xorl	%r12d, %r12d
.LBB1_10:                               #   Parent Loop BB1_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$33, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%r13,%r12,4)
	incq	%r12
	cmpq	%r12, %rbp
	jne	.LBB1_10
# %bb.11:                               # %._crit_edge107
                                        #   in Loop: Header=BB1_9 Depth=1
	incq	%r15
	addl	%r14d, %ebx
	cmpq	%rbp, %r15
	movq	(%rsp), %r13                    # 8-byte Reload
	jne	.LBB1_9
.LBB1_12:                               # %._crit_edge109
	leaq	40(%rsp), %rdi
	movq	24(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %r12
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	16(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, (%rsp)                    # 8-byte Spill
	testl	%r14d, %r14d
	jle	.LBB1_19
# %bb.13:                               # %.preheader99.lr.ph
	leaq	(,%rbp,4), %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB1_14:                               # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_15 Depth 2
                                        #       Child Loop BB1_16 Depth 3
	movl	%ecx, %esi
	movq	8(%rsp), %rdi                   # 8-byte Reload
	leaq	(%rdi,%rsi,4), %rsi
	movq	%rdx, %rdi
	imulq	%rbp, %rdi
	leaq	(%r12,%rdi,4), %rdi
	movq	%r13, %r8
	xorl	%r9d, %r9d
.LBB1_15:                               # %.preheader
                                        #   Parent Loop BB1_14 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_16 Depth 3
	xorl	%r10d, %r10d
	movq	%r8, %r11
	xorl	%ebx, %ebx
.LBB1_16:                               #   Parent Loop BB1_14 Depth=1
                                        #     Parent Loop BB1_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r11), %r15d
	imull	(%rsi,%r10,4), %r15d
	addl	%r15d, %ebx
	incq	%r10
	addq	%rax, %r11
	cmpq	%r10, %rbp
	jne	.LBB1_16
# %bb.17:                               # %._crit_edge113
                                        #   in Loop: Header=BB1_15 Depth=2
	movl	%ebx, (%rdi,%r9,4)
	incq	%r9
	addq	$4, %r8
	cmpq	%rbp, %r9
	jne	.LBB1_15
# %bb.18:                               # %._crit_edge115
                                        #   in Loop: Header=BB1_14 Depth=1
	incq	%rdx
	addl	%r14d, %ecx
	cmpq	%rbp, %rdx
	jne	.LBB1_14
.LBB1_19:                               # %._crit_edge117
	callq	clock
	subq	(%rsp), %rax                    # 8-byte Folded Reload
	movabsq	$2361183241434822607, %r13      # imm = 0x20C49BA5E353F7CF
	imulq	%r13
	movq	%rdx, %rsi
	shrq	$63, %rsi
	shrq	$7, %rdx
	addl	%edx, %esi
	movl	$.L.str, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	callq	clock
	leal	63(%r14), %edi
	testl	%r14d, %r14d
	cmovnsl	%r14d, %edi
	sarl	$6, %edi
	movl	%r14d, %ecx
	andl	$63, %ecx
	cmpl	$1, %ecx
	sbbl	$-1, %edi
	movq	%rax, %r12
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.20:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	%r14d, %ecx
	movl	%r14d, %r8d
	callq	_Z29__device_stub__matrixMultiplyPiS_S_ii
.LBB1_21:
	callq	hipDeviceSynchronize
	callq	clock
	subq	%r12, %rax
	imulq	%r13
	movq	%rdx, %rsi
	shrq	$63, %rsi
	shrq	$7, %rdx
	addl	%edx, %esi
	movl	$.L.str.1, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14matrixMultiplyPiS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14matrixMultiplyPiS_S_ii,@object # @_Z14matrixMultiplyPiS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z14matrixMultiplyPiS_S_ii
	.p2align	3, 0x0
_Z14matrixMultiplyPiS_S_ii:
	.quad	_Z29__device_stub__matrixMultiplyPiS_S_ii
	.size	_Z14matrixMultiplyPiS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d  "
	.size	.L.str, 5

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d\n"
	.size	.L.str.1, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14matrixMultiplyPiS_S_ii"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__matrixMultiplyPiS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14matrixMultiplyPiS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14matrixMultiplyPiS_S_ii ; -- Begin function _Z14matrixMultiplyPiS_S_ii
	.globl	_Z14matrixMultiplyPiS_S_ii
	.p2align	8
	.type	_Z14matrixMultiplyPiS_S_ii,@function
_Z14matrixMultiplyPiS_S_ii:             ; @_Z14matrixMultiplyPiS_S_ii
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.preheader.lr.ph
	v_lshl_add_u32 v2, s15, 6, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_cmp_gt_i32 s2, 0
	v_mov_b32_e32 v6, 0
	v_mul_lo_u32 v0, v2, s2
	s_cselect_b32 s0, -1, 0
	v_mul_lo_u32 v5, v2, s3
	v_cndmask_b32_e64 v3, 0, 1, s0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_ne_u32_e64 s0, 1, v3
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_mov_b32 s5, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_mov_b32_e32 v2, 0
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v4, v1
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v0
	s_mov_b32 s4, s1
	s_mov_b32 s10, s2
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshl_b64 s[12:13], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s12, s6, s12
	s_addc_u32 s13, s7, s13
	global_load_b32 v9, v[3:4], off
	global_load_b32 v10, v6, s[12:13]
	s_add_i32 s10, s10, -1
	s_add_i32 s4, s4, s3
	s_cmp_eq_u32 s10, 0
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v10, v9, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v2, v7
	s_cbranch_scc0 .LBB0_4
.LBB0_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v3, s1, v5
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s1, s3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	global_store_b32 v[3:4], v2, off
	s_cbranch_scc0 .LBB0_2
.LBB0_6:                                ; %._crit_edge29
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14matrixMultiplyPiS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14matrixMultiplyPiS_S_ii, .Lfunc_end0-_Z14matrixMultiplyPiS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14matrixMultiplyPiS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14matrixMultiplyPiS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
