#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define KERNEL_SIZE 20

__constant__ int kernel[KERNEL_SIZE];

__global__ void conv1d(int *input, int *output, int l) {
	int tid = blockIdx.x * blockDim.x + threadIdx.x;
	int r = KERNEL_SIZE / 2;
	int start = tid - r;
	int temp = 0;
	for (int j = 0; j < KERNEL_SIZE; j++) {
		if ((start + j >= 0) && (start + j < l)) {
			temp += input[start + j] * kernel[j];
		}
	}
	output[tid] = temp;
}

int main() {
	int l = 20480;
	int i;
	int *host_input, *host_kernel, *host_output;
	int *dev_input, *dev_output;

	cudaMalloc((void**)&dev_input, sizeof(int) * l);
	cudaMalloc((void**)&dev_output, sizeof(int) * KERNEL_SIZE);
	cudaMallocHost((void**)&host_input, sizeof(int) * l);
	cudaMallocHost((void**)&host_kernel, sizeof(int) * KERNEL_SIZE);
	cudaMallocHost((void**)&host_output, sizeof(int) * l);

	for (i = 0; i < l; i++) {
		host_input[i] = round(rand());
	}
	for (i = 0; i < KERNEL_SIZE; i++) {
		host_kernel[i] = round(rand());
	}

	clock_t start_time = clock();
	cudaMemcpy(dev_input, host_input, sizeof(int) * l, cudaMemcpyHostToDevice);
	cudaMemcpyToSymbol(kernel, host_kernel, sizeof(int) * KERNEL_SIZE);

	int block = 256;
	int grid = (l + block - 1) / block;

	conv1d<<<grid, block>>>(dev_input, dev_output, l);

	cudaMemcpy(host_output, dev_output, sizeof(int) * l, cudaMemcpyDeviceToHost);
	clock_t end_time = clock();
	printf("Time consuming of 1D convolution of %d array with %d kernel is %f ms.\n", l, KERNEL_SIZE, static_cast<double>(end_time - start_time)/CLOCKS_PER_SEC*1000);

	cudaFree(dev_input);
	cudaFree(dev_output);
	cudaFreeHost(host_input);
	cudaFreeHost(host_kernel);
	cudaFreeHost(host_output);

	return 0;
}

	.file	"tmpxft_0022520c_00000000-6_const.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2244:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2244:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z6conv1dPiS_iPiS_i
	.type	_Z28__device_stub__Z6conv1dPiS_iPiS_i, @function
_Z28__device_stub__Z6conv1dPiS_iPiS_i:
.LFB2266:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6conv1dPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2266:
	.size	_Z28__device_stub__Z6conv1dPiS_iPiS_i, .-_Z28__device_stub__Z6conv1dPiS_iPiS_i
	.globl	_Z6conv1dPiS_i
	.type	_Z6conv1dPiS_i, @function
_Z6conv1dPiS_i:
.LFB2267:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6conv1dPiS_iPiS_i
	.cfi_endproc
.LFE2267:
	.size	_Z6conv1dPiS_i, .-_Z6conv1dPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Time consuming of 1D convolution of %d array with %d kernel is %f ms.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2241:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$81920, %esi
	xorl	%ebx, %ebx
	subq	$80, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$80, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$81920, %esi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movl	$80, %esi
	call	cudaMallocHost@PLT
	leaq	24(%rsp), %rdi
	movl	$81920, %esi
	call	cudaMallocHost@PLT
.L9:
	call	rand@PLT
	movq	8(%rsp), %rdx
	movl	%eax, (%rdx,%rbx)
	addq	$4, %rbx
	cmpq	$81920, %rbx
	jne	.L9
	xorl	%ebx, %ebx
.L10:
	call	rand@PLT
	movq	16(%rsp), %rdx
	movl	%eax, (%rdx,%rbx)
	addq	$4, %rbx
	cmpq	$80, %rbx
	jne	.L10
	call	clock@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$81920, %edx
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movl	$80, %edx
	leaq	_ZL6kernel(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$268435461, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$4, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$20480, %edx
	call	_Z28__device_stub__Z6conv1dPiS_iPiS_i
.L11:
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$81920, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movl	$20, %ecx
	movl	$20480, %edx
	leaq	.LC2(%rip), %rsi
	subq	%rbx, %rax
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC0(%rip), %xmm0
	movb	$1, %al
	mulsd	.LC1(%rip), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$80, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2241:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z6conv1dPiS_i"
.LC4:
	.string	"precalc_xorwow_matrix"
.LC5:
	.string	"precalc_xorwow_offset_matrix"
.LC6:
	.string	"mrg32k3aM1"
.LC7:
	.string	"mrg32k3aM2"
.LC8:
	.string	"mrg32k3aM1SubSeq"
.LC9:
	.string	"mrg32k3aM2SubSeq"
.LC10:
	.string	"mrg32k3aM1Seq"
.LC11:
	.string	"mrg32k3aM2Seq"
.LC12:
	.string	"__cr_lgamma_table"
.LC13:
	.string	"kernel"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2269:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6conv1dPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$72, %r9d
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$80, %r9d
	movq	%rdx, %rcx
	leaq	_ZL6kernel(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2269:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6kernel
	.comm	_ZL6kernel,80,32
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.align 8
.LC1:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#include <hip/hip_runtime.h>

#include <hiprand/hiprand_kernel.h>

#define KERNEL_SIZE 20

__constant__ int kernel[KERNEL_SIZE];

__global__ void conv1d(int *input, int *output, int l) {
	int tid = blockIdx.x * blockDim.x + threadIdx.x;
	int r = KERNEL_SIZE / 2;
	int start = tid - r;
	int temp = 0;
	for (int j = 0; j < KERNEL_SIZE; j++) {
		if ((start + j >= 0) && (start + j < l)) {
			temp += input[start + j] * kernel[j];
		}
	}
	output[tid] = temp;
}

int main() {
	int l = 20480;
	int i;
	int *host_input, *host_kernel, *host_output;
	int *dev_input, *dev_output;

	hipMalloc((void**)&dev_input, sizeof(int) * l);
	hipMalloc((void**)&dev_output, sizeof(int) * KERNEL_SIZE);
	hipHostMalloc((void**)&host_input, sizeof(int) * l, hipHostMallocDefault);
	hipHostMalloc((void**)&host_kernel, sizeof(int) * KERNEL_SIZE, hipHostMallocDefault);
	hipHostMalloc((void**)&host_output, sizeof(int) * l, hipHostMallocDefault);

	for (i = 0; i < l; i++) {
		host_input[i] = round(rand());
	}
	for (i = 0; i < KERNEL_SIZE; i++) {
		host_kernel[i] = round(rand());
	}

	clock_t start_time = clock();
	hipMemcpy(dev_input, host_input, sizeof(int) * l, hipMemcpyHostToDevice);
	hipMemcpyToSymbol(HIP_SYMBOL(kernel), host_kernel, sizeof(int) * KERNEL_SIZE);

	int block = 256;
	int grid = (l + block - 1) / block;

	conv1d<<<grid, block>>>(dev_input, dev_output, l);

	hipMemcpy(host_output, dev_output, sizeof(int) * l, hipMemcpyDeviceToHost);
	clock_t end_time = clock();
	printf("Time consuming of 1D convolution of %d array with %d kernel is %f ms.\n", l, KERNEL_SIZE, static_cast<double>(end_time - start_time)/CLOCKS_PER_SEC*1000);

	hipFree(dev_input);
	hipFree(dev_output);
	hipHostFree(host_input);
	hipHostFree(host_kernel);
	hipHostFree(host_output);

	return 0;
}

	.text
	.file	"const.hip"
	.globl	_Z21__device_stub__conv1dPiS_i  # -- Begin function _Z21__device_stub__conv1dPiS_i
	.type	_Z21__device_stub__conv1dPiS_i,@function
_Z21__device_stub__conv1dPiS_i:         # @_Z21__device_stub__conv1dPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6conv1dPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__conv1dPiS_i, .Lfunc_end0-_Z21__device_stub__conv1dPiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_1:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rdi
	movl	$81920, %esi                    # imm = 0x14000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$80, %esi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$81920, %esi                    # imm = 0x14000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	24(%rsp), %rdi
	movl	$80, %esi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	40(%rsp), %rdi
	movl	$81920, %esi                    # imm = 0x14000
	xorl	%edx, %edx
	callq	hipHostMalloc
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movq	32(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	incq	%rbx
	cmpq	$20480, %rbx                    # imm = 0x5000
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movq	24(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	incq	%rbx
	cmpq	$20, %rbx
	jne	.LBB1_3
# %bb.4:
	callq	clock
	movq	%rax, %rbx
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	$81920, %edx                    # imm = 0x14000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$kernel, %edi
	movl	$80, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movabsq	$4294967376, %rdi               # imm = 0x100000050
	leaq	176(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$20480, %edx                    # imm = 0x5000
	callq	_Z21__device_stub__conv1dPiS_i
.LBB1_6:
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$81920, %edx                    # imm = 0x14000
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	%rbx, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	mulsd	.LCPI1_1(%rip), %xmm0
	movl	$.L.str, %edi
	movl	$20480, %esi                    # imm = 0x5000
	movl	$20, %edx
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	40(%rsp), %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6conv1dPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$kernel, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$80, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	kernel,@object                  # @kernel
	.local	kernel
	.comm	kernel,80,16
	.type	_Z6conv1dPiS_i,@object          # @_Z6conv1dPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z6conv1dPiS_i
	.p2align	3, 0x0
_Z6conv1dPiS_i:
	.quad	_Z21__device_stub__conv1dPiS_i
	.size	_Z6conv1dPiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time consuming of 1D convolution of %d array with %d kernel is %f ms.\n"
	.size	.L.str, 71

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6conv1dPiS_i"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"kernel"
	.size	.L__unnamed_2, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__conv1dPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym kernel
	.addrsig_sym _Z6conv1dPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6conv1dPiS_i          ; -- Begin function _Z6conv1dPiS_i
	.globl	_Z6conv1dPiS_i
	.p2align	8
	.type	_Z6conv1dPiS_i,@function
_Z6conv1dPiS_i:                         ; @_Z6conv1dPiS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s1, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_mov_b64 s[2:3], 0
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, -10, v1
	v_mov_b32_e32 v0, v3
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s0, s1, v2
	s_and_b32 s8, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, kernel@rel32@lo+4
	s_addc_u32 s9, s9, kernel@rel32@hi+12
	s_add_u32 s8, s2, s8
	s_addc_u32 s9, s3, s9
	s_load_b32 s8, s[8:9], 0x0
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[4:5], null, s8, v6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v4
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, 1, v2
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x50
	s_cbranch_scc0 .LBB0_1
; %bb.4:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6conv1dPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6conv1dPiS_i, .Lfunc_end0-_Z6conv1dPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	kernel                  ; @kernel
	.type	kernel,@object
	.section	.bss,"aw",@nobits
	.globl	kernel
	.p2align	4, 0x0
kernel:
	.zero	80
	.size	kernel, 80

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym kernel
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6conv1dPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6conv1dPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
