// RUN: %clangxx -ccc-print-phases --sysroot=%S/Inputs/SYCL -target x86_64-unknown-linux-gnu  -fsycl -fsycl-targets=nvptx64-nvidia-cuda  -Xsycl-target-backend  --cuda-gpu-arch=sm_80 --cuda-gpu-arch=sm_80 -c %s 2>&1 | FileCheck %s --check-prefix=DEFAULT-PHASES

// Test the correct placement of the offloading actions for compiling CUDA sources (*.cu) in SYCL.

// DEFAULT-PHASES:                +- 0: input, "{{.*}}", cuda, (device-sycl, sm_80)
// DEFAULT-PHASES:             +- 1: preprocessor, {0}, cuda-cpp-output, (device-sycl, sm_80)
// DEFAULT-PHASES:          +- 2: compiler, {1}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES:       +- 3: offload, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {2}, ir
// DEFAULT-PHASES:       |        +- 4: input, "{{.*}}", cuda, (device-cuda, sm_80)
// DEFAULT-PHASES:       |     +- 5: preprocessor, {4}, cuda-cpp-output, (device-cuda, sm_80)
// DEFAULT-PHASES:       |  +- 6: compiler, {5}, ir, (device-cuda, sm_80)
// DEFAULT-PHASES:       |- 7: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {6}, ir
// DEFAULT-PHASES:    +- 8: linker, {3, 7}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES: +- 9: offload, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {8}, ir
// DEFAULT-PHASES: |                    +- 10: input, "{{.*}}", cuda, (host-cuda-sycl)
// DEFAULT-PHASES: |                 +- 11: append-footer, {10}, cuda, (host-cuda-sycl)
// DEFAULT-PHASES: |              +- 12: preprocessor, {11}, cuda-cpp-output, (host-cuda-sycl)
// DEFAULT-PHASES: |           +- 13: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {12}, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {2}, cuda-cpp-output
// DEFAULT-PHASES: |        +- 14: compiler, {13}, ir, (host-cuda-sycl)
// DEFAULT-PHASES: |        |        +- 15: backend, {6}, assembler, (device-cuda, sm_80)
// DEFAULT-PHASES: |        |     +- 16: assembler, {15}, object, (device-cuda, sm_80)
// DEFAULT-PHASES: |        |  +- 17: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {16}, object
// DEFAULT-PHASES: |        |  |- 18: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {15}, assembler
// DEFAULT-PHASES: |        |- 19: linker, {17, 18}, cuda-fatbin, (device-cuda)
// DEFAULT-PHASES: |     +- 20: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {14}, "device-cuda (nvptx64-nvidia-cuda)" {19}, ir
// DEFAULT-PHASES: |  +- 21: backend, {20}, assembler, (host-cuda-sycl)
// DEFAULT-PHASES: |- 22: assembler, {21}, object, (host-cuda-sycl)
// DEFAULT-PHASES: 23: clang-offload-bundler, {9, 22}, object, (host-cuda-sycl)



// RUN: %clangxx -ccc-print-phases --sysroot=%S/Inputs/SYCL --cuda-path=%S/Inputs/CUDA_111/usr/local/cuda -fsycl-libspirv-path=%S/Inputs/SYCL/lib/nvidiacl -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=nvptx64-nvidia-cuda  -Xsycl-target-backend  --cuda-gpu-arch=sm_80 --cuda-gpu-arch=sm_80 %s 2>&1 | FileCheck %s --check-prefix=DEFAULT-PHASES2

// DEFAULT-PHASES2:                               +- 0: input, "{{.*}}", cuda, (host-cuda-sycl)
// DEFAULT-PHASES2:                            +- 1: append-footer, {0}, cuda, (host-cuda-sycl)
// DEFAULT-PHASES2:                         +- 2: preprocessor, {1}, cuda-cpp-output, (host-cuda-sycl)
// DEFAULT-PHASES2:                         |     +- 3: input, "{{.*}}", cuda, (device-sycl, sm_80)
// DEFAULT-PHASES2:                         |  +- 4: preprocessor, {3}, cuda-cpp-output, (device-sycl, sm_80)
// DEFAULT-PHASES2:                         |- 5: compiler, {4}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES2:                      +- 6: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {2}, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {5}, cuda-cpp-output
// DEFAULT-PHASES2:                   +- 7: compiler, {6}, ir, (host-cuda-sycl)
// DEFAULT-PHASES2:                   |                 +- 8: input, "{{.*}}", cuda, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |              +- 9: preprocessor, {8}, cuda-cpp-output, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |           +- 10: compiler, {9}, ir, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |        +- 11: backend, {10}, assembler, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |     +- 12: assembler, {11}, object, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |  +- 13: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {12}, object
// DEFAULT-PHASES2:                   |  |- 14: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {11}, assembler
// DEFAULT-PHASES2:                   |- 15: linker, {13, 14}, cuda-fatbin, (device-cuda)
// DEFAULT-PHASES2:                +- 16: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {7}, "device-cuda (nvptx64-nvidia-cuda)" {15}, ir
// DEFAULT-PHASES2:             +- 17: backend, {16}, assembler, (host-cuda-sycl)
// DEFAULT-PHASES2:          +- 18: assembler, {17}, object, (host-cuda-sycl)
// DEFAULT-PHASES2:       +- 19: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {18}, object
// DEFAULT-PHASES2:    +- 20: linker, {19}, image, (host-cuda-sycl)
// DEFAULT-PHASES2:    |              |- 21: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {10}, ir
// DEFAULT-PHASES2:    |           +- 22: linker, {5, 21}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES2:    {{.*}}: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {20}, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {{{.*}}}, image

	.file	"tmpxft_002245e2_00000000-6_sycl-cuda-tu-offload.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
// RUN: %clangxx -ccc-print-phases --sysroot=%S/Inputs/SYCL -target x86_64-unknown-linux-gnu  -fsycl -fsycl-targets=nvptx64-nvidia-cuda  -Xsycl-target-backend  --cuda-gpu-arch=sm_80 --cuda-gpu-arch=sm_80 -c %s 2>&1 | FileCheck %s --check-prefix=DEFAULT-PHASES

// Test the correct placement of the offloading actions for compiling CUDA sources (*.cu) in SYCL.

// DEFAULT-PHASES:                +- 0: input, "{{.*}}", cuda, (device-sycl, sm_80)
// DEFAULT-PHASES:             +- 1: preprocessor, {0}, cuda-cpp-output, (device-sycl, sm_80)
// DEFAULT-PHASES:          +- 2: compiler, {1}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES:       +- 3: offload, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {2}, ir
// DEFAULT-PHASES:       |        +- 4: input, "{{.*}}", cuda, (device-cuda, sm_80)
// DEFAULT-PHASES:       |     +- 5: preprocessor, {4}, cuda-cpp-output, (device-cuda, sm_80)
// DEFAULT-PHASES:       |  +- 6: compiler, {5}, ir, (device-cuda, sm_80)
// DEFAULT-PHASES:       |- 7: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {6}, ir
// DEFAULT-PHASES:    +- 8: linker, {3, 7}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES: +- 9: offload, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {8}, ir
// DEFAULT-PHASES: |                    +- 10: input, "{{.*}}", cuda, (host-cuda-sycl)
// DEFAULT-PHASES: |                 +- 11: append-footer, {10}, cuda, (host-cuda-sycl)
// DEFAULT-PHASES: |              +- 12: preprocessor, {11}, cuda-cpp-output, (host-cuda-sycl)
// DEFAULT-PHASES: |           +- 13: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {12}, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {2}, cuda-cpp-output
// DEFAULT-PHASES: |        +- 14: compiler, {13}, ir, (host-cuda-sycl)
// DEFAULT-PHASES: |        |        +- 15: backend, {6}, assembler, (device-cuda, sm_80)
// DEFAULT-PHASES: |        |     +- 16: assembler, {15}, object, (device-cuda, sm_80)
// DEFAULT-PHASES: |        |  +- 17: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {16}, object
// DEFAULT-PHASES: |        |  |- 18: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {15}, assembler
// DEFAULT-PHASES: |        |- 19: linker, {17, 18}, cuda-fatbin, (device-cuda)
// DEFAULT-PHASES: |     +- 20: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {14}, "device-cuda (nvptx64-nvidia-cuda)" {19}, ir
// DEFAULT-PHASES: |  +- 21: backend, {20}, assembler, (host-cuda-sycl)
// DEFAULT-PHASES: |- 22: assembler, {21}, object, (host-cuda-sycl)
// DEFAULT-PHASES: 23: clang-offload-bundler, {9, 22}, object, (host-cuda-sycl)



// RUN: %clangxx -ccc-print-phases --sysroot=%S/Inputs/SYCL --cuda-path=%S/Inputs/CUDA_111/usr/local/cuda -fsycl-libspirv-path=%S/Inputs/SYCL/lib/nvidiacl -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=nvptx64-nvidia-cuda  -Xsycl-target-backend  --cuda-gpu-arch=sm_80 --cuda-gpu-arch=sm_80 %s 2>&1 | FileCheck %s --check-prefix=DEFAULT-PHASES2

// DEFAULT-PHASES2:                               +- 0: input, "{{.*}}", cuda, (host-cuda-sycl)
// DEFAULT-PHASES2:                            +- 1: append-footer, {0}, cuda, (host-cuda-sycl)
// DEFAULT-PHASES2:                         +- 2: preprocessor, {1}, cuda-cpp-output, (host-cuda-sycl)
// DEFAULT-PHASES2:                         |     +- 3: input, "{{.*}}", cuda, (device-sycl, sm_80)
// DEFAULT-PHASES2:                         |  +- 4: preprocessor, {3}, cuda-cpp-output, (device-sycl, sm_80)
// DEFAULT-PHASES2:                         |- 5: compiler, {4}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES2:                      +- 6: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {2}, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {5}, cuda-cpp-output
// DEFAULT-PHASES2:                   +- 7: compiler, {6}, ir, (host-cuda-sycl)
// DEFAULT-PHASES2:                   |                 +- 8: input, "{{.*}}", cuda, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |              +- 9: preprocessor, {8}, cuda-cpp-output, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |           +- 10: compiler, {9}, ir, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |        +- 11: backend, {10}, assembler, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |     +- 12: assembler, {11}, object, (device-cuda, sm_80)
// DEFAULT-PHASES2:                   |  +- 13: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {12}, object
// DEFAULT-PHASES2:                   |  |- 14: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {11}, assembler
// DEFAULT-PHASES2:                   |- 15: linker, {13, 14}, cuda-fatbin, (device-cuda)
// DEFAULT-PHASES2:                +- 16: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {7}, "device-cuda (nvptx64-nvidia-cuda)" {15}, ir
// DEFAULT-PHASES2:             +- 17: backend, {16}, assembler, (host-cuda-sycl)
// DEFAULT-PHASES2:          +- 18: assembler, {17}, object, (host-cuda-sycl)
// DEFAULT-PHASES2:       +- 19: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {18}, object
// DEFAULT-PHASES2:    +- 20: linker, {19}, image, (host-cuda-sycl)
// DEFAULT-PHASES2:    |              |- 21: offload, "device-cuda (nvptx64-nvidia-cuda:sm_80)" {10}, ir
// DEFAULT-PHASES2:    |           +- 22: linker, {5, 21}, ir, (device-sycl, sm_80)
// DEFAULT-PHASES2:    {{.*}}: offload, "host-cuda-sycl (x86_64-unknown-linux-gnu)" {20}, "device-sycl (nvptx64-nvidia-cuda:sm_80)" {{{.*}}}, image

	.text
	.file	"sycl-cuda-tu-offload.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
