#include <vector>
#include <cstdlib>
#include <iostream>
#include <fstream>
#include <math.h>
#include <cstring>
#include <cuda.h>

#define ITER_LIMIT 500
#define MATRIX_MAX 10

using namespace std;


void nmfgpu(float *a, int r, int c, int k, int niters, float *w, float *h);
void matrix_print(float *a, int r, int c);
void nmf_seed(float *out, float *a, int r, int c, int k);
void surface_matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2);


__global__ void kernel(float *a, int r, int c, int k, int niters, float *w,
 float *h, float* wt, float* ht, float* wta, float* wtw, float* wtwh, float* hdiv, float* aht,
    	float* wh, float* whht, float* wdiv, int total);


__device__ void matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2, int total);
__device__ void matrix_trans(float *out, float *a, int r, int c, int total);
__device__ float matrix_findmax(float *a, int r, int c, int total);
__device__ float matrix_distance(float *a, float *b, int r, int c, int total);
__device__ void matrix_elemproduct(float* out, float *a, float *b, int r, int c, int total);
__device__ void matrix_elemdivison(float* out, float *a, float *b, int r ,int c, int total);


void surface_matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2){
    if (c1!=r2){
    	return;
    }
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = 0;
    int total = 1;
    int division = r1/total;
    for (int row = (division*total); row < (nth==(total-1) ? r1 : (division*nth+division)); row++) {
        for (int col = 0; col < c2; col++) {
            out[row*c2+col] = 0;
            for (int inner = 0; inner < c1; inner++) {
                out[row*c2+col] += a[row*c1+inner] * b[inner*c2+col]*1.0;
                // printf("%d %d :%.2f += %.2f\n", 
                //     row, col, out[row*c2+col]-a[row*c1+inner] * b[inner*c2+col]*1.0, a[row*c1+inner] * b[inner*c2+col]*1.0);
            }
        }
    }
}




void nmfgpu(float *a, int r, int c, int k, int niters, float *w, float *h){
	// setup cuda
    float *dm;
    float *dm_w;
    float *dm_h;
    int msize = r*c*sizeof(float);
    int msize_w = r*k*sizeof(float);
    int msize_h = k*c*sizeof(float);
    float *dm_wt = new float[r*k];
    float *dm_ht = new float[c*k];
    float *dm_wta = new float[k*c];
    float *dm_wtw = new float[k*k];
    float *dm_wtwh = new float[k*c];
    float *dm_hdiv = new float[k*c];
    float *dm_aht = new float[r*k];
    float *dm_wh = new float[r*c];
    float *dm_whht = new float[r*k];
    float *dm_wdiv = new float[r*k];
    nmf_seed(w, a, r, c, k);
    memcpy(h, w, sizeof(float)*r*k);
    cudaMalloc((void**)&dm, msize);
    cudaMalloc((void**)&dm_h, msize_h);
    cudaMalloc((void**)&dm_w, msize_w);
    cudaMalloc((void**)&dm_wt, r*k*sizeof(float));
    cudaMalloc((void**)&dm_ht, c*k*sizeof(float));
    cudaMalloc((void**)&dm_wta, k*c*sizeof(float));
    cudaMalloc((void**)&dm_wtw, k*k*sizeof(float));
    cudaMalloc((void**)&dm_wtwh, k*c*sizeof(float));
    cudaMalloc((void**)&dm_hdiv, k*c*sizeof(float));
    cudaMalloc((void**)&dm_aht, r*k*sizeof(float));
    cudaMalloc((void**)&dm_wh, r*c*sizeof(float));
    cudaMalloc((void**)&dm_whht,r*k*sizeof(float));
    cudaMalloc((void**)&dm_wdiv,r*k*sizeof(float));

    int total = 4;
    dim3 dimGrid(1,1);
    dim3 dimBlock(total, 1, 1);

    cudaMemcpy(dm, a, msize, cudaMemcpyHostToDevice);
    kernel<<<dimGrid, dimBlock>>>(dm, r, c, k, niters , dm_w, dm_h,
    	dm_wt, dm_ht, dm_wta, dm_wtw, dm_wtwh, dm_hdiv, dm_aht,
    	dm_wh, dm_whht, dm_wdiv, total);

    cudaMemcpy(w, dm_w, msize_w, cudaMemcpyDeviceToHost);
    cudaMemcpy(h, dm_h, msize_h, cudaMemcpyDeviceToHost);
    cudaFree(dm);
	cudaFree(dm_h);
	cudaFree(dm_w);
	cudaFree(dm_wt);
	cudaFree(dm_ht);
	cudaFree(dm_wta);
	cudaFree(dm_wtw);
	cudaFree(dm_wtwh);
	cudaFree(dm_hdiv);
	cudaFree(dm_aht);
	cudaFree(dm_wh);
	cudaFree(dm_whht);
	cudaFree(dm_wdiv);
}




__global__ void kernel(float *a, int r, int c, int k, int niters, float *w, float *h,
	float* wt, float* ht, float* wta, float* wtw, float* wtwh, float* hdiv, float* aht,
    	float* wh, float* whht, float* wdiv, int total){



    // calculate h
    // nominator
    // printf("NMF: 1\n");
    for (int i=0;i<niters;i++){
	    matrix_trans(wt, w, r, k, total);
	    matrix_multi(wta, wt, a, k, r, r, c, total);
	    // denominator
	    // printf("NMF: 2\n");
	    matrix_multi(wtw, wt, w, k, r, r, k, total);
	    matrix_multi(wtwh, wtw, h, k, k, k, c, total);
	    // new h
	    // printf("NMF: 3\n");
	    matrix_elemdivison(hdiv, wta, wtwh, k, c, total);
	    matrix_elemproduct(h, h, hdiv, k, c, total);
	    // calcualte w
	    // nominator
	    // printf("NMF: 4\n");
	    matrix_trans(ht, h, k, c, total);
	    matrix_multi(aht, a, ht, r, c, c, k, total);
	    // calculate w
	    // printf("NMF: 5\n");
	    matrix_multi(wh, w, h, r, k, k, c, total);
	    matrix_multi(whht, wh, ht, r, c, c, k, total);
	    matrix_elemdivison(wdiv, aht, whht, r, k, total);
	    // new w
	    // printf("NMF: 6\n");
	    matrix_elemproduct(w, w, wdiv, r, k, total);
    }
}



__device__ void matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2, int total){
    if (c1!=r2){
    	return;
    }
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = r1/total;
    for (int row = (division*nth); row < (nth==(total-1) ? r1 : (division*nth+division)); row++) {
        for (int col = 0; col < c2; col++) {
            out[row*c2+col] = 0;
            for (int inner = 0; inner < c1; inner++) {
                out[row*c2+col] += a[row*c1+inner] * b[inner*c2+col]*1.0;
                // printf("%d %d :%.2f += %.2f\n", 
                //     row, col, out[row*c2+col]-a[row*c1+inner] * b[inner*c2+col]*1.0, a[row*c1+inner] * b[inner*c2+col]*1.0);
            }
        }
    }
}

__device__ void matrix_trans(float *out, float *a, int r, int c, int total){
    // This trans function can be boosted up by multi thread
    
 
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = c/total;
    for (int j=(division*nth);j<(nth==(total-1) ? c : (division*nth+division));j++){
        for (int i=0;i<r;i++){
            out[j*r+i]=a[i*c+j];
        }
    }
}

void matrix_print(float *a, int r, int c){
    for(int i=0;i<r;i++){
        for (int j=0;j<c;j++){
            printf("%.2f\t", a[i*c+j]);

        }
        printf("\n");
    }
}

__device__ float matrix_findmax(float *a, int r, int c, int total){
    // this function can be boosted by find max in row/col and compare them
    if (r==0 && c==0){
        return 0;
    }
    float max = a[0];
    for (int i = 0;i<r*c;i++){
        if (a[i]>max){
            max=a[i];
        }
    }
    return max;
}

void nmf_seed(float *out, float *a, int r, int c, int k){
    // setup generator
   	srand(time(NULL));
    for (int i=0;i<r*k;i++){
        out[i] = (float)(MATRIX_MAX*((rand()%100/100.0)));
    }

}


__device__ float matrix_distance(float *a, float *b, int r, int c, int total){
    float distance=0;
    for (int i=0;i<r*c;i++){
        distance += abs(a[i]-b[i])*abs(a[i]-b[i]);
    }
    
    return distance;
}


__device__ void matrix_elemproduct(float* out, float *a, float *b, int r, int c, int total){
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = r*c/total;
    // printf("Its %d/%d\n", total, total);
    for (int i=(division*nth);i<(nth==(total-1) ? r*c : (division*nth+division));i++){
            out[i]=1.0*a[i]*b[i];
    }
}


__device__ void matrix_elemdivison(float* out, float *a, float *b, int r ,int c, int total){
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = r*c/total;
    for (int i=(division*nth);i<(nth==(total-1) ? r*c : (division*nth+division));i++){
            if (b[i]==0){
            	return;
            }
            out[i]=1.0*a[i]/b[i];
            // printf("Now is %d\n", i);
    }
}


int main(int argc, char const *argv[])
{
    // omp_set_num_threads(8);
    /* code */
    // float a[12]={2, 3, 4, 1, 2, 10, 11, 32,
    //             3.1, 4.1, 31, 0.2};
    // float b[12]={1, 2, 1, 3, 1, 4, 1, 5,
    //             1, 6, 1, 7};


    // matrix for nmf. rxc (row, col)
    // int r = 300;
    // int c = 200;
    // int k = 150; 
    int r = 5;
    int c = 4;
    int k = 3;
    float B[20]={1, 2, 3, 4,
            5, 6, 7, 8,
            9, 10, 11, 12,
            13, 14, 15, 16,
            17, 18, 19, 20};


    

    // matrix generator
	srand(time(NULL));
    float A[r*c];
    for (int i=0;i<r;i++){
        for (int j=0;j<c;j++){
            A[i*c+j]=(float)(1.0*MATRIX_MAX*((float)(rand()%100/100.0)));
        }
    }
 



    // nmf using originall 
    float w[r*k];
    float h[k*c];


    // double time_begin=get_wall_time();
    for (int i=0;i<1;i++){
        nmfgpu(A, r, c, k, 500, w, h);
        printf("It's run: \t%d\n", i);
    }
    // double time_end=get_wall_time();
    // printf("Matrix w is: \n");
    // matrix_print(w, 5, 3);
    // printf("Matrix h is: \n");
    // matrix_print(h, 3, 4);

    printf("Matrix A is: \n");
    matrix_print(A, r, c);
    surface_matrix_multi(A, w, h, r, k, k, c);
    printf("Matrix w*h is: \n");
    matrix_print(A, r, c);


    return 0;
}
	.file	"tmpxft_001ff688_00000000-6_nmfgpu.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4142:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4142:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z20surface_matrix_multiPfS_S_iiii
	.type	_Z20surface_matrix_multiPfS_S_iiii, @function
_Z20surface_matrix_multiPfS_S_iiii:
.LFB4129:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE4129:
	.size	_Z20surface_matrix_multiPfS_S_iiii, .-_Z20surface_matrix_multiPfS_S_iiii
	.globl	_Z12matrix_multiPfS_S_iiiii
	.type	_Z12matrix_multiPfS_S_iiiii, @function
_Z12matrix_multiPfS_S_iiiii:
.LFB4131:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4131:
	.size	_Z12matrix_multiPfS_S_iiiii, .-_Z12matrix_multiPfS_S_iiiii
	.globl	_Z12matrix_transPfS_iii
	.type	_Z12matrix_transPfS_iii, @function
_Z12matrix_transPfS_iii:
.LFB4132:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4132:
	.size	_Z12matrix_transPfS_iii, .-_Z12matrix_transPfS_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%.2f\t"
.LC2:
	.string	"\n"
	.text
	.globl	_Z12matrix_printPfii
	.type	_Z12matrix_printPfii, @function
_Z12matrix_printPfii:
.LFB4133:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L8:
	cmpl	%r14d, %r13d
	jge	.L7
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %rcx
.L11:
	cmpl	%r15d, %ebx
	jle	.L14
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%r15,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	jmp	.L11
.L14:
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L8
.L7:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4133:
	.size	_Z12matrix_printPfii, .-_Z12matrix_printPfii
	.globl	_Z14matrix_findmaxPfiii
	.type	_Z14matrix_findmaxPfiii, @function
_Z14matrix_findmaxPfiii:
.LFB4134:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4134:
	.size	_Z14matrix_findmaxPfiii, .-_Z14matrix_findmaxPfiii
	.globl	_Z8nmf_seedPfS_iii
	.type	_Z8nmf_seedPfS_iii, @function
_Z8nmf_seedPfS_iii:
.LFB4135:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edx, %ebx
	imull	%r12d, %ebx
	xorl	%r12d, %r12d
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L18:
	cmpl	%r12d, %ebx
	jle	.L21
	call	rand@PLT
	movl	$100, %ecx
	cltd
	idivl	%ecx
	cvtsi2sdl	%edx, %xmm0
	divsd	.LC3(%rip), %xmm0
	mulsd	.LC4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 0(%rbp,%r12,4)
	incq	%r12
	jmp	.L18
.L21:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4135:
	.size	_Z8nmf_seedPfS_iii, .-_Z8nmf_seedPfS_iii
	.globl	_Z15matrix_distancePfS_iii
	.type	_Z15matrix_distancePfS_iii, @function
_Z15matrix_distancePfS_iii:
.LFB4136:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4136:
	.size	_Z15matrix_distancePfS_iii, .-_Z15matrix_distancePfS_iii
	.globl	_Z18matrix_elemproductPfS_S_iii
	.type	_Z18matrix_elemproductPfS_S_iii, @function
_Z18matrix_elemproductPfS_S_iii:
.LFB4137:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4137:
	.size	_Z18matrix_elemproductPfS_S_iii, .-_Z18matrix_elemproductPfS_S_iii
	.globl	_Z18matrix_elemdivisonPfS_S_iii
	.type	_Z18matrix_elemdivisonPfS_S_iii, @function
_Z18matrix_elemdivisonPfS_S_iii:
.LFB4805:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4805:
	.size	_Z18matrix_elemdivisonPfS_S_iii, .-_Z18matrix_elemdivisonPfS_S_iii
	.globl	_Z54__device_stub__Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_iPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.type	_Z54__device_stub__Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_iPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, @function
_Z54__device_stub__Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_iPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i:
.LFB4164:
	.cfi_startproc
	endbr64
	subq	$360, %rsp
	.cfi_def_cfa_offset 368
	movq	368(%rsp), %rax
	movq	%rdi, 120(%rsp)
	leaq	152(%rsp), %rdi
	movl	%esi, 116(%rsp)
	leaq	164(%rsp), %rsi
	movq	%rax, 88(%rsp)
	movq	376(%rsp), %rax
	movl	%edx, 112(%rsp)
	leaq	136(%rsp), %rdx
	movq	%rax, 80(%rsp)
	movq	384(%rsp), %rax
	movl	%ecx, 108(%rsp)
	leaq	144(%rsp), %rcx
	movq	%rax, 72(%rsp)
	movq	392(%rsp), %rax
	movl	%r8d, 104(%rsp)
	movq	%rax, 64(%rsp)
	movq	400(%rsp), %rax
	movq	%r9, 96(%rsp)
	movq	%rax, 56(%rsp)
	movq	408(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	416(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	424(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	432(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	440(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	448(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 344(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	116(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	108(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	456(%rsp), %rax
	movq	%rax, 336(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 152(%rsp)
	movl	$1, 160(%rsp)
	movq	%rax, 164(%rsp)
	movl	$1, 172(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	144(%rsp)
	.cfi_def_cfa_offset 376
	leaq	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i(%rip), %rdi
	pushq	144(%rsp)
	.cfi_def_cfa_offset 384
	movq	180(%rsp), %rcx
	movl	188(%rsp), %r8d
	movq	168(%rsp), %rsi
	movl	176(%rsp), %edx
	leaq	216(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 376
	popq	%rdx
	.cfi_def_cfa_offset 368
.L28:
	movq	344(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$360, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4164:
	.size	_Z54__device_stub__Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_iPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, .-_Z54__device_stub__Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_iPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.globl	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.type	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, @function
_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i:
.LFB4165:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_iPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.cfi_endproc
.LFE4165:
	.size	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, .-_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.globl	_Z6nmfgpuPfiiiiS_S_
	.type	_Z6nmfgpuPfiiiiS_S_, @function
_Z6nmfgpuPfiiiiS_S_:
.LFB4130:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$2305843009213693950, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	288(%rsp), %rax
	movq	%rdi, 40(%rsp)
	movl	%r8d, 76(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 48(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	movl	%esi, %eax
	imull	%edx, %eax
	movl	%esi, %edx
	imull	%ecx, %edx
	movl	%r12d, %ecx
	imull	%ebx, %ecx
	movslq	%eax, %r15
	sall	$2, %eax
	movl	%eax, 56(%rsp)
	movslq	%edx, %rax
	sall	$2, %edx
	movl	%edx, 68(%rsp)
	leal	0(,%rcx,4), %edx
	movl	%edx, 72(%rsp)
	cmpq	%rax, %r14
	jb	.L34
	salq	$2, %rax
	movl	%esi, %ebp
	movslq	%ecx, %r13
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	movq	%rax, 112(%rsp)
	cmpq	%r13, %r14
	jnb	.L35
.L34:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L40
	call	__cxa_throw_bad_array_new_length@PLT
.L35:
	leaq	0(,%r13,4), %rax
	movq	%rax, %r13
	movq	%rax, %rdi
	call	_Znam@PLT
	movq	%r13, %rdi
	movq	%rax, 120(%rsp)
	call	_Znam@PLT
	movq	%rax, 128(%rsp)
	movl	%ebx, %eax
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	_Znam@PLT
	movq	%r13, %rdi
	movq	%rax, 136(%rsp)
	call	_Znam@PLT
	movq	%r13, %rdi
	movq	%rax, 144(%rsp)
	call	_Znam@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 152(%rsp)
	call	_Znam@PLT
	movq	%rax, 160(%rsp)
	cmpq	%r15, %r14
	jb	.L34
	leaq	0(,%r15,4), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	_Znam@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 168(%rsp)
	call	_Znam@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 176(%rsp)
	call	_Znam@PLT
	movq	40(%rsp), %rsi
	movl	%ebx, %r8d
	movl	%r12d, %ecx
	movq	16(%rsp), %rdi
	movl	%ebp, %edx
	movq	%rax, 184(%rsp)
	call	_Z8nmf_seedPfS_iii
	movslq	%ebx, %rax
	movslq	%ebp, %rcx
	movq	48(%rsp), %rdi
	imulq	%rax, %rcx
	movq	16(%rsp), %rsi
	movslq	56(%rsp), %rdx
	movq	%rdx, 56(%rsp)
	salq	$2, %rcx
	rep movsb
	movq	%rdx, %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	72(%rsp), %r14
	leaq	104(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movslq	68(%rsp), %r15
	leaq	96(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	120(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	leaq	128(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	144(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	leaq	152(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	160(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rsi
	leaq	168(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	176(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	184(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rdx
	movq	40(%rsp), %rsi
	movabsq	$4294967297, %rax
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movq	%rax, 192(%rsp)
	addq	$3, %rax
	movl	$1, 200(%rsp)
	movq	%rax, 204(%rsp)
	movl	$1, 212(%rsp)
	call	cudaMemcpy@PLT
	movl	212(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	204(%rsp), %rdx
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	$4
	.cfi_def_cfa_offset 296
	movl	%ebx, %ecx
	movl	%r12d, %edx
	movl	%ebp, %esi
	pushq	192(%rsp)
	.cfi_def_cfa_offset 304
	pushq	192(%rsp)
	.cfi_def_cfa_offset 312
	pushq	192(%rsp)
	.cfi_def_cfa_offset 320
	pushq	192(%rsp)
	.cfi_def_cfa_offset 328
	pushq	192(%rsp)
	.cfi_def_cfa_offset 336
	pushq	192(%rsp)
	.cfi_def_cfa_offset 344
	pushq	192(%rsp)
	.cfi_def_cfa_offset 352
	pushq	192(%rsp)
	.cfi_def_cfa_offset 360
	pushq	192(%rsp)
	.cfi_def_cfa_offset 368
	pushq	192(%rsp)
	.cfi_def_cfa_offset 376
	pushq	192(%rsp)
	.cfi_def_cfa_offset 384
	movq	192(%rsp), %r9
	movl	172(%rsp), %r8d
	movq	184(%rsp), %rdi
	call	_Z54__device_stub__Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_iPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	addq	$96, %rsp
	.cfi_def_cfa_offset 288
.L37:
	movq	96(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movq	%r15, %rdx
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	160(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
	movq	176(%rsp), %rdi
	call	cudaFree@PLT
	movq	184(%rsp), %rdi
	call	cudaFree@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
.L40:
	call	__stack_chk_fail@PLT
.L38:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4130:
	.size	_Z6nmfgpuPfiiiiS_S_, .-_Z6nmfgpuPfiiiiS_S_
	.section	.rodata.str1.1
.LC6:
	.string	"It's run: \t%d\n"
.LC7:
	.string	"Matrix A is: \n"
.LC8:
	.string	"Matrix w*h is: \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4139:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%edi, %edi
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$216, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %r12
	call	time@PLT
	movq	%r12, %rbp
	movl	%eax, %edi
	call	srand@PLT
.L42:
	xorl	%ebx, %ebx
.L43:
	call	rand@PLT
	movl	$100, %ecx
	cltd
	idivl	%ecx
	cvtsi2sdl	%edx, %xmm0
	divsd	.LC3(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	mulss	.LC5(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	$4, %rbx
	jne	.L43
	addl	$4, %r13d
	addq	$16, %r12
	cmpl	$20, %r13d
	jne	.L42
	pushq	%rax
	.cfi_def_cfa_offset 264
	movl	$500, %r8d
	movl	$3, %ecx
	movq	%rbp, %rdi
	movl	$4, %edx
	movl	$5, %esi
	leaq	20(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 272
	leaq	76(%rsp), %r9
	call	_Z6nmfgpuPfiiiiS_S_
	popq	%rdx
	.cfi_def_cfa_offset 264
	leaq	.LC6(%rip), %rsi
	popq	%rcx
	.cfi_def_cfa_offset 256
	xorl	%edx, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4, %edx
	movl	$5, %esi
	movq	%rbp, %rdi
	call	_Z12matrix_printPfii
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4, %edx
	movl	$5, %esi
	movq	%rbp, %rdi
	call	_Z12matrix_printPfii
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$216, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4139:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4167:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4167:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1079574528
	.align 8
.LC4:
	.long	0
	.long	1076101120
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1092616192
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <vector>
#include <cstdlib>
#include <iostream>
#include <fstream>
#include <math.h>
#include <cstring>
#include <hip/hip_runtime.h>

#define ITER_LIMIT 500
#define MATRIX_MAX 10

using namespace std;


void nmfgpu(float *a, int r, int c, int k, int niters, float *w, float *h);
void matrix_print(float *a, int r, int c);
void nmf_seed(float *out, float *a, int r, int c, int k);
void surface_matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2);


__global__ void kernel(float *a, int r, int c, int k, int niters, float *w,
 float *h, float* wt, float* ht, float* wta, float* wtw, float* wtwh, float* hdiv, float* aht,
    	float* wh, float* whht, float* wdiv, int total);


__device__ void matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2, int total);
__device__ void matrix_trans(float *out, float *a, int r, int c, int total);
__device__ float matrix_findmax(float *a, int r, int c, int total);
__device__ float matrix_distance(float *a, float *b, int r, int c, int total);
__device__ void matrix_elemproduct(float* out, float *a, float *b, int r, int c, int total);
__device__ void matrix_elemdivison(float* out, float *a, float *b, int r ,int c, int total);


void surface_matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2){
    if (c1!=r2){
    	return;
    }
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = 0;
    int total = 1;
    int division = r1/total;
    for (int row = (division*total); row < (nth==(total-1) ? r1 : (division*nth+division)); row++) {
        for (int col = 0; col < c2; col++) {
            out[row*c2+col] = 0;
            for (int inner = 0; inner < c1; inner++) {
                out[row*c2+col] += a[row*c1+inner] * b[inner*c2+col]*1.0;
                // printf("%d %d :%.2f += %.2f\n", 
                //     row, col, out[row*c2+col]-a[row*c1+inner] * b[inner*c2+col]*1.0, a[row*c1+inner] * b[inner*c2+col]*1.0);
            }
        }
    }
}




void nmfgpu(float *a, int r, int c, int k, int niters, float *w, float *h){
	// setup cuda
    float *dm;
    float *dm_w;
    float *dm_h;
    int msize = r*c*sizeof(float);
    int msize_w = r*k*sizeof(float);
    int msize_h = k*c*sizeof(float);
    float *dm_wt = new float[r*k];
    float *dm_ht = new float[c*k];
    float *dm_wta = new float[k*c];
    float *dm_wtw = new float[k*k];
    float *dm_wtwh = new float[k*c];
    float *dm_hdiv = new float[k*c];
    float *dm_aht = new float[r*k];
    float *dm_wh = new float[r*c];
    float *dm_whht = new float[r*k];
    float *dm_wdiv = new float[r*k];
    nmf_seed(w, a, r, c, k);
    memcpy(h, w, sizeof(float)*r*k);
    hipMalloc((void**)&dm, msize);
    hipMalloc((void**)&dm_h, msize_h);
    hipMalloc((void**)&dm_w, msize_w);
    hipMalloc((void**)&dm_wt, r*k*sizeof(float));
    hipMalloc((void**)&dm_ht, c*k*sizeof(float));
    hipMalloc((void**)&dm_wta, k*c*sizeof(float));
    hipMalloc((void**)&dm_wtw, k*k*sizeof(float));
    hipMalloc((void**)&dm_wtwh, k*c*sizeof(float));
    hipMalloc((void**)&dm_hdiv, k*c*sizeof(float));
    hipMalloc((void**)&dm_aht, r*k*sizeof(float));
    hipMalloc((void**)&dm_wh, r*c*sizeof(float));
    hipMalloc((void**)&dm_whht,r*k*sizeof(float));
    hipMalloc((void**)&dm_wdiv,r*k*sizeof(float));

    int total = 4;
    dim3 dimGrid(1,1);
    dim3 dimBlock(total, 1, 1);

    hipMemcpy(dm, a, msize, hipMemcpyHostToDevice);
    kernel<<<dimGrid, dimBlock>>>(dm, r, c, k, niters , dm_w, dm_h,
    	dm_wt, dm_ht, dm_wta, dm_wtw, dm_wtwh, dm_hdiv, dm_aht,
    	dm_wh, dm_whht, dm_wdiv, total);

    hipMemcpy(w, dm_w, msize_w, hipMemcpyDeviceToHost);
    hipMemcpy(h, dm_h, msize_h, hipMemcpyDeviceToHost);
    hipFree(dm);
	hipFree(dm_h);
	hipFree(dm_w);
	hipFree(dm_wt);
	hipFree(dm_ht);
	hipFree(dm_wta);
	hipFree(dm_wtw);
	hipFree(dm_wtwh);
	hipFree(dm_hdiv);
	hipFree(dm_aht);
	hipFree(dm_wh);
	hipFree(dm_whht);
	hipFree(dm_wdiv);
}




__global__ void kernel(float *a, int r, int c, int k, int niters, float *w, float *h,
	float* wt, float* ht, float* wta, float* wtw, float* wtwh, float* hdiv, float* aht,
    	float* wh, float* whht, float* wdiv, int total){



    // calculate h
    // nominator
    // printf("NMF: 1\n");
    for (int i=0;i<niters;i++){
	    matrix_trans(wt, w, r, k, total);
	    matrix_multi(wta, wt, a, k, r, r, c, total);
	    // denominator
	    // printf("NMF: 2\n");
	    matrix_multi(wtw, wt, w, k, r, r, k, total);
	    matrix_multi(wtwh, wtw, h, k, k, k, c, total);
	    // new h
	    // printf("NMF: 3\n");
	    matrix_elemdivison(hdiv, wta, wtwh, k, c, total);
	    matrix_elemproduct(h, h, hdiv, k, c, total);
	    // calcualte w
	    // nominator
	    // printf("NMF: 4\n");
	    matrix_trans(ht, h, k, c, total);
	    matrix_multi(aht, a, ht, r, c, c, k, total);
	    // calculate w
	    // printf("NMF: 5\n");
	    matrix_multi(wh, w, h, r, k, k, c, total);
	    matrix_multi(whht, wh, ht, r, c, c, k, total);
	    matrix_elemdivison(wdiv, aht, whht, r, k, total);
	    // new w
	    // printf("NMF: 6\n");
	    matrix_elemproduct(w, w, wdiv, r, k, total);
    }
}



__device__ void matrix_multi(float *out, float *a, float *b, int r1, int c1, int r2, int c2, int total){
    if (c1!=r2){
    	return;
    }
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = r1/total;
    for (int row = (division*nth); row < (nth==(total-1) ? r1 : (division*nth+division)); row++) {
        for (int col = 0; col < c2; col++) {
            out[row*c2+col] = 0;
            for (int inner = 0; inner < c1; inner++) {
                out[row*c2+col] += a[row*c1+inner] * b[inner*c2+col]*1.0;
                // printf("%d %d :%.2f += %.2f\n", 
                //     row, col, out[row*c2+col]-a[row*c1+inner] * b[inner*c2+col]*1.0, a[row*c1+inner] * b[inner*c2+col]*1.0);
            }
        }
    }
}

__device__ void matrix_trans(float *out, float *a, int r, int c, int total){
    // This trans function can be boosted up by multi thread
    
 
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = c/total;
    for (int j=(division*nth);j<(nth==(total-1) ? c : (division*nth+division));j++){
        for (int i=0;i<r;i++){
            out[j*r+i]=a[i*c+j];
        }
    }
}

void matrix_print(float *a, int r, int c){
    for(int i=0;i<r;i++){
        for (int j=0;j<c;j++){
            printf("%.2f\t", a[i*c+j]);

        }
        printf("\n");
    }
}

__device__ float matrix_findmax(float *a, int r, int c, int total){
    // this function can be boosted by find max in row/col and compare them
    if (r==0 && c==0){
        return 0;
    }
    float max = a[0];
    for (int i = 0;i<r*c;i++){
        if (a[i]>max){
            max=a[i];
        }
    }
    return max;
}

void nmf_seed(float *out, float *a, int r, int c, int k){
    // setup generator
   	srand(time(NULL));
    for (int i=0;i<r*k;i++){
        out[i] = (float)(MATRIX_MAX*((rand()%100/100.0)));
    }

}


__device__ float matrix_distance(float *a, float *b, int r, int c, int total){
    float distance=0;
    for (int i=0;i<r*c;i++){
        distance += abs(a[i]-b[i])*abs(a[i]-b[i]);
    }
    
    return distance;
}


__device__ void matrix_elemproduct(float* out, float *a, float *b, int r, int c, int total){
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = r*c/total;
    // printf("Its %d/%d\n", total, total);
    for (int i=(division*nth);i<(nth==(total-1) ? r*c : (division*nth+division));i++){
            out[i]=1.0*a[i]*b[i];
    }
}


__device__ void matrix_elemdivison(float* out, float *a, float *b, int r ,int c, int total){
    // int total = omp_get_thread_num();
    // int total = omp_get_num_threads();
    int nth = threadIdx.x;
    int division = r*c/total;
    for (int i=(division*nth);i<(nth==(total-1) ? r*c : (division*nth+division));i++){
            if (b[i]==0){
            	return;
            }
            out[i]=1.0*a[i]/b[i];
            // printf("Now is %d\n", i);
    }
}


int main(int argc, char const *argv[])
{
    // omp_set_num_threads(8);
    /* code */
    // float a[12]={2, 3, 4, 1, 2, 10, 11, 32,
    //             3.1, 4.1, 31, 0.2};
    // float b[12]={1, 2, 1, 3, 1, 4, 1, 5,
    //             1, 6, 1, 7};


    // matrix for nmf. rxc (row, col)
    // int r = 300;
    // int c = 200;
    // int k = 150; 
    int r = 5;
    int c = 4;
    int k = 3;
    float B[20]={1, 2, 3, 4,
            5, 6, 7, 8,
            9, 10, 11, 12,
            13, 14, 15, 16,
            17, 18, 19, 20};


    

    // matrix generator
	srand(time(NULL));
    float A[r*c];
    for (int i=0;i<r;i++){
        for (int j=0;j<c;j++){
            A[i*c+j]=(float)(1.0*MATRIX_MAX*((float)(rand()%100/100.0)));
        }
    }
 



    // nmf using originall 
    float w[r*k];
    float h[k*c];


    // double time_begin=get_wall_time();
    for (int i=0;i<1;i++){
        nmfgpu(A, r, c, k, 500, w, h);
        printf("It's run: \t%d\n", i);
    }
    // double time_end=get_wall_time();
    // printf("Matrix w is: \n");
    // matrix_print(w, 5, 3);
    // printf("Matrix h is: \n");
    // matrix_print(h, 3, 4);

    printf("Matrix A is: \n");
    matrix_print(A, r, c);
    surface_matrix_multi(A, w, h, r, k, k, c);
    printf("Matrix w*h is: \n");
    matrix_print(A, r, c);


    return 0;
}
	.text
	.file	"nmfgpu.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z20surface_matrix_multiPfS_S_iiii # -- Begin function _Z20surface_matrix_multiPfS_S_iiii
	.type	_Z20surface_matrix_multiPfS_S_iiii,@function
_Z20surface_matrix_multiPfS_S_iiii:     # @_Z20surface_matrix_multiPfS_S_iiii
	.cfi_startproc
# %bb.0:                                # %.loopexit
	retq
.Lfunc_end0:
	.size	_Z20surface_matrix_multiPfS_S_iiii, .Lfunc_end0-_Z20surface_matrix_multiPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6nmfgpuPfiiiiS_S_             # -- Begin function _Z6nmfgpuPfiiiiS_S_
	.type	_Z6nmfgpuPfiiiiS_S_,@function
_Z6nmfgpuPfiiiiS_S_:                    # @_Z6nmfgpuPfiiiiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 136(%rsp)                  # 8-byte Spill
	movl	%r8d, 124(%rsp)                 # 4-byte Spill
	movl	%ecx, %ebx
	movq	%rdi, 176(%rsp)                 # 8-byte Spill
	movl	%edx, %eax
	movl	%esi, 4(%rsp)                   # 4-byte Spill
	imull	%esi, %eax
	cltq
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leaq	(,%rax,4), %rax
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	movl	%ecx, %eax
	imull	%esi, %eax
	movslq	%eax, %rcx
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	leaq	(,%rcx,4), %r14
	movq	%r14, 168(%rsp)                 # 8-byte Spill
	movl	%ebx, %eax
	movl	%edx, 116(%rsp)                 # 4-byte Spill
	imull	%edx, %eax
	movslq	%eax, %r12
	leaq	(,%r12,4), %rbp
	movq	%rbp, 160(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	movq	$-1, %r15
	cmovsq	%r15, %r14
	movq	%r14, %rdi
	callq	_Znam
	leaq	88(%rsp), %rcx
	movq	%rax, (%rcx)
	testl	%r12d, %r12d
	cmovsq	%r15, %rbp
	movq	%rbp, %rdi
	callq	_Znam
	leaq	80(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%rbp, %rdi
	callq	_Znam
	leaq	72(%rsp), %rcx
	movq	%rax, (%rcx)
	movl	%ebx, %r13d
	imull	%r13d, %r13d
	shlq	$2, %r13
	movq	%r13, %rdi
	callq	_Znam
	leaq	64(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%rbp, %rdi
	callq	_Znam
	leaq	56(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%rbp, %rdi
	movq	136(%rsp), %rbp                 # 8-byte Reload
	callq	_Znam
	leaq	48(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%r14, %rdi
	callq	_Znam
	leaq	40(%rsp), %rcx
	movq	%rax, (%rcx)
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	cmovnsq	128(%rsp), %r15                 # 8-byte Folded Reload
	movq	%r15, %rdi
	callq	_Znam
	leaq	32(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%r14, %rdi
	callq	_Znam
	leaq	24(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%r14, %rdi
	callq	_Znam
	leaq	16(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%rbp, %rdi
	movl	4(%rsp), %r14d                  # 4-byte Reload
	movl	%r14d, %edx
	movl	%ebx, %r8d
	callq	_Z8nmf_seedPfS_iii
	movslq	%r14d, %rax
	movl	%ebx, 120(%rsp)                 # 4-byte Spill
	movslq	%ebx, %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	240(%rsp), %rdi
	movq	%rbp, %rsi
	callq	memcpy@PLT
	movq	8(%rsp), %rsi                   # 8-byte Reload
	shlq	$34, %rsi
	sarq	$32, %rsi
	leaq	144(%rsp), %r14
	movq	%r14, %rdi
	movq	%rsi, %rbx
	callq	hipMalloc
	shlq	$34, %r12
	sarq	$32, %r12
	leaq	96(%rsp), %rdi
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	movq	%r12, %rsi
	movq	152(%rsp), %r12                 # 8-byte Reload
	callq	hipMalloc
	shlq	$34, %r12
	sarq	$32, %r12
	leaq	104(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movq	168(%rsp), %rbp                 # 8-byte Reload
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movq	160(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	128(%rsp), %rsi                 # 8-byte Reload
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	176(%rsp), %rsi                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	3(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	144(%rsp), %rdi
	movq	104(%rsp), %r9
	movl	4(%rsp), %esi                   # 4-byte Reload
	movl	116(%rsp), %edx                 # 4-byte Reload
	movl	120(%rsp), %ecx                 # 4-byte Reload
	movl	124(%rsp), %r8d                 # 4-byte Reload
	pushq	$4
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	136(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	152(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	184(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
.LBB1_2:
	movq	104(%rsp), %rsi
	movq	136(%rsp), %rdi                 # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	96(%rsp), %rsi
	movq	240(%rsp), %rdi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	144(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z6nmfgpuPfiiiiS_S_, .Lfunc_end1-_Z6nmfgpuPfiiiiS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8nmf_seedPfS_iii
.LCPI2_0:
	.quad	0x4059000000000000              # double 100
.LCPI2_1:
	.quad	0x4024000000000000              # double 10
	.text
	.globl	_Z8nmf_seedPfS_iii
	.type	_Z8nmf_seedPfS_iii,@function
_Z8nmf_seedPfS_iii:                     # @_Z8nmf_seedPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %r14d
	movl	%edx, %ebp
	movq	%rdi, %rbx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	imull	%r14d, %ebp
	testl	%ebp, %ebp
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z8nmf_seedPfS_iii, .Lfunc_end2-_Z8nmf_seedPfS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i # -- Begin function _Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.type	_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i,@function
_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i: # @_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, .Lfunc_end3-_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12matrix_printPfii            # -- Begin function _Z12matrix_printPfii
	.type	_Z12matrix_printPfii,@function
_Z12matrix_printPfii:                   # @_Z12matrix_printPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB4_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB4_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB4_4
.LBB4_5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB4_2
.LBB4_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z12matrix_printPfii, .Lfunc_end4-_Z12matrix_printPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x4059000000000000              # double 100
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI5_1:
	.long	0x41200000                      # float 10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	leaq	-112(%rbp), %r14
.LBB5_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
	xorl	%r15d, %r15d
.LBB5_2:                                #   Parent Loop BB5_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movsd	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	%xmm1, %xmm0
	movss	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	cvtsd2ss	%xmm0, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	$4, %r15
	jne	.LBB5_2
# %bb.3:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%rbx
	addq	$16, %r14
	cmpq	$5, %rbx
	jne	.LBB5_1
# %bb.4:                                # %.critedge
	leaq	-64(%rsp), %r9
	movq	%r9, %rsp
	movq	%rsp, %rax
	addq	$-48, %rax
	movq	%rax, %rsp
	subq	$8, %rsp
	leaq	-112(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$5, %esi
	movl	$4, %edx
	movl	$3, %ecx
	movl	$500, %r8d                      # imm = 0x1F4
	pushq	%rax
	callq	_Z6nmfgpuPfiiiiS_S_
	addq	$16, %rsp
	movl	$.L.str.2, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	movl	$5, %esi
	movl	$4, %edx
	callq	_Z12matrix_printPfii
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	movl	$5, %esi
	movl	$4, %edx
	callq	_Z12matrix_printPfii
	xorl	%eax, %eax
	leaq	-24(%rbp), %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i,@object # @_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.p2align	3, 0x0
_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i:
	.quad	_Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.size	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%.2f\t"
	.size	.L.str, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"It's run: \t%d\n"
	.size	.L.str.2, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i"
	.size	.L__unnamed_1, 41

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Matrix A is: "
	.size	.Lstr, 14

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Matrix w*h is: "
	.size	.Lstr.1, 16

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i ; -- Begin function _Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.globl	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
	.p2align	8
	.type	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i,@function
_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i: ; @_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
; %bb.0:
	s_load_b128 s[36:39], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s39, 1
	s_cbranch_scc1 .LBB0_78
; %bb.1:                                ; %.lr.ph
	s_clause 0x3
	s_load_b32 s33, s[0:1], 0x78
	s_load_b64 s[6:7], s[0:1], 0x0
	s_load_b512 s[8:23], s[0:1], 0x18
	s_load_b256 s[24:31], s[0:1], 0x58
	s_ashr_i32 s41, s38, 31
	v_mul_lo_u32 v2, v0, s36
	s_add_i32 s34, s38, s41
	v_mul_lo_u32 v20, v0, s38
	s_xor_b32 s34, s34, s41
	s_mul_i32 s5, s38, s36
	v_mul_lo_u32 v21, v0, s37
	s_mov_b32 s40, s38
	s_mov_b32 s35, 0
	v_mov_b32_e32 v42, 0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s4, s33, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s2, s33, s4
	s_xor_b32 s43, s41, s4
	s_xor_b32 s3, s2, s4
	s_mul_i32 s2, s38, s37
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s1, 0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v1
	s_mul_i32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s1, s0, s1
	s_add_i32 s46, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s0, s34, s46
	s_mul_i32 s1, s0, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s1, s34, s1
	s_add_i32 s34, s0, 1
	s_sub_i32 s42, s1, s3
	s_cmp_ge_u32 s1, s3
	s_cselect_b32 s0, s34, s0
	s_cselect_b32 s1, s42, s1
	s_add_i32 s34, s0, 1
	s_cmp_ge_u32 s1, s3
	s_mov_b32 s42, s37
	s_cselect_b32 s0, s34, s0
	s_add_i32 s1, s33, -1
	s_xor_b32 s0, s0, s43
	v_cmp_eq_u32_e32 vcc_lo, s1, v0
	s_sub_i32 s0, s0, s43
	s_cmp_gt_i32 s36, 0
	v_mul_lo_u32 v1, s0, v0
	s_cselect_b32 s33, -1, 0
	s_cmp_gt_i32 s37, 0
	v_mul_lo_u32 v35, v2, s0
	s_cselect_b32 s44, -1, 0
	s_cmp_gt_i32 s38, 0
	v_mul_lo_u32 v36, v20, s0
	s_cselect_b32 s45, -1, 0
	s_ashr_i32 s34, s2, 31
	v_add_nc_u32_e32 v3, s0, v1
	s_add_i32 s43, s2, s34
	s_xor_b32 s47, s34, s4
	s_xor_b32 s34, s43, s34
	v_ashrrev_i32_e32 v2, 31, v1
	s_mul_hi_u32 s0, s34, s46
	v_cndmask_b32_e64 v37, v3, s38, vcc_lo
	s_mul_i32 s43, s0, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s1, s34, s43
	s_add_i32 s34, s0, 1
	s_sub_i32 s43, s1, s3
	s_cmp_ge_u32 s1, s3
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_cselect_b32 s34, s34, s0
	s_cselect_b32 s0, s43, s1
	s_add_i32 s1, s34, 1
	s_cmp_ge_u32 s0, s3
	v_cmp_lt_i32_e64 s0, v1, v37
	s_cselect_b32 s1, s1, s34
	s_ashr_i32 s43, s37, 31
	s_xor_b32 s1, s1, s47
	s_add_i32 s34, s37, s43
	s_sub_i32 s47, s1, s47
	s_xor_b32 s34, s34, s43
	v_add_co_u32 v4, s1, s8, v4
	s_mul_hi_u32 s48, s34, s46
	v_add_co_ci_u32_e64 v5, s1, s9, v5, s1
	s_mul_i32 s1, s48, s3
	v_mul_lo_u32 v2, s47, v0
	s_sub_i32 s1, s34, s1
	s_xor_b32 s49, s43, s4
	s_add_i32 s34, s48, 1
	s_sub_i32 s50, s1, s3
	s_cmp_ge_u32 s1, s3
	s_cselect_b32 s34, s34, s48
	s_cselect_b32 s1, s50, s1
	v_add_nc_u32_e32 v6, s47, v2
	s_add_i32 s47, s34, 1
	s_cmp_ge_u32 s1, s3
	v_ashrrev_i32_e32 v3, 31, v2
	s_cselect_b32 s1, s47, s34
	s_ashr_i32 s34, s36, 31
	v_cndmask_b32_e64 v38, v6, s2, vcc_lo
	s_add_i32 s2, s36, s34
	s_xor_b32 s1, s1, s49
	s_xor_b32 s2, s2, s34
	v_lshlrev_b64 v[16:17], 2, v[2:3]
	s_mul_hi_u32 s47, s2, s46
	s_xor_b32 s34, s34, s4
	s_mul_i32 s48, s47, s3
	s_sub_i32 s49, s1, s49
	s_sub_i32 s2, s2, s48
	s_add_i32 s48, s47, 1
	s_sub_i32 s50, s2, s3
	s_cmp_ge_u32 s2, s3
	v_mul_lo_u32 v10, s49, v0
	s_cselect_b32 s47, s48, s47
	s_cselect_b32 s2, s50, s2
	s_add_i32 s48, s47, 1
	s_cmp_ge_u32 s2, s3
	v_add_co_u32 v6, s2, s20, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s21, v17, s2
	v_add_co_u32 v8, s2, s16, v16
	s_cselect_b32 s47, s48, s47
	s_ashr_i32 s48, s5, 31
	v_add_co_ci_u32_e64 v9, s2, s17, v17, s2
	s_add_i32 s2, s5, s48
	s_xor_b32 s4, s48, s4
	s_xor_b32 s2, s2, s48
	s_xor_b32 s47, s47, s34
	s_mul_hi_u32 s46, s2, s46
	s_sub_i32 s34, s47, s34
	s_mul_i32 s48, s46, s3
	s_add_i32 s47, s46, 1
	s_sub_i32 s2, s2, s48
	v_mul_lo_u32 v39, s34, v0
	s_sub_i32 s48, s2, s3
	s_cmp_ge_u32 s2, s3
	v_ashrrev_i32_e32 v11, 31, v10
	s_cselect_b32 s46, s47, s46
	s_cselect_b32 s2, s48, s2
	s_add_i32 s47, s46, 1
	s_cmp_ge_u32 s2, s3
	v_add_co_u32 v12, s2, s22, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s2, s23, v17, s2
	s_cselect_b32 s2, s47, s46
	v_add_nc_u32_e32 v3, s49, v10
	s_xor_b32 s2, s2, s4
	v_lshlrev_b64 v[18:19], 2, v[10:11]
	s_sub_i32 s3, s2, s4
	v_add_nc_u32_e32 v11, s34, v39
	v_mul_lo_u32 v14, s3, v0
	v_cndmask_b32_e64 v3, v3, s37, vcc_lo
	v_mul_lo_u32 v0, v20, s49
	v_mul_lo_u32 v41, v20, s34
	v_cndmask_b32_e64 v11, v11, s36, vcc_lo
	v_add_co_u32 v16, s2, s10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s2, s11, v17, s2
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_nc_u32_e32 v22, s3, v14
	v_add_co_u32 v18, s3, s10, v18
	v_add_co_ci_u32_e64 v19, s3, s11, v19, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[26:27], 2, v[14:15]
	v_cndmask_b32_e64 v40, v22, s5, vcc_lo
	v_mul_lo_u32 v15, v21, s34
	v_cmp_lt_i32_e64 s1, v2, v38
	v_cmp_lt_i32_e64 s2, v10, v3
	v_cmp_lt_i32_e64 s3, v39, v11
	v_add_co_u32 v20, vcc_lo, s28, v26
	v_add_co_ci_u32_e32 v21, vcc_lo, s29, v27, vcc_lo
	v_add_co_u32 v22, vcc_lo, s24, v26
	v_add_co_ci_u32_e32 v23, vcc_lo, s25, v27, vcc_lo
	v_add_co_u32 v24, vcc_lo, s30, v26
	v_add_co_ci_u32_e32 v25, vcc_lo, s31, v27, vcc_lo
	v_add_co_u32 v26, vcc_lo, s8, v26
	v_cmp_lt_i32_e64 s4, v14, v40
	v_add_co_ci_u32_e32 v27, vcc_lo, s9, v27, vcc_lo
	s_lshl_b64 s[22:23], s[40:41], 2
	s_lshl_b64 s[30:31], s[42:43], 2
	s_mov_b32 s40, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;     Child Loop BB0_9 Depth 2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_13 Depth 4
                                        ;     Child Loop BB0_17 Depth 2
                                        ;       Child Loop BB0_19 Depth 3
                                        ;         Child Loop BB0_21 Depth 4
                                        ;     Child Loop BB0_25 Depth 2
                                        ;       Child Loop BB0_27 Depth 3
                                        ;         Child Loop BB0_29 Depth 4
                                        ;     Child Loop BB0_34 Depth 2
                                        ;     Child Loop BB0_38 Depth 2
                                        ;     Child Loop BB0_41 Depth 2
                                        ;       Child Loop BB0_43 Depth 3
                                        ;     Child Loop BB0_47 Depth 2
                                        ;       Child Loop BB0_49 Depth 3
                                        ;         Child Loop BB0_51 Depth 4
                                        ;     Child Loop BB0_55 Depth 2
                                        ;       Child Loop BB0_57 Depth 3
                                        ;         Child Loop BB0_59 Depth 4
                                        ;     Child Loop BB0_63 Depth 2
                                        ;       Child Loop BB0_65 Depth 3
                                        ;         Child Loop BB0_67 Depth 4
                                        ;     Child Loop BB0_72 Depth 2
                                        ;     Child Loop BB0_76 Depth 2
	s_and_saveexec_b32 s41, s0
	s_cbranch_execz .LBB0_32
; %bb.3:                                ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v29, v5 :: v_dual_mov_b32 v28, v4
	v_dual_mov_b32 v30, v35 :: v_dual_mov_b32 v43, v1
	s_mov_b32 s34, 0
.LBB0_4:                                ; %.preheader.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s33
	s_cbranch_vccnz .LBB0_7
; %bb.5:                                ; %.lr.ph.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v31, 31, v30
	v_dual_mov_b32 v34, v29 :: v_dual_mov_b32 v33, v28
	s_mov_b32 s5, s36
	v_lshlrev_b64 v[31:32], 2, v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v31, vcc_lo, s12, v31
	v_add_co_ci_u32_e32 v32, vcc_lo, s13, v32, vcc_lo
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v44, v[33:34], off
	v_add_co_u32 v33, vcc_lo, v33, s22
	v_add_co_ci_u32_e32 v34, vcc_lo, s23, v34, vcc_lo
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[31:32], v44, off
	v_add_co_u32 v31, vcc_lo, v31, 4
	v_add_co_ci_u32_e32 v32, vcc_lo, 0, v32, vcc_lo
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %._crit_edge.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_co_u32 v28, s5, v28, 4
	v_add_nc_u32_e32 v30, s36, v30
	v_add_co_ci_u32_e64 v29, s5, 0, v29, s5
	v_cmp_ge_i32_e32 vcc_lo, v43, v37
	s_or_b32 s34, vcc_lo, s34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s34
	s_cbranch_execnz .LBB0_4
; %bb.8:                                ; %.preheader.i98.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s34
	v_dual_mov_b32 v28, v35 :: v_dual_mov_b32 v43, v1
	s_mov_b32 s5, 0
.LBB0_9:                                ; %.preheader.i98
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_13 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s44
	s_cbranch_vccnz .LBB0_15
; %bb.10:                               ; %.lr.ph41.i
                                        ;   in Loop: Header=BB0_9 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v29, 31, v28
	v_mul_lo_u32 v44, v43, s37
	s_mov_b32 s42, 0
	v_lshlrev_b64 v[29:30], 2, v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v29, vcc_lo, s12, v29
	v_add_co_ci_u32_e32 v30, vcc_lo, s13, v30, vcc_lo
.LBB0_11:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_9 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_13 Depth 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v31, s42, v44
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	v_add_co_u32 v31, vcc_lo, s16, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v32, vcc_lo, s17, v32, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s33
	global_store_b32 v[31:32], v42, off
	s_cbranch_vccnz .LBB0_14
; %bb.12:                               ; %.lr.ph.i100.preheader
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_dual_mov_b32 v45, 0 :: v_dual_mov_b32 v34, v30
	v_mov_b32_e32 v33, v29
	s_mov_b32 s34, s42
	s_mov_b32 s43, s36
.LBB0_13:                               ; %.lr.ph.i100
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_9 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b64 s[46:47], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s46, s6, s46
	s_addc_u32 s47, s7, s47
	global_load_b32 v46, v[33:34], off
	global_load_b32 v47, v42, s[46:47]
	v_add_co_u32 v33, vcc_lo, v33, 4
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	s_add_i32 s43, s43, -1
	s_add_i32 s34, s34, s37
	s_cmp_eq_u32 s43, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v45, v46, v47
	global_store_b32 v[31:32], v45, off
	s_cbranch_scc0 .LBB0_13
.LBB0_14:                               ; %._crit_edge.i99
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_add_i32 s42, s42, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s42, s37
	s_cbranch_scc0 .LBB0_11
.LBB0_15:                               ; %._crit_edge42.i
                                        ;   in Loop: Header=BB0_9 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_nc_u32_e32 v28, s36, v28
	v_cmp_ge_i32_e32 vcc_lo, v43, v37
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_9
; %bb.16:                               ; %.preheader.i103.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v28, v35 :: v_dual_mov_b32 v43, v1
	s_mov_b32 s5, 0
.LBB0_17:                               ; %.preheader.i103
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_19 Depth 3
                                        ;         Child Loop BB0_21 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s45
	s_cbranch_vccnz .LBB0_23
; %bb.18:                               ; %.lr.ph41.i106
                                        ;   in Loop: Header=BB0_17 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v29, 31, v28
	v_mul_lo_u32 v44, v43, s38
	s_mov_b32 s42, 0
	v_lshlrev_b64 v[29:30], 2, v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v29, vcc_lo, s12, v29
	v_add_co_ci_u32_e32 v30, vcc_lo, s13, v30, vcc_lo
.LBB0_19:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_17 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_21 Depth 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v31, s42, v44
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	v_add_co_u32 v31, vcc_lo, s18, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v32, vcc_lo, s19, v32, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s33
	global_store_b32 v[31:32], v42, off
	s_cbranch_vccnz .LBB0_22
; %bb.20:                               ; %.lr.ph.i110.preheader
                                        ;   in Loop: Header=BB0_19 Depth=3
	v_dual_mov_b32 v45, 0 :: v_dual_mov_b32 v34, v30
	v_mov_b32_e32 v33, v29
	s_mov_b32 s34, s42
	s_mov_b32 s43, s36
.LBB0_21:                               ; %.lr.ph.i110
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_17 Depth=2
                                        ;       Parent Loop BB0_19 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b64 s[46:47], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s46, s8, s46
	s_addc_u32 s47, s9, s47
	global_load_b32 v46, v[33:34], off
	global_load_b32 v47, v42, s[46:47]
	v_add_co_u32 v33, vcc_lo, v33, 4
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	s_add_i32 s43, s43, -1
	s_add_i32 s34, s34, s38
	s_cmp_eq_u32 s43, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v45, v46, v47
	global_store_b32 v[31:32], v45, off
	s_cbranch_scc0 .LBB0_21
.LBB0_22:                               ; %._crit_edge.i108
                                        ;   in Loop: Header=BB0_19 Depth=3
	s_add_i32 s42, s42, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s42, s38
	s_cbranch_scc0 .LBB0_19
.LBB0_23:                               ; %._crit_edge42.i105
                                        ;   in Loop: Header=BB0_17 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_nc_u32_e32 v28, s36, v28
	v_cmp_ge_i32_e32 vcc_lo, v43, v37
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_17
; %bb.24:                               ; %.preheader.i115.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v28, v36 :: v_dual_mov_b32 v43, v1
	s_mov_b32 s5, 0
.LBB0_25:                               ; %.preheader.i115
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_27 Depth 3
                                        ;         Child Loop BB0_29 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s44
	s_cbranch_vccnz .LBB0_31
; %bb.26:                               ; %.lr.ph41.i118
                                        ;   in Loop: Header=BB0_25 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v29, 31, v28
	v_mul_lo_u32 v44, v43, s37
	s_mov_b32 s42, 0
	v_lshlrev_b64 v[29:30], 2, v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v29, vcc_lo, s18, v29
	v_add_co_ci_u32_e32 v30, vcc_lo, s19, v30, vcc_lo
.LBB0_27:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_25 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_29 Depth 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v31, s42, v44
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	v_add_co_u32 v31, vcc_lo, s20, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v32, vcc_lo, s21, v32, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s45
	global_store_b32 v[31:32], v42, off
	s_cbranch_vccnz .LBB0_30
; %bb.28:                               ; %.lr.ph.i122.preheader
                                        ;   in Loop: Header=BB0_27 Depth=3
	v_dual_mov_b32 v45, 0 :: v_dual_mov_b32 v34, v30
	v_mov_b32_e32 v33, v29
	s_mov_b32 s34, s42
	s_mov_b32 s43, s38
.LBB0_29:                               ; %.lr.ph.i122
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_25 Depth=2
                                        ;       Parent Loop BB0_27 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b64 s[46:47], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s46, s10, s46
	s_addc_u32 s47, s11, s47
	global_load_b32 v46, v[33:34], off
	global_load_b32 v47, v42, s[46:47]
	v_add_co_u32 v33, vcc_lo, v33, 4
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	s_add_i32 s43, s43, -1
	s_add_i32 s34, s34, s37
	s_cmp_eq_u32 s43, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v45, v46, v47
	global_store_b32 v[31:32], v45, off
	s_cbranch_scc0 .LBB0_29
.LBB0_30:                               ; %._crit_edge.i120
                                        ;   in Loop: Header=BB0_27 Depth=3
	s_add_i32 s42, s42, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s42, s37
	s_cbranch_scc0 .LBB0_27
.LBB0_31:                               ; %._crit_edge42.i117
                                        ;   in Loop: Header=BB0_25 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_nc_u32_e32 v28, s38, v28
	v_cmp_ge_i32_e32 vcc_lo, v43, v37
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_25
.LBB0_32:                               ; %Flow377
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s41
	s_and_saveexec_b32 s34, s1
	s_cbranch_execz .LBB0_39
; %bb.33:                               ; %.lr.ph.i127.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v29, v13 :: v_dual_mov_b32 v28, v12
	v_dual_mov_b32 v31, v9 :: v_dual_mov_b32 v30, v8
	v_dual_mov_b32 v33, v7 :: v_dual_mov_b32 v32, v6
	v_mov_b32_e32 v34, v2
	s_mov_b32 s41, 0
                                        ; implicit-def: $sgpr42
.LBB0_34:                               ; %.lr.ph.i127
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v43, v[32:33], off
	s_or_b32 s42, s42, exec_lo
	s_mov_b32 s43, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0, v43
	s_cbranch_execz .LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_34 Depth=2
	global_load_b32 v44, v[30:31], off
	v_add_nc_u32_e32 v34, 1, v34
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v45, null, v43, v43, v44
	v_div_scale_f32 v48, vcc_lo, v44, v43, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v46, v45
	s_waitcnt_depctr 0xfff
	v_fma_f32 v47, -v45, v46, 1.0
	v_fmac_f32_e32 v46, v47, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v47, v48, v46
	v_fma_f32 v49, -v45, v47, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v47, v49, v46
	v_fma_f32 v45, -v45, v47, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v45, v45, v46, v47
	v_add_co_u32 v32, vcc_lo, v32, 4
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v33, vcc_lo
	v_div_fixup_f32 v43, v45, v43, v44
	v_add_co_u32 v30, vcc_lo, v30, 4
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v31, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v34, v38
	global_store_b32 v[28:29], v43, off
	v_add_co_u32 v28, s5, v28, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v29, s5, 0, v29, s5
	s_and_not1_b32 s5, s42, exec_lo
	s_and_b32 s42, vcc_lo, exec_lo
	s_or_b32 s42, s5, s42
.LBB0_36:                               ; %Flow360
                                        ;   in Loop: Header=BB0_34 Depth=2
	s_or_b32 exec_lo, exec_lo, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, exec_lo, s42
	s_or_b32 s41, s5, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_34
; %bb.37:                               ; %.lr.ph.i129.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s41
	v_dual_mov_b32 v29, v13 :: v_dual_mov_b32 v28, v12
	v_dual_mov_b32 v31, v17 :: v_dual_mov_b32 v30, v16
	v_mov_b32_e32 v32, v2
	s_mov_b32 s41, 0
.LBB0_38:                               ; %.lr.ph.i129
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v33, v[30:31], off
	global_load_b32 v34, v[28:29], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v33, v33, v34 :: v_dual_add_nc_u32 v32, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v32, v38
	global_store_b32 v[30:31], v33, off
	v_add_co_u32 v30, s5, v30, 4
	v_add_co_ci_u32_e64 v31, s5, 0, v31, s5
	v_add_co_u32 v28, s5, v28, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v29, s5, 0, v29, s5
	s_or_b32 s41, vcc_lo, s41
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_38
.LBB0_39:                               ; %Flow361
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s34
	s_and_saveexec_b32 s34, s2
	s_cbranch_execz .LBB0_45
; %bb.40:                               ; %.preheader.i131.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v29, v19 :: v_dual_mov_b32 v28, v18
	v_dual_mov_b32 v30, v0 :: v_dual_mov_b32 v43, v10
	s_mov_b32 s41, 0
.LBB0_41:                               ; %.preheader.i131
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_43 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s45
	s_cbranch_vccnz .LBB0_44
; %bb.42:                               ; %.lr.ph.i134
                                        ;   in Loop: Header=BB0_41 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v31, 31, v30
	v_dual_mov_b32 v34, v29 :: v_dual_mov_b32 v33, v28
	s_mov_b32 s5, s38
	v_lshlrev_b64 v[31:32], 2, v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v31, vcc_lo, s14, v31
	v_add_co_ci_u32_e32 v32, vcc_lo, s15, v32, vcc_lo
.LBB0_43:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_41 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v44, v[33:34], off
	v_add_co_u32 v33, vcc_lo, v33, s30
	v_add_co_ci_u32_e32 v34, vcc_lo, s31, v34, vcc_lo
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[31:32], v44, off
	v_add_co_u32 v31, vcc_lo, v31, 4
	v_add_co_ci_u32_e32 v32, vcc_lo, 0, v32, vcc_lo
	s_cbranch_scc0 .LBB0_43
.LBB0_44:                               ; %._crit_edge.i133
                                        ;   in Loop: Header=BB0_41 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_co_u32 v28, s5, v28, 4
	v_add_nc_u32_e32 v30, s38, v30
	v_add_co_ci_u32_e64 v29, s5, 0, v29, s5
	v_cmp_ge_i32_e32 vcc_lo, v43, v3
	s_or_b32 s41, vcc_lo, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_41
.LBB0_45:                               ; %Flow357
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s34
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_70
; %bb.46:                               ; %.preheader.i139.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v28, v15
	v_mov_b32_e32 v43, v39
	s_mov_b32 s41, 0
.LBB0_47:                               ; %.preheader.i139
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_49 Depth 3
                                        ;         Child Loop BB0_51 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s45
	s_cbranch_vccnz .LBB0_53
; %bb.48:                               ; %.lr.ph41.i142
                                        ;   in Loop: Header=BB0_47 Depth=2
	v_ashrrev_i32_e32 v29, 31, v28
	v_mul_lo_u32 v44, v43, s38
	s_mov_b32 s42, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[29:30], 2, v[28:29]
	v_add_co_u32 v29, vcc_lo, s6, v29
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v30, vcc_lo, s7, v30, vcc_lo
.LBB0_49:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_47 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_51 Depth 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v31, s42, v44
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	v_add_co_u32 v31, vcc_lo, s24, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v32, vcc_lo, s25, v32, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s44
	global_store_b32 v[31:32], v42, off
	s_cbranch_vccnz .LBB0_52
; %bb.50:                               ; %.lr.ph.i146.preheader
                                        ;   in Loop: Header=BB0_49 Depth=3
	v_dual_mov_b32 v45, 0 :: v_dual_mov_b32 v34, v30
	v_mov_b32_e32 v33, v29
	s_mov_b32 s34, s42
	s_mov_b32 s43, s37
.LBB0_51:                               ; %.lr.ph.i146
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_47 Depth=2
                                        ;       Parent Loop BB0_49 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b64 s[46:47], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s46, s14, s46
	s_addc_u32 s47, s15, s47
	global_load_b32 v46, v[33:34], off
	global_load_b32 v47, v42, s[46:47]
	v_add_co_u32 v33, vcc_lo, v33, 4
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	s_add_i32 s43, s43, -1
	s_add_i32 s34, s34, s38
	s_cmp_eq_u32 s43, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v45, v46, v47
	global_store_b32 v[31:32], v45, off
	s_cbranch_scc0 .LBB0_51
.LBB0_52:                               ; %._crit_edge.i144
                                        ;   in Loop: Header=BB0_49 Depth=3
	s_add_i32 s42, s42, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s42, s38
	s_cbranch_scc0 .LBB0_49
.LBB0_53:                               ; %._crit_edge42.i141
                                        ;   in Loop: Header=BB0_47 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_nc_u32_e32 v28, s37, v28
	v_cmp_ge_i32_e32 vcc_lo, v43, v11
	s_or_b32 s41, vcc_lo, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_47
; %bb.54:                               ; %.preheader.i151.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s41
	v_dual_mov_b32 v28, v41 :: v_dual_mov_b32 v43, v39
	s_mov_b32 s41, 0
.LBB0_55:                               ; %.preheader.i151
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_57 Depth 3
                                        ;         Child Loop BB0_59 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s44
	s_cbranch_vccnz .LBB0_61
; %bb.56:                               ; %.lr.ph41.i154
                                        ;   in Loop: Header=BB0_55 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v29, 31, v28
	v_mul_lo_u32 v44, v43, s37
	s_mov_b32 s42, 0
	v_lshlrev_b64 v[29:30], 2, v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v29, vcc_lo, s8, v29
	v_add_co_ci_u32_e32 v30, vcc_lo, s9, v30, vcc_lo
.LBB0_57:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_55 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_59 Depth 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v31, s42, v44
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	v_add_co_u32 v31, vcc_lo, s26, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v32, vcc_lo, s27, v32, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s45
	global_store_b32 v[31:32], v42, off
	s_cbranch_vccnz .LBB0_60
; %bb.58:                               ; %.lr.ph.i158.preheader
                                        ;   in Loop: Header=BB0_57 Depth=3
	v_dual_mov_b32 v45, 0 :: v_dual_mov_b32 v34, v30
	v_mov_b32_e32 v33, v29
	s_mov_b32 s34, s42
	s_mov_b32 s43, s38
.LBB0_59:                               ; %.lr.ph.i158
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_55 Depth=2
                                        ;       Parent Loop BB0_57 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b64 s[46:47], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s46, s10, s46
	s_addc_u32 s47, s11, s47
	global_load_b32 v46, v[33:34], off
	global_load_b32 v47, v42, s[46:47]
	v_add_co_u32 v33, vcc_lo, v33, 4
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	s_add_i32 s43, s43, -1
	s_add_i32 s34, s34, s37
	s_cmp_eq_u32 s43, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v45, v46, v47
	global_store_b32 v[31:32], v45, off
	s_cbranch_scc0 .LBB0_59
.LBB0_60:                               ; %._crit_edge.i156
                                        ;   in Loop: Header=BB0_57 Depth=3
	s_add_i32 s42, s42, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s42, s37
	s_cbranch_scc0 .LBB0_57
.LBB0_61:                               ; %._crit_edge42.i153
                                        ;   in Loop: Header=BB0_55 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_nc_u32_e32 v28, s38, v28
	v_cmp_ge_i32_e32 vcc_lo, v43, v11
	s_or_b32 s41, vcc_lo, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_55
; %bb.62:                               ; %.preheader.i163.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s41
	v_mov_b32_e32 v28, v15
	v_mov_b32_e32 v43, v39
	s_mov_b32 s41, 0
.LBB0_63:                               ; %.preheader.i163
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_65 Depth 3
                                        ;         Child Loop BB0_67 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s45
	s_cbranch_vccnz .LBB0_69
; %bb.64:                               ; %.lr.ph41.i166
                                        ;   in Loop: Header=BB0_63 Depth=2
	v_ashrrev_i32_e32 v29, 31, v28
	v_mul_lo_u32 v44, v43, s38
	s_mov_b32 s42, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[29:30], 2, v[28:29]
	v_add_co_u32 v29, vcc_lo, s26, v29
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v30, vcc_lo, s27, v30, vcc_lo
.LBB0_65:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_63 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_67 Depth 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v31, s42, v44
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	v_add_co_u32 v31, vcc_lo, s28, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v32, vcc_lo, s29, v32, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s44
	global_store_b32 v[31:32], v42, off
	s_cbranch_vccnz .LBB0_68
; %bb.66:                               ; %.lr.ph.i170.preheader
                                        ;   in Loop: Header=BB0_65 Depth=3
	v_dual_mov_b32 v45, 0 :: v_dual_mov_b32 v34, v30
	v_mov_b32_e32 v33, v29
	s_mov_b32 s34, s42
	s_mov_b32 s43, s37
.LBB0_67:                               ; %.lr.ph.i170
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_63 Depth=2
                                        ;       Parent Loop BB0_65 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b64 s[46:47], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s46, s14, s46
	s_addc_u32 s47, s15, s47
	global_load_b32 v46, v[33:34], off
	global_load_b32 v47, v42, s[46:47]
	v_add_co_u32 v33, vcc_lo, v33, 4
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	s_add_i32 s43, s43, -1
	s_add_i32 s34, s34, s38
	s_cmp_eq_u32 s43, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v45, v46, v47
	global_store_b32 v[31:32], v45, off
	s_cbranch_scc0 .LBB0_67
.LBB0_68:                               ; %._crit_edge.i168
                                        ;   in Loop: Header=BB0_65 Depth=3
	s_add_i32 s42, s42, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s42, s38
	s_cbranch_scc0 .LBB0_65
.LBB0_69:                               ; %._crit_edge42.i165
                                        ;   in Loop: Header=BB0_63 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v43, 1, v43
	v_add_nc_u32_e32 v28, s37, v28
	v_cmp_ge_i32_e32 vcc_lo, v43, v11
	s_or_b32 s41, vcc_lo, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_63
.LBB0_70:                               ; %Flow353
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s34, s4
	s_cbranch_execz .LBB0_77
; %bb.71:                               ; %.lr.ph.i175.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v29, v25 :: v_dual_mov_b32 v28, v24
	v_dual_mov_b32 v31, v23 :: v_dual_mov_b32 v30, v22
	v_dual_mov_b32 v33, v21 :: v_dual_mov_b32 v32, v20
	v_mov_b32_e32 v34, v14
	s_mov_b32 s41, 0
                                        ; implicit-def: $sgpr42
.LBB0_72:                               ; %.lr.ph.i175
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v43, v[32:33], off
	s_or_b32 s42, s42, exec_lo
	s_mov_b32 s43, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0, v43
	s_cbranch_execz .LBB0_74
; %bb.73:                               ;   in Loop: Header=BB0_72 Depth=2
	global_load_b32 v44, v[30:31], off
	v_add_nc_u32_e32 v34, 1, v34
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v45, null, v43, v43, v44
	v_div_scale_f32 v48, vcc_lo, v44, v43, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v46, v45
	s_waitcnt_depctr 0xfff
	v_fma_f32 v47, -v45, v46, 1.0
	v_fmac_f32_e32 v46, v47, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v47, v48, v46
	v_fma_f32 v49, -v45, v47, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v47, v49, v46
	v_fma_f32 v45, -v45, v47, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v45, v45, v46, v47
	v_add_co_u32 v32, vcc_lo, v32, 4
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v33, vcc_lo
	v_div_fixup_f32 v43, v45, v43, v44
	v_add_co_u32 v30, vcc_lo, v30, 4
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v31, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v34, v40
	global_store_b32 v[28:29], v43, off
	v_add_co_u32 v28, s5, v28, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v29, s5, 0, v29, s5
	s_and_not1_b32 s5, s42, exec_lo
	s_and_b32 s42, vcc_lo, exec_lo
	s_or_b32 s42, s5, s42
.LBB0_74:                               ; %Flow338
                                        ;   in Loop: Header=BB0_72 Depth=2
	s_or_b32 exec_lo, exec_lo, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, exec_lo, s42
	s_or_b32 s41, s5, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_72
; %bb.75:                               ; %.lr.ph.i179.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s41
	v_dual_mov_b32 v29, v25 :: v_dual_mov_b32 v28, v24
	v_dual_mov_b32 v31, v27 :: v_dual_mov_b32 v30, v26
	v_mov_b32_e32 v32, v14
	s_mov_b32 s41, 0
.LBB0_76:                               ; %.lr.ph.i179
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v33, v[30:31], off
	global_load_b32 v34, v[28:29], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v33, v33, v34 :: v_dual_add_nc_u32 v32, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v32, v40
	global_store_b32 v[30:31], v33, off
	v_add_co_u32 v30, s5, v30, 4
	v_add_co_ci_u32_e64 v31, s5, 0, v31, s5
	v_add_co_u32 v28, s5, v28, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v29, s5, 0, v29, s5
	s_or_b32 s41, vcc_lo, s41
	s_and_not1_b32 exec_lo, exec_lo, s41
	s_cbranch_execnz .LBB0_76
.LBB0_77:                               ; %Flow339
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s34
	s_add_i32 s40, s40, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s40, s39
	s_cbranch_scc0 .LBB0_2
.LBB0_78:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 124
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 50
		.amdhsa_next_free_sgpr 51
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i, .Lfunc_end0-_Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3784
; NumSgprs: 53
; NumVgprs: 50
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 53
; NumVGPRsForWavesPerEU: 50
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .offset:         120
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 124
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     53
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPfiiiiS_S_S_S_S_S_S_S_S_S_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     50
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
