#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <getopt.h>
#include <curand_kernel.h>
#include <stdlib.h>
#include <cuda.h>
#include <sys/time.h>
#include "RoeStep.cu"
#include<chrono>
#include<iostream>
using namespace std;
using namespace std::chrono;
int blocks_[20][2] = {{8,8},{16,16},{24,24},{32,32},{1,64},{1,128},{1,192},{1,256},{1,320},{1,384},{1,448},{1,512},{1,576},{1,640},{1,704},{1,768},{1,832},{1,896},{1,960},{1,1024}};
int matrices_[7][2] = {{240,240},{496,496},{784,784},{1016,1016},{1232,1232},{1680,1680},{2024,2024}};
int main(int argc, char **argv) {
cudaSetDevice(0);
char* p;int matrix_len=strtol(argv[1], &p, 10);
for(int matrix_looper=0;matrix_looper<matrix_len;matrix_looper++){
for(int block_looper=0;block_looper<20;block_looper++){
int XSIZE=matrices_[matrix_looper][0],YSIZE=matrices_[matrix_looper][1],BLOCKX=blocks_[block_looper][0],BLOCKY=blocks_[block_looper][1];
const int nbrOfGrids = 1;
double *d_u1 = NULL;
cudaMalloc(&d_u1, XSIZE*YSIZE);
double *d_u2 = NULL;
cudaMalloc(&d_u2, XSIZE*YSIZE);
double *d_u3 = NULL;
cudaMalloc(&d_u3, XSIZE*YSIZE);
const double *d_vol = NULL;
cudaMalloc(&d_vol, XSIZE*YSIZE);
double *d_f1 = NULL;
cudaMalloc(&d_f1, XSIZE*YSIZE);
double *d_f2 = NULL;
cudaMalloc(&d_f2, XSIZE*YSIZE);
double *d_f3 = NULL;
cudaMalloc(&d_f3, XSIZE*YSIZE);
const double *d_tau = NULL;
cudaMalloc(&d_tau, XSIZE*YSIZE);
const double *d_h = NULL;
cudaMalloc(&d_h, XSIZE*YSIZE);
const double *d_gama = NULL;
cudaMalloc(&d_gama, XSIZE*YSIZE);
double *w1 = NULL;
cudaMalloc(&w1, XSIZE*YSIZE);
double *w2 = NULL;
cudaMalloc(&w2, XSIZE*YSIZE);
double *w3 = NULL;
cudaMalloc(&w3, XSIZE*YSIZE);
double *w4 = NULL;
cudaMalloc(&w4, XSIZE*YSIZE);
double *fc1 = NULL;
cudaMalloc(&fc1, XSIZE*YSIZE);
double *fc2 = NULL;
cudaMalloc(&fc2, XSIZE*YSIZE);
double *fc3 = NULL;
cudaMalloc(&fc3, XSIZE*YSIZE);
double *fr1 = NULL;
cudaMalloc(&fr1, XSIZE*YSIZE);
double *fr2 = NULL;
cudaMalloc(&fr2, XSIZE*YSIZE);
double *fr3 = NULL;
cudaMalloc(&fr3, XSIZE*YSIZE);
double *fl1 = NULL;
cudaMalloc(&fl1, XSIZE*YSIZE);
double *fl2 = NULL;
cudaMalloc(&fl2, XSIZE*YSIZE);
double *fl3 = NULL;
cudaMalloc(&fl3, XSIZE*YSIZE);
double *fludif1 = NULL;
cudaMalloc(&fludif1, XSIZE*YSIZE);
double *fludif2 = NULL;
cudaMalloc(&fludif2, XSIZE*YSIZE);
double *fludif3 = NULL;
cudaMalloc(&fludif3, XSIZE*YSIZE);
double *rsumr = NULL;
cudaMalloc(&rsumr, XSIZE*YSIZE);
double *utilde = NULL;
cudaMalloc(&utilde, XSIZE*YSIZE);
double *htilde = NULL;
cudaMalloc(&htilde, XSIZE*YSIZE);
double *uvdif = NULL;
cudaMalloc(&uvdif, XSIZE*YSIZE);
double *absvt = NULL;
cudaMalloc(&absvt, XSIZE*YSIZE);
double *ssc = NULL;
cudaMalloc(&ssc, XSIZE*YSIZE);
double *vsc = NULL;
cudaMalloc(&vsc, XSIZE*YSIZE);
double *eiglam1 = NULL;
cudaMalloc(&eiglam1, XSIZE*YSIZE);
double *eiglam2 = NULL;
cudaMalloc(&eiglam2, XSIZE*YSIZE);
double *eiglam3 = NULL;
cudaMalloc(&eiglam3, XSIZE*YSIZE);
double *sgn1 = NULL;
cudaMalloc(&sgn1, XSIZE*YSIZE);
double *sgn2 = NULL;
cudaMalloc(&sgn2, XSIZE*YSIZE);
double *sgn3 = NULL;
cudaMalloc(&sgn3, XSIZE*YSIZE);
int *isb1 = NULL;
cudaMalloc(&isb1, XSIZE*YSIZE);
int *isb2 = NULL;
cudaMalloc(&isb2, XSIZE*YSIZE);
int *isb3 = NULL;
cudaMalloc(&isb3, XSIZE*YSIZE);
double *a1 = NULL;
cudaMalloc(&a1, XSIZE*YSIZE);
double *a2 = NULL;
cudaMalloc(&a2, XSIZE*YSIZE);
double *a3 = NULL;
cudaMalloc(&a3, XSIZE*YSIZE);
double *ac11 = NULL;
cudaMalloc(&ac11, XSIZE*YSIZE);
double *ac12 = NULL;
cudaMalloc(&ac12, XSIZE*YSIZE);
double *ac13 = NULL;
cudaMalloc(&ac13, XSIZE*YSIZE);
double *ac21 = NULL;
cudaMalloc(&ac21, XSIZE*YSIZE);
double *ac22 = NULL;
cudaMalloc(&ac22, XSIZE*YSIZE);
double *ac23 = NULL;
cudaMalloc(&ac23, XSIZE*YSIZE);
int iXSIZE= XSIZE;
int iYSIZE= YSIZE;
while(iXSIZE%BLOCKX!=0)
{
iXSIZE++;
}
while(iYSIZE%BLOCKY!=0)
{
iYSIZE++;
}
dim3 gridBlock(iXSIZE/BLOCKX, iYSIZE/BLOCKY);
dim3 threadBlock(BLOCKX, BLOCKY);
cudaFree(0);
RoeStep<<<gridBlock,threadBlock>>>(nbrOfGrids,d_u1,d_u2,d_u3,d_vol,d_f1,d_f2,d_f3,d_tau,d_h,d_gama,w1,w2,w3,w4,fc1,fc2,fc3,fr1,fr2,fr3,fl1,fl2,fl3,fludif1,fludif2,fludif3,rsumr,utilde,htilde,uvdif,absvt,ssc,vsc,eiglam1,eiglam2,eiglam3,sgn1,sgn2,sgn3,isb1,isb2,isb3,a1,a2,a3,ac11,ac12,ac13,ac21,ac22,ac23);
cudaDeviceSynchronize();
for (int loop_counter = 0; loop_counter < 10; ++loop_counter) {
RoeStep<<<gridBlock,threadBlock>>>(nbrOfGrids,d_u1,d_u2,d_u3,d_vol,d_f1,d_f2,d_f3,d_tau,d_h,d_gama,w1,w2,w3,w4,fc1,fc2,fc3,fr1,fr2,fr3,fl1,fl2,fl3,fludif1,fludif2,fludif3,rsumr,utilde,htilde,uvdif,absvt,ssc,vsc,eiglam1,eiglam2,eiglam3,sgn1,sgn2,sgn3,isb1,isb2,isb3,a1,a2,a3,ac11,ac12,ac13,ac21,ac22,ac23);
}
auto start = steady_clock::now();
for (int loop_counter = 0; loop_counter < 1000; loop_counter++) {
RoeStep<<<gridBlock,threadBlock>>>(nbrOfGrids,d_u1,d_u2,d_u3,d_vol,d_f1,d_f2,d_f3,d_tau,d_h,d_gama,w1,w2,w3,w4,fc1,fc2,fc3,fr1,fr2,fr3,fl1,fl2,fl3,fludif1,fludif2,fludif3,rsumr,utilde,htilde,uvdif,absvt,ssc,vsc,eiglam1,eiglam2,eiglam3,sgn1,sgn2,sgn3,isb1,isb2,isb3,a1,a2,a3,ac11,ac12,ac13,ac21,ac22,ac23);
}
auto end = steady_clock::now();
auto usecs = duration_cast<duration<float, microseconds::period> >(end - start);
cout <<'['<<usecs.count()<<','<<'('<<BLOCKX<<','<<BLOCKY<<')' << ','<<'('<<XSIZE<<','<<YSIZE<<')'<<']' << endl;
}
}}
	.file	"tmpxft_002e3ac0_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3955:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3955:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0, @function
_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0:
.LFB4663:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4663:
	.size	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0, .-_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	.globl	_Z19d_boundaryConditioniPdS_S_
	.type	_Z19d_boundaryConditioniPdS_S_, @function
_Z19d_boundaryConditioniPdS_S_:
.LFB2241:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2241:
	.size	_Z19d_boundaryConditioniPdS_S_, .-_Z19d_boundaryConditioniPdS_S_
	.globl	_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.type	_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, @function
_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_:
.LFB3977:
	.cfi_startproc
	endbr64
	subq	$920, %rsp
	.cfi_def_cfa_offset 928
	movq	928(%rsp), %rax
	movl	%edi, 412(%rsp)
	leaq	440(%rsp), %rdi
	movq	%rsi, 400(%rsp)
	leaq	452(%rsp), %rsi
	movq	%rax, 360(%rsp)
	movq	936(%rsp), %rax
	movq	%rdx, 392(%rsp)
	leaq	424(%rsp), %rdx
	movq	%rax, 352(%rsp)
	movq	944(%rsp), %rax
	movq	%rcx, 384(%rsp)
	leaq	432(%rsp), %rcx
	movq	%rax, 344(%rsp)
	movq	952(%rsp), %rax
	movq	%r8, 376(%rsp)
	movq	%rax, 336(%rsp)
	movq	960(%rsp), %rax
	movq	%r9, 368(%rsp)
	movq	%rax, 328(%rsp)
	movq	968(%rsp), %rax
	movq	%rax, 320(%rsp)
	movq	976(%rsp), %rax
	movq	%rax, 312(%rsp)
	movq	984(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	992(%rsp), %rax
	movq	%rax, 296(%rsp)
	movq	1000(%rsp), %rax
	movq	%rax, 288(%rsp)
	movq	1008(%rsp), %rax
	movq	%rax, 280(%rsp)
	movq	1016(%rsp), %rax
	movq	%rax, 272(%rsp)
	movq	1024(%rsp), %rax
	movq	%rax, 264(%rsp)
	movq	1032(%rsp), %rax
	movq	%rax, 256(%rsp)
	movq	1040(%rsp), %rax
	movq	%rax, 248(%rsp)
	movq	1048(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	1056(%rsp), %rax
	movq	%rax, 232(%rsp)
	movq	1064(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	1072(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	1080(%rsp), %rax
	movq	%rax, 208(%rsp)
	movq	1088(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	1096(%rsp), %rax
	movq	%rax, 192(%rsp)
	movq	1104(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	1112(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	1120(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	1128(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	1136(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	1144(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	1152(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	1160(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	1168(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	1176(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	1184(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	1192(%rsp), %rax
	movq	%rax, 96(%rsp)
	movq	1200(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	1208(%rsp), %rax
	movq	%rax, 80(%rsp)
	movq	1216(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	1224(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	1232(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	1240(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	1248(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	1256(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	1264(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	1272(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	1280(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	1288(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 904(%rsp)
	xorl	%eax, %eax
	leaq	412(%rsp), %rax
	movq	%rax, 488(%rsp)
	leaq	400(%rsp), %rax
	movq	%rax, 496(%rsp)
	leaq	392(%rsp), %rax
	movq	%rax, 504(%rsp)
	leaq	384(%rsp), %rax
	movq	%rax, 512(%rsp)
	leaq	376(%rsp), %rax
	movq	%rax, 520(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 528(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 536(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 544(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 552(%rsp)
	leaq	336(%rsp), %rax
	movq	%rax, 560(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 568(%rsp)
	leaq	320(%rsp), %rax
	movq	%rax, 576(%rsp)
	leaq	312(%rsp), %rax
	movq	%rax, 584(%rsp)
	leaq	304(%rsp), %rax
	movq	%rax, 592(%rsp)
	leaq	296(%rsp), %rax
	movq	%rax, 600(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 608(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 616(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 624(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 632(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 640(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 648(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 656(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 664(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 672(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 680(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 688(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 696(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 704(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 712(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 720(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 728(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 736(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 744(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 752(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 760(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 768(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 776(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 784(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 792(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 800(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 808(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 816(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 824(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 832(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 840(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 848(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 856(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 864(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 872(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 880(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 888(%rsp)
	movq	%rsp, %rax
	movq	%rax, 896(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 440(%rsp)
	movl	$1, 448(%rsp)
	movq	%rax, 452(%rsp)
	movl	$1, 460(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	432(%rsp)
	.cfi_def_cfa_offset 936
	leaq	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_(%rip), %rdi
	pushq	432(%rsp)
	.cfi_def_cfa_offset 944
	movq	468(%rsp), %rcx
	movl	476(%rsp), %r8d
	movq	456(%rsp), %rsi
	movl	464(%rsp), %edx
	leaq	504(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 936
	popq	%rdx
	.cfi_def_cfa_offset 928
.L5:
	movq	904(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$920, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3977:
	.size	_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, .-_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.globl	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.type	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, @function
_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_:
.LFB3978:
	.cfi_startproc
	endbr64
	jmp	_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.cfi_endproc
.LFE3978:
	.size	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, .-_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3949:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$472, %rsp
	.cfi_def_cfa_offset 528
	movq	%fs:40, %rax
	movq	%rax, 456(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	movq	8(%rbx), %rdi
	leaq	16(%rsp), %rsi
	xorl	%ebx, %ebx
	movl	$10, %edx
	call	__isoc23_strtol@PLT
	movl	%eax, 12(%rsp)
.L12:
	cmpl	%ebx, 12(%rsp)
	jle	.L29
	leaq	blocks_(%rip), %rbp
.L22:
	leaq	matrices_(%rip), %rax
	leaq	24(%rsp), %rdi
	movl	0(%rbp), %r13d
	movl	4(%rbp), %r12d
	movl	(%rax,%rbx,8), %eax
	movl	%eax, 4(%rsp)
	leaq	4+matrices_(%rip), %rax
	movl	4(%rsp), %r14d
	movl	(%rax,%rbx,8), %r15d
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	imull	%r15d, %r14d
	movslq	%r14d, %r14
	movq	%r14, %rsi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edx, %edx
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rdx, 32(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%ecx, %ecx
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rcx, 40(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%esi, %esi
	leaq	48(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	movq	%r14, %rsi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edi, %edi
	movq	%r14, %rsi
	movq	%rdi, 56(%rsp)
	leaq	56(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r8d, %r8d
	leaq	64(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r8, 64(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r9d, %r9d
	leaq	72(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r9, 72(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r10d, %r10d
	leaq	80(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r10, 80(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r11d, %r11d
	leaq	88(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r11, 88(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	96(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 96(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	104(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 104(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	112(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 112(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	120(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 120(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	128(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 128(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edx, %edx
	leaq	136(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rdx, 136(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%ecx, %ecx
	leaq	144(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rcx, 144(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%esi, %esi
	leaq	152(%rsp), %rdi
	movq	%rsi, 152(%rsp)
	movq	%r14, %rsi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edi, %edi
	movq	%r14, %rsi
	movq	%rdi, 160(%rsp)
	leaq	160(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r8d, %r8d
	leaq	168(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r8, 168(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r9d, %r9d
	leaq	176(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r9, 176(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r10d, %r10d
	leaq	184(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r10, 184(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r11d, %r11d
	leaq	192(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r11, 192(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	200(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 200(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	208(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 208(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	216(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 216(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	224(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 224(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	232(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 232(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edx, %edx
	leaq	240(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rdx, 240(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%ecx, %ecx
	leaq	248(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rcx, 248(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%esi, %esi
	leaq	256(%rsp), %rdi
	movq	%rsi, 256(%rsp)
	movq	%r14, %rsi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edi, %edi
	movq	%r14, %rsi
	movq	%rdi, 264(%rsp)
	leaq	264(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r8d, %r8d
	leaq	272(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r8, 272(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r9d, %r9d
	leaq	280(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r9, 280(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r10d, %r10d
	leaq	288(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r10, 288(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r11d, %r11d
	leaq	296(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r11, 296(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	304(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 304(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	312(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 312(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	320(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 320(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	328(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 328(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	336(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 336(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edx, %edx
	leaq	344(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rdx, 344(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%ecx, %ecx
	leaq	352(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rcx, 352(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%esi, %esi
	leaq	360(%rsp), %rdi
	movq	%rsi, 360(%rsp)
	movq	%r14, %rsi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edi, %edi
	movq	%r14, %rsi
	movq	%rdi, 368(%rsp)
	leaq	368(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r8d, %r8d
	leaq	376(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r8, 376(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r9d, %r9d
	leaq	384(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r9, 384(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r10d, %r10d
	leaq	392(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r10, 392(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r11d, %r11d
	leaq	400(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r11, 400(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	408(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 408(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	416(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 416(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	424(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 424(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	movl	4(%rsp), %ecx
.L13:
	movl	%ecx, %eax
	cltd
	idivl	%r13d
	movl	%eax, %esi
	testl	%edx, %edx
	je	.L30
	incl	%ecx
	jmp	.L13
.L30:
	movl	%r15d, %ecx
.L15:
	movl	%ecx, %eax
	cltd
	idivl	%r12d
	testl	%edx, %edx
	je	.L31
	incl	%ecx
	jmp	.L15
.L31:
	xorl	%edi, %edi
	movl	%esi, 432(%rsp)
	movl	%eax, 436(%rsp)
	movl	$1, 440(%rsp)
	movl	%r13d, 444(%rsp)
	movl	%r12d, 448(%rsp)
	movl	$1, 452(%rsp)
	call	cudaFree@PLT
	movl	452(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	444(%rsp), %rdx
	movq	432(%rsp), %rdi
	movl	440(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	424(%rsp)
	.cfi_def_cfa_offset 536
	movl	$1, %edi
	pushq	424(%rsp)
	.cfi_def_cfa_offset 544
	pushq	424(%rsp)
	.cfi_def_cfa_offset 552
	pushq	424(%rsp)
	.cfi_def_cfa_offset 560
	pushq	424(%rsp)
	.cfi_def_cfa_offset 568
	pushq	424(%rsp)
	.cfi_def_cfa_offset 576
	pushq	424(%rsp)
	.cfi_def_cfa_offset 584
	pushq	424(%rsp)
	.cfi_def_cfa_offset 592
	pushq	424(%rsp)
	.cfi_def_cfa_offset 600
	pushq	424(%rsp)
	.cfi_def_cfa_offset 608
	pushq	424(%rsp)
	.cfi_def_cfa_offset 616
	pushq	424(%rsp)
	.cfi_def_cfa_offset 624
	pushq	424(%rsp)
	.cfi_def_cfa_offset 632
	pushq	424(%rsp)
	.cfi_def_cfa_offset 640
	pushq	424(%rsp)
	.cfi_def_cfa_offset 648
	pushq	424(%rsp)
	.cfi_def_cfa_offset 656
	pushq	424(%rsp)
	.cfi_def_cfa_offset 664
	pushq	424(%rsp)
	.cfi_def_cfa_offset 672
	pushq	424(%rsp)
	.cfi_def_cfa_offset 680
	pushq	424(%rsp)
	.cfi_def_cfa_offset 688
	pushq	424(%rsp)
	.cfi_def_cfa_offset 696
	pushq	424(%rsp)
	.cfi_def_cfa_offset 704
	pushq	424(%rsp)
	.cfi_def_cfa_offset 712
	pushq	424(%rsp)
	.cfi_def_cfa_offset 720
	pushq	424(%rsp)
	.cfi_def_cfa_offset 728
	pushq	424(%rsp)
	.cfi_def_cfa_offset 736
	pushq	424(%rsp)
	.cfi_def_cfa_offset 744
	pushq	424(%rsp)
	.cfi_def_cfa_offset 752
	pushq	424(%rsp)
	.cfi_def_cfa_offset 760
	pushq	424(%rsp)
	.cfi_def_cfa_offset 768
	pushq	424(%rsp)
	.cfi_def_cfa_offset 776
	pushq	424(%rsp)
	.cfi_def_cfa_offset 784
	pushq	424(%rsp)
	.cfi_def_cfa_offset 792
	pushq	424(%rsp)
	.cfi_def_cfa_offset 800
	pushq	424(%rsp)
	.cfi_def_cfa_offset 808
	pushq	424(%rsp)
	.cfi_def_cfa_offset 816
	pushq	424(%rsp)
	.cfi_def_cfa_offset 824
	pushq	424(%rsp)
	.cfi_def_cfa_offset 832
	pushq	424(%rsp)
	.cfi_def_cfa_offset 840
	pushq	424(%rsp)
	.cfi_def_cfa_offset 848
	pushq	424(%rsp)
	.cfi_def_cfa_offset 856
	pushq	424(%rsp)
	.cfi_def_cfa_offset 864
	pushq	424(%rsp)
	.cfi_def_cfa_offset 872
	pushq	424(%rsp)
	.cfi_def_cfa_offset 880
	pushq	424(%rsp)
	.cfi_def_cfa_offset 888
	pushq	424(%rsp)
	.cfi_def_cfa_offset 896
	movq	424(%rsp), %r9
	movq	416(%rsp), %r8
	movq	408(%rsp), %rcx
	movq	400(%rsp), %rdx
	movq	392(%rsp), %rsi
	call	_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	addq	$368, %rsp
	.cfi_def_cfa_offset 528
.L17:
	call	cudaDeviceSynchronize@PLT
	movl	$10, %r14d
.L19:
	movl	452(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	444(%rsp), %rdx
	movq	432(%rsp), %rdi
	movl	440(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	424(%rsp)
	.cfi_def_cfa_offset 536
	movl	$1, %edi
	pushq	424(%rsp)
	.cfi_def_cfa_offset 544
	pushq	424(%rsp)
	.cfi_def_cfa_offset 552
	pushq	424(%rsp)
	.cfi_def_cfa_offset 560
	pushq	424(%rsp)
	.cfi_def_cfa_offset 568
	pushq	424(%rsp)
	.cfi_def_cfa_offset 576
	pushq	424(%rsp)
	.cfi_def_cfa_offset 584
	pushq	424(%rsp)
	.cfi_def_cfa_offset 592
	pushq	424(%rsp)
	.cfi_def_cfa_offset 600
	pushq	424(%rsp)
	.cfi_def_cfa_offset 608
	pushq	424(%rsp)
	.cfi_def_cfa_offset 616
	pushq	424(%rsp)
	.cfi_def_cfa_offset 624
	pushq	424(%rsp)
	.cfi_def_cfa_offset 632
	pushq	424(%rsp)
	.cfi_def_cfa_offset 640
	pushq	424(%rsp)
	.cfi_def_cfa_offset 648
	pushq	424(%rsp)
	.cfi_def_cfa_offset 656
	pushq	424(%rsp)
	.cfi_def_cfa_offset 664
	pushq	424(%rsp)
	.cfi_def_cfa_offset 672
	pushq	424(%rsp)
	.cfi_def_cfa_offset 680
	pushq	424(%rsp)
	.cfi_def_cfa_offset 688
	pushq	424(%rsp)
	.cfi_def_cfa_offset 696
	pushq	424(%rsp)
	.cfi_def_cfa_offset 704
	pushq	424(%rsp)
	.cfi_def_cfa_offset 712
	pushq	424(%rsp)
	.cfi_def_cfa_offset 720
	pushq	424(%rsp)
	.cfi_def_cfa_offset 728
	pushq	424(%rsp)
	.cfi_def_cfa_offset 736
	pushq	424(%rsp)
	.cfi_def_cfa_offset 744
	pushq	424(%rsp)
	.cfi_def_cfa_offset 752
	pushq	424(%rsp)
	.cfi_def_cfa_offset 760
	pushq	424(%rsp)
	.cfi_def_cfa_offset 768
	pushq	424(%rsp)
	.cfi_def_cfa_offset 776
	pushq	424(%rsp)
	.cfi_def_cfa_offset 784
	pushq	424(%rsp)
	.cfi_def_cfa_offset 792
	pushq	424(%rsp)
	.cfi_def_cfa_offset 800
	pushq	424(%rsp)
	.cfi_def_cfa_offset 808
	pushq	424(%rsp)
	.cfi_def_cfa_offset 816
	pushq	424(%rsp)
	.cfi_def_cfa_offset 824
	pushq	424(%rsp)
	.cfi_def_cfa_offset 832
	pushq	424(%rsp)
	.cfi_def_cfa_offset 840
	pushq	424(%rsp)
	.cfi_def_cfa_offset 848
	pushq	424(%rsp)
	.cfi_def_cfa_offset 856
	pushq	424(%rsp)
	.cfi_def_cfa_offset 864
	pushq	424(%rsp)
	.cfi_def_cfa_offset 872
	pushq	424(%rsp)
	.cfi_def_cfa_offset 880
	pushq	424(%rsp)
	.cfi_def_cfa_offset 888
	pushq	424(%rsp)
	.cfi_def_cfa_offset 896
	movq	424(%rsp), %r9
	movq	416(%rsp), %r8
	movq	408(%rsp), %rcx
	movq	400(%rsp), %rdx
	movq	392(%rsp), %rsi
	call	_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	addq	$368, %rsp
	.cfi_def_cfa_offset 528
.L18:
	decl	%r14d
	jne	.L19
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$1000, 8(%rsp)
	movq	%rax, %r14
.L21:
	movl	452(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	444(%rsp), %rdx
	movq	432(%rsp), %rdi
	movl	440(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	424(%rsp)
	.cfi_def_cfa_offset 536
	movl	$1, %edi
	pushq	424(%rsp)
	.cfi_def_cfa_offset 544
	pushq	424(%rsp)
	.cfi_def_cfa_offset 552
	pushq	424(%rsp)
	.cfi_def_cfa_offset 560
	pushq	424(%rsp)
	.cfi_def_cfa_offset 568
	pushq	424(%rsp)
	.cfi_def_cfa_offset 576
	pushq	424(%rsp)
	.cfi_def_cfa_offset 584
	pushq	424(%rsp)
	.cfi_def_cfa_offset 592
	pushq	424(%rsp)
	.cfi_def_cfa_offset 600
	pushq	424(%rsp)
	.cfi_def_cfa_offset 608
	pushq	424(%rsp)
	.cfi_def_cfa_offset 616
	pushq	424(%rsp)
	.cfi_def_cfa_offset 624
	pushq	424(%rsp)
	.cfi_def_cfa_offset 632
	pushq	424(%rsp)
	.cfi_def_cfa_offset 640
	pushq	424(%rsp)
	.cfi_def_cfa_offset 648
	pushq	424(%rsp)
	.cfi_def_cfa_offset 656
	pushq	424(%rsp)
	.cfi_def_cfa_offset 664
	pushq	424(%rsp)
	.cfi_def_cfa_offset 672
	pushq	424(%rsp)
	.cfi_def_cfa_offset 680
	pushq	424(%rsp)
	.cfi_def_cfa_offset 688
	pushq	424(%rsp)
	.cfi_def_cfa_offset 696
	pushq	424(%rsp)
	.cfi_def_cfa_offset 704
	pushq	424(%rsp)
	.cfi_def_cfa_offset 712
	pushq	424(%rsp)
	.cfi_def_cfa_offset 720
	pushq	424(%rsp)
	.cfi_def_cfa_offset 728
	pushq	424(%rsp)
	.cfi_def_cfa_offset 736
	pushq	424(%rsp)
	.cfi_def_cfa_offset 744
	pushq	424(%rsp)
	.cfi_def_cfa_offset 752
	pushq	424(%rsp)
	.cfi_def_cfa_offset 760
	pushq	424(%rsp)
	.cfi_def_cfa_offset 768
	pushq	424(%rsp)
	.cfi_def_cfa_offset 776
	pushq	424(%rsp)
	.cfi_def_cfa_offset 784
	pushq	424(%rsp)
	.cfi_def_cfa_offset 792
	pushq	424(%rsp)
	.cfi_def_cfa_offset 800
	pushq	424(%rsp)
	.cfi_def_cfa_offset 808
	pushq	424(%rsp)
	.cfi_def_cfa_offset 816
	pushq	424(%rsp)
	.cfi_def_cfa_offset 824
	pushq	424(%rsp)
	.cfi_def_cfa_offset 832
	pushq	424(%rsp)
	.cfi_def_cfa_offset 840
	pushq	424(%rsp)
	.cfi_def_cfa_offset 848
	pushq	424(%rsp)
	.cfi_def_cfa_offset 856
	pushq	424(%rsp)
	.cfi_def_cfa_offset 864
	pushq	424(%rsp)
	.cfi_def_cfa_offset 872
	pushq	424(%rsp)
	.cfi_def_cfa_offset 880
	pushq	424(%rsp)
	.cfi_def_cfa_offset 888
	pushq	424(%rsp)
	.cfi_def_cfa_offset 896
	movq	424(%rsp), %r9
	movq	416(%rsp), %r8
	movq	408(%rsp), %rcx
	movq	400(%rsp), %rdx
	movq	392(%rsp), %rsi
	call	_Z133__device_stub__Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_iPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	addq	$368, %rsp
	.cfi_def_cfa_offset 528
.L20:
	decl	8(%rsp)
	jne	.L21
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$91, %esi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$8, %rbp
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movss	8(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$40, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$41, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$40, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	4(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$41, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$93, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	160+blocks_(%rip), %rax
	cmpq	%rax, %rbp
	jne	.L22
	incq	%rbx
	jmp	.L12
.L29:
	movq	456(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$472, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3949:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_"
.LC2:
	.string	"precalc_xorwow_matrix"
.LC3:
	.string	"precalc_xorwow_offset_matrix"
.LC4:
	.string	"mrg32k3aM1"
.LC5:
	.string	"mrg32k3aM2"
.LC6:
	.string	"mrg32k3aM1SubSeq"
.LC7:
	.string	"mrg32k3aM2SubSeq"
.LC8:
	.string	"mrg32k3aM1Seq"
.LC9:
	.string	"mrg32k3aM2Seq"
.LC10:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3980:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3980:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	matrices_
	.data
	.align 32
	.type	matrices_, @object
	.size	matrices_, 56
matrices_:
	.long	240
	.long	240
	.long	496
	.long	496
	.long	784
	.long	784
	.long	1016
	.long	1016
	.long	1232
	.long	1232
	.long	1680
	.long	1680
	.long	2024
	.long	2024
	.globl	blocks_
	.align 32
	.type	blocks_, @object
	.size	blocks_, 160
blocks_:
	.long	8
	.long	8
	.long	16
	.long	16
	.long	24
	.long	24
	.long	32
	.long	32
	.long	1
	.long	64
	.long	1
	.long	128
	.long	1
	.long	192
	.long	1
	.long	256
	.long	1
	.long	320
	.long	1
	.long	384
	.long	1
	.long	448
	.long	1
	.long	512
	.long	1
	.long	576
	.long	1
	.long	640
	.long	1
	.long	704
	.long	1
	.long	768
	.long	1
	.long	832
	.long	1
	.long	896
	.long	1
	.long	960
	.long	1
	.long	1024
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <getopt.h>
#include <hiprand/hiprand_kernel.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>
#include "RoeStep.cu"
#include<chrono>
#include<iostream>
using namespace std;
using namespace std::chrono;
int blocks_[20][2] = {{8,8},{16,16},{24,24},{32,32},{1,64},{1,128},{1,192},{1,256},{1,320},{1,384},{1,448},{1,512},{1,576},{1,640},{1,704},{1,768},{1,832},{1,896},{1,960},{1,1024}};
int matrices_[7][2] = {{240,240},{496,496},{784,784},{1016,1016},{1232,1232},{1680,1680},{2024,2024}};
int main(int argc, char **argv) {
hipSetDevice(0);
char* p;int matrix_len=strtol(argv[1], &p, 10);
for(int matrix_looper=0;matrix_looper<matrix_len;matrix_looper++){
for(int block_looper=0;block_looper<20;block_looper++){
int XSIZE=matrices_[matrix_looper][0],YSIZE=matrices_[matrix_looper][1],BLOCKX=blocks_[block_looper][0],BLOCKY=blocks_[block_looper][1];
const int nbrOfGrids = 1;
double *d_u1 = NULL;
hipMalloc(&d_u1, XSIZE*YSIZE);
double *d_u2 = NULL;
hipMalloc(&d_u2, XSIZE*YSIZE);
double *d_u3 = NULL;
hipMalloc(&d_u3, XSIZE*YSIZE);
const double *d_vol = NULL;
hipMalloc(&d_vol, XSIZE*YSIZE);
double *d_f1 = NULL;
hipMalloc(&d_f1, XSIZE*YSIZE);
double *d_f2 = NULL;
hipMalloc(&d_f2, XSIZE*YSIZE);
double *d_f3 = NULL;
hipMalloc(&d_f3, XSIZE*YSIZE);
const double *d_tau = NULL;
hipMalloc(&d_tau, XSIZE*YSIZE);
const double *d_h = NULL;
hipMalloc(&d_h, XSIZE*YSIZE);
const double *d_gama = NULL;
hipMalloc(&d_gama, XSIZE*YSIZE);
double *w1 = NULL;
hipMalloc(&w1, XSIZE*YSIZE);
double *w2 = NULL;
hipMalloc(&w2, XSIZE*YSIZE);
double *w3 = NULL;
hipMalloc(&w3, XSIZE*YSIZE);
double *w4 = NULL;
hipMalloc(&w4, XSIZE*YSIZE);
double *fc1 = NULL;
hipMalloc(&fc1, XSIZE*YSIZE);
double *fc2 = NULL;
hipMalloc(&fc2, XSIZE*YSIZE);
double *fc3 = NULL;
hipMalloc(&fc3, XSIZE*YSIZE);
double *fr1 = NULL;
hipMalloc(&fr1, XSIZE*YSIZE);
double *fr2 = NULL;
hipMalloc(&fr2, XSIZE*YSIZE);
double *fr3 = NULL;
hipMalloc(&fr3, XSIZE*YSIZE);
double *fl1 = NULL;
hipMalloc(&fl1, XSIZE*YSIZE);
double *fl2 = NULL;
hipMalloc(&fl2, XSIZE*YSIZE);
double *fl3 = NULL;
hipMalloc(&fl3, XSIZE*YSIZE);
double *fludif1 = NULL;
hipMalloc(&fludif1, XSIZE*YSIZE);
double *fludif2 = NULL;
hipMalloc(&fludif2, XSIZE*YSIZE);
double *fludif3 = NULL;
hipMalloc(&fludif3, XSIZE*YSIZE);
double *rsumr = NULL;
hipMalloc(&rsumr, XSIZE*YSIZE);
double *utilde = NULL;
hipMalloc(&utilde, XSIZE*YSIZE);
double *htilde = NULL;
hipMalloc(&htilde, XSIZE*YSIZE);
double *uvdif = NULL;
hipMalloc(&uvdif, XSIZE*YSIZE);
double *absvt = NULL;
hipMalloc(&absvt, XSIZE*YSIZE);
double *ssc = NULL;
hipMalloc(&ssc, XSIZE*YSIZE);
double *vsc = NULL;
hipMalloc(&vsc, XSIZE*YSIZE);
double *eiglam1 = NULL;
hipMalloc(&eiglam1, XSIZE*YSIZE);
double *eiglam2 = NULL;
hipMalloc(&eiglam2, XSIZE*YSIZE);
double *eiglam3 = NULL;
hipMalloc(&eiglam3, XSIZE*YSIZE);
double *sgn1 = NULL;
hipMalloc(&sgn1, XSIZE*YSIZE);
double *sgn2 = NULL;
hipMalloc(&sgn2, XSIZE*YSIZE);
double *sgn3 = NULL;
hipMalloc(&sgn3, XSIZE*YSIZE);
int *isb1 = NULL;
hipMalloc(&isb1, XSIZE*YSIZE);
int *isb2 = NULL;
hipMalloc(&isb2, XSIZE*YSIZE);
int *isb3 = NULL;
hipMalloc(&isb3, XSIZE*YSIZE);
double *a1 = NULL;
hipMalloc(&a1, XSIZE*YSIZE);
double *a2 = NULL;
hipMalloc(&a2, XSIZE*YSIZE);
double *a3 = NULL;
hipMalloc(&a3, XSIZE*YSIZE);
double *ac11 = NULL;
hipMalloc(&ac11, XSIZE*YSIZE);
double *ac12 = NULL;
hipMalloc(&ac12, XSIZE*YSIZE);
double *ac13 = NULL;
hipMalloc(&ac13, XSIZE*YSIZE);
double *ac21 = NULL;
hipMalloc(&ac21, XSIZE*YSIZE);
double *ac22 = NULL;
hipMalloc(&ac22, XSIZE*YSIZE);
double *ac23 = NULL;
hipMalloc(&ac23, XSIZE*YSIZE);
int iXSIZE= XSIZE;
int iYSIZE= YSIZE;
while(iXSIZE%BLOCKX!=0)
{
iXSIZE++;
}
while(iYSIZE%BLOCKY!=0)
{
iYSIZE++;
}
dim3 gridBlock(iXSIZE/BLOCKX, iYSIZE/BLOCKY);
dim3 threadBlock(BLOCKX, BLOCKY);
hipFree(0);
RoeStep<<<gridBlock,threadBlock>>>(nbrOfGrids,d_u1,d_u2,d_u3,d_vol,d_f1,d_f2,d_f3,d_tau,d_h,d_gama,w1,w2,w3,w4,fc1,fc2,fc3,fr1,fr2,fr3,fl1,fl2,fl3,fludif1,fludif2,fludif3,rsumr,utilde,htilde,uvdif,absvt,ssc,vsc,eiglam1,eiglam2,eiglam3,sgn1,sgn2,sgn3,isb1,isb2,isb3,a1,a2,a3,ac11,ac12,ac13,ac21,ac22,ac23);
hipDeviceSynchronize();
for (int loop_counter = 0; loop_counter < 10; ++loop_counter) {
RoeStep<<<gridBlock,threadBlock>>>(nbrOfGrids,d_u1,d_u2,d_u3,d_vol,d_f1,d_f2,d_f3,d_tau,d_h,d_gama,w1,w2,w3,w4,fc1,fc2,fc3,fr1,fr2,fr3,fl1,fl2,fl3,fludif1,fludif2,fludif3,rsumr,utilde,htilde,uvdif,absvt,ssc,vsc,eiglam1,eiglam2,eiglam3,sgn1,sgn2,sgn3,isb1,isb2,isb3,a1,a2,a3,ac11,ac12,ac13,ac21,ac22,ac23);
}
auto start = steady_clock::now();
for (int loop_counter = 0; loop_counter < 1000; loop_counter++) {
RoeStep<<<gridBlock,threadBlock>>>(nbrOfGrids,d_u1,d_u2,d_u3,d_vol,d_f1,d_f2,d_f3,d_tau,d_h,d_gama,w1,w2,w3,w4,fc1,fc2,fc3,fr1,fr2,fr3,fl1,fl2,fl3,fludif1,fludif2,fludif3,rsumr,utilde,htilde,uvdif,absvt,ssc,vsc,eiglam1,eiglam2,eiglam3,sgn1,sgn2,sgn3,isb1,isb2,isb3,a1,a2,a3,ac11,ac12,ac13,ac21,ac22,ac23);
}
auto end = steady_clock::now();
auto usecs = duration_cast<duration<float, microseconds::period> >(end - start);
cout <<'['<<usecs.count()<<','<<'('<<BLOCKX<<','<<BLOCKY<<')' << ','<<'('<<XSIZE<<','<<YSIZE<<')'<<']' << endl;
}
}}
	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_ # -- Begin function _Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.type	_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_,@function
_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_: # @_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$512, %rsp                      # imm = 0x200
	.cfi_def_cfa_offset 560
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	560(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	568(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	576(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	584(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	592(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	600(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	608(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	616(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	624(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	632(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	640(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	648(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	656(%rsp), %rax
	movq	%rax, 144(%rbx)
	leaq	664(%rsp), %rax
	movq	%rax, 152(%rbx)
	leaq	672(%rsp), %rax
	movq	%rax, 160(%rbx)
	leaq	680(%rsp), %rax
	movq	%rax, 168(%rbx)
	leaq	688(%rsp), %rax
	movq	%rax, 176(%rbx)
	leaq	696(%rsp), %rax
	movq	%rax, 184(%rbx)
	leaq	704(%rsp), %rax
	movq	%rax, 192(%rbx)
	leaq	712(%rsp), %rax
	movq	%rax, 200(%rbx)
	leaq	720(%rsp), %rax
	movq	%rax, 208(%rbx)
	leaq	728(%rsp), %rax
	movq	%rax, 216(%rbx)
	leaq	736(%rsp), %rax
	movq	%rax, 224(%rbx)
	leaq	744(%rsp), %rax
	movq	%rax, 232(%rbx)
	leaq	752(%rsp), %rax
	movq	%rax, 240(%rbx)
	leaq	760(%rsp), %rax
	movq	%rax, 248(%rbx)
	leaq	768(%rsp), %rax
	movq	%rax, 256(%rbx)
	leaq	776(%rsp), %rax
	movq	%rax, 264(%rbx)
	leaq	784(%rsp), %rax
	movq	%rax, 272(%rbx)
	leaq	792(%rsp), %rax
	movq	%rax, 280(%rbx)
	leaq	800(%rsp), %rax
	movq	%rax, 288(%rbx)
	leaq	808(%rsp), %rax
	movq	%rax, 296(%rbx)
	leaq	816(%rsp), %rax
	movq	%rax, 304(%rbx)
	leaq	824(%rsp), %rax
	movq	%rax, 312(%rbx)
	leaq	832(%rsp), %rax
	movq	%rax, 320(%rbx)
	leaq	840(%rsp), %rax
	movq	%rax, 328(%rbx)
	leaq	848(%rsp), %rax
	movq	%rax, 336(%rbx)
	leaq	856(%rsp), %rax
	movq	%rax, 344(%rbx)
	leaq	864(%rsp), %rax
	movq	%rax, 352(%rbx)
	leaq	872(%rsp), %rax
	movq	%rax, 360(%rbx)
	leaq	880(%rsp), %rax
	movq	%rax, 368(%rbx)
	leaq	888(%rsp), %rax
	movq	%rax, 376(%rbx)
	leaq	896(%rsp), %rax
	movq	%rax, 384(%rbx)
	leaq	904(%rsp), %rax
	movq	%rax, 392(%rbx)
	leaq	912(%rsp), %rax
	movq	%rax, 400(%rbx)
	leaq	920(%rsp), %rax
	movq	%rax, 408(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$528, %rsp                      # imm = 0x210
	.cfi_adjust_cfa_offset -528
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$472, %rsp                      # imm = 0x1D8
	.cfi_def_cfa_offset 528
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	8(%rbx), %rdi
	leaq	464(%rsp), %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	testl	%eax, %eax
	jle	.LBB1_20
# %bb.1:                                # %.preheader206.preheader
	movl	%eax, %eax
	movq	%rax, 448(%rsp)                 # 8-byte Spill
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 424(%rsp)                 # 8-byte Spill
.LBB1_2:                                # %.preheader206
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
                                        #       Child Loop BB1_6 Depth 3
                                        #       Child Loop BB1_10 Depth 3
                                        #       Child Loop BB1_14 Depth 3
	xorl	%ecx, %ecx
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
                                        #       Child Loop BB1_6 Depth 3
                                        #       Child Loop BB1_10 Depth 3
                                        #       Child Loop BB1_14 Depth 3
	movq	424(%rsp), %rax                 # 8-byte Reload
	movl	matrices_(,%rax,8), %r13d
	movl	matrices_+4(,%rax,8), %r15d
	movl	blocks_(,%rcx,8), %r14d
	movq	%rcx, 456(%rsp)                 # 8-byte Spill
	movl	blocks_+4(,%rcx,8), %r12d
	movq	%rbp, 416(%rsp)
	movl	%r15d, %eax
	imull	%r13d, %eax
	movslq	%eax, %rbx
	leaq	416(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 408(%rsp)
	leaq	408(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 400(%rsp)
	leaq	400(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 392(%rsp)
	leaq	392(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 384(%rsp)
	leaq	384(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 376(%rsp)
	leaq	376(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 368(%rsp)
	leaq	368(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 360(%rsp)
	leaq	360(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 352(%rsp)
	leaq	352(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 344(%rsp)
	leaq	344(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 336(%rsp)
	leaq	336(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 328(%rsp)
	leaq	328(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 320(%rsp)
	leaq	320(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 312(%rsp)
	leaq	312(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 304(%rsp)
	leaq	304(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 296(%rsp)
	leaq	296(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 288(%rsp)
	leaq	288(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 280(%rsp)
	leaq	280(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 272(%rsp)
	leaq	272(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 264(%rsp)
	leaq	264(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 256(%rsp)
	leaq	256(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 248(%rsp)
	leaq	248(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 240(%rsp)
	leaq	240(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 232(%rsp)
	leaq	232(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 224(%rsp)
	leaq	224(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 216(%rsp)
	leaq	216(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 208(%rsp)
	leaq	208(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 200(%rsp)
	leaq	200(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 192(%rsp)
	leaq	192(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 184(%rsp)
	leaq	184(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 176(%rsp)
	leaq	176(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 168(%rsp)
	leaq	168(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 160(%rsp)
	leaq	160(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 152(%rsp)
	leaq	152(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 144(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 136(%rsp)
	leaq	136(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 128(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 120(%rsp)
	leaq	120(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 112(%rsp)
	leaq	112(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 104(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 96(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 88(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 80(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 72(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 64(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 56(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 48(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 40(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 32(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 24(%rsp)
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbp, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	%r13d, 440(%rsp)                # 4-byte Spill
	movl	%r13d, %esi
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%esi, %eax
	cltd
	idivl	%r14d
	incl	%esi
	testl	%edx, %edx
	jne	.LBB1_4
# %bb.5:                                # %.preheader.preheader
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	%eax, %ecx
	movl	%r15d, 444(%rsp)                # 4-byte Spill
	movl	%r15d, %esi
.LBB1_6:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%esi, %eax
	cltd
	idivl	%r12d
	incl	%esi
	testl	%edx, %edx
	jne	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_3 Depth=2
	movl	%eax, %r15d
	movl	%ecx, %eax
	shlq	$32, %r15
	orq	%rax, %r15
	movq	%r12, %rbx
	shlq	$32, %rbx
	orq	%r14, %rbx
	xorl	%edi, %edi
	callq	hipFree
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_3 Depth=2
	movq	416(%rsp), %rsi
	movq	408(%rsp), %rdx
	movq	400(%rsp), %rcx
	movq	392(%rsp), %r8
	movq	384(%rsp), %r9
	movl	$1, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	224(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	240(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	256(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	272(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	288(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	304(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	320(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	336(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	352(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	368(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	384(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	400(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	416(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	432(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	448(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	464(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	496(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	512(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	528(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	544(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	560(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	576(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	592(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	608(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	624(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	640(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	656(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	672(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	688(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	704(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	720(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	736(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	addq	$368, %rsp                      # imm = 0x170
	.cfi_adjust_cfa_offset -368
.LBB1_9:                                #   in Loop: Header=BB1_3 Depth=2
	callq	hipDeviceSynchronize
	movl	$10, %r13d
.LBB1_10:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=3
	movq	416(%rsp), %rsi
	movq	408(%rsp), %rdx
	movq	400(%rsp), %rcx
	movq	392(%rsp), %r8
	movq	384(%rsp), %r9
	movl	$1, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	224(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	240(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	256(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	272(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	288(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	304(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	320(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	336(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	352(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	368(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	384(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	400(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	416(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	432(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	448(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	464(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	496(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	512(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	528(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	544(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	560(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	576(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	592(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	608(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	624(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	640(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	656(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	672(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	688(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	704(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	720(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	736(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	addq	$368, %rsp                      # imm = 0x170
	.cfi_adjust_cfa_offset -368
.LBB1_12:                               #   in Loop: Header=BB1_10 Depth=3
	decl	%r13d
	jne	.LBB1_10
# %bb.13:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1000, %r13d                    # imm = 0x3E8
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 432(%rsp)                 # 8-byte Spill
.LBB1_14:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.15:                               #   in Loop: Header=BB1_14 Depth=3
	movq	416(%rsp), %rsi
	movq	408(%rsp), %rdx
	movq	400(%rsp), %rcx
	movq	392(%rsp), %r8
	movq	384(%rsp), %r9
	movl	$1, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	224(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	240(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	256(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	272(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	288(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	304(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	320(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	336(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	352(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	368(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	384(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	400(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	416(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	432(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	448(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	464(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	496(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	512(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	528(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	544(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	560(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	576(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	592(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	608(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	624(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	640(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	656(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	672(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	688(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	704(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	720(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	736(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	addq	$368, %rsp                      # imm = 0x170
	.cfi_adjust_cfa_offset -368
.LBB1_16:                               #   in Loop: Header=BB1_14 Depth=3
	decl	%r13d
	jne	.LBB1_14
# %bb.17:                               #   in Loop: Header=BB1_3 Depth=2
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	subq	432(%rsp), %rax                 # 8-byte Folded Reload
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, 432(%rsp)                # 4-byte Spill
	movb	$91, 15(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB1_21
# %bb.18:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	leaq	15(%rsp), %r15
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_22
.LBB1_21:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$91, %esi
	callq	_ZNSo3putEc
	leaq	15(%rsp), %r15
.LBB1_22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB1_3 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	432(%rsp), %xmm0                # 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movb	$44, 15(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_24
# %bb.23:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_25
.LBB1_24:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_25:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit167
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$40, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_27
# %bb.26:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_28
.LBB1_27:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$40, %esi
	callq	_ZNSo3putEc
.LBB1_28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit170
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$44, 15(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_30
# %bb.29:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_31
.LBB1_30:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit173
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$41, 15(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_33
# %bb.32:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_34
.LBB1_33:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$41, %esi
	callq	_ZNSo3putEc
.LBB1_34:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit176
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$44, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_36
# %bb.35:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_37
.LBB1_36:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_37:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit179
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$40, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_39
# %bb.38:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_40
.LBB1_39:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$40, %esi
	callq	_ZNSo3putEc
.LBB1_40:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit182
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	440(%rsp), %esi                 # 4-byte Reload
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$44, 15(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_42
# %bb.41:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_43
.LBB1_42:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_43:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit185
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	444(%rsp), %esi                 # 4-byte Reload
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$41, 15(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_45
# %bb.44:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_46
.LBB1_45:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$41, %esi
	callq	_ZNSo3putEc
.LBB1_46:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit188
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$93, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_48
# %bb.47:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_49
.LBB1_48:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$93, %esi
	callq	_ZNSo3putEc
.LBB1_49:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit191
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	456(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	cmpq	$20, %rcx
	jne	.LBB1_3
# %bb.19:                               #   in Loop: Header=BB1_2 Depth=1
	movq	424(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	movq	%rcx, %rax
	movq	%rcx, 424(%rsp)                 # 8-byte Spill
	cmpq	448(%rsp), %rcx                 # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_20:                               # %._crit_edge
	xorl	%eax, %eax
	addq	$472, %rsp                      # imm = 0x1D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_,@object # @_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.p2align	3, 0x0
_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_:
	.quad	_Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.size	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, 8

	.type	blocks_,@object                 # @blocks_
	.data
	.globl	blocks_
	.p2align	4, 0x0
blocks_:
	.long	8                               # 0x8
	.long	8                               # 0x8
	.long	16                              # 0x10
	.long	16                              # 0x10
	.long	24                              # 0x18
	.long	24                              # 0x18
	.long	32                              # 0x20
	.long	32                              # 0x20
	.long	1                               # 0x1
	.long	64                              # 0x40
	.long	1                               # 0x1
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	192                             # 0xc0
	.long	1                               # 0x1
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	320                             # 0x140
	.long	1                               # 0x1
	.long	384                             # 0x180
	.long	1                               # 0x1
	.long	448                             # 0x1c0
	.long	1                               # 0x1
	.long	512                             # 0x200
	.long	1                               # 0x1
	.long	576                             # 0x240
	.long	1                               # 0x1
	.long	640                             # 0x280
	.long	1                               # 0x1
	.long	704                             # 0x2c0
	.long	1                               # 0x1
	.long	768                             # 0x300
	.long	1                               # 0x1
	.long	832                             # 0x340
	.long	1                               # 0x1
	.long	896                             # 0x380
	.long	1                               # 0x1
	.long	960                             # 0x3c0
	.long	1                               # 0x1
	.long	1024                            # 0x400
	.size	blocks_, 160

	.type	matrices_,@object               # @matrices_
	.globl	matrices_
	.p2align	4, 0x0
matrices_:
	.long	240                             # 0xf0
	.long	240                             # 0xf0
	.long	496                             # 0x1f0
	.long	496                             # 0x1f0
	.long	784                             # 0x310
	.long	784                             # 0x310
	.long	1016                            # 0x3f8
	.long	1016                            # 0x3f8
	.long	1232                            # 0x4d0
	.long	1232                            # 0x4d0
	.long	1680                            # 0x690
	.long	1680                            # 0x690
	.long	2024                            # 0x7e8
	.long	2024                            # 0x7e8
	.size	matrices_, 56

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_"
	.size	.L__unnamed_1, 120

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_ ; -- Begin function _Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.globl	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
	.p2align	8
	.type	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_,@function
_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_: ; @_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1ac
	s_load_b32 s4, s[0:1], 0x0
                                        ; implicit-def: $vgpr59 : SGPR spill to VGPR lane
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_writelane_b32 v59, s2, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_13
; %bb.1:                                ; %.lr.ph
	s_mov_b32 s20, s4
	s_clause 0x3
	s_load_b512 s[4:19], s[0:1], 0x148
	s_load_b64 s[22:23], s[0:1], 0x198
	s_load_b128 s[24:27], s[0:1], 0x188
	s_load_b512 s[36:51], s[0:1], 0x8
	s_add_i32 s2, s20, -1
	s_ashr_i32 s21, s20, 31
	v_writelane_b32 v59, s2, 1
	s_mov_b32 s2, s20
                                        ; implicit-def: $vgpr58 : SGPR spill to VGPR lane
	s_clause 0x2
	s_load_b512 s[84:99], s[0:1], 0xc8
	s_load_b512 s[68:83], s[0:1], 0x108
	; meta instruction
	s_load_b512 s[52:67], s[0:1], 0x88
	v_ashrrev_i32_e32 v2, 31, v1
	v_writelane_b32 v59, s2, 2
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, 0xbff00000
	s_mov_b32 s104, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 3, v[1:2]
	v_writelane_b32 v59, s3, 3
	s_lshl_b64 s[2:3], s[20:21], 3
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s14, s2
	v_writelane_b32 v59, s22, 4
	s_mov_b64 s[28:29], s[26:27]
	s_addc_u32 s21, s15, s3
	s_mov_b64 s[30:31], s[40:41]
	s_mov_b64 s[100:101], s[38:39]
	v_writelane_b32 v59, s23, 5
	s_mov_b64 s[102:103], s[36:37]
	v_writelane_b32 v59, s28, 6
	v_writelane_b32 v59, s29, 7
	s_mov_b64 s[28:29], s[24:25]
	s_delay_alu instid0(SALU_CYCLE_1)
	v_writelane_b32 v59, s28, 8
	v_writelane_b32 v59, s29, 9
	v_writelane_b32 v59, s20, 10
	v_writelane_b32 v59, s21, 11
	s_add_u32 s20, s24, s2
	s_addc_u32 s21, s25, s3
	v_writelane_b32 v59, s20, 12
	v_writelane_b32 v59, s21, 13
	s_add_u32 s20, s16, s2
	s_addc_u32 s21, s17, s3
	v_writelane_b32 v59, s20, 14
	v_writelane_b32 v59, s21, 15
	s_add_u32 s20, s26, s2
	v_writelane_b32 v59, s24, 16
	s_addc_u32 s21, s27, s3
	v_writelane_b32 v59, s25, 17
	v_writelane_b32 v59, s26, 18
	v_writelane_b32 v59, s27, 19
	v_writelane_b32 v59, s20, 20
	v_writelane_b32 v59, s21, 21
	s_add_u32 s20, s18, s2
	s_addc_u32 s21, s19, s3
	v_writelane_b32 v59, s20, 22
	v_writelane_b32 v59, s21, 23
	s_add_u32 s20, s22, s2
	v_writelane_b32 v59, s22, 24
	s_addc_u32 s21, s23, s3
	v_writelane_b32 v59, s23, 25
	s_mov_b64 s[22:23], s[52:53]
	v_writelane_b32 v59, s20, 26
	v_writelane_b32 v59, s21, 27
	s_add_u32 s20, s36, s2
	s_addc_u32 s21, s37, s3
	v_writelane_b32 v59, s20, 28
	v_writelane_b32 v59, s21, 29
	s_add_u32 s20, s38, s2
	s_addc_u32 s21, s39, s3
	s_add_u32 s2, s40, s2
	s_addc_u32 s3, s41, s3
	v_writelane_b32 v58, s2, 0
	v_writelane_b32 v59, s20, 30
	v_writelane_b32 v58, s3, 1
	s_add_u32 s2, s44, 8
	v_writelane_b32 v59, s21, 31
	v_writelane_b32 v58, s2, 2
	s_addc_u32 s2, s45, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_writelane_b32 v58, s2, 3
	s_add_u32 s2, s46, 8
	v_writelane_b32 v58, s2, 4
	s_addc_u32 s2, s47, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_writelane_b32 v58, s2, 5
	s_add_u32 s2, s48, 8
	v_writelane_b32 v58, s2, 6
	s_addc_u32 s2, s49, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_writelane_b32 v58, s2, 7
	v_readlane_b32 s2, v59, 0
	s_lshl_b32 s33, s2, 3
	s_lshl_b32 s2, s2, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_writelane_b32 v58, s2, 8
	s_mov_b64 s[2:3], s[18:19]
	v_writelane_b32 v58, s2, 9
	v_writelane_b32 v58, s3, 10
	s_mov_b64 s[2:3], s[16:17]
	s_delay_alu instid0(SALU_CYCLE_1)
	v_writelane_b32 v58, s2, 11
	v_writelane_b32 v58, s3, 12
	v_writelane_b32 v58, s4, 13
	s_mov_b64 s[2:3], s[14:15]
	v_writelane_b32 v58, s5, 14
	v_writelane_b32 v58, s6, 15
	v_writelane_b32 v58, s7, 16
	v_writelane_b32 v58, s8, 17
	v_writelane_b32 v58, s9, 18
	v_writelane_b32 v58, s10, 19
	v_writelane_b32 v58, s11, 20
	v_writelane_b32 v58, s12, 21
	v_writelane_b32 v58, s13, 22
	v_writelane_b32 v58, s14, 23
	v_writelane_b32 v58, s15, 24
	v_writelane_b32 v58, s16, 25
	v_writelane_b32 v58, s17, 26
	v_writelane_b32 v58, s18, 27
	v_writelane_b32 v58, s19, 28
	s_load_b512 s[4:19], s[0:1], 0x48
	v_writelane_b32 v58, s2, 29
	v_writelane_b32 v58, s3, 30
	v_writelane_b32 v58, s68, 31
	v_writelane_b32 v57, s69, 0
	v_writelane_b32 v57, s70, 1
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[24:25], s[18:19]
	s_mov_b64 s[26:27], s[16:17]
	s_mov_b64 s[28:29], s[12:13]
	s_mov_b64 s[20:21], s[10:11]
	v_writelane_b32 v57, s71, 2
	s_mov_b64 s[34:35], s[8:9]
	v_writelane_b32 v57, s72, 3
	v_writelane_b32 v57, s73, 4
	v_writelane_b32 v57, s74, 5
	v_writelane_b32 v57, s75, 6
	v_writelane_b32 v57, s76, 7
	v_writelane_b32 v57, s77, 8
	v_writelane_b32 v57, s78, 9
	v_writelane_b32 v57, s79, 10
	v_writelane_b32 v57, s80, 11
	v_writelane_b32 v57, s81, 12
	v_writelane_b32 v57, s82, 13
	v_writelane_b32 v57, s83, 14
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v22, vcc_lo, s42, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s43, v5, vcc_lo
	v_add_co_u32 v12, vcc_lo, s102, v4
	v_add_co_ci_u32_e32 v13, vcc_lo, s103, v5, vcc_lo
	v_writelane_b32 v57, s104, 15
	global_load_b64 v[8:9], v[22:23], off
	global_load_b64 v[10:11], v[12:13], off
                                        ; implicit-def: $vgpr56 : SGPR spill to VGPR lane
	v_cmp_lt_i32_e64 s104, 0, v1
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[8:9]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v2, 8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[8:9], v[8:9], v2
	v_cndmask_b32_e64 v2, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[10:11], v[8:9]
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[14:15], v[8:9], v[10:11]
	v_mul_f64 v[10:11], v[10:11], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], -v[10:11], v[14:15], 0.5
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], -v[14:15], v[14:15], v[8:9]
	v_fma_f64 v[14:15], v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], -v[14:15], v[14:15], v[8:9]
	v_fma_f64 v[10:11], v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[10:11], v[10:11], v2
	v_add_nc_u32_e32 v2, -1, v1
	v_dual_cndmask_b32 v11, v11, v9 :: v_dual_cndmask_b32 v10, v10, v8
	v_add_co_u32 v14, vcc_lo, s34, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s35, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s100, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s101, v5, vcc_lo
	global_store_b64 v[14:15], v[10:11], off
	global_load_b64 v[16:17], v[8:9], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[10:11], v[10:11], v[16:17]
	global_load_b64 v[16:17], v[12:13], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[18:19], null, v[16:17], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	v_div_scale_f64 v[24:25], vcc_lo, v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[24:25], v[20:21]
	v_fma_f64 v[18:19], -v[18:19], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[26:27]
	v_div_fixup_f64 v[10:11], v[18:19], v[16:17], v[10:11]
	v_add_co_u32 v16, vcc_lo, s20, v4
	v_writelane_b32 v57, s20, 16
	v_add_co_ci_u32_e32 v17, vcc_lo, s21, v5, vcc_lo
	v_writelane_b32 v57, s21, 17
	global_store_b64 v[16:17], v[10:11], off
	global_load_b64 v[10:11], v[8:9], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], v[10:11], -0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[10:11], v[18:19]
	global_load_b64 v[18:19], v[12:13], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[20:21], null, v[18:19], v[18:19], v[10:11]
	v_rcp_f64_e32 v[24:25], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[20:21], v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_fma_f64 v[26:27], -v[20:21], v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_div_scale_f64 v[26:27], vcc_lo, v[10:11], v[18:19], v[10:11]
	v_mul_f64 v[28:29], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[20:21], v[28:29], v[26:27]
	v_div_fmas_f64 v[20:21], v[20:21], v[24:25], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[18:19], v[20:21], v[18:19], v[10:11]
	v_add_co_u32 v10, vcc_lo, s30, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s31, v5, vcc_lo
	v_add_co_u32 v24, vcc_lo, s14, v4
	global_load_b64 v[20:21], v[10:11], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[18:19], v[20:21], v[18:19]
	global_load_b64 v[20:21], v3, s[6:7]
	v_writelane_b32 v57, s4, 18
	v_add_co_ci_u32_e32 v25, vcc_lo, s15, v5, vcc_lo
	v_writelane_b32 v56, s18, 0
	v_writelane_b32 v57, s5, 19
	v_writelane_b32 v56, s19, 1
	v_writelane_b32 v57, s6, 20
	v_writelane_b32 v57, s7, 21
	v_writelane_b32 v57, s8, 22
	v_writelane_b32 v57, s9, 23
	v_writelane_b32 v57, s10, 24
	v_writelane_b32 v57, s11, 25
	v_writelane_b32 v57, s12, 26
	v_writelane_b32 v57, s13, 27
	v_writelane_b32 v57, s14, 28
	v_writelane_b32 v57, s15, 29
	v_writelane_b32 v57, s16, 30
	v_writelane_b32 v57, s17, 31
	s_waitcnt vmcnt(0)
	v_add_f64 v[20:21], v[20:21], -1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[26:27], v[20:21], v[18:19]
	global_store_b64 v[24:25], v[26:27], off
	global_load_b64 v[26:27], v[10:11], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[26:27]
	global_load_b64 v[20:21], v[14:15], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], v[20:21], v[18:19]
	global_load_b64 v[20:21], v[12:13], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[26:27], null, v[20:21], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[28:29], v[26:27]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[30:31], -v[26:27], v[28:29], 1.0
	v_fma_f64 v[28:29], v[28:29], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], -v[26:27], v[28:29], 1.0
	v_fma_f64 v[28:29], v[28:29], v[30:31], v[28:29]
	v_div_scale_f64 v[30:31], vcc_lo, v[18:19], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], v[30:31], v[28:29]
	v_fma_f64 v[26:27], -v[26:27], v[32:33], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[26:27], v[26:27], v[28:29], v[32:33]
	v_div_fixup_f64 v[20:21], v[26:27], v[20:21], v[18:19]
	v_add_co_u32 v18, vcc_lo, s28, v4
	v_add_co_ci_u32_e32 v19, vcc_lo, s29, v5, vcc_lo
	global_store_b64 v[18:19], v[20:21], off
	global_load_b64 v[20:21], v[14:15], off
	global_load_b64 v[26:27], v[16:17], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[26:27], v[20:21], v[26:27]
	v_add_co_u32 v20, vcc_lo, s26, v4
	v_add_co_ci_u32_e32 v21, vcc_lo, s27, v5, vcc_lo
	global_store_b64 v[20:21], v[26:27], off
	global_load_b64 v[22:23], v[22:23], off
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[22:23], v[22:23], v[24:25]
	global_load_b64 v[24:25], v[16:17], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[22:23], v[24:25], v[24:25], v[22:23]
	v_add_co_u32 v24, vcc_lo, s24, v4
	v_add_co_ci_u32_e32 v25, vcc_lo, s25, v5, vcc_lo
	global_store_b64 v[24:25], v[22:23], off
	global_load_b64 v[22:23], v[16:17], off
	global_load_b64 v[26:27], v[18:19], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[26:27], v[22:23], v[26:27]
	v_add_co_u32 v22, vcc_lo, s22, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s23, v5, vcc_lo
	global_store_b64 v[22:23], v[26:27], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s104
	v_writelane_b32 v56, s104, 2
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[26:27], 3, v[2:3]
	v_readlane_b32 s4, v57, 18
	v_readlane_b32 s16, v57, 30
	v_readlane_b32 s17, v57, 31
	v_readlane_b32 s18, v56, 0
	v_readlane_b32 s19, v56, 1
	v_readlane_b32 s104, v56, 2
	v_add_co_u32 v28, vcc_lo, s16, v26
	v_add_co_ci_u32_e32 v29, vcc_lo, s17, v27, vcc_lo
	v_add_co_u32 v30, vcc_lo, s18, v26
	v_add_co_ci_u32_e32 v31, vcc_lo, s19, v27, vcc_lo
	global_load_b64 v[28:29], v[28:29], off
	v_add_co_u32 v26, vcc_lo, s52, v26
	v_add_co_ci_u32_e32 v27, vcc_lo, s53, v27, vcc_lo
	v_add_co_u32 v32, vcc_lo, s60, v4
	v_add_co_ci_u32_e32 v33, vcc_lo, s61, v5, vcc_lo
	v_readlane_b32 s5, v57, 19
	v_readlane_b32 s6, v57, 20
	v_readlane_b32 s7, v57, 21
	v_readlane_b32 s8, v57, 22
	v_readlane_b32 s9, v57, 23
	v_readlane_b32 s10, v57, 24
	v_readlane_b32 s11, v57, 25
	v_readlane_b32 s12, v57, 26
	v_readlane_b32 s13, v57, 27
	v_readlane_b32 s14, v57, 28
	v_readlane_b32 s15, v57, 29
	s_waitcnt vmcnt(0)
	global_store_b64 v[32:33], v[28:29], off
	global_load_b64 v[20:21], v[20:21], off
	v_add_co_u32 v28, vcc_lo, s54, v4
	v_add_co_ci_u32_e32 v29, vcc_lo, s55, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[28:29], v[20:21], off
	global_load_b64 v[20:21], v[30:31], off
	v_add_co_u32 v30, vcc_lo, s62, v4
	v_add_co_ci_u32_e32 v31, vcc_lo, s63, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[30:31], v[20:21], off
	global_load_b64 v[20:21], v[24:25], off
	v_add_co_u32 v24, vcc_lo, s56, v4
	v_add_co_ci_u32_e32 v25, vcc_lo, s57, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[24:25], v[20:21], off
	global_load_b64 v[20:21], v[26:27], off
	v_add_co_u32 v26, vcc_lo, s64, v4
	v_add_co_ci_u32_e32 v27, vcc_lo, s65, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[26:27], v[20:21], off
	global_load_b64 v[20:21], v[22:23], off
	v_add_co_u32 v22, vcc_lo, s58, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s59, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[22:23], v[20:21], off
	global_load_b64 v[20:21], v[28:29], off
	global_load_b64 v[28:29], v[32:33], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_add_co_u32 v28, vcc_lo, s66, v4
	v_add_co_ci_u32_e32 v29, vcc_lo, s67, v5, vcc_lo
	global_store_b64 v[28:29], v[20:21], off
	global_load_b64 v[20:21], v[24:25], off
	global_load_b64 v[24:25], v[30:31], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	v_add_co_u32 v24, vcc_lo, s84, v4
	v_add_co_ci_u32_e32 v25, vcc_lo, s85, v5, vcc_lo
	global_store_b64 v[24:25], v[20:21], off
	global_load_b64 v[20:21], v[22:23], off
	global_load_b64 v[22:23], v[26:27], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	v_add_co_u32 v22, vcc_lo, s86, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s87, v5, vcc_lo
	global_store_b64 v[22:23], v[20:21], off
.LBB0_4:                                ; %.critedge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s104
	v_readlane_b32 s68, v58, 31
	v_readlane_b32 s69, v57, 0
	v_readlane_b32 s70, v57, 1
	v_readlane_b32 s71, v57, 2
	v_readlane_b32 s72, v57, 3
	v_readlane_b32 s73, v57, 4
	v_readlane_b32 s74, v57, 5
	v_readlane_b32 s75, v57, 6
	v_readlane_b32 s76, v57, 7
	v_readlane_b32 s77, v57, 8
	v_readlane_b32 s78, v57, 9
	v_readlane_b32 s79, v57, 10
	v_readlane_b32 s80, v57, 11
	v_readlane_b32 s81, v57, 12
	v_readlane_b32 s82, v57, 13
	v_readlane_b32 s83, v57, 14
	s_cbranch_execz .LBB0_6
; %bb.5:                                ; %.critedge554
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[20:21], 3, v[2:3]
	v_readlane_b32 s4, v57, 18
	v_readlane_b32 s8, v57, 22
	v_readlane_b32 s9, v57, 23
	v_readlane_b32 s10, v57, 24
	v_readlane_b32 s11, v57, 25
	v_readlane_b32 s12, v57, 26
	v_add_co_u32 v22, vcc_lo, s8, v20
	v_add_co_ci_u32_e32 v23, vcc_lo, s9, v21, vcc_lo
	v_readlane_b32 s13, v57, 27
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[22:23], v[22:23], off
	v_readlane_b32 s6, v57, 20
	v_readlane_b32 s7, v57, 21
	v_readlane_b32 s5, v57, 19
	v_readlane_b32 s14, v57, 28
	v_readlane_b32 s15, v57, 29
	v_readlane_b32 s16, v57, 30
	v_readlane_b32 s17, v57, 31
	v_readlane_b32 s18, v56, 0
	v_readlane_b32 s19, v56, 1
	v_readlane_b32 s104, v56, 2
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[22:23], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[22:23], null, v[14:15], v[14:15], 1.0
	v_rcp_f64_e32 v[24:25], v[22:23]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[22:23], v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_fma_f64 v[26:27], -v[22:23], v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_div_scale_f64 v[26:27], vcc_lo, 1.0, v[14:15], 1.0
	v_mul_f64 v[28:29], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[22:23], v[28:29], v[26:27]
	v_div_fmas_f64 v[22:23], v[22:23], v[24:25], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[14:15], v[22:23], v[14:15], 1.0
	v_add_co_u32 v22, vcc_lo, s88, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s89, v5, vcc_lo
	v_add_co_u32 v24, vcc_lo, s10, v20
	v_add_co_ci_u32_e32 v25, vcc_lo, s11, v21, vcc_lo
	global_store_b64 v[22:23], v[14:15], off
	global_load_b64 v[24:25], v[24:25], off
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[14:15], v[14:15], v[16:17]
	v_add_co_u32 v16, vcc_lo, s12, v20
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, s90, v4
	v_add_co_ci_u32_e32 v21, vcc_lo, s91, v5, vcc_lo
	global_store_b64 v[20:21], v[14:15], off
	global_load_b64 v[14:15], v[16:17], off
	global_load_b64 v[16:17], v[18:19], off
	global_load_b64 v[18:19], v[22:23], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_co_u32 v16, vcc_lo, s92, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s93, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[14:15], v[18:19]
	global_store_b64 v[16:17], v[14:15], off
	global_load_b64 v[14:15], v[20:21], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], v[14:15], 0.5
	v_mul_f64 v[14:15], v[14:15], v[18:19]
	v_add_co_u32 v18, vcc_lo, s96, v4
	v_add_co_ci_u32_e32 v19, vcc_lo, s97, v5, vcc_lo
	global_store_b64 v[18:19], v[14:15], off
	v_add_co_u32 v14, vcc_lo, s84, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s85, v5, vcc_lo
	global_load_b64 v[22:23], v[20:21], off
	global_load_b64 v[24:25], v[14:15], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[22:23], v[22:23], v[24:25]
	v_add_co_u32 v24, vcc_lo, s94, v4
	v_add_co_ci_u32_e32 v25, vcc_lo, s95, v5, vcc_lo
	global_store_b64 v[24:25], v[22:23], off
	global_load_b64 v[22:23], v[16:17], off
	global_load_b64 v[26:27], v[18:19], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	global_load_b64 v[26:27], v3, s[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[26:27], v[26:27], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[26:27], v[22:23]
	v_cmp_lt_f64_e32 vcc_lo, 0, v[22:23]
	v_and_b32_e32 v2, 0x7fffffff, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v27, v2, v23, vcc_lo
	v_cndmask_b32_e32 v26, v22, v22, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[26:27]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 8, v2
	v_ldexp_f64 v[26:27], v[26:27], v2
	v_cndmask_b32_e64 v2, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[28:29], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[30:31], v[26:27], v[28:29]
	v_mul_f64 v[28:29], v[28:29], 0.5
	v_fma_f64 v[32:33], -v[28:29], v[30:31], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[30:31], v[32:33], v[30:31]
	v_fma_f64 v[28:29], v[28:29], v[32:33], v[28:29]
	v_fma_f64 v[32:33], -v[30:31], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], v[32:33], v[28:29], v[30:31]
	v_fma_f64 v[32:33], -v[30:31], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[30:31]
	v_ldexp_f64 v[28:29], v[28:29], v2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v27, v29, v27 :: v_dual_cndmask_b32 v26, v28, v26
	v_add_co_u32 v28, vcc_lo, s98, v4
	v_add_co_ci_u32_e32 v29, vcc_lo, s99, v5, vcc_lo
	global_store_b64 v[28:29], v[22:23], off
	v_add_co_u32 v22, vcc_lo, s68, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s69, v5, vcc_lo
	global_store_b64 v[22:23], v[26:27], off
	global_load_b64 v[30:31], v[20:21], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[26:27], v[30:31], -v[26:27]
	v_add_co_u32 v30, vcc_lo, s70, v4
	v_add_co_ci_u32_e32 v31, vcc_lo, s71, v5, vcc_lo
	global_store_b64 v[30:31], v[26:27], off
	global_load_b64 v[32:33], v[20:21], off
	v_add_co_u32 v26, vcc_lo, s72, v4
	v_add_co_ci_u32_e32 v27, vcc_lo, s73, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[26:27], v[32:33], off
	global_load_b64 v[34:35], v[22:23], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[32:33], v[34:35]
	v_add_co_u32 v34, vcc_lo, s74, v4
	v_add_co_ci_u32_e32 v35, vcc_lo, s75, v5, vcc_lo
	global_store_b64 v[34:35], v[32:33], off
	global_load_b64 v[32:33], v[30:31], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[32:33]
	v_add_co_u32 v32, s1, s76, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v33, s1, s77, v5, s1
	v_dual_mov_b32 v36, v3 :: v_dual_cndmask_b32 v37, 0x3ff00000, v0
	global_store_b64 v[32:33], v[36:37], off
	global_load_b64 v[36:37], v[26:27], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[36:37]
	v_add_co_u32 v36, s1, s78, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v37, s1, s79, v5, s1
	v_dual_mov_b32 v38, v3 :: v_dual_cndmask_b32 v39, 0x3ff00000, v0
	global_store_b64 v[36:37], v[38:39], off
	global_load_b64 v[38:39], v[34:35], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[38:39]
	v_add_co_u32 v38, s1, s80, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v39, s1, s81, v5, s1
	v_mov_b32_e32 v40, v3
	s_mov_b64 s[0:1], s[22:23]
	v_cndmask_b32_e32 v41, 0x3ff00000, v0, vcc_lo
	global_store_b64 v[38:39], v[40:41], off
	v_add_co_u32 v40, vcc_lo, s66, v4
	v_add_co_ci_u32_e32 v41, vcc_lo, s67, v5, vcc_lo
	v_add_co_u32 v42, vcc_lo, s86, v4
	v_add_co_ci_u32_e32 v43, vcc_lo, s87, v5, vcc_lo
	global_load_b64 v[44:45], v[18:19], off
	global_load_b64 v[46:47], v[40:41], off
	global_load_b64 v[48:49], v[42:43], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[44:45], v[44:45], v[46:47], v[48:49]
	global_load_b64 v[48:49], v[14:15], off
	global_load_b64 v[50:51], v[20:21], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[46:47], -v[46:47], v[50:51], v[48:49]
	global_load_b64 v[48:49], v[24:25], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[44:45], v[44:45], -v[48:49]
	global_load_b64 v[48:49], v[22:23], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[46:47], v[48:49], v[46:47]
	global_load_b64 v[48:49], v3, s[6:7]
	v_readlane_b32 s4, v58, 13
	v_readlane_b32 s8, v58, 17
	v_readlane_b32 s9, v58, 18
	v_readlane_b32 s5, v58, 14
	v_readlane_b32 s6, v58, 15
	v_readlane_b32 s7, v58, 16
	v_readlane_b32 s14, v58, 23
	v_readlane_b32 s15, v58, 24
	v_readlane_b32 s16, v58, 25
	v_readlane_b32 s17, v58, 26
	v_readlane_b32 s18, v58, 27
	v_readlane_b32 s19, v58, 28
	s_mov_b64 s[4:5], s[24:25]
	s_mov_b64 s[6:7], s[26:27]
	s_mov_b64 s[14:15], s[30:31]
	v_readlane_b32 s10, v58, 19
	v_readlane_b32 s11, v58, 20
	v_readlane_b32 s12, v58, 21
	v_readlane_b32 s13, v58, 22
	s_waitcnt vmcnt(0)
	v_add_f64 v[48:49], v[48:49], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], v[48:49], v[44:45], -v[46:47]
	global_load_b64 v[46:47], v[28:29], off
	v_mul_f64 v[44:45], v[44:45], 0.5
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[48:49], null, v[46:47], v[46:47], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[50:51], v[48:49]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[52:53], -v[48:49], v[50:51], 1.0
	v_fma_f64 v[50:51], v[50:51], v[52:53], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[48:49], v[50:51], 1.0
	v_fma_f64 v[50:51], v[50:51], v[52:53], v[50:51]
	v_div_scale_f64 v[52:53], vcc_lo, v[44:45], v[46:47], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[54:55], v[52:53], v[50:51]
	v_fma_f64 v[48:49], -v[48:49], v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[48:49], v[48:49], v[50:51], v[54:55]
	v_div_fixup_f64 v[44:45], v[48:49], v[46:47], v[44:45]
	v_add_co_u32 v46, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v47, vcc_lo, s9, v5, vcc_lo
	s_mov_b64 s[8:9], s[28:29]
	v_readlane_b32 s16, v57, 18
	v_readlane_b32 s18, v57, 20
	v_readlane_b32 s19, v57, 21
	v_readlane_b32 s22, v57, 24
	v_readlane_b32 s23, v57, 25
	s_mov_b64 s[22:23], s[0:1]
	s_mov_b32 s0, 0xfeebc2a0
	s_mov_b32 s1, 0x39b4484b
	v_readlane_b32 s24, v57, 26
	v_readlane_b32 s25, v57, 27
	v_readlane_b32 s26, v57, 28
	v_readlane_b32 s27, v57, 29
	v_readlane_b32 s28, v57, 30
	v_readlane_b32 s29, v57, 31
	v_readlane_b32 s30, v56, 0
	v_readlane_b32 s31, v56, 1
	s_mov_b64 s[30:31], s[14:15]
	s_mov_b64 s[28:29], s[8:9]
	s_mov_b64 s[26:27], s[6:7]
	s_mov_b64 s[24:25], s[4:5]
	v_readlane_b32 s17, v57, 19
	v_readlane_b32 s20, v57, 22
	v_readlane_b32 s21, v57, 23
	global_store_b64 v[46:47], v[44:45], off
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[44:45], v[18:19], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[16:17], v[44:45], -2.0, v[16:17]
	global_load_b64 v[44:45], v[40:41], off
	global_load_b64 v[48:49], v[24:25], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[16:17], v[44:45], v[16:17], v[48:49]
	global_load_b64 v[44:45], v[42:43], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[16:17], -v[44:45]
	global_load_b64 v[44:45], v3, s[18:19]
	s_waitcnt vmcnt(0)
	v_add_f64 v[44:45], v[44:45], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[44:45], v[16:17]
	global_load_b64 v[44:45], v[28:29], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[48:49], null, v[44:45], v[44:45], v[16:17]
	v_rcp_f64_e32 v[50:51], v[48:49]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[52:53], -v[48:49], v[50:51], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[50:51], v[52:53], v[50:51]
	v_fma_f64 v[52:53], -v[48:49], v[50:51], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[50:51], v[52:53], v[50:51]
	v_div_scale_f64 v[52:53], vcc_lo, v[16:17], v[44:45], v[16:17]
	v_mul_f64 v[54:55], v[52:53], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[48:49], v[54:55], v[52:53]
	v_div_fmas_f64 v[48:49], v[48:49], v[50:51], v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[16:17], v[48:49], v[44:45], v[16:17]
	v_add_co_u32 v44, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v45, vcc_lo, s11, v5, vcc_lo
	global_store_b64 v[44:45], v[16:17], off
	global_load_b64 v[16:17], v[18:19], off
	global_load_b64 v[18:19], v[40:41], off
	global_load_b64 v[40:41], v[42:43], off
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[20:21], v[20:21], off
	s_waitcnt vmcnt(2)
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[40:41]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], -v[18:19], v[20:21], v[14:15]
	global_load_b64 v[18:19], v[24:25], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	global_load_b64 v[18:19], v[22:23], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[18:19], v[14:15]
	global_load_b64 v[18:19], v3, s[18:19]
	s_waitcnt vmcnt(0)
	v_add_f64 v[18:19], v[18:19], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[18:19], v[16:17], v[14:15]
	global_load_b64 v[16:17], v[28:29], off
	v_mul_f64 v[14:15], v[14:15], 0.5
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[18:19], null, v[16:17], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_div_scale_f64 v[22:23], vcc_lo, v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[22:23], v[20:21]
	v_fma_f64 v[18:19], -v[18:19], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[24:25]
	v_div_fixup_f64 v[14:15], v[18:19], v[16:17], v[14:15]
	v_add_co_u32 v16, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v5, vcc_lo
	global_store_b64 v[16:17], v[14:15], off
	global_load_b64 v[14:15], v[30:31], off
	global_load_b64 v[18:19], v[46:47], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], v[14:15], s[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[20:21], null, v[14:15], v[14:15], v[18:19]
	v_rcp_f64_e32 v[22:23], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_div_scale_f64 v[24:25], vcc_lo, v[18:19], v[14:15], v[18:19]
	v_mul_f64 v[28:29], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[20:21], v[28:29], v[24:25]
	v_div_fmas_f64 v[20:21], v[20:21], v[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[14:15], v[20:21], v[14:15], v[18:19]
	global_store_b64 v[46:47], v[14:15], off
	global_load_b64 v[14:15], v[26:27], off
	global_load_b64 v[18:19], v[44:45], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], v[14:15], s[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[20:21], null, v[14:15], v[14:15], v[18:19]
	v_rcp_f64_e32 v[22:23], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_div_scale_f64 v[24:25], vcc_lo, v[18:19], v[14:15], v[18:19]
	v_mul_f64 v[28:29], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[20:21], v[28:29], v[24:25]
	v_div_fmas_f64 v[20:21], v[20:21], v[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[14:15], v[20:21], v[14:15], v[18:19]
	global_store_b64 v[44:45], v[14:15], off
	global_load_b64 v[14:15], v[34:35], off
	global_load_b64 v[18:19], v[16:17], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], v[14:15], s[0:1]
	v_readlane_b32 s0, v58, 29
	v_readlane_b32 s1, v58, 30
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[20:21], null, v[14:15], v[14:15], v[18:19]
	v_rcp_f64_e32 v[22:23], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_div_scale_f64 v[24:25], vcc_lo, v[18:19], v[14:15], v[18:19]
	v_mul_f64 v[28:29], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[20:21], v[28:29], v[24:25]
	v_div_fmas_f64 v[20:21], v[20:21], v[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[14:15], v[20:21], v[14:15], v[18:19]
	global_store_b64 v[16:17], v[14:15], off
	global_load_b64 v[14:15], v[32:33], off
	global_load_b64 v[18:19], v[46:47], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[18:19], -v[14:15]
	global_load_b64 v[18:19], v[30:31], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[14:15], v[18:19]
	v_add_co_u32 v18, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v19, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v58, 11
	v_readlane_b32 s1, v58, 12
	global_store_b64 v[18:19], v[14:15], off
	global_load_b64 v[14:15], v[36:37], off
	global_load_b64 v[18:19], v[44:45], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[18:19], -v[14:15]
	global_load_b64 v[18:19], v[26:27], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[14:15], v[18:19]
	v_add_co_u32 v18, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v19, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v58, 9
	v_readlane_b32 s1, v58, 10
	global_store_b64 v[18:19], v[14:15], off
	global_load_b64 v[14:15], v[38:39], off
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[18:19], v[34:35], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[14:15], v[16:17], -v[14:15]
	v_add_co_u32 v16, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s1, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[14:15], v[14:15], v[18:19]
	global_store_b64 v[16:17], v[14:15], off
.LBB0_6:                                ; %.critedge556
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_readlane_b32 s0, v58, 13
	v_readlane_b32 s10, v58, 23
	v_readlane_b32 s11, v58, 24
	v_readlane_b32 s1, v58, 14
	v_readlane_b32 s2, v58, 15
	v_readlane_b32 s3, v58, 16
	v_readlane_b32 s0, v59, 16
	global_load_b64 v[14:15], v3, s[10:11] offset:8
	v_readlane_b32 s1, v59, 17
	v_readlane_b32 s12, v58, 25
	v_readlane_b32 s13, v58, 26
	v_readlane_b32 s2, v59, 18
	v_readlane_b32 s3, v59, 19
	v_readlane_b32 s14, v58, 27
	v_readlane_b32 s15, v58, 28
	v_cmp_lt_i32_e32 vcc_lo, 1, v1
	v_readlane_b32 s4, v58, 17
	v_readlane_b32 s5, v58, 18
	v_readlane_b32 s6, v58, 19
	v_readlane_b32 s7, v58, 20
	v_readlane_b32 s8, v58, 21
	v_readlane_b32 s9, v58, 22
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[14:15], s[0:1] offset:8
	v_readlane_b32 s0, v59, 10
	v_readlane_b32 s1, v59, 11
	global_load_b64 v[14:15], v3, s[0:1] offset:-8
	v_readlane_b32 s0, v59, 12
	v_readlane_b32 s1, v59, 13
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[14:15], s[0:1] offset:-8
	global_load_b64 v[14:15], v3, s[12:13] offset:8
	v_readlane_b32 s0, v59, 14
	v_readlane_b32 s1, v59, 15
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[14:15], s[2:3] offset:8
	global_load_b64 v[14:15], v3, s[0:1] offset:-8
	v_readlane_b32 s0, v59, 20
	v_readlane_b32 s1, v59, 21
	v_readlane_b32 s2, v59, 24
	v_readlane_b32 s3, v59, 25
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[14:15], s[0:1] offset:-8
	global_load_b64 v[14:15], v3, s[14:15] offset:8
	v_readlane_b32 s0, v59, 22
	v_readlane_b32 s1, v59, 23
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[14:15], s[2:3] offset:8
	global_load_b64 v[14:15], v3, s[0:1] offset:-8
	v_readlane_b32 s0, v59, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s20, s0, v1
	v_readlane_b32 s0, v59, 26
	v_readlane_b32 s1, v59, 27
	s_and_b32 s3, vcc_lo, s20
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[14:15], s[0:1] offset:-8
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_readlane_b32 s4, v57, 18
	v_readlane_b32 s5, v57, 19
	global_load_b64 v[14:15], v3, s[50:51]
	v_readlane_b32 s6, v57, 20
	v_readlane_b32 s7, v57, 21
	v_readlane_b32 s8, v57, 22
	global_load_b64 v[16:17], v3, s[4:5]
	v_readlane_b32 s9, v57, 23
	v_readlane_b32 s10, v57, 24
	v_readlane_b32 s11, v57, 25
	v_readlane_b32 s12, v57, 26
	v_readlane_b32 s13, v57, 27
	v_readlane_b32 s14, v57, 28
	v_readlane_b32 s15, v57, 29
	v_readlane_b32 s16, v57, 30
	v_readlane_b32 s17, v57, 31
	v_readlane_b32 s18, v56, 0
	v_readlane_b32 s19, v56, 1
	v_readlane_b32 s4, v58, 13
	v_readlane_b32 s8, v58, 17
	v_readlane_b32 s9, v58, 18
	v_readlane_b32 s0, v58, 29
	v_readlane_b32 s1, v58, 30
	v_readlane_b32 s10, v58, 19
	v_readlane_b32 s11, v58, 20
	v_readlane_b32 s12, v58, 21
	v_readlane_b32 s13, v58, 22
	v_readlane_b32 s5, v58, 14
	v_readlane_b32 s6, v58, 15
	v_readlane_b32 s7, v58, 16
	v_readlane_b32 s104, v56, 2
	v_readlane_b32 s14, v58, 23
	v_readlane_b32 s15, v58, 24
	v_readlane_b32 s16, v58, 25
	v_readlane_b32 s17, v58, 26
	v_readlane_b32 s18, v58, 27
	v_readlane_b32 s19, v58, 28
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[18:19], null, v[16:17], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_div_scale_f64 v[22:23], vcc_lo, v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[22:23], v[20:21]
	v_fma_f64 v[18:19], -v[18:19], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[24:25]
	v_div_fixup_f64 v[14:15], v[18:19], v[16:17], v[14:15]
	v_add_co_u32 v16, vcc_lo, s76, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s77, v5, vcc_lo
	v_add_co_u32 v20, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v21, vcc_lo, s9, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f64_e32 v18, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	v_sub_nc_u32_e32 v2, v1, v18
	v_lshlrev_b64 v[22:23], 3, v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v22, vcc_lo, v20, v22
	v_sub_co_ci_u32_e32 v23, vcc_lo, v21, v23, vcc_lo
	s_clause 0x1
	global_load_b64 v[19:20], v[20:21], off
	global_load_b64 v[21:22], v[22:23], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[23:24], v[19:20], v[19:20]
	s_waitcnt vmcnt(0)
	v_max_f64 v[25:26], v[21:22], v[21:22]
	v_max_f64 v[19:20], v[19:20], v[19:20]
	v_add_f64 v[21:22], v[21:22], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_f64 v[27:28], v[25:26], v[23:24]
	v_max_f64 v[23:24], v[25:26], v[23:24]
	v_max_f64 v[25:26], v[19:20], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f64 v[19:20], v[19:20], v[23:24]
	v_min_f64 v[23:24], v[21:22], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max_f64 v[19:20], v[21:22], v[19:20]
	v_max_f64 v[21:22], v[23:24], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f64 v[19:20], v[19:20], 0
	v_add_f64 v[19:20], v[21:22], v[19:20]
	v_add_co_u32 v21, vcc_lo, s70, v4
	v_add_co_ci_u32_e32 v22, vcc_lo, s71, v5, vcc_lo
	global_load_b64 v[21:22], v[21:22], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[16:17], -v[14:15], v[21:22], v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[16:17], v[16:17], v[19:20]
	v_add_co_u32 v19, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v20, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v59, 8
	v_readlane_b32 s1, v59, 9
	global_load_b64 v[19:20], v[19:20], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[16:17], v[21:22], v[16:17], v[19:20]
	v_add_co_u32 v19, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v20, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v58, 11
	v_readlane_b32 s1, v58, 12
	global_store_b64 v[19:20], v[16:17], off
	v_add_co_u32 v16, vcc_lo, s78, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s79, v5, vcc_lo
	v_add_co_u32 v21, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v22, vcc_lo, s11, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f64_e32 v19, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v20, 31, v19
	v_lshlrev_b64 v[23:24], 3, v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v23, vcc_lo, v21, v23
	v_sub_co_ci_u32_e32 v24, vcc_lo, v22, v24, vcc_lo
	s_clause 0x1
	global_load_b64 v[20:21], v[21:22], off
	global_load_b64 v[22:23], v[23:24], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[24:25], v[20:21], v[20:21]
	s_waitcnt vmcnt(0)
	v_max_f64 v[26:27], v[22:23], v[22:23]
	v_max_f64 v[20:21], v[20:21], v[20:21]
	v_add_f64 v[22:23], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_f64 v[28:29], v[26:27], v[24:25]
	v_max_f64 v[24:25], v[26:27], v[24:25]
	v_max_f64 v[26:27], v[20:21], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f64 v[20:21], v[20:21], v[24:25]
	v_min_f64 v[24:25], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max_f64 v[20:21], v[22:23], v[20:21]
	v_max_f64 v[22:23], v[24:25], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f64 v[20:21], v[20:21], 0
	v_add_f64 v[20:21], v[22:23], v[20:21]
	v_add_co_u32 v22, vcc_lo, s72, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s73, v5, vcc_lo
	global_load_b64 v[22:23], v[22:23], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[16:17], -v[14:15], v[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[16:17], v[16:17], v[20:21]
	v_add_co_u32 v20, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v21, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v59, 6
	v_readlane_b32 s1, v59, 7
	global_load_b64 v[20:21], v[20:21], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[16:17], v[22:23], v[16:17], v[20:21]
	v_add_co_u32 v20, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v21, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v58, 9
	v_readlane_b32 s1, v58, 10
	global_store_b64 v[20:21], v[16:17], off
	v_add_co_u32 v16, vcc_lo, s80, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s81, v5, vcc_lo
	v_add_co_u32 v22, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s13, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f64_e32 v20, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[24:25], 3, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v24, vcc_lo, v22, v24
	v_sub_co_ci_u32_e32 v25, vcc_lo, v23, v25, vcc_lo
	s_clause 0x1
	global_load_b64 v[21:22], v[22:23], off
	global_load_b64 v[23:24], v[24:25], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[25:26], v[21:22], v[21:22]
	s_waitcnt vmcnt(0)
	v_max_f64 v[27:28], v[23:24], v[23:24]
	v_max_f64 v[21:22], v[21:22], v[21:22]
	v_add_f64 v[23:24], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_f64 v[29:30], v[27:28], v[25:26]
	v_max_f64 v[25:26], v[27:28], v[25:26]
	v_max_f64 v[27:28], v[21:22], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f64 v[21:22], v[21:22], v[25:26]
	v_min_f64 v[25:26], v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_2)
	v_max_f64 v[21:22], v[23:24], v[21:22]
	v_add_co_u32 v23, vcc_lo, s74, v4
	v_add_co_ci_u32_e32 v24, vcc_lo, s75, v5, vcc_lo
	global_load_b64 v[23:24], v[23:24], off
	v_min_f64 v[21:22], v[21:22], 0
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], -v[14:15], v[23:24], v[16:17]
	v_max_f64 v[16:17], v[25:26], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], v[21:22]
	v_mul_f64 v[14:15], v[14:15], v[16:17]
	v_add_co_u32 v16, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v59, 4
	v_readlane_b32 s1, v59, 5
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], v[23:24], v[14:15], v[16:17]
	v_add_co_u32 v16, vcc_lo, s82, v6
	v_add_co_ci_u32_e32 v17, vcc_lo, s83, v7, vcc_lo
	global_store_b32 v[16:17], v2, off
	v_add_co_u32 v16, vcc_lo, s4, v6
	v_sub_nc_u32_e32 v2, v1, v19
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[16:17], v2, off
	v_add_co_u32 v16, vcc_lo, s6, v6
	v_sub_nc_u32_e32 v2, v1, v20
	v_add_co_ci_u32_e32 v17, vcc_lo, s7, v7, vcc_lo
	global_store_b32 v[16:17], v2, off
	v_add_co_u32 v16, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s1, v5, vcc_lo
	global_store_b64 v[16:17], v[14:15], off
.LBB0_8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s3, s104
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v14, vcc_lo, s60, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s61, v5, vcc_lo
	v_add_co_u32 v16, vcc_lo, s54, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s55, v5, vcc_lo
	v_readlane_b32 s0, v59, 8
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[16:17], v[16:17], off
	v_readlane_b32 s1, v59, 9
	v_add_co_u32 v18, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v59, 6
	v_readlane_b32 s1, v59, 7
	global_load_b64 v[20:21], v[18:19], off
	v_add_co_u32 v22, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v23, vcc_lo, s1, v5, vcc_lo
	v_readlane_b32 s0, v59, 4
	v_readlane_b32 s1, v59, 5
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	global_load_b64 v[16:17], v[22:23], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_add_co_u32 v20, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v21, vcc_lo, s1, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	global_load_b64 v[16:17], v[20:21], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_co_u32 v16, vcc_lo, s44, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s45, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[14:15], v[14:15], 0.5
	global_store_b64 v[16:17], v[14:15], off
	v_add_co_u32 v14, vcc_lo, s62, v4
	v_add_co_u32 v16, s2, s56, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s63, v5, vcc_lo
	v_add_co_ci_u32_e64 v17, vcc_lo, s57, v5, s2
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_co_u32 v16, vcc_lo, s70, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s71, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[24:25], v[18:19], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], v[16:17], v[24:25], v[14:15]
	v_add_co_u32 v16, vcc_lo, s72, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s73, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[24:25], v[22:23], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], v[16:17], v[24:25], v[14:15]
	v_add_co_u32 v16, vcc_lo, s74, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s75, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[24:25], v[20:21], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], v[16:17], v[24:25], v[14:15]
	v_add_co_u32 v16, vcc_lo, s46, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s47, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[14:15], v[14:15], 0.5
	global_store_b64 v[16:17], v[14:15], off
	v_add_co_u32 v14, vcc_lo, s64, v4
	v_add_co_u32 v16, s2, s58, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s65, v5, vcc_lo
	v_add_co_ci_u32_e64 v17, vcc_lo, s59, v5, s2
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_co_u32 v16, vcc_lo, s92, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s93, v5, vcc_lo
	v_add_co_u32 v24, vcc_lo, s90, v4
	v_add_co_ci_u32_e32 v25, vcc_lo, s91, v5, vcc_lo
	v_add_co_u32 v26, vcc_lo, s68, v4
	v_add_co_ci_u32_e32 v27, vcc_lo, s69, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[24:25], v[24:25], off
	global_load_b64 v[26:27], v[26:27], off
	global_load_b64 v[18:19], v[18:19], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[28:29], -v[24:25], v[26:27], v[16:17]
	v_fma_f64 v[16:17], v[24:25], v[26:27], v[16:17]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[14:15], v[18:19], v[28:29], v[14:15]
	v_add_co_u32 v18, vcc_lo, s96, v4
	v_add_co_ci_u32_e32 v19, vcc_lo, s97, v5, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
	global_load_b64 v[22:23], v[22:23], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], v[18:19], v[22:23], v[14:15]
	global_load_b64 v[18:19], v[20:21], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], v[16:17], v[18:19], v[14:15]
	v_add_co_u32 v16, vcc_lo, s48, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s49, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[14:15], v[14:15], 0.5
	global_store_b64 v[16:17], v[14:15], off
.LBB0_10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_b32 s1, s104, s20
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	v_readlane_b32 s2, v57, 15
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_readlane_b32 s4, v57, 18
	v_readlane_b32 s5, v57, 19
	global_load_b64 v[14:15], v3, s[50:51]
	v_mov_b32_e32 v2, v3
	v_readlane_b32 s1, v58, 2
	v_readlane_b32 s6, v57, 20
	global_load_b64 v[16:17], v3, s[4:5]
	v_readlane_b32 s7, v57, 21
	v_readlane_b32 s8, v57, 22
	v_readlane_b32 s9, v57, 23
	v_readlane_b32 s10, v57, 24
	v_readlane_b32 s11, v57, 25
	v_readlane_b32 s12, v57, 26
	v_readlane_b32 s13, v57, 27
	v_readlane_b32 s14, v57, 28
	v_readlane_b32 s15, v57, 29
	v_readlane_b32 s16, v57, 30
	v_readlane_b32 s17, v57, 31
	v_readlane_b32 s18, v56, 0
	v_readlane_b32 s19, v56, 1
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[18:19], null, v[16:17], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_div_scale_f64 v[22:23], vcc_lo, v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[22:23], v[20:21]
	v_fma_f64 v[18:19], -v[18:19], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[24:25]
	v_div_fixup_f64 v[14:15], v[18:19], v[16:17], v[14:15]
	v_lshlrev_b64 v[18:19], 3, v[1:2]
	v_add_co_u32 v16, vcc_lo, s44, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s45, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, vcc_lo, s1, v18
	v_readlane_b32 s1, v58, 3
	v_add_co_ci_u32_e32 v21, vcc_lo, s1, v19, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[20:21], v[20:21], off
	v_readlane_b32 s1, v58, 4
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	global_load_b64 v[20:21], v[12:13], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], -v[14:15], v[16:17], v[20:21]
	global_store_b64 v[12:13], v[14:15], off
	s_clause 0x1
	global_load_b64 v[12:13], v3, s[50:51]
	global_load_b64 v[14:15], v3, s[4:5]
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[16:17], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[16:17], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_div_scale_f64 v[22:23], vcc_lo, v[12:13], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[22:23], v[20:21]
	v_fma_f64 v[16:17], -v[16:17], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[16:17], v[16:17], v[20:21], v[24:25]
	v_div_fixup_f64 v[12:13], v[16:17], v[14:15], v[12:13]
	v_add_co_u32 v14, vcc_lo, s1, v18
	v_readlane_b32 s1, v58, 5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v15, vcc_lo, s1, v19, vcc_lo
	v_add_co_u32 v16, vcc_lo, s46, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s47, v5, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[16:17], v[16:17], off
	v_readlane_b32 s1, v58, 6
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	global_load_b64 v[16:17], v[8:9], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[12:13], -v[12:13], v[14:15], v[16:17]
	global_store_b64 v[8:9], v[12:13], off
	s_clause 0x1
	global_load_b64 v[8:9], v3, s[50:51]
	global_load_b64 v[12:13], v3, s[4:5]
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[14:15], null, v[12:13], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[16:17], v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	v_div_scale_f64 v[20:21], vcc_lo, v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[20:21], v[16:17]
	v_fma_f64 v[14:15], -v[14:15], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[14:15], v[14:15], v[16:17], v[22:23]
	v_div_fixup_f64 v[8:9], v[14:15], v[12:13], v[8:9]
	v_add_co_u32 v12, vcc_lo, s1, v18
	v_readlane_b32 s1, v58, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v19, vcc_lo
	v_add_co_u32 v14, vcc_lo, s48, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s49, v5, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	global_load_b64 v[14:15], v[14:15], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	global_load_b64 v[14:15], v[10:11], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
	global_store_b64 v[10:11], v[8:9], off
.LBB0_12:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_u32 s68, s68, s33
	s_addc_u32 s69, s69, 0
	s_add_u32 s42, s42, s33
	s_addc_u32 s43, s43, 0
	s_add_u32 s102, s102, s33
	s_addc_u32 s103, s103, 0
	v_readlane_b32 s20, v57, 16
	s_add_u32 s34, s34, s33
	v_readlane_b32 s21, v57, 17
	s_addc_u32 s35, s35, 0
	s_add_u32 s100, s100, s33
	v_readlane_b32 s4, v57, 18
	s_addc_u32 s101, s101, 0
	v_readlane_b32 s14, v57, 28
	s_add_u32 s20, s20, s33
	v_readlane_b32 s15, v57, 29
	s_addc_u32 s21, s21, 0
	s_add_u32 s30, s30, s33
	s_addc_u32 s31, s31, 0
	s_add_u32 s14, s14, s33
	s_addc_u32 s15, s15, 0
	s_add_u32 s28, s28, s33
	s_addc_u32 s29, s29, 0
	s_add_u32 s26, s26, s33
	s_addc_u32 s27, s27, 0
	s_add_u32 s24, s24, s33
	s_addc_u32 s25, s25, 0
	s_add_u32 s22, s22, s33
	s_addc_u32 s23, s23, 0
	s_add_u32 s60, s60, s33
	s_addc_u32 s61, s61, 0
	s_add_u32 s54, s54, s33
	s_addc_u32 s55, s55, 0
	s_add_u32 s62, s62, s33
	s_addc_u32 s63, s63, 0
	s_add_u32 s56, s56, s33
	s_addc_u32 s57, s57, 0
	s_add_u32 s64, s64, s33
	s_addc_u32 s65, s65, 0
	s_add_u32 s58, s58, s33
	s_addc_u32 s59, s59, 0
	s_add_u32 s66, s66, s33
	s_addc_u32 s67, s67, 0
	s_add_u32 s84, s84, s33
	s_addc_u32 s85, s85, 0
	s_add_u32 s86, s86, s33
	s_addc_u32 s87, s87, 0
	s_add_u32 s88, s88, s33
	s_addc_u32 s89, s89, 0
	s_add_u32 s90, s90, s33
	s_addc_u32 s91, s91, 0
	s_add_u32 s92, s92, s33
	s_addc_u32 s93, s93, 0
	s_add_u32 s96, s96, s33
	s_addc_u32 s97, s97, 0
	s_add_u32 s94, s94, s33
	s_addc_u32 s95, s95, 0
	s_add_u32 s98, s98, s33
	s_addc_u32 s99, s99, 0
	s_add_u32 s70, s70, s33
	s_addc_u32 s71, s71, 0
	s_add_u32 s72, s72, s33
	s_addc_u32 s73, s73, 0
	s_add_u32 s74, s74, s33
	s_addc_u32 s75, s75, 0
	s_add_u32 s76, s76, s33
	s_addc_u32 s77, s77, 0
	s_add_u32 s78, s78, s33
	s_addc_u32 s79, s79, 0
	s_add_u32 s80, s80, s33
	s_addc_u32 s81, s81, 0
	v_readlane_b32 s0, v58, 8
	v_readlane_b32 s5, v57, 19
	v_readlane_b32 s6, v57, 20
	v_readlane_b32 s7, v57, 21
	v_readlane_b32 s8, v57, 22
	v_readlane_b32 s9, v57, 23
	v_readlane_b32 s10, v57, 24
	v_readlane_b32 s11, v57, 25
	v_readlane_b32 s12, v57, 26
	v_readlane_b32 s13, v57, 27
	v_readlane_b32 s16, v57, 30
	v_readlane_b32 s17, v57, 31
	v_writelane_b32 v58, s68, 31
	v_writelane_b32 v57, s69, 0
	v_add_co_u32 v6, vcc_lo, v6, s0
	v_readlane_b32 s0, v59, 0
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_writelane_b32 v57, s70, 1
	v_readlane_b32 s18, v56, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v1, s0, v1
	v_readlane_b32 s19, v56, 1
	v_writelane_b32 v57, s71, 2
	v_writelane_b32 v57, s72, 3
	v_writelane_b32 v57, s73, 4
	v_writelane_b32 v57, s74, 5
	v_writelane_b32 v57, s75, 6
	v_writelane_b32 v57, s76, 7
	v_writelane_b32 v57, s77, 8
	v_writelane_b32 v57, s78, 9
	v_writelane_b32 v57, s79, 10
	v_writelane_b32 v57, s80, 11
	v_writelane_b32 v57, s81, 12
	v_writelane_b32 v57, s82, 13
	v_writelane_b32 v57, s83, 14
	s_mov_b64 s[82:83], s[66:67]
	s_mov_b64 s[80:81], s[64:65]
	s_mov_b64 s[78:79], s[62:63]
	s_mov_b64 s[76:77], s[60:61]
	s_mov_b64 s[74:75], s[58:59]
	s_mov_b64 s[72:73], s[56:57]
	s_mov_b64 s[70:71], s[54:55]
	s_mov_b64 s[68:69], s[52:53]
	s_mov_b64 s[66:67], s[50:51]
	s_mov_b64 s[64:65], s[48:49]
	s_mov_b64 s[62:63], s[46:47]
	s_mov_b64 s[60:61], s[44:45]
	s_mov_b64 s[58:59], s[42:43]
	s_mov_b64 s[56:57], s[40:41]
	s_mov_b64 s[54:55], s[38:39]
	s_mov_b64 s[52:53], s[36:37]
	v_readlane_b32 s36, v58, 13
	v_readlane_b32 s40, v58, 17
	v_readlane_b32 s41, v58, 18
	v_readlane_b32 s42, v58, 19
	v_readlane_b32 s43, v58, 20
	v_readlane_b32 s44, v58, 21
	v_readlane_b32 s45, v58, 22
	s_add_u32 s40, s40, s33
	s_addc_u32 s41, s41, 0
	s_add_u32 s42, s42, s33
	s_addc_u32 s43, s43, 0
	s_add_u32 s44, s44, s33
	v_readlane_b32 s37, v58, 14
	v_readlane_b32 s38, v58, 15
	v_readlane_b32 s39, v58, 16
	v_readlane_b32 s46, v58, 23
	v_readlane_b32 s47, v58, 24
	v_readlane_b32 s48, v58, 25
	v_readlane_b32 s49, v58, 26
	v_readlane_b32 s50, v58, 27
	v_readlane_b32 s51, v58, 28
	s_addc_u32 s45, s45, 0
	v_writelane_b32 v58, s36, 13
	v_writelane_b32 v58, s37, 14
	v_writelane_b32 v58, s38, 15
	v_writelane_b32 v58, s39, 16
	v_writelane_b32 v58, s40, 17
	v_writelane_b32 v58, s41, 18
	v_writelane_b32 v58, s42, 19
	v_writelane_b32 v58, s43, 20
	v_writelane_b32 v58, s44, 21
	v_writelane_b32 v58, s45, 22
	v_writelane_b32 v58, s46, 23
	v_writelane_b32 v58, s47, 24
	v_writelane_b32 v58, s48, 25
	v_writelane_b32 v58, s49, 26
	v_writelane_b32 v58, s50, 27
	v_writelane_b32 v58, s51, 28
	s_mov_b64 s[36:37], s[52:53]
	s_mov_b64 s[38:39], s[54:55]
	global_load_b64 v[8:9], v3, s[36:37] offset:8
	s_mov_b64 s[40:41], s[56:57]
	v_readlane_b32 s0, v58, 29
	v_readlane_b32 s1, v58, 30
	s_mov_b64 s[44:45], s[60:61]
	s_mov_b64 s[46:47], s[62:63]
	s_mov_b64 s[48:49], s[64:65]
	s_add_u32 s0, s0, s33
	s_addc_u32 s1, s1, 0
	v_writelane_b32 v58, s0, 29
	s_mov_b64 s[42:43], s[58:59]
	s_mov_b64 s[50:51], s[66:67]
	s_mov_b64 s[52:53], s[68:69]
	s_mov_b64 s[54:55], s[70:71]
	v_writelane_b32 v58, s1, 30
	s_mov_b64 s[56:57], s[72:73]
	s_mov_b64 s[58:59], s[74:75]
	s_mov_b64 s[60:61], s[76:77]
	s_mov_b64 s[62:63], s[78:79]
	v_readlane_b32 s0, v58, 11
	v_readlane_b32 s1, v58, 12
	s_mov_b64 s[64:65], s[80:81]
	s_mov_b64 s[66:67], s[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_u32 s0, s0, s33
	s_addc_u32 s1, s1, 0
	v_writelane_b32 v58, s0, 11
	v_writelane_b32 v58, s1, 12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readlane_b32 s0, v58, 9
	v_readlane_b32 s1, v58, 10
	s_add_u32 s0, s0, s33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_addc_u32 s1, s1, 0
	v_writelane_b32 v58, s0, 9
	v_writelane_b32 v58, s1, 10
	v_readlane_b32 s0, v59, 8
	v_readlane_b32 s1, v59, 9
	s_add_u32 s0, s0, s33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_addc_u32 s1, s1, 0
	v_writelane_b32 v59, s0, 8
	v_writelane_b32 v59, s1, 9
	v_readlane_b32 s0, v59, 6
	v_readlane_b32 s1, v59, 7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_u32 s0, s0, s33
	s_addc_u32 s1, s1, 0
	v_writelane_b32 v59, s0, 6
	v_writelane_b32 v59, s1, 7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readlane_b32 s0, v59, 4
	v_readlane_b32 s1, v59, 5
	s_add_u32 s0, s0, s33
	s_delay_alu instid0(VALU_DEP_1)
	s_addc_u32 s1, s1, 0
	v_writelane_b32 v59, s0, 4
	s_add_u32 s44, s44, s33
	s_addc_u32 s45, s45, 0
	s_add_u32 s46, s46, s33
	s_addc_u32 s47, s47, 0
	v_writelane_b32 v59, s1, 5
	s_add_u32 s48, s48, s33
	s_addc_u32 s49, s49, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readlane_b32 s0, v59, 2
	v_readlane_b32 s1, v59, 3
	v_cmp_le_i32_e32 vcc_lo, s0, v1
	v_readlane_b32 s0, v59, 28
	v_readlane_b32 s1, v59, 29
	s_or_b32 s104, vcc_lo, s2
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[8:9], s[36:37]
	global_load_b64 v[8:9], v3, s[38:39] offset:8
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v9, 0x80000000, v9
	global_store_b64 v3, v[8:9], s[38:39]
	global_load_b64 v[8:9], v3, s[40:41] offset:8
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[8:9], s[40:41]
	global_load_b64 v[8:9], v3, s[0:1] offset:-16
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[8:9], s[0:1] offset:-8
	v_readlane_b32 s0, v59, 30
	v_readlane_b32 s1, v59, 31
	global_load_b64 v[8:9], v3, s[0:1] offset:-16
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v9, 0x80000000, v9
	global_store_b64 v3, v[8:9], s[0:1] offset:-8
	v_readlane_b32 s0, v58, 0
	v_readlane_b32 s1, v58, 1
	global_load_b64 v[8:9], v3, s[0:1] offset:-16
	s_waitcnt vmcnt(0)
	global_store_b64 v3, v[8:9], s[0:1] offset:-8
	s_and_not1_b32 exec_lo, exec_lo, s104
	s_cbranch_execnz .LBB0_2
.LBB0_13:                               ; %Flow915
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 672
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 60
		.amdhsa_next_free_sgpr 105
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 10876
; NumSgprs: 107
; NumVgprs: 60
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 13
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 107
; NumVGPRsForWavesPerEU: 60
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         168
        .size:           8
        .value_kind:     global_buffer
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    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 672
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_
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    .sgpr_count:     107
    .sgpr_spill_count: 143
    .symbol:         _Z7RoeStepiPdS_S_PKdS_S_S_S1_S1_S1_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_PiS2_S2_S_S_S_S_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     60
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
