// https://stackoverflow.com/questions/57187912/how-to-differentiate-gpu-threads-in-a-single-gpu-for-different-host-cpu-thread
// nvcc cuda_std_thread.cu -o cuda_std_thread -std=c++11
#include <iostream>
#include <math.h>
#include <thread>
#include <vector>

#include <cuda.h>


using namespace std;

const unsigned NUM_THREADS = std::thread::hardware_concurrency();  //.. no. of core in the machine

// Kernel function to add the elements of two arrays
__global__
void add_2(int n, float *x, float *y)
{
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    if(i < n) {
        y[i] = x[i] + y[i];
    }
}

//
void thread_func(int N, float *x, float *y, int idx_thread)
{
    cudaSetDevice(0); //.. set to current GPU. Since I have only one, this is set to 0. Can skip this line since by default, it is set to 0

    int blockSize;   // The launch configurator returned block size
    int minGridSize; // The minimum grid size needed to achieve the
    // maximum occupancy for a full device launch
    int gridSize;    // The actual grid size needed, based on input size

    cudaOccupancyMaxPotentialBlockSize( &minGridSize, &blockSize, add_2, 0, N);

    // sample size for each host thread
    int workSize = (N + NUM_THREADS - 1)/NUM_THREADS;

    // Round up according to array size
    gridSize = (workSize + blockSize - 1)/blockSize;

    cout<<"blockSize: "<<blockSize<<" minGridSize: "<<minGridSize<<" gridSize: "<<gridSize<<endl;

    // Run kernel on 1M elements on the GPU
    add_2<<<gridSize, blockSize>>>(workSize, x+idx_thread*workSize, y+idx_thread*workSize);


	// Wait for GPU to finish before accessing on host
	cudaDeviceSynchronize();
}

//
int main()
{

	int N = 1<<30;
	float *x, *y;
	// Allocate Unified Memory – accessible from CPU or GPU
	cudaMallocManaged(&x, N*sizeof(float));
	cudaMallocManaged(&y, N*sizeof(float));

	// initialize x and y arrays on the host
	for (int i = 0; i < N; i++) {
		x[i] = 1.0f;
		y[i] = 2.0f;
	}

    //.. begin multithreading ..
    vector<std::thread> t;
    for(int i = 0; i<NUM_THREADS; i++) 
        t.push_back(thread(thread_func, N, x, y, i));

    for(int i = 0; i<NUM_THREADS; i++)
        t[i].join();

	// Check for errors (all values should be 3.0f)
	//float maxError = 0.0f;
	//for (int i = 0; i < N; i++) {
    //    if(!(i%100000000))
    //        std::cout<<i<<" "<<y[i]<<std::endl;
	//	maxError = fmax(maxError, fabs(y[i]-3.0f));
	//}
	//std::cout << "Max error: " << maxError << std::endl;

	// Free memory
	cudaFree(x);
	cudaFree(y);

    return 0;
}

	.file	"tmpxft_0029471c_00000000-6_cuda_std_thread.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text._ZNSt6thread24_M_thread_deps_never_runEv,"axG",@progbits,_ZNSt6thread24_M_thread_deps_never_runEv,comdat
	.weak	_ZNSt6thread24_M_thread_deps_never_runEv
	.type	_ZNSt6thread24_M_thread_deps_never_runEv, @function
_ZNSt6thread24_M_thread_deps_never_runEv:
.LFB3714:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE3714:
	.size	_ZNSt6thread24_M_thread_deps_never_runEv, .-_ZNSt6thread24_M_thread_deps_never_runEv
	.section	.text._ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED2Ev,"axG",@progbits,_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED5Ev,comdat
	.align 2
	.weak	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED2Ev
	.type	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED2Ev, @function
_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED2Ev:
.LFB5117:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE(%rip), %rax
	movq	%rax, (%rdi)
	jmp	_ZNSt6thread6_StateD2Ev@PLT
	.cfi_endproc
.LFE5117:
	.size	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED2Ev, .-_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED2Ev
	.weak	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED1Ev
	.set	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED1Ev,_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED2Ev
	.section	.text._ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev,"axG",@progbits,_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED5Ev,comdat
	.align 2
	.weak	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev
	.type	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev, @function
_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev:
.LFB5119:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED1Ev
	movq	8(%rsp), %rdi
	movl	$48, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE5119:
	.size	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev, .-_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4222:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4222:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text._ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv,"axG",@progbits,_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv,comdat
	.align 2
	.weak	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv
	.type	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv, @function
_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv:
.LFB5121:
	.cfi_startproc
	endbr64
	movl	32(%rdi), %r8d
	movl	8(%rdi), %ecx
	movq	16(%rdi), %rdx
	movq	24(%rdi), %rsi
	movq	40(%rdi), %rax
	movl	%r8d, %edi
	jmp	*%rax
	.cfi_endproc
.LFE5121:
	.size	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv, .-_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv
	.text
	.globl	_Z27__device_stub__Z5add_2iPfS_iPfS_
	.type	_Z27__device_stub__Z5add_2iPfS_iPfS_, @function
_Z27__device_stub__Z5add_2iPfS_iPfS_:
.LFB4244:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5add_2iPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L7:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4244:
	.size	_Z27__device_stub__Z5add_2iPfS_iPfS_, .-_Z27__device_stub__Z5add_2iPfS_iPfS_
	.globl	_Z5add_2iPfS_
	.type	_Z5add_2iPfS_, @function
_Z5add_2iPfS_:
.LFB4245:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z5add_2iPfS_iPfS_
	.cfi_endproc
.LFE4245:
	.size	_Z5add_2iPfS_, .-_Z5add_2iPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"blockSize: "
.LC1:
	.string	" minGridSize: "
.LC2:
	.string	" gridSize: "
	.text
	.globl	_Z11thread_funciPfS_i
	.type	_Z11thread_funciPfS_i, @function
_Z11thread_funciPfS_i:
.LFB4208:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	xorl	%edi, %edi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	movq	%rsi, 16(%rsp)
	movq	%rdx, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	leaq	48(%rsp), %rdi
	call	cudaGetDevice@PLT
	testl	%eax, %eax
	jne	.L15
	movl	48(%rsp), %edx
	leaq	52(%rsp), %rdi
	movl	$39, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L15
	movl	48(%rsp), %edx
	leaq	56(%rsp), %rdi
	movl	$10, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L15
	movl	48(%rsp), %edx
	leaq	60(%rsp), %rdi
	movl	$1, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L15
	movl	48(%rsp), %edx
	leaq	64(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L15
	leaq	88(%rsp), %rdi
	leaq	_Z5add_2iPfS_(%rip), %rsi
	call	cudaFuncGetAttributes@PLT
	testl	%eax, %eax
	jne	.L15
	movl	52(%rsp), %eax
	movl	112(%rsp), %r12d
	testl	%r14d, %r14d
	movl	%r14d, %edx
	movl	56(%rsp), %r9d
	movl	%eax, 12(%rsp)
	movl	60(%rsp), %eax
	cmove	%eax, %edx
	cmpl	%eax, %r12d
	cmovg	%eax, %r12d
	cmpl	%edx, %r12d
	cmovg	%edx, %r12d
	xorl	%r10d, %r10d
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
	leal	-1(%r9,%r12), %ebp
	movl	%ebp, %eax
	cltd
	idivl	%r9d
	subl	%edx, %ebp
.L18:
	testl	%ebp, %ebp
	jle	.L20
	cmpl	%ebp, %r12d
	movl	%ebp, %edx
	leaq	76(%rsp), %rdi
	movl	%r10d, 44(%rsp)
	cmovle	%r12d, %edx
	leaq	_Z5add_2iPfS_(%rip), %rsi
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
	movl	%r9d, 40(%rsp)
	movl	%edx, 36(%rsp)
	call	cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags@PLT
	testl	%eax, %eax
	jne	.L15
	movl	36(%rsp), %edx
	movl	76(%rsp), %eax
	movl	44(%rsp), %r10d
	movl	40(%rsp), %r9d
	movl	%edx, %ecx
	imull	%eax, %ecx
	cmpl	%r10d, %ecx
	jle	.L19
	movl	%ecx, %r10d
	movl	%eax, %r15d
	movl	%edx, %r13d
.L19:
	cmpl	%r10d, 12(%rsp)
	je	.L20
	subl	%r9d, %ebp
	jmp	.L18
.L20:
	imull	64(%rsp), %r15d
	movl	%r15d, 32(%rsp)
.L15:
	movl	_ZL11NUM_THREADS(%rip), %ecx
	xorl	%edx, %edx
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	leal	-1(%rcx,%r14), %eax
	divl	%ecx
	movl	%eax, %r12d
	leal	-1(%r13,%rax), %eax
	cltd
	idivl	%r13d
	movl	%eax, %ebp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	32(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	%r13d, 76(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 64(%rsp)
	movq	%rax, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	%rax, 68(%rsp)
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	imull	%r12d, %ebx
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%r12d, %edi
	movslq	%ebx, %rbx
	salq	$2, %rbx
	addq	%rbx, %rdx
	addq	%rbx, %rsi
	call	_Z27__device_stub__Z5add_2iPfS_iPfS_
.L22:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE4208:
	.size	_Z11thread_funciPfS_i, .-_Z11thread_funciPfS_i
	.section	.rodata.str1.1
.LC3:
	.string	"_Z5add_2iPfS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4247:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5add_2iPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4247:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorISt6threadSaIS0_EED2Ev,"axG",@progbits,_ZNSt6vectorISt6threadSaIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorISt6threadSaIS0_EED2Ev
	.type	_ZNSt6vectorISt6threadSaIS0_EED2Ev, @function
_ZNSt6vectorISt6threadSaIS0_EED2Ev:
.LFB4592:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	8(%rdi), %rcx
	movq	%rax, %rdx
.L31:
	cmpq	%rdx, %rcx
	je	.L38
	cmpq	$0, (%rdx)
	je	.L32
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZSt9terminatev@PLT
.L32:
	.cfi_def_cfa_offset 8
	addq	$8, %rdx
	jmp	.L31
.L38:
	testq	%rax, %rax
	je	.L30
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L30:
	ret
	.cfi_endproc
.LFE4592:
	.size	_ZNSt6vectorISt6threadSaIS0_EED2Ev, .-_ZNSt6vectorISt6threadSaIS0_EED2Ev
	.weak	_ZNSt6vectorISt6threadSaIS0_EED1Ev
	.set	_ZNSt6vectorISt6threadSaIS0_EED1Ev,_ZNSt6vectorISt6threadSaIS0_EED2Ev
	.section	.text._ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev,"axG",@progbits,_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED5Ev,comdat
	.align 2
	.weak	_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev
	.type	_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev, @function
_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev:
.LFB4796:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	je	.L39
	movq	(%rdi), %rax
	jmp	*8(%rax)
.L39:
	ret
	.cfi_endproc
.LFE4796:
	.size	_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev, .-_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev
	.weak	_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED1Ev
	.set	_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED1Ev,_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev
	.section	.rodata._ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_.str1.1,"aMS",@progbits,1
.LC4:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.type	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, @function
_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_:
.LFB4927:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	movabsq	$1152921504606846975, %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbp
	movq	(%rdi), %r13
	movq	%rbp, %rbx
	subq	%r13, %rbx
	sarq	$3, %rbx
	cmpq	%rsi, %rbx
	jne	.L42
	leaq	.LC4(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L42:
	cmpq	%r13, %rbp
	movl	$1, %eax
	movq	%r15, %rcx
	movq	%rdi, %r12
	cmovne	%rbx, %rax
	addq	%rax, %rbx
	setc	%al
	subq	%r13, %rcx
	movzbl	%al, %eax
	movq	%rcx, (%rsp)
	testq	%rax, %rax
	jne	.L54
	xorl	%r14d, %r14d
	testq	%rbx, %rbx
	je	.L47
	movabsq	$1152921504606846975, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L46
.L54:
	movq	%rsi, %rbx
.L46:
	leaq	0(,%rbx,8), %rdi
	movq	%rdx, 8(%rsp)
	call	_Znwm@PLT
	movq	8(%rsp), %rdx
	movq	%rax, %r14
.L47:
	movq	(%rdx), %rax
	movq	(%rsp), %rcx
	movq	%r14, %rsi
	movq	%rax, (%r14,%rcx)
	xorl	%eax, %eax
	movq	%rax, (%rdx)
	movq	%r13, %rax
.L48:
	addq	$8, %rsi
	cmpq	%rax, %r15
	leaq	8(%rax), %rdx
	je	.L61
	movq	(%rax), %rax
	movq	%rax, -8(%rsi)
	movq	%rdx, %rax
	jmp	.L48
.L61:
	subq	%r13, %rdx
	movq	%rax, %rsi
	addq	%r14, %rdx
	movq	%rdx, %rcx
.L50:
	cmpq	%rbp, %rax
	je	.L62
	movq	(%rax), %rdi
	addq	$8, %rcx
	addq	$8, %rax
	movq	%rdi, -8(%rcx)
	jmp	.L50
.L62:
	subq	%rsi, %rax
	leaq	(%rdx,%rax), %rbp
	testq	%r13, %r13
	je	.L52
	movq	16(%r12), %rsi
	movq	%r13, %rdi
	subq	%r13, %rsi
	call	_ZdlPvm@PLT
.L52:
	leaq	(%r14,%rbx,8), %rax
	movq	%r14, (%r12)
	movq	%rbp, 8(%r12)
	movq	%rax, 16(%r12)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4927:
	.size	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .-_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4209:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4209
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1, %edx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	$1, %ebx
	salq	$32, %rbx
	movq	%rbx, %rsi
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
.LEHB0:
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
.LEHE0:
	movq	(%rsp), %rcx
	movq	8(%rsp), %rdx
	xorl	%eax, %eax
	movss	.LC5(%rip), %xmm1
	movss	.LC6(%rip), %xmm0
.L64:
	movss	%xmm1, (%rcx,%rax)
	movss	%xmm0, (%rdx,%rax)
	addq	$4, %rax
	cmpq	%rbx, %rax
	jne	.L64
	xorl	%ecx, %ecx
	xorl	%ebx, %ebx
	leaq	16+_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE(%rip), %rbp
	movq	%rcx, 32(%rsp)
	movq	%rcx, 40(%rsp)
	movq	%rcx, 48(%rsp)
.L65:
	cmpl	_ZL11NUM_THREADS(%rip), %ebx
	jnb	.L85
	xorl	%edx, %edx
	movl	$48, %edi
	movq	%rdx, 16(%rsp)
.LEHB1:
	call	_Znwm@PLT
.LEHE1:
	movq	8(%rsp), %rdx
	movq	%rbp, (%rax)
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	leaq	_Z11thread_funciPfS_i(%rip), %rcx
	movl	%ebx, 8(%rax)
	movq	%r12, %rsi
	movq	%r13, %rdi
	movq	%rdx, 16(%rax)
	movq	(%rsp), %rdx
	movl	$1073741824, 32(%rax)
	movq	%rdx, 24(%rax)
	leaq	_ZNSt6thread24_M_thread_deps_never_runEv(%rip), %rdx
	movq	%rcx, 40(%rax)
	movq	%rax, 24(%rsp)
.LEHB2:
	call	_ZNSt6thread15_M_start_threadESt10unique_ptrINS_6_StateESt14default_deleteIS1_EEPFvvE@PLT
.LEHE2:
	movq	%r12, %rdi
	call	_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED1Ev
	movq	40(%rsp), %rsi
	cmpq	48(%rsp), %rsi
	je	.L86
	xorl	%eax, %eax
	addq	$8, %rsi
	movq	%rax, -8(%rsi)
	movq	16(%rsp), %rax
	movq	%rax, -8(%rsi)
	movq	%rsi, 40(%rsp)
	jmp	.L70
.L80:
	endbr64
	movq	%rax, %rbx
.L68:
	movq	%r12, %rdi
	call	_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED1Ev
	jmp	.L69
.L86:
	leaq	32(%rsp), %rdi
	movq	%r13, %rdx
.LEHB3:
	call	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.LEHE3:
	cmpq	$0, 16(%rsp)
	je	.L70
.L75:
	call	_ZSt9terminatev@PLT
.L70:
	incl	%ebx
	jmp	.L65
.L85:
	xorl	%ebx, %ebx
.L72:
	cmpl	_ZL11NUM_THREADS(%rip), %ebx
	jnb	.L87
	movq	32(%rsp), %rax
	leaq	(%rax,%rbx,8), %rdi
.LEHB4:
	call	_ZNSt6thread4joinEv@PLT
	incq	%rbx
	jmp	.L72
.L87:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
.LEHE4:
	leaq	32(%rsp), %rdi
	call	_ZNSt6vectorISt6threadSaIS0_EED1Ev
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	jmp	.L83
.L78:
	endbr64
	movq	%rax, %rbx
.L74:
	cmpq	$0, 16(%rsp)
	je	.L69
	jmp	.L75
.L79:
	endbr64
	movq	%rax, %rbx
.L69:
	leaq	32(%rsp), %rdi
	call	_ZNSt6vectorISt6threadSaIS0_EED1Ev
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L83
	movq	%rbx, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L83:
	call	__stack_chk_fail@PLT
.L77:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4209:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4209:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4209-.LLSDACSB4209
.LLSDACSB4209:
	.uleb128 .LEHB0-.LFB4209
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4209
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L79-.LFB4209
	.uleb128 0
	.uleb128 .LEHB2-.LFB4209
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L80-.LFB4209
	.uleb128 0
	.uleb128 .LEHB3-.LFB4209
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L78-.LFB4209
	.uleb128 0
	.uleb128 .LEHB4-.LFB4209
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L79-.LFB4209
	.uleb128 0
	.uleb128 .LEHB5-.LFB4209
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE4209:
	.section	.text.startup
	.size	main, .-main
	.type	_GLOBAL__sub_I__Z11thread_funciPfS_i, @function
_GLOBAL__sub_I__Z11thread_funciPfS_i:
.LFB5151:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZNSt6thread20hardware_concurrencyEv@PLT
	movl	%eax, _ZL11NUM_THREADS(%rip)
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5151:
	.size	_GLOBAL__sub_I__Z11thread_funciPfS_i, .-_GLOBAL__sub_I__Z11thread_funciPfS_i
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I__Z11thread_funciPfS_i
	.weak	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.section	.rodata._ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,"aG",@progbits,_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,comdat
	.align 32
	.type	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, @object
	.size	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, 73
_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE:
	.string	"NSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE"
	.weak	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.section	.data.rel.ro._ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,"awG",@progbits,_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,comdat
	.align 8
	.type	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, @object
	.size	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, 24
_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.quad	_ZTINSt6thread6_StateE
	.weak	_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.section	.data.rel.ro.local._ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,"awG",@progbits,_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,comdat
	.align 8
	.type	_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, @object
	.size	_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, 40
_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE:
	.quad	0
	.quad	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.quad	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED1Ev
	.quad	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev
	.quad	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL11NUM_THREADS
	.comm	_ZL11NUM_THREADS,4,4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1065353216
	.align 4
.LC6:
	.long	1073741824
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// https://stackoverflow.com/questions/57187912/how-to-differentiate-gpu-threads-in-a-single-gpu-for-different-host-cpu-thread
// nvcc cuda_std_thread.cu -o cuda_std_thread -std=c++11
#include <iostream>
#include <math.h>
#include <thread>
#include <vector>

#include <hip/hip_runtime.h>


using namespace std;

const unsigned NUM_THREADS = std::thread::hardware_concurrency();  //.. no. of core in the machine

// Kernel function to add the elements of two arrays
__global__
void add_2(int n, float *x, float *y)
{
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    if(i < n) {
        y[i] = x[i] + y[i];
    }
}

//
void thread_func(int N, float *x, float *y, int idx_thread)
{
    hipSetDevice(0); //.. set to current GPU. Since I have only one, this is set to 0. Can skip this line since by default, it is set to 0

    int blockSize;   // The launch configurator returned block size
    int minGridSize; // The minimum grid size needed to achieve the
    // maximum occupancy for a full device launch
    int gridSize;    // The actual grid size needed, based on input size

    hipOccupancyMaxPotentialBlockSize( &minGridSize, &blockSize, add_2, 0, N);

    // sample size for each host thread
    int workSize = (N + NUM_THREADS - 1)/NUM_THREADS;

    // Round up according to array size
    gridSize = (workSize + blockSize - 1)/blockSize;

    cout<<"blockSize: "<<blockSize<<" minGridSize: "<<minGridSize<<" gridSize: "<<gridSize<<endl;

    // Run kernel on 1M elements on the GPU
    add_2<<<gridSize, blockSize>>>(workSize, x+idx_thread*workSize, y+idx_thread*workSize);


	// Wait for GPU to finish before accessing on host
	hipDeviceSynchronize();
}

//
int main()
{

	int N = 1<<30;
	float *x, *y;
	// Allocate Unified Memory – accessible from CPU or GPU
	hipMallocManaged(&x, N*sizeof(float));
	hipMallocManaged(&y, N*sizeof(float));

	// initialize x and y arrays on the host
	for (int i = 0; i < N; i++) {
		x[i] = 1.0f;
		y[i] = 2.0f;
	}

    //.. begin multithreading ..
    vector<std::thread> t;
    for(int i = 0; i<NUM_THREADS; i++) 
        t.push_back(thread(thread_func, N, x, y, i));

    for(int i = 0; i<NUM_THREADS; i++)
        t[i].join();

	// Check for errors (all values should be 3.0f)
	//float maxError = 0.0f;
	//for (int i = 0; i < N; i++) {
    //    if(!(i%100000000))
    //        std::cout<<i<<" "<<y[i]<<std::endl;
	//	maxError = fmax(maxError, fabs(y[i]-3.0f));
	//}
	//std::cout << "Max error: " << maxError << std::endl;

	// Free memory
	hipFree(x);
	hipFree(y);

    return 0;
}

	.text
	.file	"cuda_std_thread.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z20__device_stub__add_2iPfS_   # -- Begin function _Z20__device_stub__add_2iPfS_
	.type	_Z20__device_stub__add_2iPfS_,@function
_Z20__device_stub__add_2iPfS_:          # @_Z20__device_stub__add_2iPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5add_2iPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__add_2iPfS_, .Lfunc_end0-_Z20__device_stub__add_2iPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11thread_funciPfS_i           # -- Begin function _Z11thread_funciPfS_i
	.type	_Z11thread_funciPfS_i,@function
_Z11thread_funciPfS_i:                  # @_Z11thread_funciPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	movq	%rsi, (%rsp)                    # 8-byte Spill
	movl	%edi, %r15d
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	16(%rsp), %rbx
	leaq	20(%rsp), %r12
	movl	$_Z5add_2iPfS_, %edx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%ecx, %ecx
	movl	%r15d, %r8d
	callq	hipOccupancyMaxPotentialBlockSize
	movl	_ZL11NUM_THREADS(%rip), %ecx
	leal	(%r15,%rcx), %eax
	decl	%eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r15d
	movl	(%r12), %ecx
	leal	(%r15,%rcx), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, %r13d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%r12), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$14, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$11, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	%r13d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	(%r12), %edx
	btsq	$32, %r13
	btsq	$32, %rdx
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	imull	%r15d, %ebp
	movslq	%ebp, %rax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %rsi
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdx
	movl	%r15d, %edi
	callq	_Z20__device_stub__add_2iPfS_
.LBB1_2:
	callq	hipDeviceSynchronize
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11thread_funciPfS_i, .Lfunc_end1-_Z11thread_funciPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:                                # %.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1073741824, 4(%rsp)            # imm = 0x40000000
	leaq	24(%rsp), %rbx
	movabsq	$4294967296, %r14               # imm = 0x100000000
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%rbx), %rax
	xorl	%ecx, %ecx
	movq	(%r15), %rdx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rax,%rcx,4)      # imm = 0x3F800000
	movl	$1073741824, (%rdx,%rcx,4)      # imm = 0x40000000
	incq	%rcx
	cmpq	$1073741824, %rcx               # imm = 0x40000000
	jne	.LBB2_1
# %bb.2:                                # %._crit_edge
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 32(%rsp)
	movq	$0, 48(%rsp)
	movl	$0, (%rsp)
	cmpl	$0, _ZL11NUM_THREADS(%rip)
	je	.LBB2_12
# %bb.3:
	leaq	8(%rsp), %rbx
	leaq	4(%rsp), %r14
	leaq	24(%rsp), %r15
	leaq	16(%rsp), %r12
	movq	%rsp, %r13
	leaq	32(%rsp), %rbp
.LBB2_4:                                # %.lr.ph20
                                        # =>This Inner Loop Header: Depth=1
.Ltmp0:
	movl	$_Z11thread_funciPfS_i, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movq	%r15, %rcx
	movq	%r12, %r8
	movq	%r13, %r9
	callq	_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_
.Ltmp1:
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=1
.Ltmp3:
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
.Ltmp4:
# %bb.6:                                # %_ZNSt6vectorISt6threadSaIS0_EE9push_backEOS0_.exit
                                        #   in Loop: Header=BB2_4 Depth=1
	cmpq	$0, 8(%rsp)
	jne	.LBB2_17
# %bb.7:                                # %_ZNSt6threadD2Ev.exit
                                        #   in Loop: Header=BB2_4 Depth=1
	movl	(%rsp), %ecx
	incl	%ecx
	movl	%ecx, (%rsp)
	movl	_ZL11NUM_THREADS(%rip), %eax
	cmpl	%eax, %ecx
	jb	.LBB2_4
# %bb.8:                                # %._crit_edge21
	testl	%eax, %eax
	je	.LBB2_12
# %bb.9:                                # %.lr.ph24.preheader
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB2_10:                               # %.lr.ph24
                                        # =>This Inner Loop Header: Depth=1
	movq	32(%rsp), %rdi
	addq	%rbx, %rdi
.Ltmp6:
	callq	_ZNSt6thread4joinEv
.Ltmp7:
# %bb.11:                               #   in Loop: Header=BB2_10 Depth=1
	incq	%r14
	movl	_ZL11NUM_THREADS(%rip), %eax
	addq	$8, %rbx
	cmpq	%rax, %r14
	jb	.LBB2_10
.LBB2_12:                               # %._crit_edge25
	movq	24(%rsp), %rdi
.Ltmp9:
	callq	hipFree
.Ltmp10:
# %bb.13:
	movq	16(%rsp), %rdi
.Ltmp11:
	callq	hipFree
.Ltmp12:
# %bb.14:
	leaq	32(%rsp), %rdi
	callq	_ZNSt6vectorISt6threadSaIS0_EED2Ev
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_19:
	.cfi_def_cfa_offset 112
.Ltmp13:
	jmp	.LBB2_20
.LBB2_18:
.Ltmp8:
	jmp	.LBB2_20
.LBB2_15:
.Ltmp2:
	jmp	.LBB2_20
.LBB2_16:
.Ltmp5:
	cmpq	$0, 8(%rsp)
	jne	.LBB2_17
.LBB2_20:
	movq	%rax, %rbx
	leaq	32(%rsp), %rdi
	callq	_ZNSt6vectorISt6threadSaIS0_EED2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB2_17:
	callq	_ZSt9terminatev
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp12-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin0          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Lfunc_end2-.Ltmp12            #   Call between .Ltmp12 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_,"axG",@progbits,_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_,comdat
	.weak	_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_ # -- Begin function _ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_
	.p2align	1, 0x90
	.type	_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_,@function
_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_: # @_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	movq	$0, (%rdi)
	movl	$48, %edi
	callq	_Znwm
	movq	$_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE+16, (%rax)
	movl	(%rbx), %ecx
	movl	%ecx, 8(%rax)
	movq	(%r14), %rcx
	movq	%rcx, 16(%rax)
	movq	(%r15), %rcx
	movq	%rcx, 24(%rax)
	movl	(%r12), %ecx
	movl	%ecx, 32(%rax)
	movq	%r13, 40(%rax)
	movq	%rsp, %rsi
	movq	%rax, (%rsi)
.Ltmp14:
	movl	$_ZNSt6thread24_M_thread_deps_never_runEv, %edx
	movq	%rbp, %rdi
	callq	_ZNSt6thread15_M_start_threadESt10unique_ptrINS_6_StateESt14default_deleteIS1_EEPFvvE
.Ltmp15:
# %bb.1:
	movq	(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_3
# %bb.2:                                # %_ZNKSt14default_deleteINSt6thread6_StateEEclEPS1_.exit.i
	movq	(%rdi), %rax
	callq	*8(%rax)
.LBB3_3:                                # %_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_4:
	.cfi_def_cfa_offset 64
.Ltmp16:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_6
# %bb.5:                                # %_ZNKSt14default_deleteINSt6thread6_StateEEclEPS1_.exit.i10
	movq	(%rdi), %rax
	callq	*8(%rax)
.LBB3_6:                                # %_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED2Ev.exit11
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_, .Lfunc_end3-_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_
	.cfi_endproc
	.section	.gcc_except_table._ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_,"aG",@progbits,_ZNSt6threadC2IRFviPfS1_iEJRiRS1_S5_S4_EvEEOT_DpOT0_,comdat
	.p2align	2, 0x0
GCC_except_table3:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp14-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp14
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp14-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp15-.Ltmp14                #   Call between .Ltmp14 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin1          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Lfunc_end3-.Ltmp15            #   Call between .Ltmp15 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorISt6threadSaIS0_EED2Ev,"axG",@progbits,_ZNSt6vectorISt6threadSaIS0_EED2Ev,comdat
	.weak	_ZNSt6vectorISt6threadSaIS0_EED2Ev # -- Begin function _ZNSt6vectorISt6threadSaIS0_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt6vectorISt6threadSaIS0_EED2Ev,@function
_ZNSt6vectorISt6threadSaIS0_EED2Ev:     # @_ZNSt6vectorISt6threadSaIS0_EED2Ev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdi, %rax
	movq	(%rdi), %rdi
	movq	8(%rax), %rax
	cmpq	%rax, %rdi
	je	.LBB4_5
# %bb.1:
	movq	%rdi, %rcx
.LBB4_3:                                # %_ZSt8_DestroyISt6threadEvPT_.exit.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$0, (%rcx)
	jne	.LBB4_4
# %bb.2:                                #   in Loop: Header=BB4_3 Depth=1
	addq	$8, %rcx
	cmpq	%rax, %rcx
	jne	.LBB4_3
.LBB4_5:                                # %_ZSt8_DestroyIPSt6threadS0_EvT_S2_RSaIT0_E.exit
	testq	%rdi, %rdi
	je	.LBB4_6
# %bb.7:
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.LBB4_6:                                # %_ZNSt12_Vector_baseISt6threadSaIS0_EED2Ev.exit
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB4_4:
	.cfi_def_cfa_offset 16
	callq	_ZSt9terminatev
.Lfunc_end4:
	.size	_ZNSt6vectorISt6threadSaIS0_EED2Ev, .Lfunc_end4-_ZNSt6vectorISt6threadSaIS0_EED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6thread24_M_thread_deps_never_runEv,"axG",@progbits,_ZNSt6thread24_M_thread_deps_never_runEv,comdat
	.weak	_ZNSt6thread24_M_thread_deps_never_runEv # -- Begin function _ZNSt6thread24_M_thread_deps_never_runEv
	.p2align	1, 0x90
	.type	_ZNSt6thread24_M_thread_deps_never_runEv,@function
_ZNSt6thread24_M_thread_deps_never_runEv: # @_ZNSt6thread24_M_thread_deps_never_runEv
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end5:
	.size	_ZNSt6thread24_M_thread_deps_never_runEv, .Lfunc_end5-_ZNSt6thread24_M_thread_deps_never_runEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev,"axG",@progbits,_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev,comdat
	.weak	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev # -- Begin function _ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev
	.p2align	1, 0x90
	.type	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev,@function
_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev: # @_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	_ZNSt6thread6_StateD2Ev
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end6:
	.size	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev, .Lfunc_end6-_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv,"axG",@progbits,_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv,comdat
	.weak	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv # -- Begin function _ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv
	.p2align	1, 0x90
	.type	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv,@function
_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv: # @_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv
	.cfi_startproc
# %bb.0:
	movq	40(%rdi), %r8
	movl	32(%rdi), %eax
	movq	24(%rdi), %rsi
	movq	16(%rdi), %rdx
	movl	8(%rdi), %ecx
	movl	%eax, %edi
	jmpq	*%r8                            # TAILCALL
.Lfunc_end7:
	.size	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv, .Lfunc_end7-_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_,"axG",@progbits,_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_,comdat
	.weak	_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_ # -- Begin function _ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_,@function
_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_: # @_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB8_2
# %bb.1:
	xorl	%eax, %eax
	movq	%rax, (%rsi)
	movq	(%rdx), %rcx
	movq	%rcx, (%rsi)
	movq	%rax, (%rdx)
	movq	8(%rbx), %rax
	addq	$8, %rax
	movq	%rax, 8(%rbx)
	jmp	.LBB8_3
.LBB8_2:
	movq	%rbx, %rdi
	callq	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	movq	8(%rbx), %rax
.LBB8_3:
	addq	$-8, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_, .Lfunc_end8-_ZNSt6vectorISt6threadSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.weak	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_ # -- Begin function _ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,@function
_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_: # @_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.3, %edx
	callq	_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc
	movq	(%rbx), %r12
	movq	8(%rbx), %r14
	movq	%r15, %rbp
	subq	%r12, %rbp
	sarq	$3, %rbp
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB9_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt6threadE8allocateEmPKv
	movq	%rax, %r13
	jmp	.LBB9_3
.LBB9_1:
	xorl	%r13d, %r13d
.LBB9_3:                                # %_ZNSt12_Vector_baseISt6threadSaIS0_EE11_M_allocateEm.exit
	xorl	%eax, %eax
	movq	%rax, (%r13,%rbp,8)
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movq	(%rdx), %rcx
	movq	%rcx, (%r13,%rbp,8)
	movq	%rax, (%rdx)
	movq	%r13, %rbp
	cmpq	%r15, %r12
	je	.LBB9_6
# %bb.4:                                # %.lr.ph.i.i.i.preheader
	movq	%r13, %rbp
	movq	%r12, %rax
.LBB9_5:                                # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rax), %rcx
	movq	%rcx, (%rbp)
	movq	$0, (%rax)
	addq	$8, %rax
	addq	$8, %rbp
	cmpq	%r15, %rax
	jne	.LBB9_5
.LBB9_6:                                # %_ZNSt6vectorISt6threadSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit
	addq	$8, %rbp
	cmpq	%r15, %r14
	je	.LBB9_8
.LBB9_7:                                # %.lr.ph.i.i.i17
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r15), %rax
	movq	%rax, (%rbp)
	movq	$0, (%r15)
	addq	$8, %r15
	addq	$8, %rbp
	cmpq	%r14, %r15
	jne	.LBB9_7
.LBB9_8:                                # %_ZNSt6vectorISt6threadSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit22
	testq	%r12, %r12
	je	.LBB9_10
# %bb.9:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB9_10:                               # %_ZNSt12_Vector_baseISt6threadSaIS0_EE13_M_deallocateEPS0_m.exit
	movq	%r13, (%rbx)
	movq	%rbp, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rax
	addq	%r13, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .Lfunc_end9-_ZNSt6vectorISt6threadSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$1152921504606846975, %rcx      # imm = 0xFFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$3, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB10_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB10_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end10:
	.size	_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc, .Lfunc_end10-_ZNKSt6vectorISt6threadSaIS0_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorISt6threadE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorISt6threadE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorISt6threadE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorISt6threadE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorISt6threadE8allocateEmPKv,@function
_ZNSt15__new_allocatorISt6threadE8allocateEmPKv: # @_ZNSt15__new_allocatorISt6threadE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB11_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB11_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB11_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB11_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end11:
	.size	_ZNSt15__new_allocatorISt6threadE8allocateEmPKv, .Lfunc_end11-_ZNSt15__new_allocatorISt6threadE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text.startup,"ax",@progbits
	.type	_GLOBAL__sub_I_cuda_std_thread.hip,@function # -- Begin function _GLOBAL__sub_I_cuda_std_thread.hip
_GLOBAL__sub_I_cuda_std_thread.hip:     # @_GLOBAL__sub_I_cuda_std_thread.hip
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_ZNSt6thread20hardware_concurrencyEv
	movl	%eax, _ZL11NUM_THREADS(%rip)
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_GLOBAL__sub_I_cuda_std_thread.hip, .Lfunc_end12-_GLOBAL__sub_I_cuda_std_thread.hip
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB13_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB13_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5add_2iPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end13:
	.size	__hip_module_ctor, .Lfunc_end13-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB14_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB14_2:
	retq
.Lfunc_end14:
	.size	__hip_module_dtor, .Lfunc_end14-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZL11NUM_THREADS,@object        # @_ZL11NUM_THREADS
	.local	_ZL11NUM_THREADS
	.comm	_ZL11NUM_THREADS,4,4
	.type	_Z5add_2iPfS_,@object           # @_Z5add_2iPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z5add_2iPfS_
	.p2align	3, 0x0
_Z5add_2iPfS_:
	.quad	_Z20__device_stub__add_2iPfS_
	.size	_Z5add_2iPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"blockSize: "
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" minGridSize: "
	.size	.L.str.1, 15

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" gridSize: "
	.size	.L.str.2, 12

	.type	_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,@object # @_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.section	.rodata._ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,"aG",@progbits,_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,comdat
	.weak	_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.p2align	3, 0x0
_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE:
	.quad	0
	.quad	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.quad	_ZNSt6thread6_StateD2Ev
	.quad	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEED0Ev
	.quad	_ZNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEE6_M_runEv
	.size	_ZTVNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, 40

	.type	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,@object # @_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.section	.rodata._ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,"aG",@progbits,_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,comdat
	.weak	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE:
	.asciz	"NSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE"
	.size	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, 73

	.type	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,@object # @_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.section	.rodata._ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,"aG",@progbits,_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE,comdat
	.weak	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.p2align	3, 0x0
_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.quad	_ZTINSt6thread6_StateE
	.size	_ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE, 24

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.3, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5add_2iPfS_"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	_GLOBAL__sub_I_cuda_std_thread.hip
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__add_2iPfS_
	.addrsig_sym _Z11thread_funciPfS_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _ZNSt6thread24_M_thread_deps_never_runEv
	.addrsig_sym _GLOBAL__sub_I_cuda_std_thread.hip
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZL11NUM_THREADS
	.addrsig_sym _Z5add_2iPfS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE
	.addrsig_sym _ZTSNSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.addrsig_sym _ZTINSt6thread6_StateE
	.addrsig_sym _ZTINSt6thread11_State_implINS_8_InvokerISt5tupleIJPFviPfS3_iEiS3_S3_iEEEEEE
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5add_2iPfS_           ; -- Begin function _Z5add_2iPfS_
	.globl	_Z5add_2iPfS_
	.p2align	8
	.type	_Z5add_2iPfS_,@function
_Z5add_2iPfS_:                          ; @_Z5add_2iPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5add_2iPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5add_2iPfS_, .Lfunc_end0-_Z5add_2iPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 160
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5add_2iPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5add_2iPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
