#include<stdio.h>

//#define NUM_BINS 64 // We are also going to use this for the number of threads in a block.
#define NUM_BINS 1024 // We are also going to use this for the number of threads in a block.

#define NUM_THREADS_PER_BLOCK 16
#define NUM_BLOCKS 16

////////////////////////////////////////////////////////////////////////////////
// Took this code from a Dr. Dobbs example.
////////////////////////////////////////////////////////////////////////////////
void checkCUDAError(const char *msg)
{
    cudaError_t err = cudaGetLastError();
    if( cudaSuccess != err)
    {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg, cudaGetErrorString( err) );
        exit(EXIT_FAILURE);
    }
}

////////////////////////////////////////////////////////////////////////////////
// The kernel. 
////////////////////////////////////////////////////////////////////////////////
__global__ void kernel (int *dev_hist)
{

    int tid = threadIdx.x;
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // shared memory
    __shared__ int shared_hist[NUM_BINS];

    // access thread id
    //const unsigned int tid = threadIdx.x;
    // access number of threads in this block
    const unsigned int num_threads = blockDim.x;

    // Note that we only clear things out for the first thread on each block.
    if(threadIdx.x==0)
    {
        for (int i=0;i<NUM_BINS;i++)
            shared_hist[i] = 0;
    }
    __syncthreads();
    ////////////////////////////////////////////////////////////////////////

    // FILL THE ARRAYS

    shared_hist[tid] = blockIdx.x*1000 + tid;
    //shared_hist[tid] = blockIdx.x;

    __syncthreads();

    if(threadIdx.x==0)
    {
        for(int i=0;i<NUM_BINS;i++)
        {
            dev_hist[i+(blockIdx.x*(NUM_BINS))]=shared_hist[i];
        }
    }
    
}

////////////////////////////////////////////////////////////////////////////////
// The main() program.
////////////////////////////////////////////////////////////////////////////////
int main()
{
    int nbins = NUM_BINS;
    int dimx = NUM_BLOCKS; // Number of blocks
    int num_bytes = NUM_BINS*sizeof(int);
    int num_bytes_on_gpu = dimx*NUM_BINS*sizeof(int);

    int *d_a=0, *h_a=0, *h_hist=0; // device and host pointers

    // Allocate memory on host (CPU)
    h_a = (int*)malloc(num_bytes_on_gpu);
    h_hist = (int*)malloc(num_bytes);

    // Allocate memory on device (GPU)
    cudaMalloc((void**)&d_a,num_bytes_on_gpu);
    checkCUDAError("malloc");

    // Check to see that there was enough memory for both 
    // allocations.
    // If the memory allocation fails, it doesn't change the 
    // pointer value. That is why we set them to be 0 at declaration,
    // and then see if they have changed or stayed the same. 
    if (0==h_a)
    {
        printf("Couldn't allocate host memory\n");
        return 1;
    }

    if (0==d_a)
    {
        printf("Couldn't allocate device memory\n");
        return 1;
    }

    // Initialize array to all 0's
    cudaMemset(d_a,0,num_bytes_on_gpu);
    checkCUDAError("memset");

    //-----------------------------------------------------------------------//
    // Some explanatory code
    /*
    // This will give us 256 thread blocks, arranged in a 16x16 grid.
    dim3 grid(16,16);

    // This will give us 256 threads/block, arranged in a 16x16 grid.
    dim3 block(16,16);

    kernel<<<grid,block,0,0>>>(XXX);

    // This is a shortcut for launching some thread blocks.
    // It launches a grid of 32 thread blocks arranged in a 1x32 grid
    // and 512 threads per block, arranged in a 1x512 array.
    kernel<<<32,512>>>(YYY);
    */

    //dim3 grid,block;
    //block.x = 8;
    //grid.x = dimx/block.x;
    //kernel<<<grid,block>>>(d_a);
    //kernel<<<4,16>>>(d_a);

    dim3 grid, block;
    grid.x = NUM_BLOCKS; // Number of blocks
    block.x = NUM_BINS; // Number of threads per block.
    
    kernel<<<grid,block>>>(d_a);
    cudaThreadSynchronize();
    checkCUDAError("kernel");

    // Copy it back over
    cudaMemcpy(h_a,d_a,num_bytes_on_gpu,cudaMemcpyDeviceToHost);

    for (int i=0;i<dimx;i++)
    {
        for (int j=0;j<NUM_BINS;j++)
        {
            printf("%d ",h_a[i*NUM_BINS + j]);
        }
        printf("\n");
    }
    printf("\n");


    free(h_a);
    cudaFree(d_a);

    return 0;
}

	.file	"tmpxft_0029a587_00000000-6_testing_size_of_shared_memory.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Cuda error: %s: %s.\n"
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	leaq	.LC0(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.globl	_Z25__device_stub__Z6kernelPiPi
	.type	_Z25__device_stub__Z6kernelPiPi, @function
_Z25__device_stub__Z6kernelPiPi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z6kernelPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L6:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z25__device_stub__Z6kernelPiPi, .-_Z25__device_stub__Z6kernelPiPi
	.globl	_Z6kernelPi
	.type	_Z6kernelPi, @function
_Z6kernelPi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z6kernelPiPi
	.cfi_endproc
.LFE2054:
	.size	_Z6kernelPi, .-_Z6kernelPi
	.section	.rodata.str1.1
.LC1:
	.string	"malloc"
.LC2:
	.string	"Couldn't allocate host memory\n"
.LC3:
	.string	"Couldn't allocate device memory\n"
.LC4:
	.string	"memset"
.LC5:
	.string	"kernel"
.LC6:
	.string	"%d "
.LC7:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$65536, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	$65536, %esi
	leaq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	.LC1(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	leaq	.LC2(%rip), %rsi
	testq	%rbx, %rbx
	je	.L23
	movq	8(%rsp), %rdi
	testq	%rdi, %rdi
	jne	.L14
	leaq	.LC3(%rip), %rsi
.L23:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L11
.L14:
	xorl	%esi, %esi
	movl	$65536, %edx
	call	cudaMemset@PLT
	leaq	.LC4(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$268435457, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$4, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rdi
	call	_Z25__device_stub__Z6kernelPiPi
.L16:
	call	cudaThreadSynchronize@PLT
	leaq	.LC5(%rip), %rdi
	xorl	%r12d, %r12d
	leaq	.LC6(%rip), %r14
	call	_Z14checkCUDAErrorPKc
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
.L17:
	movq	%r12, %r13
	xorl	%ebp, %ebp
	salq	$12, %r13
	addq	%rbx, %r13
.L18:
	movl	0(%r13,%rbp,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$1024, %rbp
	jne	.L18
	leaq	.LC7(%rip), %rbp
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	movq	%rbp, %rsi
	call	__printf_chk@PLT
	cmpq	$16, %r12
	jne	.L17
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L11:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z6kernelPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>

//#define NUM_BINS 64 // We are also going to use this for the number of threads in a block.
#define NUM_BINS 1024 // We are also going to use this for the number of threads in a block.

#define NUM_THREADS_PER_BLOCK 16
#define NUM_BLOCKS 16

////////////////////////////////////////////////////////////////////////////////
// Took this code from a Dr. Dobbs example.
////////////////////////////////////////////////////////////////////////////////
void checkCUDAError(const char *msg)
{
    hipError_t err = hipGetLastError();
    if( hipSuccess != err)
    {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg, hipGetErrorString( err) );
        exit(EXIT_FAILURE);
    }
}

////////////////////////////////////////////////////////////////////////////////
// The kernel. 
////////////////////////////////////////////////////////////////////////////////
__global__ void kernel (int *dev_hist)
{

    int tid = threadIdx.x;
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // shared memory
    __shared__ int shared_hist[NUM_BINS];

    // access thread id
    //const unsigned int tid = threadIdx.x;
    // access number of threads in this block
    const unsigned int num_threads = blockDim.x;

    // Note that we only clear things out for the first thread on each block.
    if(threadIdx.x==0)
    {
        for (int i=0;i<NUM_BINS;i++)
            shared_hist[i] = 0;
    }
    __syncthreads();
    ////////////////////////////////////////////////////////////////////////

    // FILL THE ARRAYS

    shared_hist[tid] = blockIdx.x*1000 + tid;
    //shared_hist[tid] = blockIdx.x;

    __syncthreads();

    if(threadIdx.x==0)
    {
        for(int i=0;i<NUM_BINS;i++)
        {
            dev_hist[i+(blockIdx.x*(NUM_BINS))]=shared_hist[i];
        }
    }
    
}

////////////////////////////////////////////////////////////////////////////////
// The main() program.
////////////////////////////////////////////////////////////////////////////////
int main()
{
    int nbins = NUM_BINS;
    int dimx = NUM_BLOCKS; // Number of blocks
    int num_bytes = NUM_BINS*sizeof(int);
    int num_bytes_on_gpu = dimx*NUM_BINS*sizeof(int);

    int *d_a=0, *h_a=0, *h_hist=0; // device and host pointers

    // Allocate memory on host (CPU)
    h_a = (int*)malloc(num_bytes_on_gpu);
    h_hist = (int*)malloc(num_bytes);

    // Allocate memory on device (GPU)
    hipMalloc((void**)&d_a,num_bytes_on_gpu);
    checkCUDAError("malloc");

    // Check to see that there was enough memory for both 
    // allocations.
    // If the memory allocation fails, it doesn't change the 
    // pointer value. That is why we set them to be 0 at declaration,
    // and then see if they have changed or stayed the same. 
    if (0==h_a)
    {
        printf("Couldn't allocate host memory\n");
        return 1;
    }

    if (0==d_a)
    {
        printf("Couldn't allocate device memory\n");
        return 1;
    }

    // Initialize array to all 0's
    hipMemset(d_a,0,num_bytes_on_gpu);
    checkCUDAError("memset");

    //-----------------------------------------------------------------------//
    // Some explanatory code
    /*
    // This will give us 256 thread blocks, arranged in a 16x16 grid.
    dim3 grid(16,16);

    // This will give us 256 threads/block, arranged in a 16x16 grid.
    dim3 block(16,16);

    kernel<<<grid,block,0,0>>>(XXX);

    // This is a shortcut for launching some thread blocks.
    // It launches a grid of 32 thread blocks arranged in a 1x32 grid
    // and 512 threads per block, arranged in a 1x512 array.
    kernel<<<32,512>>>(YYY);
    */

    //dim3 grid,block;
    //block.x = 8;
    //grid.x = dimx/block.x;
    //kernel<<<grid,block>>>(d_a);
    //kernel<<<4,16>>>(d_a);

    dim3 grid, block;
    grid.x = NUM_BLOCKS; // Number of blocks
    block.x = NUM_BINS; // Number of threads per block.
    
    kernel<<<grid,block>>>(d_a);
    hipDeviceSynchronize();
    checkCUDAError("kernel");

    // Copy it back over
    hipMemcpy(h_a,d_a,num_bytes_on_gpu,hipMemcpyDeviceToHost);

    for (int i=0;i<dimx;i++)
    {
        for (int j=0;j<NUM_BINS;j++)
        {
            printf("%d ",h_a[i*NUM_BINS + j]);
        }
        printf("\n");
    }
    printf("\n");


    free(h_a);
    hipFree(d_a);

    return 0;
}

	.text
	.file	"testing_size_of_shared_memory.hip"
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end0-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__kernelPi     # -- Begin function _Z21__device_stub__kernelPi
	.type	_Z21__device_stub__kernelPi,@function
_Z21__device_stub__kernelPi:            # @_Z21__device_stub__kernelPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__kernelPi, .Lfunc_end1-_Z21__device_stub__kernelPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsp, %r14
	movq	$0, (%r14)
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %rbx
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r14, %rdi
	callq	hipMalloc
	movl	$.L.str.1, %edi
	callq	_Z14checkCUDAErrorPKc
	testq	%rbx, %rbx
	je	.LBB2_1
# %bb.3:
	movq	(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_4
# %bb.5:
	movl	$65536, %edx                    # imm = 0x10000
	xorl	%esi, %esi
	callq	hipMemset
	movl	$.L.str.4, %edi
	callq	_Z14checkCUDAErrorPKc
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	leaq	1008(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.6:
	movq	(%rsp), %rdi
	callq	_Z21__device_stub__kernelPi
.LBB2_7:
	callq	hipDeviceSynchronize
	movl	$.L.str.5, %edi
	callq	_Z14checkCUDAErrorPKc
	movq	(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %r14
	xorl	%r15d, %r15d
.LBB2_8:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_9 Depth 2
	xorl	%r12d, %r12d
.LBB2_9:                                #   Parent Loop BB2_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%r12,4), %esi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r12
	cmpq	$1024, %r12                     # imm = 0x400
	jne	.LBB2_9
# %bb.10:                               #   in Loop: Header=BB2_8 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r15
	addq	$4096, %r14                     # imm = 0x1000
	cmpq	$16, %r15
	jne	.LBB2_8
# %bb.11:
	movl	$10, %edi
	callq	putchar@PLT
	movq	%rbx, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB2_12
.LBB2_1:
	movl	$.Lstr.1, %edi
	jmp	.LBB2_2
.LBB2_4:
	movl	$.Lstr, %edi
.LBB2_2:
	callq	puts@PLT
	movl	$1, %eax
.LBB2_12:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Cuda error: %s: %s.\n"
	.size	.L.str, 21

	.type	_Z6kernelPi,@object             # @_Z6kernelPi
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPi
	.p2align	3, 0x0
_Z6kernelPi:
	.quad	_Z21__device_stub__kernelPi
	.size	_Z6kernelPi, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"malloc"
	.size	.L.str.1, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"memset"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"kernel"
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d "
	.size	.L.str.6, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPi"
	.size	.L__unnamed_1, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Couldn't allocate device memory"
	.size	.Lstr, 32

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Couldn't allocate host memory"
	.size	.Lstr.1, 30

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPi             ; -- Begin function _Z6kernelPi
	.globl	_Z6kernelPi
	.p2align	8
	.type	_Z6kernelPi,@function
_Z6kernelPi:                            ; @_Z6kernelPi
; %bb.0:
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s3, 0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.preheader11.preheader
	v_mov_b32_e32 v1, 0
.LBB0_2:                                ; %.preheader11
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, s3
	s_add_i32 s3, s3, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s3, 0x1000
	ds_store_b32 v2, v1
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %Flow25
	s_or_b32 exec_lo, exec_lo, s2
	v_mad_u64_u32 v[1:2], null, 0x3e8, s15, v[0:1]
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v0, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.4:                                ; %.preheader
	s_load_b64 s[2:3], s[0:1], 0x0
	s_lshl_b32 s0, s15, 10
	s_mov_b32 s1, 0
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[4:5], s[0:1], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s2, s4
	s_addc_u32 s3, s3, s5
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, s1
	s_add_i32 s1, s1, 4
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[2:3]
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmpk_lg_i32 s1, 0x1000
	s_cbranch_scc1 .LBB0_5
.LBB0_6:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPi
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPi, .Lfunc_end0-_Z6kernelPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
