#include<iostream>
#include<vector>
#include<random>

const int SHARED_MEM = 256;

__global__ void dotProduct(int *x, int *y, int *dot, int N){
    int index = blockDim.x*blockIdx.x+threadIdx.x;
    __shared__ int cache[SHARED_MEM];

    int offset = 0;
    int stride = blockDim.x;

    while(index+offset<N){
        cache[threadIdx.x] += x[index+offset]*y[index+offset];
        offset += stride;
    }
    __syncthreads();
    
    int i = blockDim.x/2;
    while(i > 0){
        if(threadIdx.x < i){
            cache[threadIdx.x] += cache[threadIdx.x+i];
        }
        i/=2;
    }
    __syncthreads();

    if(threadIdx.x == 0){
        atomicAdd(dot, cache[0]);
        // *dot = cache[0];
    }

}


int main(){
    int N = 10240;
    size_t size = N*sizeof(int);

    std::vector<int> h_x(N);
    std::vector<int> h_y(N);
    for(auto i = 0; i < N; i++){
        h_x[i] = rand()%10;
        h_y[i] = rand()%10;
    }

    int *h_dot;
    h_dot = (int*)malloc(sizeof(int));

    int *d_x, *d_y, *d_dot;
    cudaMalloc(&d_x, size);
    cudaMalloc(&d_y, size);
    cudaMalloc(&d_dot, sizeof(int));
    cudaMemset(d_dot, 0, sizeof(int));

    cudaMemcpy(d_x, h_x.data(), size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_y, h_y.data(), size, cudaMemcpyHostToDevice);

    auto threadsPerBlock = 32;
    auto blocksPerGrid = (N+threadsPerBlock-1)/threadsPerBlock;
    dotProduct<<<blocksPerGrid,threadsPerBlock>>>(d_x,d_y,d_dot,N);

    cudaMemcpy(h_dot, d_dot, sizeof(int), cudaMemcpyDeviceToHost);

    std::cout << *h_dot << std::endl;



    free(h_dot);
    cudaFree(d_x);
    cudaFree(d_y);
    cudaFree(d_dot);

    return 0;
}

	.file	"tmpxft_003907a9_00000000-6_dot_product_sharedMem.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4722:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4722:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z10dotProductPiS_S_iPiS_S_i
	.type	_Z35__device_stub__Z10dotProductPiS_S_iPiS_S_i, @function
_Z35__device_stub__Z10dotProductPiS_S_iPiS_S_i:
.LFB4744:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10dotProductPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4744:
	.size	_Z35__device_stub__Z10dotProductPiS_S_iPiS_S_i, .-_Z35__device_stub__Z10dotProductPiS_S_iPiS_S_i
	.globl	_Z10dotProductPiS_S_i
	.type	_Z10dotProductPiS_S_i, @function
_Z10dotProductPiS_S_i:
.LFB4745:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10dotProductPiS_S_iPiS_S_i
	.cfi_endproc
.LFE4745:
	.size	_Z10dotProductPiS_S_i, .-_Z10dotProductPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10dotProductPiS_S_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4747:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10dotProductPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4747:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB5073:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L10
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L10:
	ret
	.cfi_endproc
.LFE5073:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4719:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4719
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$40960, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$120, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_Znwm@PLT
.LEHE0:
	xorl	%r9d, %r9d
	leaq	40960(%rax), %rdx
	movq	%rax, 56(%rsp)
	movq	%rax, %rbp
	movq	%rdx, 72(%rsp)
	movl	%r9d, (%rax)
	xorl	%eax, %eax
.L13:
	addq	$4, %rax
	cmpq	$40960, %rax
	je	.L28
	xorl	%r8d, %r8d
	movl	%r8d, 0(%rbp,%rax)
	jmp	.L13
.L28:
	xorl	%edi, %edi
	movq	%rdx, 64(%rsp)
	movq	%rdi, 88(%rsp)
	movq	%rdi, 96(%rsp)
	movl	$40960, %edi
.LEHB1:
	call	_Znwm@PLT
.LEHE1:
	leaq	40960(%rax), %rdx
	xorl	%esi, %esi
	movq	%rax, 80(%rsp)
	movq	%rax, %rbx
	movq	%rdx, 96(%rsp)
	movl	%esi, (%rax)
	xorl	%eax, %eax
.L15:
	addq	$4, %rax
	cmpq	$40960, %rax
	je	.L29
	xorl	%ecx, %ecx
	movl	%ecx, (%rbx,%rax)
	jmp	.L15
.L29:
	movq	%rdx, 88(%rsp)
	xorl	%r12d, %r12d
	movl	$10, %r13d
.L17:
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, 0(%rbp,%r12)
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%rbx,%r12)
	addq	$4, %r12
	cmpq	$40960, %r12
	jne	.L17
	movl	$4, %edi
	leaq	80(%rsp), %r13
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$40960, %esi
	movq	%rax, %r12
.LEHB2:
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$40960, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$40960, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$40960, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	movl	$67108869, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	salq	$6, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	movq	24(%rsp), %rdx
	testl	%eax, %eax
	jne	.L18
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$10240, %ecx
	call	_Z35__device_stub__Z10dotProductPiS_S_iPiS_S_i
.L18:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	(%r12), %esi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
.LEHE2:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	56(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	jmp	.L26
.L24:
	endbr64
	movq	%rax, %rbx
.L19:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L20
.L23:
	endbr64
	movq	%rax, %rbx
.L20:
	leaq	56(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L26
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L26:
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4719:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4719:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4719-.LLSDACSB4719
.LLSDACSB4719:
	.uleb128 .LEHB0-.LFB4719
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4719
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L23-.LFB4719
	.uleb128 0
	.uleb128 .LEHB2-.LFB4719
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L24-.LFB4719
	.uleb128 0
	.uleb128 .LEHB3-.LFB4719
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4719:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<iostream>
#include<vector>
#include<random>

const int SHARED_MEM = 256;

__global__ void dotProduct(int *x, int *y, int *dot, int N){
    int index = blockDim.x*blockIdx.x+threadIdx.x;
    __shared__ int cache[SHARED_MEM];

    int offset = 0;
    int stride = blockDim.x;

    while(index+offset<N){
        cache[threadIdx.x] += x[index+offset]*y[index+offset];
        offset += stride;
    }
    __syncthreads();
    
    int i = blockDim.x/2;
    while(i > 0){
        if(threadIdx.x < i){
            cache[threadIdx.x] += cache[threadIdx.x+i];
        }
        i/=2;
    }
    __syncthreads();

    if(threadIdx.x == 0){
        atomicAdd(dot, cache[0]);
        // *dot = cache[0];
    }

}


int main(){
    int N = 10240;
    size_t size = N*sizeof(int);

    std::vector<int> h_x(N);
    std::vector<int> h_y(N);
    for(auto i = 0; i < N; i++){
        h_x[i] = rand()%10;
        h_y[i] = rand()%10;
    }

    int *h_dot;
    h_dot = (int*)malloc(sizeof(int));

    int *d_x, *d_y, *d_dot;
    hipMalloc(&d_x, size);
    hipMalloc(&d_y, size);
    hipMalloc(&d_dot, sizeof(int));
    hipMemset(d_dot, 0, sizeof(int));

    hipMemcpy(d_x, h_x.data(), size, hipMemcpyHostToDevice);
    hipMemcpy(d_y, h_y.data(), size, hipMemcpyHostToDevice);

    auto threadsPerBlock = 32;
    auto blocksPerGrid = (N+threadsPerBlock-1)/threadsPerBlock;
    dotProduct<<<blocksPerGrid,threadsPerBlock>>>(d_x,d_y,d_dot,N);

    hipMemcpy(h_dot, d_dot, sizeof(int), hipMemcpyDeviceToHost);

    std::cout << *h_dot << std::endl;



    free(h_dot);
    hipFree(d_x);
    hipFree(d_y);
    hipFree(d_dot);

    return 0;
}

	.text
	.file	"dot_product_sharedMem.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__dotProductPiS_S_i # -- Begin function _Z25__device_stub__dotProductPiS_S_i
	.type	_Z25__device_stub__dotProductPiS_S_i,@function
_Z25__device_stub__dotProductPiS_S_i:   # @_Z25__device_stub__dotProductPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10dotProductPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__dotProductPiS_S_i, .Lfunc_end0-_Z25__device_stub__dotProductPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$40960, %edi                    # imm = 0xA000
	callq	_Znwm
	movq	%rax, %rbx
	movl	$40960, %edx                    # imm = 0xA000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movl	$40960, %edi                    # imm = 0xA000
	callq	_Znwm
.Ltmp1:
# %bb.1:
	movq	%rax, %r14
	xorl	%r15d, %r15d
	movl	$40960, %edx                    # imm = 0xA000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%r14,%r15,4)
	incq	%r15
	cmpq	$10240, %r15                    # imm = 0x2800
	jne	.LBB1_2
# %bb.3:
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r15
.Ltmp3:
	leaq	16(%rsp), %rdi
	movl	$40960, %esi                    # imm = 0xA000
	callq	hipMalloc
.Ltmp4:
# %bb.4:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp5:
	leaq	8(%rsp), %rdi
	movl	$40960, %esi                    # imm = 0xA000
	callq	hipMalloc
.Ltmp6:
# %bb.5:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit33
.Ltmp7:
	movq	%rsp, %rdi
	movl	$4, %esi
	callq	hipMalloc
.Ltmp8:
# %bb.6:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit34
	movq	(%rsp), %rdi
.Ltmp9:
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp10:
# %bb.7:
	movq	16(%rsp), %rdi
.Ltmp11:
	movl	$40960, %edx                    # imm = 0xA000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp12:
# %bb.8:
	movq	8(%rsp), %rdi
.Ltmp13:
	movl	$40960, %edx                    # imm = 0xA000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp14:
# %bb.9:
.Ltmp16:
	movabsq	$4294967616, %rdi               # imm = 0x100000140
	movabsq	$4294967328, %rdx               # imm = 0x100000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp17:
# %bb.10:
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
.Ltmp18:
	movl	$10240, %ecx                    # imm = 0x2800
	callq	_Z25__device_stub__dotProductPiS_S_i
.Ltmp19:
.LBB1_12:
	movq	(%rsp), %rsi
.Ltmp20:
	movl	$4, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp21:
# %bb.13:
	movl	(%r15), %esi
.Ltmp22:
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
.Ltmp23:
# %bb.14:
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
.Ltmp24:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp25:
# %bb.15:                               # %.noexc
.Ltmp26:
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
.Ltmp27:
# %bb.16:                               # %.noexc42
.Ltmp28:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp29:
# %bb.17:                               # %_ZNSolsEPFRSoS_E.exit
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi
.Ltmp30:
	callq	hipFree
.Ltmp31:
# %bb.18:
	movq	8(%rsp), %rdi
.Ltmp32:
	callq	hipFree
.Ltmp33:
# %bb.19:
	movq	(%rsp), %rdi
.Ltmp34:
	callq	hipFree
.Ltmp35:
# %bb.20:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit36
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_24:
	.cfi_def_cfa_offset 64
.Ltmp2:
	movq	%rax, %r15
	jmp	.LBB1_23
.LBB1_21:
.Ltmp15:
	jmp	.LBB1_22
.LBB1_25:
.Ltmp36:
.LBB1_22:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit38
	movq	%rax, %r15
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB1_23:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit40
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r15, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp1                  #   Call between .Ltmp1 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp14-.Ltmp3                 #   Call between .Ltmp3 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp35-.Ltmp16                #   Call between .Ltmp16 and .Ltmp35
	.uleb128 .Ltmp36-.Lfunc_begin0          #     jumps to .Ltmp36
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Lfunc_end1-.Ltmp35            #   Call between .Ltmp35 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10dotProductPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10dotProductPiS_S_i,@object   # @_Z10dotProductPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10dotProductPiS_S_i
	.p2align	3, 0x0
_Z10dotProductPiS_S_i:
	.quad	_Z25__device_stub__dotProductPiS_S_i
	.size	_Z10dotProductPiS_S_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10dotProductPiS_S_i"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__dotProductPiS_S_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z10dotProductPiS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10dotProductPiS_S_i   ; -- Begin function _Z10dotProductPiS_S_i
	.globl	_Z10dotProductPiS_S_i
	.p2align	8
	.type	_Z10dotProductPiS_S_i,@function
_Z10dotProductPiS_S_i:                  ; @_Z10dotProductPiS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b32_e32 v6, 2, v0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.lr.ph
	ds_load_b32 v3, v6
	s_mov_b32 s9, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_u32 v7, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s3, v1
	global_load_b32 v2, v[7:8], off
	global_load_b32 v7, v[4:5], off
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[4:5], null, v7, v2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v4
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
; %bb.3:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s9
	ds_store_b32 v6, v4
.LBB0_4:                                ; %Flow39
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s2, 2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_8
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s3, s2, 1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s3, v0
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_lshl_add_u32 v1, s3, 2, v6
	ds_load_b32 v1, v1
	ds_load_b32 v2, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v6, v1
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_cmp_gt_u32 s2, 3
	s_mov_b32 s2, s3
	s_cbranch_scc1 .LBB0_5
.LBB0_8:                                ; %._crit_edge26
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.9:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_bcnt1_i32_b32 s2, s2
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, v1, s2
	global_atomic_add_u32 v0, v1, s[0:1]
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10dotProductPiS_S_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10dotProductPiS_S_i, .Lfunc_end0-_Z10dotProductPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10dotProductPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10dotProductPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
