__global__ void BilinearInterpolationForward(const float* bottom_data,
    const int* bs, const float* pos_data, float* top_data, const int* ts) {
    // bs = bottom_data size, ps = pos_data size, ts = top_data size
    // input position = -1~1
    // pos_data[:,:,1,:] = x, pos_data[:,:,2,:] = y

    // top_data size = (ps[0], ps[1], bs[2], ps[3])
    // note: bs[3] === ps[3]

    int index = blockIdx.x * blockDim.x + threadIdx.x;
    int len = ts[0]*ts[1]*ts[2]*ts[3];
    if (index >= len) return;

    // get current index, [h,w,c,n]
    int h = index % ts[0];
    int w = (index / ts[0]) % ts[1];
    int c = (index / ts[0] / ts[1]) % ts[2];
    int n = index / ts[0] / ts[1] / ts[2];

    int xp = n*2*ts[1]*ts[0] + 0*ts[1]*ts[0] + w*ts[0] + h;
    int yp = n*2*ts[1]*ts[0] + 1*ts[1]*ts[0] + w*ts[0] + h;

    float w_new = (pos_data[xp]/2.0+0.5)*(float)(bs[1]-1);
    float h_new = (pos_data[yp]/2.0+0.5)*(float)(bs[0]-1);

    // calc neighbor pixel index, if > size or < size, do
    float v = 0.0;
    for (int x = floor(w_new); x <= ceil(w_new); x++) {
      for (int y = floor(h_new); y <= ceil(h_new); y++) {
        if (x < 0 || x>= bs[1] || y < 0 || y >= bs[0]){
          v = 0.0;
        }else{
          v = bottom_data[n*bs[2]*bs[1]*bs[0] + c*bs[1]*bs[0] + x*bs[0] + y];
        }
        top_data[index] += v * (1-abs(w_new - (float)x)) * (1-abs(h_new - (float)y));
      }
    }
}

__global__ void BilinearInterpolationBackward(const float* bottom_data,
    const int* bs, const float* pos_data, const float* top_data, const int* ts, const float* top_diff, float* bottom_diff, float* pos_diff) {

    int index = blockIdx.x * blockDim.x + threadIdx.x;
    int len = ts[0]*ts[1]*ts[2]*ts[3];
    if (index >= len) return;

    // get current index, [h,w,c,n]
    int h = index % ts[0];
    int w = (index / ts[0]) % ts[1];
    int c = (index / ts[0] / ts[1]) % ts[2];
    int n = index / ts[0] / ts[1] / ts[2];

    int xp = n*2*ts[1]*ts[0] + 0*ts[1]*ts[0] + w*ts[0] + h;
    int yp = n*2*ts[1]*ts[0] + 1*ts[1]*ts[0] + w*ts[0] + h;

    float w_new = (pos_data[xp]/2.0+0.5)*(float)(bs[1]-1);
    float h_new = (pos_data[yp]/2.0+0.5)*(float)(bs[0]-1);

    float u = 0.0;
    for (int x = floor(w_new); x <= ceil(w_new); x++) {
      for (int y = floor(h_new); y <= ceil(h_new); y++) {
        if (x >= 0 && x < bs[1] && y >= 0 && y < bs[0]){

          atomicAdd(bottom_diff + n*bs[2]*bs[1]*bs[0] + c*bs[1]*bs[0] + x*bs[0] + y, top_diff[index] * (1-abs(w_new - (float)x)) * (1-abs(h_new - (float)y)) );
          u = bottom_data[n*bs[2]*bs[1]*bs[0] + c*bs[1]*bs[0] + x*bs[0] + y];

          atomicAdd(pos_diff + xp, top_diff[index] *u* (1-abs(h_new - (float)y)) * ((float)x >= w_new ? 1.0:-1.0 )  );
          atomicAdd(pos_diff + yp, top_diff[index] *u* (1-abs(w_new - (float)x)) * ((float)y >= h_new ? 1.0:-1.0 )  );
        }
      }
    }
}
	.file	"tmpxft_00379381_00000000-6_bilinearInterpolation.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z60__device_stub__Z28BilinearInterpolationForwardPKfPKiS0_PfS2_PKfPKiS0_PfS2_
	.type	_Z60__device_stub__Z28BilinearInterpolationForwardPKfPKiS0_PfS2_PKfPKiS0_PfS2_, @function
_Z60__device_stub__Z28BilinearInterpolationForwardPKfPKiS0_PfS2_PKfPKiS0_PfS2_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z60__device_stub__Z28BilinearInterpolationForwardPKfPKiS0_PfS2_PKfPKiS0_PfS2_, .-_Z60__device_stub__Z28BilinearInterpolationForwardPKfPKiS0_PfS2_PKfPKiS0_PfS2_
	.globl	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
	.type	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_, @function
_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z28BilinearInterpolationForwardPKfPKiS0_PfS2_PKfPKiS0_PfS2_
	.cfi_endproc
.LFE2033:
	.size	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_, .-_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
	.globl	_Z70__device_stub__Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_PKfPKiS0_S0_S2_S0_PfS3_
	.type	_Z70__device_stub__Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_PKfPKiS0_S0_S2_S0_PfS3_, @function
_Z70__device_stub__Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_PKfPKiS0_S0_S2_S0_PfS3_:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 8(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	%rsp, %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L8:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z70__device_stub__Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_PKfPKiS0_S0_S2_S0_PfS3_, .-_Z70__device_stub__Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_PKfPKiS0_S0_S2_S0_PfS3_
	.globl	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.type	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_, @function
_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z70__device_stub__Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_PKfPKiS0_S0_S2_S0_PfS3_
	.cfi_endproc
.LFE2035:
	.size	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_, .-_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_"
.LC1:
	.string	"_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
__global__ void BilinearInterpolationForward(const float* bottom_data,
    const int* bs, const float* pos_data, float* top_data, const int* ts) {
    // bs = bottom_data size, ps = pos_data size, ts = top_data size
    // input position = -1~1
    // pos_data[:,:,1,:] = x, pos_data[:,:,2,:] = y

    // top_data size = (ps[0], ps[1], bs[2], ps[3])
    // note: bs[3] === ps[3]

    int index = blockIdx.x * blockDim.x + threadIdx.x;
    int len = ts[0]*ts[1]*ts[2]*ts[3];
    if (index >= len) return;

    // get current index, [h,w,c,n]
    int h = index % ts[0];
    int w = (index / ts[0]) % ts[1];
    int c = (index / ts[0] / ts[1]) % ts[2];
    int n = index / ts[0] / ts[1] / ts[2];

    int xp = n*2*ts[1]*ts[0] + 0*ts[1]*ts[0] + w*ts[0] + h;
    int yp = n*2*ts[1]*ts[0] + 1*ts[1]*ts[0] + w*ts[0] + h;

    float w_new = (pos_data[xp]/2.0+0.5)*(float)(bs[1]-1);
    float h_new = (pos_data[yp]/2.0+0.5)*(float)(bs[0]-1);

    // calc neighbor pixel index, if > size or < size, do
    float v = 0.0;
    for (int x = floor(w_new); x <= ceil(w_new); x++) {
      for (int y = floor(h_new); y <= ceil(h_new); y++) {
        if (x < 0 || x>= bs[1] || y < 0 || y >= bs[0]){
          v = 0.0;
        }else{
          v = bottom_data[n*bs[2]*bs[1]*bs[0] + c*bs[1]*bs[0] + x*bs[0] + y];
        }
        top_data[index] += v * (1-abs(w_new - (float)x)) * (1-abs(h_new - (float)y));
      }
    }
}

__global__ void BilinearInterpolationBackward(const float* bottom_data,
    const int* bs, const float* pos_data, const float* top_data, const int* ts, const float* top_diff, float* bottom_diff, float* pos_diff) {

    int index = blockIdx.x * blockDim.x + threadIdx.x;
    int len = ts[0]*ts[1]*ts[2]*ts[3];
    if (index >= len) return;

    // get current index, [h,w,c,n]
    int h = index % ts[0];
    int w = (index / ts[0]) % ts[1];
    int c = (index / ts[0] / ts[1]) % ts[2];
    int n = index / ts[0] / ts[1] / ts[2];

    int xp = n*2*ts[1]*ts[0] + 0*ts[1]*ts[0] + w*ts[0] + h;
    int yp = n*2*ts[1]*ts[0] + 1*ts[1]*ts[0] + w*ts[0] + h;

    float w_new = (pos_data[xp]/2.0+0.5)*(float)(bs[1]-1);
    float h_new = (pos_data[yp]/2.0+0.5)*(float)(bs[0]-1);

    float u = 0.0;
    for (int x = floor(w_new); x <= ceil(w_new); x++) {
      for (int y = floor(h_new); y <= ceil(h_new); y++) {
        if (x >= 0 && x < bs[1] && y >= 0 && y < bs[0]){

          atomicAdd(bottom_diff + n*bs[2]*bs[1]*bs[0] + c*bs[1]*bs[0] + x*bs[0] + y, top_diff[index] * (1-abs(w_new - (float)x)) * (1-abs(h_new - (float)y)) );
          u = bottom_data[n*bs[2]*bs[1]*bs[0] + c*bs[1]*bs[0] + x*bs[0] + y];

          atomicAdd(pos_diff + xp, top_diff[index] *u* (1-abs(h_new - (float)y)) * ((float)x >= w_new ? 1.0:-1.0 )  );
          atomicAdd(pos_diff + yp, top_diff[index] *u* (1-abs(w_new - (float)x)) * ((float)y >= h_new ? 1.0:-1.0 )  );
        }
      }
    }
}
	.text
	.file	"bilinearInterpolation.hip"
	.globl	_Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_ # -- Begin function _Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_
	.type	_Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_,@function
_Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_: # @_Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_, .Lfunc_end0-_Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_ # -- Begin function _Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.type	_Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_,@function
_Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_: # @_Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_, .Lfunc_end1-_Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_,@object # @_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
	.section	.rodata,"a",@progbits
	.globl	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
	.p2align	3, 0x0
_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_:
	.quad	_Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_
	.size	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_, 8

	.type	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_,@object # @_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.globl	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.p2align	3, 0x0
_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_:
	.quad	_Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.size	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_"
	.size	.L__unnamed_1, 47

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_"
	.size	.L__unnamed_2, 57

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z43__device_stub__BilinearInterpolationForwardPKfPKiS0_PfS2_
	.addrsig_sym _Z44__device_stub__BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
	.addrsig_sym _Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_ ; -- Begin function _Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
	.globl	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
	.p2align	8
	.type	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_,@function
_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_: ; @_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x20
	s_load_b32 s4, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_load_b128 s[16:19], s[2:3], 0x0
	s_and_b32 s2, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s17, s16
	s_mul_i32 s3, s2, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s3, s3, s19
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.1:
	s_ashr_i32 s3, s16, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s4, s16, s3
	s_mov_b32 s14, 0
	s_xor_b32 s4, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v3, s5, v0
	s_ashr_i32 s5, s17, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s17, s5
	s_xor_b32 s6, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v5, s6
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v5, v5
	v_add_nc_u32_e32 v4, v1, v2
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v5, 0x4f7ffffe, v5 :: v_dual_add_nc_u32 v0, v0, v3
	v_xor_b32_e32 v4, v4, v2
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s4
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s4, v3
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s3, v2
	s_sub_i32 s3, 0, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, 1, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	v_cvt_u32_f32_e32 v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_mul_lo_u32 v4, s3, v3
	s_ashr_i32 s3, s18, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_add_i32 s4, s18, s3
	v_xor_b32_e32 v0, v0, v6
	s_xor_b32 s4, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v7, s4
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v0, v0, v6
	v_rcp_iflag_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v0
	v_add_nc_u32_e32 v3, v3, v4
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v7, 0x4f7ffffe, v7 :: v_dual_add_nc_u32 v6, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v6, v5
	v_xor_b32_e32 v5, s5, v5
	s_sub_i32 s5, 0, s4
	v_mul_hi_u32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v3, s6
	v_sub_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v8, s6, v4
	v_cmp_le_u32_e32 vcc_lo, s6, v4
	v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v4, v4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, 1, v3
	v_cmp_le_u32_e32 vcc_lo, s6, v4
	v_cvt_u32_f32_e32 v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v6, vcc_lo
	v_mul_lo_u32 v6, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v5
	v_mul_hi_u32 v6, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v3, v5
	v_ashrrev_i32_e32 v3, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v7, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v6, v7, v3
	v_xor_b32_e32 v3, s3, v3
	v_mul_hi_u32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v4, s4
	v_sub_nc_u32_e32 v6, v6, v7
	v_add_nc_u32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v8, s4, v6
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v6, v8, vcc_lo
	v_add_nc_u32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_mul_lo_u32 v6, v5, s17
	s_load_b256 s[4:11], s[0:1], 0x0
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v3
	v_sub_nc_u32_e32 v8, v4, v3
	v_mul_lo_u32 v3, v0, s16
	v_sub_nc_u32_e32 v0, v0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, s2, v8
	v_mul_lo_u32 v0, v0, s16
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[12:13], s[6:7], 0x0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v1, v3
	v_lshlrev_b32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v0, v3, v4
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s13, -1
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b32 v0, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v0
	v_cvt_f32_i32_e32 v0, s0
	v_cvt_f64_f32_e32 v[9:10], v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], 0.5, 0.5
	v_mul_f64 v[6:7], v[6:7], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v9, v[6:7]
	v_floor_f32_e32 v0, v9
	v_ceil_f32_e32 v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v0, v0
	v_cvt_f32_i32_e32 v6, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_f32_e32 vcc_lo, v10, v6
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.2:                                ; %.lr.ph93
	v_add_nc_u32_e32 v3, s2, v3
	s_add_i32 s0, s12, -1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_cvt_f32_i32_e32 v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_cvt_f64_f32_e32 v[11:12], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[3:4], v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[3:4], v[3:4], 0.5, 0.5
	v_mul_f64 v[3:4], v[3:4], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v11, v[3:4]
	v_mul_lo_u32 v4, v8, s18
	v_sub_nc_u32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_floor_f32_e32 v3, v11
	v_ceil_f32_e32 v12, v11
	v_cvt_i32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v13, v3
	v_ashrrev_i32_e32 v4, 31, v3
	v_cmp_ge_f32_e32 vcc_lo, v12, v13
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB0_10
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	global_load_b32 v14, v[1:2], off
	v_sub_f32_e32 v6, v9, v6
	v_cmp_lt_i32_e64 s0, -1, v0
	v_cmp_gt_i32_e64 s1, s13, v0
	v_mov_b32_e32 v16, v13
	s_mov_b32 s9, 0
	v_sub_f32_e64 v15, 1.0, |v6|
	v_dual_mov_b32 v7, v4 :: v_dual_mov_b32 v6, v3
.LBB0_5:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v17, 0
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s2, -1, v6
	v_cmp_gt_i32_e64 s3, s12, v6
	v_mov_b32_e32 v17, 0
	s_and_b32 s2, s1, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=2
	s_load_b32 s2, s[6:7], 0x8
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[17:18], null, s2, v8, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[18:19], null, v17, s13, v[0:1]
	v_mul_lo_u32 v17, s12, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v18, 31, v17
	v_add_co_u32 v17, s2, v6, v17
	v_add_co_ci_u32_e64 v18, s2, v7, v18, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_add_co_u32 v17, s2, s4, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, s2, s5, v18, s2
	global_load_b32 v17, v[17:18], off
.LBB0_8:                                ; %Flow
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_9:                                ;   in Loop: Header=BB0_5 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s10
	v_add_co_u32 v6, s2, v6, 1
	v_sub_f32_e32 v18, v11, v16
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v17, v15, v17
	v_add_co_ci_u32_e64 v7, s2, 0, v7, s2
	v_cvt_f32_i32_e32 v16, v6
	v_sub_f32_e64 v18, 1.0, |v18|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_nge_f32_e64 s2, v12, v16
	v_fmac_f32_e32 v14, v18, v17
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s9, s2, s9
	global_store_b32 v[1:2], v14, off
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_5
.LBB0_10:                               ; %Flow116
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	v_add_nc_u32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v6, v0
	v_cmp_nge_f32_e64 s0, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s14, s0, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_3
.LBB0_11:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_, .Lfunc_end0-_Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1348
; NumSgprs: 22
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_ ; -- Begin function _Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.globl	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
	.p2align	8
	.type	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_,@function
_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_: ; @_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x20
	s_load_b32 s2, s[0:1], 0x4c
	s_waitcnt lgkmcnt(0)
	s_load_b128 s[16:19], s[4:5], 0x0
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s5, s17, s16
	s_mul_i32 s2, s5, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s2, s2, s19
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_16
; %bb.1:
	s_ashr_i32 s2, s16, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s3, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v0, s3
	s_sub_i32 s4, 0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v3, s4, v0
	s_ashr_i32 s4, s17, 31
	s_add_i32 s12, s17, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s12, s12, s4
	v_cvt_f32_u32_e32 v5, s12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v0, v3
	v_rcp_iflag_f32_e32 v5, v5
	v_add_nc_u32_e32 v4, v1, v2
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v5, 0x4f7ffffe, v5 :: v_dual_add_nc_u32 v0, v0, v3
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v4, v0
	v_mul_lo_u32 v3, v0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	v_subrev_nc_u32_e32 v6, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s2, v2
	s_sub_i32 s2, 0, s12
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_cvt_u32_f32_e32 v3, v5
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v4, s2, v3
	s_ashr_i32 s2, s18, 31
	s_add_i32 s3, s18, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v0, v0, v6
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v7, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v4, v3, v4
	v_sub_nc_u32_e32 v0, v0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v7, v7
	v_ashrrev_i32_e32 v5, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v4
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v7, 0x4f7ffffe, v7 :: v_dual_add_nc_u32 v6, v0, v5
	v_xor_b32_e32 v4, v6, v5
	v_xor_b32_e32 v5, s4, v5
	s_sub_i32 s4, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v4, v3
	v_mul_lo_u32 v6, v3, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v6, 1, v3
	v_subrev_nc_u32_e32 v8, s12, v4
	v_cmp_le_u32_e32 vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v4, v4, v8
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s12, v4
	v_cvt_u32_f32_e32 v4, v7
	s_load_b128 s[12:15], s[0:1], 0x0
	v_cndmask_b32_e32 v3, v3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v6, s4, v4
	s_mov_b32 s4, 0
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v7, v3, v5
	v_mul_hi_u32 v5, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v7
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v7, v3
	v_xor_b32_e32 v5, v6, v3
	v_xor_b32_e32 v3, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v5, v4
	v_mul_lo_u32 v6, v4, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v5, v6
	v_add_nc_u32_e32 v6, 1, v4
	v_subrev_nc_u32_e32 v8, s3, v5
	v_cmp_le_u32_e32 vcc_lo, s3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v8 :: v_dual_cndmask_b32 v4, v4, v6
	v_cmp_le_u32_e32 vcc_lo, s3, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v6, 1, v4
	v_mul_lo_u32 v5, v7, s17
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[0:1], s[14:15], 0x0
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v3
	v_sub_nc_u32_e32 v14, v4, v3
	v_mul_lo_u32 v3, v0, s16
	v_sub_nc_u32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, s5, v14
	v_mul_lo_u32 v0, v0, s16
	s_waitcnt lgkmcnt(0)
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v1, v3
	v_lshlrev_b32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v5, v0, v3, v4
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	v_add_co_u32 v8, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v0, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[8:9], v0
	v_cvt_f32_i32_e32 v0, s1
	v_cvt_f64_f32_e32 v[10:11], v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], 0.5, 0.5
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v15, v[8:9]
	v_floor_f32_e32 v0, v15
	v_ceil_f32_e32 v16, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v0, v0
	v_cvt_f32_i32_e32 v8, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_f32_e32 vcc_lo, v16, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_16
; %bb.2:                                ; %.lr.ph119
	v_add_nc_u32_e32 v5, s5, v5
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v11, s0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[11:12], v11
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v10, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[5:6], v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[5:6], 0.5, 0.5
	v_mul_f64 v[5:6], v[5:6], v[11:12]
	v_mul_lo_u32 v11, v14, s18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cvt_f32_f64_e32 v17, v[5:6]
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v6, vcc_lo, s10, v9
	v_sub_nc_u32_e32 v5, v7, v11
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v10, vcc_lo
	v_mov_b32_e32 v9, 0
	v_floor_f32_e32 v12, v17
	v_ceil_f32_e32 v19, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v18, v12
	v_cvt_f32_i32_e32 v20, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_f32_e32 vcc_lo, v19, v20
.LBB1_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_5 Depth 2
                                        ;       Child Loop BB1_9 Depth 3
                                        ;       Child Loop BB1_11 Depth 3
                                        ;       Child Loop BB1_13 Depth 3
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB1_15
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_3 Depth=1
	v_sub_f32_e32 v10, v15, v8
	v_cmp_lt_i32_e64 s0, -1, v0
	v_cmp_ge_f32_e64 s1, v8, v15
	v_mov_b32_e32 v22, v20
	v_mov_b32_e32 v8, v18
	v_sub_f32_e64 v21, 1.0, |v10|
	s_mov_b32 s6, 0
.LBB1_5:                                ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_9 Depth 3
                                        ;       Child Loop BB1_11 Depth 3
                                        ;       Child Loop BB1_13 Depth 3
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB1_14
; %bb.6:                                ;   in Loop: Header=BB1_5 Depth=2
	global_load_b32 v10, v9, s[14:15] offset:4
	v_cmp_lt_i32_e64 s3, -1, v8
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s2, v0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB1_14
; %bb.7:                                ;   in Loop: Header=BB1_5 Depth=2
	global_load_b32 v11, v9, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s2, v8, v11
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB1_14
; %bb.8:                                ;   in Loop: Header=BB1_5 Depth=2
	global_load_b32 v12, v9, s[14:15] offset:8
	v_mul_lo_u32 v13, v10, v14
	v_mul_lo_u32 v10, v10, v5
	v_mul_lo_u32 v23, v11, v0
	v_lshlrev_b64 v[25:26], 2, v[8:9]
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v13, v13, v11
	v_mul_lo_u32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v24, 31, v23
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v12, v13, v12
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v27, s2, s8, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v28, s2, s9, v13, s2
	v_lshlrev_b64 v[12:13], 2, v[23:24]
	v_add_co_u32 v10, s2, v27, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s2, v28, v11, s2
	global_load_b32 v23, v[3:4], off
	v_add_co_u32 v10, s2, v10, v12
	v_add_co_ci_u32_e64 v11, s2, v11, v13, s2
	v_sub_f32_e32 v12, v17, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s2, v10, v25
	v_add_co_ci_u32_e64 v11, s2, v11, v26, s2
	global_load_b32 v13, v[10:11], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v24, v21, v23
	v_sub_f32_e64 v23, 1.0, |v12|
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v24, v23, v24
.LBB1_9:                                ; %atomicrmw.start
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f32_e32 v12, v13, v24
	global_atomic_cmpswap_b32 v12, v[10:11], v[12:13], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s2, v12, v13
	v_mov_b32_e32 v13, v12
	s_or_b32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_9
; %bb.10:                               ; %atomicrmw.end
                                        ;   in Loop: Header=BB1_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b96 v[10:12], v9, s[14:15]
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[24:25], null, v12, v14, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, v24, v11, v[0:1]
	v_mad_u64_u32 v[24:25], null, v12, v10, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v25, 31, v24
	v_lshlrev_b64 v[10:11], 2, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s2, s12, v10
	v_add_co_ci_u32_e64 v11, s2, s13, v11, s2
	global_load_b32 v12, v[10:11], off
	global_load_b32 v10, v[3:4], off
	global_load_b32 v11, v[1:2], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v23, v10
	v_cndmask_b32_e64 v13, -v10, v10, s1
.LBB1_11:                               ; %atomicrmw.start126
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, v11, v13
	global_atomic_cmpswap_b32 v10, v[1:2], v[10:11], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s2, v10, v11
	v_mov_b32_e32 v11, v10
	s_or_b32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_11
; %bb.12:                               ; %atomicrmw.end125
                                        ;   in Loop: Header=BB1_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v10, v[3:4], off
	global_load_b32 v11, v[6:7], off
	v_cmp_ge_f32_e64 s2, v22, v17
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v21, v10
	v_cndmask_b32_e64 v12, -v10, v10, s2
.LBB1_13:                               ; %atomicrmw.start132
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, v11, v12
	global_atomic_cmpswap_b32 v10, v[6:7], v[10:11], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s2, v10, v11
	v_mov_b32_e32 v11, v10
	s_or_b32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_13
.LBB1_14:                               ;   in Loop: Header=BB1_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v22, v8
	v_cmp_nge_f32_e64 s2, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s6, s2, s6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_5
.LBB1_15:                               ; %Flow163
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v8, v0
	v_cmp_nge_f32_e64 s0, v16, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s0, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB1_3
.LBB1_16:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_, .Lfunc_end1-_Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1820
; NumSgprs: 22
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z28BilinearInterpolationForwardPKfPKiS0_PfS2_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z28BilinearInterpolationForwardPKfPKiS0_PfS2_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z29BilinearInterpolationBackwardPKfPKiS0_S0_S2_S0_PfS3_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     29
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
