//Based on the work of Andrew Krepps
#include <stdio.h>


#include <stdlib.h>

#define ARRAY_SIZE N
#define ARRAY_SIZE_IN_BYTES (sizeof(unsigned int) * (ARRAY_SIZE))
#define FIRST_ASCII_SYMBOL 65
//65=A
#define LAST_ASCII_SYMBOL 122
//122 = z
#define SHIFT 4
#define LETTER_RANGE LAST_ASCII_SYMBOL - FIRST_ASCII_SYMBOL 

////////////////////////OPERATIONS//////////////////////////////////////////////

//ADD=1
__global__  void add(int * array1,int * array2,int * array3)
{
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]+array2[i];
}

//SUBTRACT=2
__global__  void subtract(int * array1,int * array2,int * array3)
{
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]-array2[i];
}


//MULTIPLY=3
__global__  void multiply(int * array1,int * array2,int * array3)
{
	
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]*array2[i];
}


//MOD=4
__global__  void mod(int * array1,int * array2,int * array3)
{
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]%array2[i];
}

//Caesar Cipher = 5 
__global__  void cipherEncrypt(int *message, int* cipher_key, int* encodedMsg)
{

   const unsigned int z = (blockIdx.x * blockDim.x) + threadIdx.x;  
   //shift all letter values to zero
   char zeroed_char = message[z] - FIRST_ASCII_SYMBOL;

   //make the cipher key
   	cipher_key[z] = ((zeroed_char + SHIFT) % LETTER_RANGE)+ FIRST_ASCII_SYMBOL;

   	char cipher_char = (char) cipher_key[z]+ FIRST_ASCII_SYMBOL;

	//change back to ascii and store in encodedMsg 
	encodedMsg[z] = (int) zeroed_char +SHIFT+ FIRST_ASCII_SYMBOL;

}


//////////////////////////GPU FUNCTION//////////////////////////////////
void main_sub(int N, int BLOCK_SIZE, int NUM_BLOCKS, int whichOperation, int pinnable)
{
	
	printf("/////NUM THREADS:%i\t BLOCK SIZE:%i \t",N,BLOCK_SIZE);

	//create timing 
	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

///////////////DECLARE PAGABLE MEMORY/////////////////
	int *h_pagable1; //pagable
	int *h_pagable2;
	int *h_pagable3;

	//PAGEABLE MEMORY
	/* Declare  statically 3 arrays of ARRAY_SIZE (N) each */
	h_pagable1 = (int*)malloc(ARRAY_SIZE*sizeof(int));	
	h_pagable2 = (int*)malloc(ARRAY_SIZE*sizeof(int));
	h_pagable3 = (int*)malloc(ARRAY_SIZE*sizeof(int));

/////////////////FILL ARRAYS////////////////
// fill the arrays with values described by module3; 
//comment out for arrays of //txt

	//using cipher
	if (whichOperation == 5)
	{
		for(int k=0; k < ARRAY_SIZE; k++)
		{
			h_pagable1[k] = (char)(k + 64);//just fill with alphabet

			h_pagable2[k] = 0; //cipher starts with all 0s

		}



	}
	//doing operation
	else{
		for(int i = 0; i < N; i++)
		{
			h_pagable1[i] = i;
			h_pagable2[i] = (rand()%4);

			//Check that array1 and array 2 inputs are correct
			//printf("ARRAY1 at %i\nARRAY2 at %i\n\n", h_pagable1[i], h_pagable[i]);
		}
	}
///////////////DECLARE DEVICE MEMORY/////////////////
	int *d_1;  //device memory
 	int *d_2;
	int *d_3;

	cudaMalloc((void**)&d_1, ARRAY_SIZE_IN_BYTES);  // device 
	cudaMalloc((void**)&d_2, ARRAY_SIZE_IN_BYTES); 
	cudaMalloc((void**)&d_3, ARRAY_SIZE_IN_BYTES);


///////////////DECLARE PINNED MEMORY && COPY DATA FROM CPU TO GPU/////////
	int *h_pinnable1; //pinnable memory
	int *h_pinnable2; 
	int *h_pinnable3;

	//USING PINNABLE MEMORY
	if (pinnable ==1) 
	{
		printf("Memory type: Pinned\t");
		cudaMallocHost((void**)&h_pinnable1, ARRAY_SIZE_IN_BYTES); // host pinned
		cudaMallocHost((void**)&h_pinnable2, ARRAY_SIZE_IN_BYTES);
		cudaMallocHost((void**)&h_pinnable3, ARRAY_SIZE_IN_BYTES);

//cudaMemcpy( array1, gpu_block1, ARRAY_SIZE_IN_BYTES, cudaMemcpyDeviceToHost )
		
		memcpy( h_pinnable1, h_pagable1, ARRAY_SIZE_IN_BYTES );
		memcpy( h_pinnable2, h_pagable2, ARRAY_SIZE_IN_BYTES );
		memcpy( h_pinnable3, h_pagable3, ARRAY_SIZE_IN_BYTES );


		cudaMemcpy( d_1, h_pinnable1, ARRAY_SIZE_IN_BYTES, cudaMemcpyHostToDevice );
		cudaMemcpy( d_2, h_pinnable2, ARRAY_SIZE_IN_BYTES, cudaMemcpyHostToDevice );
		cudaMemcpy( d_3, h_pinnable3, ARRAY_SIZE_IN_BYTES, cudaMemcpyHostToDevice );

	}
	////USING ONLY PAGABLE MEMORY
	else{
		printf("Memory type: Pagable\t");
		cudaMemcpy( d_1, h_pagable1, ARRAY_SIZE_IN_BYTES, cudaMemcpyHostToDevice );
		cudaMemcpy( d_2, h_pagable2, ARRAY_SIZE_IN_BYTES, cudaMemcpyHostToDevice );
		cudaMemcpy( d_3, h_pagable3, ARRAY_SIZE_IN_BYTES, cudaMemcpyHostToDevice );
	}


///////////////////EXECUTE KERNEL////////////////////////////////
	
	cudaEventRecord(start);

	switch(whichOperation) {

   //ADD
   	case 1  :
   		printf("Operation: ADD///////////\n");
    	add<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break; 
   	//SUBTRACT
   	case 2  :
   		printf("Operation: SUBTRACT///////////\n");
    	subtract<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break;
   	//MULTIPLY 
   	case 3  :
   		printf("Operation: MUTIPLY///////////\n");
    	multiply<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break;
	//MOD 
   	case 4  :
   		printf("Operation: MOD///////////\n");
    	mod<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break; 
    //caesar cipher
    case 5   :
    	printf("Operation:///////////\n");
    	cipherEncrypt<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break;
   
	}

///////////////COPY BACK DATA FROM GPU TO CPU////////////////////////
	cudaEventRecord(stop);
	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);
	printf("Time elapsed: %f\n", milliseconds);

	////////////////////


	cudaMemcpy( h_pagable1, d_1, ARRAY_SIZE_IN_BYTES, cudaMemcpyDeviceToHost );
	cudaMemcpy( h_pagable2, d_2, ARRAY_SIZE_IN_BYTES, cudaMemcpyDeviceToHost );
	cudaMemcpy( h_pagable3, d_3, ARRAY_SIZE_IN_BYTES, cudaMemcpyDeviceToHost );

///////////////PRINT RESULTS////////////////////////////////////////


/* Iterate through the arrays and print */

	for(int i = 0; i < ARRAY_SIZE; i++)
	{	

		if (whichOperation ==5)
		{   

			char ogLetter = (char) h_pagable1[i];
			char cipherLetter = (char) h_pagable2[i]+FIRST_ASCII_SYMBOL;
			printf("\n\nOG Letter int was: %i\nOG Letter char was: %c\nCipher int is: %i\nEncoded int is:%i\nEncoded char is now: %c\n", h_pagable1[i], ogLetter, h_pagable2[i], h_pagable3[i], cipherLetter);

		}
		else{

			printf("Index %i:\t %i\n", i, h_pagable3[i]);
		}
	}


////////////////FREE MEMORY///////////////////////////////////////
	/* Free the arrays on the GPU as now we're done with them */
	cudaFree(d_1);
	cudaFree(d_2);
	cudaFree(d_3);


	cudaFreeHost(h_pinnable1);
	cudaFreeHost(h_pinnable2);
	cudaFreeHost(h_pinnable3);

	free(h_pagable1);
	free(h_pagable2);
	free(h_pagable3);

	
}

//////////////////////////MAIN///////////////////////////////////

int main(int argc, char** argv)
{
	// read command line arguments
	int totalThreads = (1 << 20);
	int blockSize = 256;
	int operationNum = 0;
	int pinnable = 0;

	//total threads
	if (argc >= 2) {
		totalThreads = atoi(argv[1]);
	}
	//block size
	if (argc >= 3) {
		blockSize = atoi(argv[2]);
	}
	//using pinned memory?
	if (argc >= 4) {
		pinnable = atoi(argv[3]);
	}
	//operation/kernel execution number
	if (argc >= 5) {
		 operationNum = atoi(argv[4]);
	}

	int numBlocks = totalThreads/blockSize;

	// validate command line arguments
	if (totalThreads % blockSize != 0) {
		++numBlocks;
		totalThreads = numBlocks*blockSize;
		
		printf("Warning: Total thread count is not evenly divisible by the block size\n");
		printf("The total number of threads will be rounded up to %d\n", totalThreads);
	}
    //int N, int BLOCK_SIZE, int NUM_BLOCKS, int whichOperation, int pinnable

	main_sub(totalThreads,blockSize,numBlocks, operationNum, pinnable);

}


	.file	"tmpxft_00243686_00000000-6_assignment.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z26__device_stub__Z3addPiS_S_PiS_S_
	.type	_Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
	.globl	_Z3addPiS_S_
	.type	_Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3addPiS_S_PiS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z3addPiS_S_, .-_Z3addPiS_S_
	.globl	_Z31__device_stub__Z8subtractPiS_S_PiS_S_
	.type	_Z31__device_stub__Z8subtractPiS_S_PiS_S_, @function
_Z31__device_stub__Z8subtractPiS_S_PiS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8subtractPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z31__device_stub__Z8subtractPiS_S_PiS_S_, .-_Z31__device_stub__Z8subtractPiS_S_PiS_S_
	.globl	_Z8subtractPiS_S_
	.type	_Z8subtractPiS_S_, @function
_Z8subtractPiS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8subtractPiS_S_PiS_S_
	.cfi_endproc
.LFE2056:
	.size	_Z8subtractPiS_S_, .-_Z8subtractPiS_S_
	.globl	_Z31__device_stub__Z8multiplyPiS_S_PiS_S_
	.type	_Z31__device_stub__Z8multiplyPiS_S_PiS_S_, @function
_Z31__device_stub__Z8multiplyPiS_S_PiS_S_:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8multiplyPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z31__device_stub__Z8multiplyPiS_S_PiS_S_, .-_Z31__device_stub__Z8multiplyPiS_S_PiS_S_
	.globl	_Z8multiplyPiS_S_
	.type	_Z8multiplyPiS_S_, @function
_Z8multiplyPiS_S_:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8multiplyPiS_S_PiS_S_
	.cfi_endproc
.LFE2058:
	.size	_Z8multiplyPiS_S_, .-_Z8multiplyPiS_S_
	.globl	_Z26__device_stub__Z3modPiS_S_PiS_S_
	.type	_Z26__device_stub__Z3modPiS_S_PiS_S_, @function
_Z26__device_stub__Z3modPiS_S_PiS_S_:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3modPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z26__device_stub__Z3modPiS_S_PiS_S_, .-_Z26__device_stub__Z3modPiS_S_PiS_S_
	.globl	_Z3modPiS_S_
	.type	_Z3modPiS_S_, @function
_Z3modPiS_S_:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3modPiS_S_PiS_S_
	.cfi_endproc
.LFE2060:
	.size	_Z3modPiS_S_, .-_Z3modPiS_S_
	.globl	_Z37__device_stub__Z13cipherEncryptPiS_S_PiS_S_
	.type	_Z37__device_stub__Z13cipherEncryptPiS_S_PiS_S_, @function
_Z37__device_stub__Z13cipherEncryptPiS_S_PiS_S_:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13cipherEncryptPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L23:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z37__device_stub__Z13cipherEncryptPiS_S_PiS_S_, .-_Z37__device_stub__Z13cipherEncryptPiS_S_PiS_S_
	.globl	_Z13cipherEncryptPiS_S_
	.type	_Z13cipherEncryptPiS_S_, @function
_Z13cipherEncryptPiS_S_:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z13cipherEncryptPiS_S_PiS_S_
	.cfi_endproc
.LFE2062:
	.size	_Z13cipherEncryptPiS_S_, .-_Z13cipherEncryptPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/////NUM THREADS:%i\t BLOCK SIZE:%i \t"
.LC1:
	.string	"Memory type: Pinned\t"
.LC2:
	.string	"Memory type: Pagable\t"
.LC3:
	.string	"Operation: ADD///////////\n"
.LC4:
	.string	"Operation: SUBTRACT///////////\n"
.LC5:
	.string	"Operation: MUTIPLY///////////\n"
.LC6:
	.string	"Operation: MOD///////////\n"
.LC7:
	.string	"Operation:///////////\n"
.LC9:
	.string	"Time elapsed: %f\n"
.LC10:
	.string	"\n\nOG Letter int was: %i\nOG Letter char was: %c\nCipher int is: %i\nEncoded int is:%i\nEncoded char is now: %c\n"
.LC11:
	.string	"Index %i:\t %i\n"
	.text
	.globl	_Z8main_subiiiii
	.type	_Z8main_subiiiii, @function
_Z8main_subiiiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	movl	%esi, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	movl	%edi, %edx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edi, %r13d
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movl	%r8d, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movslq	%r13d, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	xorl	%ecx, %ecx
	movq	%rax, 8(%rsp)
	cmpl	$5, %r15d
	jne	.L30
	xorl	%eax, %eax
.L29:
	cmpl	%eax, %r13d
	jle	.L35
	leal	64(%rax), %edx
	xorl	%esi, %esi
	movsbl	%dl, %edx
	movl	%esi, (%rbx,%rax,4)
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L29
.L35:
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	cmpl	$1, 20(%rsp)
	jne	.L56
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMallocHost@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMallocHost@PLT
	movq	(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMallocHost@PLT
	movq	(%rsp), %rcx
	movq	%rbp, %rsi
	movq	(%rsp), %rdx
	movq	72(%rsp), %rdi
	rep movsb
	movq	(%rsp), %rcx
	movq	%rbx, %rsi
	movq	80(%rsp), %rdi
	rep movsb
	movq	8(%rsp), %rsi
	movq	(%rsp), %rcx
	movq	88(%rsp), %rdi
	rep movsb
	movl	$1, %ecx
	movq	72(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$1, %ecx
	jmp	.L58
.L30:
	cmpl	%ecx, %r13d
	jle	.L35
	movl	%ecx, 0(%rbp,%rcx,4)
	movq	%rcx, 24(%rsp)
	call	rand@PLT
	movl	$4, %ecx
	cltd
	idivl	%ecx
	movq	24(%rsp), %rcx
	movl	%edx, (%rbx,%rcx,4)
	incq	%rcx
	jmp	.L30
.L56:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
.L58:
	movq	64(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leal	-1(%r15), %eax
	cmpl	$4, %eax
	ja	.L37
	leaq	.L39(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata
	.align 4
	.align 4
.L39:
	.long	.L43-.L39
	.long	.L42-.L39
	.long	.L41-.L39
	.long	.L40-.L39
	.long	.L38-.L39
	.text
.L43:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z26__device_stub__Z3addPiS_S_PiS_S_
	jmp	.L37
.L42:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z31__device_stub__Z8subtractPiS_S_PiS_S_
	jmp	.L37
.L41:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z31__device_stub__Z8multiplyPiS_S_PiS_S_
	jmp	.L37
.L40:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z26__device_stub__Z3modPiS_S_PiS_S_
	jmp	.L37
.L38:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z37__device_stub__Z13cipherEncryptPiS_S_PiS_S_
.L37:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%r14d, %r14d
	leaq	.LC11(%rip), %r12
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	108(%rsp), %rdi
	movl	$0x00000000, 108(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	108(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
.L49:
	cmpl	%r14d, %r13d
	jle	.L59
	movq	8(%rsp), %rax
	movl	(%rax,%r14,4), %r9d
	cmpl	$5, %r15d
	jne	.L50
	movl	(%rbx,%r14,4), %r8d
	movl	0(%rbp,%r14,4), %edx
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	$2, %edi
	leaq	.LC10(%rip), %rsi
	leal	65(%r8), %eax
	movsbl	%dl, %ecx
	movsbl	%al, %eax
	pushq	%rax
	.cfi_def_cfa_offset 208
	xorl	%eax, %eax
	call	__printf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 200
	popq	%rcx
	.cfi_def_cfa_offset 192
	jmp	.L51
.L50:
	movl	%r9d, %ecx
	movl	%r14d, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L51:
	incq	%r14
	jmp	.L49
.L59:
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	80(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	88(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	movq	8(%rsp), %rdi
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z8main_subiiiii, .-_Z8main_subiiiii
	.section	.rodata.str1.1
.LC12:
	.string	"Warning: Total thread count is not evenly divisible by the block size\n"
.LC13:
	.string	"The total number of threads will be rounded up to %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rcx
	.cfi_def_cfa_offset 64
	cmpl	$1, %edi
	jle	.L63
	movl	%edi, %r15d
	movq	8(%rsi), %rdi
	movq	%rsi, %r14
	call	atoi@PLT
	movl	%eax, %ebx
	cmpl	$2, %r15d
	je	.L64
	movq	16(%r14), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
	cmpl	$3, %r15d
	je	.L65
	movq	24(%r14), %rdi
	xorl	%r12d, %r12d
	call	atoi@PLT
	movl	%eax, %r13d
	cmpl	$4, %r15d
	je	.L61
	movq	32(%r14), %rdi
	call	atoi@PLT
	movl	%eax, %r12d
	jmp	.L61
.L63:
	xorl	%r13d, %r13d
	movl	$256, %ebp
	movl	$1048576, %ebx
	jmp	.L71
.L64:
	xorl	%r13d, %r13d
	movl	$256, %ebp
	jmp	.L71
.L65:
	xorl	%r13d, %r13d
.L71:
	xorl	%r12d, %r12d
.L61:
	movl	%ebx, %eax
	cltd
	idivl	%ebp
	movl	%eax, %r14d
	testl	%edx, %edx
	je	.L62
	incl	%r14d
	movl	%ebp, %ebx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	imull	%r14d, %ebx
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%ebx, %edx
	call	__printf_chk@PLT
.L62:
	movl	%r14d, %edx
	movl	%r13d, %r8d
	movl	%r12d, %ecx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z8main_subiiiii
	popq	%rdx
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z13cipherEncryptPiS_S_"
.LC15:
	.string	"_Z3modPiS_S_"
.LC16:
	.string	"_Z8multiplyPiS_S_"
.LC17:
	.string	"_Z8subtractPiS_S_"
.LC18:
	.string	"_Z3addPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13cipherEncryptPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3modPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8multiplyPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8subtractPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3addPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//Based on the work of Andrew Krepps

#include <hip/hip_runtime.h>
#include <stdio.h>


#include <stdlib.h>

#define ARRAY_SIZE N
#define ARRAY_SIZE_IN_BYTES (sizeof(unsigned int) * (ARRAY_SIZE))
#define FIRST_ASCII_SYMBOL 65
//65=A
#define LAST_ASCII_SYMBOL 122
//122 = z
#define SHIFT 4
#define LETTER_RANGE LAST_ASCII_SYMBOL - FIRST_ASCII_SYMBOL 

////////////////////////OPERATIONS//////////////////////////////////////////////

//ADD=1
__global__  void add(int * array1,int * array2,int * array3)
{
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]+array2[i];
}

//SUBTRACT=2
__global__  void subtract(int * array1,int * array2,int * array3)
{
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]-array2[i];
}


//MULTIPLY=3
__global__  void multiply(int * array1,int * array2,int * array3)
{
	
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]*array2[i];
}


//MOD=4
__global__  void mod(int * array1,int * array2,int * array3)
{
	const unsigned int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	array3[i]=array1[i]%array2[i];
}

//Caesar Cipher = 5 
__global__  void cipherEncrypt(int *message, int* cipher_key, int* encodedMsg)
{

   const unsigned int z = (blockIdx.x * blockDim.x) + threadIdx.x;  
   //shift all letter values to zero
   char zeroed_char = message[z] - FIRST_ASCII_SYMBOL;

   //make the cipher key
   	cipher_key[z] = ((zeroed_char + SHIFT) % LETTER_RANGE)+ FIRST_ASCII_SYMBOL;

   	char cipher_char = (char) cipher_key[z]+ FIRST_ASCII_SYMBOL;

	//change back to ascii and store in encodedMsg 
	encodedMsg[z] = (int) zeroed_char +SHIFT+ FIRST_ASCII_SYMBOL;

}


//////////////////////////GPU FUNCTION//////////////////////////////////
void main_sub(int N, int BLOCK_SIZE, int NUM_BLOCKS, int whichOperation, int pinnable)
{
	
	printf("/////NUM THREADS:%i\t BLOCK SIZE:%i \t",N,BLOCK_SIZE);

	//create timing 
	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);

///////////////DECLARE PAGABLE MEMORY/////////////////
	int *h_pagable1; //pagable
	int *h_pagable2;
	int *h_pagable3;

	//PAGEABLE MEMORY
	/* Declare  statically 3 arrays of ARRAY_SIZE (N) each */
	h_pagable1 = (int*)malloc(ARRAY_SIZE*sizeof(int));	
	h_pagable2 = (int*)malloc(ARRAY_SIZE*sizeof(int));
	h_pagable3 = (int*)malloc(ARRAY_SIZE*sizeof(int));

/////////////////FILL ARRAYS////////////////
// fill the arrays with values described by module3; 
//comment out for arrays of //txt

	//using cipher
	if (whichOperation == 5)
	{
		for(int k=0; k < ARRAY_SIZE; k++)
		{
			h_pagable1[k] = (char)(k + 64);//just fill with alphabet

			h_pagable2[k] = 0; //cipher starts with all 0s

		}



	}
	//doing operation
	else{
		for(int i = 0; i < N; i++)
		{
			h_pagable1[i] = i;
			h_pagable2[i] = (rand()%4);

			//Check that array1 and array 2 inputs are correct
			//printf("ARRAY1 at %i\nARRAY2 at %i\n\n", h_pagable1[i], h_pagable[i]);
		}
	}
///////////////DECLARE DEVICE MEMORY/////////////////
	int *d_1;  //device memory
 	int *d_2;
	int *d_3;

	hipMalloc((void**)&d_1, ARRAY_SIZE_IN_BYTES);  // device 
	hipMalloc((void**)&d_2, ARRAY_SIZE_IN_BYTES); 
	hipMalloc((void**)&d_3, ARRAY_SIZE_IN_BYTES);


///////////////DECLARE PINNED MEMORY && COPY DATA FROM CPU TO GPU/////////
	int *h_pinnable1; //pinnable memory
	int *h_pinnable2; 
	int *h_pinnable3;

	//USING PINNABLE MEMORY
	if (pinnable ==1) 
	{
		printf("Memory type: Pinned\t");
		hipHostMalloc((void**)&h_pinnable1, ARRAY_SIZE_IN_BYTES, hipHostMallocDefault); // host pinned
		hipHostMalloc((void**)&h_pinnable2, ARRAY_SIZE_IN_BYTES, hipHostMallocDefault);
		hipHostMalloc((void**)&h_pinnable3, ARRAY_SIZE_IN_BYTES, hipHostMallocDefault);

//cudaMemcpy( array1, gpu_block1, ARRAY_SIZE_IN_BYTES, cudaMemcpyDeviceToHost )
		
		memcpy( h_pinnable1, h_pagable1, ARRAY_SIZE_IN_BYTES );
		memcpy( h_pinnable2, h_pagable2, ARRAY_SIZE_IN_BYTES );
		memcpy( h_pinnable3, h_pagable3, ARRAY_SIZE_IN_BYTES );


		hipMemcpy( d_1, h_pinnable1, ARRAY_SIZE_IN_BYTES, hipMemcpyHostToDevice );
		hipMemcpy( d_2, h_pinnable2, ARRAY_SIZE_IN_BYTES, hipMemcpyHostToDevice );
		hipMemcpy( d_3, h_pinnable3, ARRAY_SIZE_IN_BYTES, hipMemcpyHostToDevice );

	}
	////USING ONLY PAGABLE MEMORY
	else{
		printf("Memory type: Pagable\t");
		hipMemcpy( d_1, h_pagable1, ARRAY_SIZE_IN_BYTES, hipMemcpyHostToDevice );
		hipMemcpy( d_2, h_pagable2, ARRAY_SIZE_IN_BYTES, hipMemcpyHostToDevice );
		hipMemcpy( d_3, h_pagable3, ARRAY_SIZE_IN_BYTES, hipMemcpyHostToDevice );
	}


///////////////////EXECUTE KERNEL////////////////////////////////
	
	hipEventRecord(start);

	switch(whichOperation) {

   //ADD
   	case 1  :
   		printf("Operation: ADD///////////\n");
    	add<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break; 
   	//SUBTRACT
   	case 2  :
   		printf("Operation: SUBTRACT///////////\n");
    	subtract<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break;
   	//MULTIPLY 
   	case 3  :
   		printf("Operation: MUTIPLY///////////\n");
    	multiply<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break;
	//MOD 
   	case 4  :
   		printf("Operation: MOD///////////\n");
    	mod<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break; 
    //caesar cipher
    case 5   :
    	printf("Operation:///////////\n");
    	cipherEncrypt<<<NUM_BLOCKS, BLOCK_SIZE>>>(d_1,d_2,d_3);
    	break;
   
	}

///////////////COPY BACK DATA FROM GPU TO CPU////////////////////////
	hipEventRecord(stop);
	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);
	printf("Time elapsed: %f\n", milliseconds);

	////////////////////


	hipMemcpy( h_pagable1, d_1, ARRAY_SIZE_IN_BYTES, hipMemcpyDeviceToHost );
	hipMemcpy( h_pagable2, d_2, ARRAY_SIZE_IN_BYTES, hipMemcpyDeviceToHost );
	hipMemcpy( h_pagable3, d_3, ARRAY_SIZE_IN_BYTES, hipMemcpyDeviceToHost );

///////////////PRINT RESULTS////////////////////////////////////////


/* Iterate through the arrays and print */

	for(int i = 0; i < ARRAY_SIZE; i++)
	{	

		if (whichOperation ==5)
		{   

			char ogLetter = (char) h_pagable1[i];
			char cipherLetter = (char) h_pagable2[i]+FIRST_ASCII_SYMBOL;
			printf("\n\nOG Letter int was: %i\nOG Letter char was: %c\nCipher int is: %i\nEncoded int is:%i\nEncoded char is now: %c\n", h_pagable1[i], ogLetter, h_pagable2[i], h_pagable3[i], cipherLetter);

		}
		else{

			printf("Index %i:\t %i\n", i, h_pagable3[i]);
		}
	}


////////////////FREE MEMORY///////////////////////////////////////
	/* Free the arrays on the GPU as now we're done with them */
	hipFree(d_1);
	hipFree(d_2);
	hipFree(d_3);


	hipHostFree(h_pinnable1);
	hipHostFree(h_pinnable2);
	hipHostFree(h_pinnable3);

	free(h_pagable1);
	free(h_pagable2);
	free(h_pagable3);

	
}

//////////////////////////MAIN///////////////////////////////////

int main(int argc, char** argv)
{
	// read command line arguments
	int totalThreads = (1 << 20);
	int blockSize = 256;
	int operationNum = 0;
	int pinnable = 0;

	//total threads
	if (argc >= 2) {
		totalThreads = atoi(argv[1]);
	}
	//block size
	if (argc >= 3) {
		blockSize = atoi(argv[2]);
	}
	//using pinned memory?
	if (argc >= 4) {
		pinnable = atoi(argv[3]);
	}
	//operation/kernel execution number
	if (argc >= 5) {
		 operationNum = atoi(argv[4]);
	}

	int numBlocks = totalThreads/blockSize;

	// validate command line arguments
	if (totalThreads % blockSize != 0) {
		++numBlocks;
		totalThreads = numBlocks*blockSize;
		
		printf("Warning: Total thread count is not evenly divisible by the block size\n");
		printf("The total number of threads will be rounded up to %d\n", totalThreads);
	}
    //int N, int BLOCK_SIZE, int NUM_BLOCKS, int whichOperation, int pinnable

	main_sub(totalThreads,blockSize,numBlocks, operationNum, pinnable);

}


	.text
	.file	"assignment.hip"
	.globl	_Z18__device_stub__addPiS_S_    # -- Begin function _Z18__device_stub__addPiS_S_
	.type	_Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_:           # @_Z18__device_stub__addPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPiS_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__subtractPiS_S_ # -- Begin function _Z23__device_stub__subtractPiS_S_
	.type	_Z23__device_stub__subtractPiS_S_,@function
_Z23__device_stub__subtractPiS_S_:      # @_Z23__device_stub__subtractPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8subtractPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__subtractPiS_S_, .Lfunc_end1-_Z23__device_stub__subtractPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__multiplyPiS_S_ # -- Begin function _Z23__device_stub__multiplyPiS_S_
	.type	_Z23__device_stub__multiplyPiS_S_,@function
_Z23__device_stub__multiplyPiS_S_:      # @_Z23__device_stub__multiplyPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8multiplyPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__multiplyPiS_S_, .Lfunc_end2-_Z23__device_stub__multiplyPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__modPiS_S_    # -- Begin function _Z18__device_stub__modPiS_S_
	.type	_Z18__device_stub__modPiS_S_,@function
_Z18__device_stub__modPiS_S_:           # @_Z18__device_stub__modPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3modPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z18__device_stub__modPiS_S_, .Lfunc_end3-_Z18__device_stub__modPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__cipherEncryptPiS_S_ # -- Begin function _Z28__device_stub__cipherEncryptPiS_S_
	.type	_Z28__device_stub__cipherEncryptPiS_S_,@function
_Z28__device_stub__cipherEncryptPiS_S_: # @_Z28__device_stub__cipherEncryptPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13cipherEncryptPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z28__device_stub__cipherEncryptPiS_S_, .Lfunc_end4-_Z28__device_stub__cipherEncryptPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8main_subiiiii                # -- Begin function _Z8main_subiiiii
	.type	_Z8main_subiiiii,@function
_Z8main_subiiiii:                       # @_Z8main_subiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %r13d
	movl	%ecx, %r14d
	movl	%edx, (%rsp)                    # 4-byte Spill
	movl	%esi, %edx
	movl	%edi, %ebp
	movl	$.L.str, %edi
	movl	%ebp, %esi
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	xorl	%eax, %eax
	callq	printf
	leaq	80(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	movslq	%ebp, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, 72(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	cmpl	$5, %r14d
	movl	%ebp, 36(%rsp)                  # 4-byte Spill
	movl	%r13d, 68(%rsp)                 # 4-byte Spill
	jne	.LBB5_1
# %bb.4:                                # %.preheader
	testl	%ebp, %ebp
	jle	.LBB5_7
# %bb.5:                                # %.lr.ph143.preheader
	movl	36(%rsp), %ebp                  # 4-byte Reload
	leaq	(,%rbp,4), %rdx
	xorl	%r13d, %r13d
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$1073741824, %eax               # imm = 0x40000000
.LBB5_6:                                # %.lr.ph143
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, %ecx
	sarl	$24, %ecx
	movl	%ecx, (%rbx,%r13,4)
	incq	%r13
	addl	$16777216, %eax                 # imm = 0x1000000
	cmpq	%r13, %rbp
	jne	.LBB5_6
	jmp	.LBB5_7
.LBB5_1:                                # %.preheader139
	testl	%ebp, %ebp
	jle	.LBB5_7
# %bb.2:                                # %.lr.ph.preheader
	movl	36(%rsp), %ebp                  # 4-byte Reload
	xorl	%r13d, %r13d
.LBB5_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r13d, (%rbx,%r13,4)
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-4, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r15,%r13,4)
	incq	%r13
	cmpq	%r13, %rbp
	jne	.LBB5_3
.LBB5_7:                                # %.loopexit
	leaq	24(%rsp), %rdi
	movq	72(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	cmpl	$1, 68(%rsp)                    # 4-byte Folded Reload
	jne	.LBB5_9
# %bb.8:
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	88(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	callq	memcpy@PLT
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	callq	memcpy@PLT
	movq	(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	callq	memcpy@PLT
	movq	24(%rsp), %rdi
	leaq	48(%rsp), %rax
	movq	(%rax), %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	leaq	40(%rsp), %rax
	movq	(%rax), %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	(%rbp), %rsi
	jmp	.LBB5_10
.LBB5_9:
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movq	24(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
.LBB5_10:
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	36(%rsp), %r13d                 # 4-byte Reload
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leal	-1(%r14), %eax
	cmpl	$4, %eax
	ja	.LBB5_22
# %bb.11:
	jmpq	*.LJTI5_0(,%rax,8)
.LBB5_12:
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	(%rsp), %edi                    # 4-byte Reload
	btsq	$32, %rdi
	movl	4(%rsp), %edx                   # 4-byte Reload
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.13:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z18__device_stub__addPiS_S_
	jmp	.LBB5_22
.LBB5_20:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	(%rsp), %edi                    # 4-byte Reload
	btsq	$32, %rdi
	movl	4(%rsp), %edx                   # 4-byte Reload
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.21:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z28__device_stub__cipherEncryptPiS_S_
	jmp	.LBB5_22
.LBB5_16:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	(%rsp), %edi                    # 4-byte Reload
	btsq	$32, %rdi
	movl	4(%rsp), %edx                   # 4-byte Reload
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.17:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z23__device_stub__multiplyPiS_S_
	jmp	.LBB5_22
.LBB5_18:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	(%rsp), %edi                    # 4-byte Reload
	btsq	$32, %rdi
	movl	4(%rsp), %edx                   # 4-byte Reload
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.19:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z18__device_stub__modPiS_S_
	jmp	.LBB5_22
.LBB5_14:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	(%rsp), %edi                    # 4-byte Reload
	btsq	$32, %rdi
	movl	4(%rsp), %edx                   # 4-byte Reload
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.15:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z23__device_stub__subtractPiS_S_
.LBB5_22:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	56(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	100(%rsp), %rbp
	movl	$0, (%rbp)
	movq	80(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	%rbp, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbp), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rsi
	movq	%rbx, %rdi
	movq	72(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%r13d, %r13d
	jle	.LBB5_28
# %bb.23:                               # %.lr.ph145.preheader
	movl	%r13d, %ebp
	xorl	%r13d, %r13d
.LBB5_24:                               # %.lr.ph145
                                        # =>This Inner Loop Header: Depth=1
	cmpl	$5, %r14d
	jne	.LBB5_26
# %bb.25:                               #   in Loop: Header=BB5_24 Depth=1
	movl	(%rbx,%r13,4), %esi
	movl	(%r15,%r13,4), %ecx
	movsbl	%sil, %edx
	movl	(%r12,%r13,4), %r8d
	leal	65(%rcx), %eax
	movsbl	%al, %r9d
	movl	$.L.str.9, %edi
                                        # kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB5_27
.LBB5_26:                               #   in Loop: Header=BB5_24 Depth=1
	movl	(%r12,%r13,4), %edx
	movl	$.L.str.10, %edi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_27:                               #   in Loop: Header=BB5_24 Depth=1
	incq	%r13
	cmpq	%r13, %rbp
	jne	.LBB5_24
.LBB5_28:                               # %._crit_edge
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipHostFree
	movq	40(%rsp), %rdi
	callq	hipHostFree
	movq	88(%rsp), %rdi
	callq	hipHostFree
	movq	%rbx, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z8main_subiiiii, .Lfunc_end5-_Z8main_subiiiii
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI5_0:
	.quad	.LBB5_12
	.quad	.LBB5_14
	.quad	.LBB5_16
	.quad	.LBB5_18
	.quad	.LBB5_20
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$256, %ebx                      # imm = 0x100
	movl	$1048576, %r14d                 # imm = 0x100000
	xorl	%ebp, %ebp
	cmpl	$2, %edi
	jl	.LBB6_1
# %bb.2:
	movq	%rsi, %r12
	movl	%edi, %r13d
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r14d
	cmpl	$2, %r13d
	je	.LBB6_1
# %bb.3:
	movq	16(%r12), %rdi
	callq	atoi
	movl	%eax, %ebx
	cmpl	$4, %r13d
	jb	.LBB6_1
# %bb.4:
	movq	24(%r12), %rdi
	callq	atoi
	movl	%eax, %r15d
	cmpl	$4, %r13d
	je	.LBB6_6
# %bb.5:
	movq	32(%r12), %rdi
	callq	atoi
	movl	%eax, %ebp
	jmp	.LBB6_6
.LBB6_1:
	xorl	%r15d, %r15d
.LBB6_6:                                # %.thread33
	movl	%r14d, %eax
	cltd
	idivl	%ebx
	movl	%eax, %r12d
	testl	%edx, %edx
	je	.LBB6_8
# %bb.7:
	incl	%r12d
	movl	%r12d, %r14d
	imull	%ebx, %r14d
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.L.str.12, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB6_8:
	movl	%r14d, %edi
	movl	%ebx, %esi
	movl	%r12d, %edx
	movl	%ebp, %ecx
	movl	%r15d, %r8d
	callq	_Z8main_subiiiii
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8subtractPiS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8multiplyPiS_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3modPiS_S_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13cipherEncryptPiS_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addPiS_S_,@object            # @_Z3addPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_
	.p2align	3, 0x0
_Z3addPiS_S_:
	.quad	_Z18__device_stub__addPiS_S_
	.size	_Z3addPiS_S_, 8

	.type	_Z8subtractPiS_S_,@object       # @_Z8subtractPiS_S_
	.globl	_Z8subtractPiS_S_
	.p2align	3, 0x0
_Z8subtractPiS_S_:
	.quad	_Z23__device_stub__subtractPiS_S_
	.size	_Z8subtractPiS_S_, 8

	.type	_Z8multiplyPiS_S_,@object       # @_Z8multiplyPiS_S_
	.globl	_Z8multiplyPiS_S_
	.p2align	3, 0x0
_Z8multiplyPiS_S_:
	.quad	_Z23__device_stub__multiplyPiS_S_
	.size	_Z8multiplyPiS_S_, 8

	.type	_Z3modPiS_S_,@object            # @_Z3modPiS_S_
	.globl	_Z3modPiS_S_
	.p2align	3, 0x0
_Z3modPiS_S_:
	.quad	_Z18__device_stub__modPiS_S_
	.size	_Z3modPiS_S_, 8

	.type	_Z13cipherEncryptPiS_S_,@object # @_Z13cipherEncryptPiS_S_
	.globl	_Z13cipherEncryptPiS_S_
	.p2align	3, 0x0
_Z13cipherEncryptPiS_S_:
	.quad	_Z28__device_stub__cipherEncryptPiS_S_
	.size	_Z13cipherEncryptPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/////NUM THREADS:%i\t BLOCK SIZE:%i \t"
	.size	.L.str, 37

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Memory type: Pinned\t"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Memory type: Pagable\t"
	.size	.L.str.2, 22

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Time elapsed: %f\n"
	.size	.L.str.8, 18

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\n\nOG Letter int was: %i\nOG Letter char was: %c\nCipher int is: %i\nEncoded int is:%i\nEncoded char is now: %c\n"
	.size	.L.str.9, 108

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Index %i:\t %i\n"
	.size	.L.str.10, 15

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"The total number of threads will be rounded up to %d\n"
	.size	.L.str.12, 54

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8subtractPiS_S_"
	.size	.L__unnamed_2, 18

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8multiplyPiS_S_"
	.size	.L__unnamed_3, 18

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z3modPiS_S_"
	.size	.L__unnamed_4, 13

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z13cipherEncryptPiS_S_"
	.size	.L__unnamed_5, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Operation:///////////"
	.size	.Lstr, 22

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Operation: MOD///////////"
	.size	.Lstr.1, 26

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Operation: MUTIPLY///////////"
	.size	.Lstr.2, 30

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Operation: SUBTRACT///////////"
	.size	.Lstr.3, 31

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Operation: ADD///////////"
	.size	.Lstr.4, 26

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Warning: Total thread count is not evenly divisible by the block size"
	.size	.Lstr.5, 70

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_
	.addrsig_sym _Z23__device_stub__subtractPiS_S_
	.addrsig_sym _Z23__device_stub__multiplyPiS_S_
	.addrsig_sym _Z18__device_stub__modPiS_S_
	.addrsig_sym _Z28__device_stub__cipherEncryptPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addPiS_S_
	.addrsig_sym _Z8subtractPiS_S_
	.addrsig_sym _Z8multiplyPiS_S_
	.addrsig_sym _Z3modPiS_S_
	.addrsig_sym _Z13cipherEncryptPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_            ; -- Begin function _Z3addPiS_S_
	.globl	_Z3addPiS_S_
	.p2align	8
	.type	_Z3addPiS_S_,@function
_Z3addPiS_S_:                           ; @_Z3addPiS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_, .Lfunc_end0-_Z3addPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8subtractPiS_S_       ; -- Begin function _Z8subtractPiS_S_
	.globl	_Z8subtractPiS_S_
	.p2align	8
	.type	_Z8subtractPiS_S_,@function
_Z8subtractPiS_S_:                      ; @_Z8subtractPiS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8subtractPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8subtractPiS_S_, .Lfunc_end1-_Z8subtractPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8multiplyPiS_S_       ; -- Begin function _Z8multiplyPiS_S_
	.globl	_Z8multiplyPiS_S_
	.p2align	8
	.type	_Z8multiplyPiS_S_,@function
_Z8multiplyPiS_S_:                      ; @_Z8multiplyPiS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8multiplyPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8multiplyPiS_S_, .Lfunc_end2-_Z8multiplyPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3modPiS_S_            ; -- Begin function _Z3modPiS_S_
	.globl	_Z3modPiS_S_
	.p2align	8
	.type	_Z3modPiS_S_,@function
_Z3modPiS_S_:                           ; @_Z3modPiS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v3, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v2
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v6
	v_cvt_f32_u32_e32 v4, v3
	v_sub_nc_u32_e32 v5, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v6
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v2, v4
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v6
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3modPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z3modPiS_S_, .Lfunc_end3-_Z3modPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13cipherEncryptPiS_S_ ; -- Begin function _Z13cipherEncryptPiS_S_
	.globl	_Z13cipherEncryptPiS_S_
	.p2align	8
	.type	_Z13cipherEncryptPiS_S_,@function
_Z13cipherEncryptPiS_S_:                ; @_Z13cipherEncryptPiS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 24, -0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 24, v2
	v_add_nc_u16 v5, v4, 4
	v_add_nc_u32_e32 v4, 0x45, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfe_i32 v2, v5, 0, 16
	v_mul_i32_i24_e32 v2, 0x2193, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v2, 20, v2
	v_add_nc_u16 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u16 v6, 0x7a, v2
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_sub_nc_u16 v5, v5, v6
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_bfe_i32 v5, v5, 0, 16
	global_store_b32 v[2:3], v5, off
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13cipherEncryptPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z13cipherEncryptPiS_S_, .Lfunc_end4-_Z13cipherEncryptPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8subtractPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8subtractPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8multiplyPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8multiplyPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3modPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3modPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13cipherEncryptPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13cipherEncryptPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
