#include <cuda.h>
#include <stdio.h>
#include <stdlib.h>

#define BLOCKSIZE 32
#define NUM char

__global__ void MatMul(int n, NUM *a, NUM *b, int *c){
	int tidx = blockDim.x * blockIdx.x + threadIdx.x;
	int tidy = blockDim.y * blockIdx.y + threadIdx.y;
	
	int sum = 0;

	for(int i = 0; i < n; i++){
		sum += a[tidy * n + i] * b[i * n + tidx];
	}
	c[tidy * n + tidx] = sum;
}

__global__ void SharedMatMul(int n, NUM *a, NUM *b, int *c){
	__shared__ NUM as[BLOCKSIZE*BLOCKSIZE*4];
	__shared__ NUM bs[BLOCKSIZE*BLOCKSIZE*4];
	__shared__ int cs[BLOCKSIZE*BLOCKSIZE];
	int tidx = blockDim.x * blockIdx.x + threadIdx.x;
	int tidy = blockDim.y * blockIdx.y + threadIdx.y;
	int lx = threadIdx.x;
	int ly = threadIdx.y;

	// COPY FROM GLOBAL MEMORY
	cs[ly * BLOCKSIZE + lx] = 0;
	for(int i = 0; i < n; i+=BLOCKSIZE){
		as[4*(ly * BLOCKSIZE + lx)] = a[tidy * n + (lx + i)];
		bs[4*(ly * BLOCKSIZE + lx)] = b[(ly + i) * n  + tidx];
		__syncthreads();
		for(int j = 0; j < BLOCKSIZE; j++){
			cs[BLOCKSIZE * ly + lx] += as[4*(BLOCKSIZE * ly + j)] * bs[4*(BLOCKSIZE * j + lx)]; 
		}
		__syncthreads();
		//c[tidy * n + tidx] += cs[BLOCKSIZE * ly + lx];
	}
	//__syncthreads();
	c[tidy * n + tidx] += cs[BLOCKSIZE * ly + lx];
}

__host__ void fillMatrix(NUM *a, int n){
	for(int i = 0; i < n * n; i++){
		a[i] = rand()%3 - 1;
	}
}

__host__ void fillMatrixZeros(int *a, int n){
	for(int i = 0; i < n*n; i++){
		a[i] = 0;
	}
}

__host__ void hostMatMul(int n, NUM *a, NUM *b, int *c){
	for(int i=0; i<n; ++i){
		for(int j=0; j<n; ++j){
			int val = c[i*n + j];
			for(int k=0; k<n; ++k){
				val += a[i*n+k] * b[k*n +j];
			 }
			c[i*n + j] = val;
		}
	}
}

__host__ int verify(int n, int *a, int *b){
	int cont = 0;
	for(int i=0; i<n; ++i){
		for(int j=0; j<n; ++j){
			cont++;
			if(a[i*n+j]!=b[i*n+j]){
				printf("FALLO %d\t%d!=%d\n",cont , a[i*n+j], b[i*n+j]);
				//return 1;
			}	
		}
	}
	return 0;
}

__host__ void printmat(int *a, int n, const char *name){
	printf("mat %s:\n", name);
	for(int i=0; i<n; ++i){
 		for(int j=0; j<n; ++j){
			printf("%i ", a[i*n + j]);
		}
		printf("\n");
	}
	printf("\n");
}


int main(int argc, char *argv[]){
	if (argc != 3){
		printf("Ejecute como ./prog N\n");
		return EXIT_FAILURE;
	}	
	int n = atoi(argv[1]);
	srand(atoi(argv[2]));

	NUM *a, *b, *a_d, *b_d;
	int *c, *d, *c_d, *d_d, *matmul_simple, *matmul_shared;

	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	float ms = 0;

	a = (NUM*)malloc(sizeof(NUM)*n*n);
	b = (NUM*)malloc(sizeof(NUM)*n*n);
	c = (int*)malloc(sizeof(int)*n*n);
	d = (int*)malloc(sizeof(int)*n*n);
	matmul_simple = (int*)malloc(sizeof(int)*n*n);
	matmul_shared = (int*)malloc(sizeof(int)*n*n);

	fillMatrix(a, n);
	fillMatrix(b, n);
	//fillMatrixZeros(c, n);

	cudaMalloc(&a_d, sizeof(NUM)*n*n);
	cudaMalloc(&b_d, sizeof(NUM)*n*n);
	cudaMalloc(&c_d, sizeof(int)*n*n);
	cudaMalloc(&d_d, sizeof(int)*n*n);
	
	cudaMemcpy(a_d, a, sizeof(NUM) * n * n, cudaMemcpyHostToDevice);
	cudaMemcpy(b_d, b, sizeof(NUM) * n * n, cudaMemcpyHostToDevice);
	cudaMemcpy(c_d, c, sizeof(int) * n * n, cudaMemcpyHostToDevice);
	cudaMemcpy(d_d, d, sizeof(int) * n * n, cudaMemcpyHostToDevice);
	
	dim3 block(BLOCKSIZE, BLOCKSIZE, 1);
	dim3 grid(n/BLOCKSIZE, n/BLOCKSIZE, 1);
/*
	printf("block: %d %d %d\n", block.x, block.y, block.z);
	printf("grid : %d %d %d\n", grid.x, grid.y, grid.z);
*/
	
	cudaEventRecord(start);
	MatMul<<<grid,block>>>(n ,a_d, b_d, c_d);
	cudaEventRecord(stop);
	cudaDeviceSynchronize();

	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&ms, start, stop);
//	printf("GPU Simple...ok! in %f ms\n", ms);
	printf("%f\n", ms);
/*
	cudaEventRecord(start);
	SharedMatMul<<<grid,block>>>(n ,a_d, b_d, d_d);
	cudaEventRecord(stop);
	cudaDeviceSynchronize();

	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&ms, start, stop);
	printf("GPU Shared Memory...ok! in %f ms\n", ms);

	cudaMemcpy(matmul_shared, d_d, sizeof(int) * n * n, cudaMemcpyDeviceToHost);
	cudaMemcpy(matmul_simple, c_d, sizeof(int) * n * n, cudaMemcpyDeviceToHost);

//	hostMatMul(n, a, b, c);

	if(verify(n, matmul_simple, matmul_shared) != 0){
        	fprintf(stderr, "error verifying result\n");
        	exit(EXIT_FAILURE);
    	}
*/
	return 0;
}

	.file	"tmpxft_00299f4e_00000000-6_matmul_simple.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10fillMatrixPci
	.type	_Z10fillMatrixPci, @function
_Z10fillMatrixPci:
.LFB2027:
	.cfi_startproc
	endbr64
	imull	%esi, %esi
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$3, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	movslq	%esi, %rbp
	addq	%rdi, %rbp
.L3:
	cmpq	%rbp, %rbx
	je	.L7
	call	rand@PLT
	incq	%rbx
	cltd
	idivl	%r12d
	decl	%edx
	movb	%dl, -1(%rbx)
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10fillMatrixPci, .-_Z10fillMatrixPci
	.globl	_Z15fillMatrixZerosPii
	.type	_Z15fillMatrixZerosPii, @function
_Z15fillMatrixZerosPii:
.LFB2028:
	.cfi_startproc
	endbr64
	imull	%esi, %esi
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %esi
	jle	.L11
	xorl	%edx, %edx
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L9
.L11:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z15fillMatrixZerosPii, .-_Z15fillMatrixZerosPii
	.globl	_Z10hostMatMuliPcS_Pi
	.type	_Z10hostMatMuliPcS_Pi, @function
_Z10hostMatMuliPcS_Pi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movslq	%edi, %r10
	movq	%rdx, %r11
	xorl	%r9d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r10, %rax
	movq	%rsi, %rdx
	leaq	0(,%r10,4), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L13:
	cmpl	%eax, %r9d
	jge	.L20
	movq	%rcx, %rdi
	xorl	%esi, %esi
.L15:
	movl	(%rdi), %ebx
	leaq	(%r11,%rsi), %rbp
	xorl	%r8d, %r8d
.L14:
	movsbl	(%rdx,%r8), %r12d
	movsbl	0(%rbp), %r14d
	incq	%r8
	addq	%r10, %rbp
	imull	%r14d, %r12d
	addl	%r12d, %ebx
	cmpl	%r8d, %eax
	jg	.L14
	incq	%rsi
	movl	%ebx, (%rdi)
	addq	$4, %rdi
	cmpl	%esi, %eax
	jg	.L15
	incl	%r9d
	addq	%r10, %rdx
	addq	%r13, %rcx
	jmp	.L13
.L20:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10hostMatMuliPcS_Pi, .-_Z10hostMatMuliPcS_Pi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"FALLO %d\t%d!=%d\n"
	.text
	.globl	_Z6verifyiPiS_
	.type	_Z6verifyiPiS_, @function
_Z6verifyiPiS_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r9
	movq	%rdx, %r10
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movslq	%edi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r14, %rbx
	xorl	%r14d, %r14d
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rax, 8(%rsp)
.L22:
	cmpl	%ebx, %r13d
	jge	.L25
	movl	%r14d, %r15d
	movq	%r12, %rbp
.L24:
	movl	(%r9,%rbp), %ecx
	movl	(%r10,%rbp), %r8d
	incl	%r14d
	cmpl	%r8d, %ecx
	je	.L23
	movl	%r14d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r10, 24(%rsp)
	leaq	.LC0(%rip), %rsi
	movq	%r9, 16(%rsp)
	call	__printf_chk@PLT
	movq	24(%rsp), %r10
	movq	16(%rsp), %r9
.L23:
	leal	(%rbx,%r15), %eax
	addq	$4, %rbp
	cmpl	%eax, %r14d
	jne	.L24
	movq	8(%rsp), %rax
	incl	%r13d
	addq	%rax, %r12
	jmp	.L22
.L25:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z6verifyiPiS_, .-_Z6verifyiPiS_
	.section	.rodata.str1.1
.LC1:
	.string	"mat %s:\n"
.LC2:
	.string	"%i "
.LC3:
	.string	"\n"
	.text
	.globl	_Z8printmatPiiPKc
	.type	_Z8printmatPiiPKc, @function
_Z8printmatPiiPKc:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC2(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	leaq	.LC1(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movl	$2, %edi
	pushq	%rcx
	.cfi_def_cfa_offset 64
	call	__printf_chk@PLT
.L29:
	cmpl	%ebp, %r12d
	jge	.L34
	leaq	(%rbx,%r13), %r15
.L30:
	movl	(%rbx), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	cmpq	%r15, %rbx
	jne	.L30
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	call	__printf_chk@PLT
	jmp	.L29
.L34:
	popq	%rdx
	.cfi_def_cfa_offset 56
	leaq	.LC3(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z8printmatPiiPKc, .-_Z8printmatPiiPKc
	.globl	_Z30__device_stub__Z6MatMuliPcS_PiiPcS_Pi
	.type	_Z30__device_stub__Z6MatMuliPcS_PiiPcS_Pi, @function
_Z30__device_stub__Z6MatMuliPcS_PiiPcS_Pi:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6MatMuliPcS_Pi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L35:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z30__device_stub__Z6MatMuliPcS_PiiPcS_Pi, .-_Z30__device_stub__Z6MatMuliPcS_PiiPcS_Pi
	.globl	_Z6MatMuliPcS_Pi
	.type	_Z6MatMuliPcS_Pi, @function
_Z6MatMuliPcS_Pi:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6MatMuliPcS_PiiPcS_Pi
	.cfi_endproc
.LFE2058:
	.size	_Z6MatMuliPcS_Pi, .-_Z6MatMuliPcS_Pi
	.section	.rodata.str1.1
.LC4:
	.string	"Ejecute como ./prog N\n"
.LC6:
	.string	"%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L41
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L40
.L41:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movslq	%ebp, %rbx
	imulq	%rbx, %rbx
	movl	%eax, %edi
	call	srand@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	%rbx, %rdi
	leaq	0(,%rbx,4), %r12
	movl	$0x00000000, 28(%rsp)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movl	%ebp, %esi
	movq	%r14, %rdi
	movq	%rax, 8(%rsp)
	call	_Z10fillMatrixPci
	movl	%ebp, %esi
	movq	%r13, %rdi
	call	_Z10fillMatrixPci
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	56(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$32, %ecx
	xorl	%esi, %esi
	movabsq	$137438953504, %rax
	movq	%rax, 80(%rsp)
	movl	%ebp, %eax
	movq	64(%rsp), %rdi
	cltd
	movl	$1, 88(%rsp)
	idivl	%ecx
	movl	$1, 100(%rsp)
	movl	%eax, 92(%rsp)
	movl	%eax, 96(%rsp)
	call	cudaEventRecord@PLT
	movl	88(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	80(%rsp), %rdx
	movq	92(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rdx
	movl	%ebp, %edi
	movq	32(%rsp), %rsi
	call	_Z30__device_stub__Z6MatMuliPcS_PiiPcS_Pi
.L43:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L40:
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.text
	.globl	_Z37__device_stub__Z12SharedMatMuliPcS_PiiPcS_Pi
	.type	_Z37__device_stub__Z12SharedMatMuliPcS_PiiPcS_Pi, @function
_Z37__device_stub__Z12SharedMatMuliPcS_PiiPcS_Pi:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12SharedMatMuliPcS_Pi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L46:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z37__device_stub__Z12SharedMatMuliPcS_PiiPcS_Pi, .-_Z37__device_stub__Z12SharedMatMuliPcS_PiiPcS_Pi
	.globl	_Z12SharedMatMuliPcS_Pi
	.type	_Z12SharedMatMuliPcS_Pi, @function
_Z12SharedMatMuliPcS_Pi:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12SharedMatMuliPcS_PiiPcS_Pi
	.cfi_endproc
.LFE2060:
	.size	_Z12SharedMatMuliPcS_Pi, .-_Z12SharedMatMuliPcS_Pi
	.section	.rodata.str1.1
.LC7:
	.string	"_Z12SharedMatMuliPcS_Pi"
.LC8:
	.string	"_Z6MatMuliPcS_Pi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12SharedMatMuliPcS_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6MatMuliPcS_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

#define BLOCKSIZE 32
#define NUM char

__global__ void MatMul(int n, NUM *a, NUM *b, int *c){
	int tidx = blockDim.x * blockIdx.x + threadIdx.x;
	int tidy = blockDim.y * blockIdx.y + threadIdx.y;
	
	int sum = 0;

	for(int i = 0; i < n; i++){
		sum += a[tidy * n + i] * b[i * n + tidx];
	}
	c[tidy * n + tidx] = sum;
}

__global__ void SharedMatMul(int n, NUM *a, NUM *b, int *c){
	__shared__ NUM as[BLOCKSIZE*BLOCKSIZE*4];
	__shared__ NUM bs[BLOCKSIZE*BLOCKSIZE*4];
	__shared__ int cs[BLOCKSIZE*BLOCKSIZE];
	int tidx = blockDim.x * blockIdx.x + threadIdx.x;
	int tidy = blockDim.y * blockIdx.y + threadIdx.y;
	int lx = threadIdx.x;
	int ly = threadIdx.y;

	// COPY FROM GLOBAL MEMORY
	cs[ly * BLOCKSIZE + lx] = 0;
	for(int i = 0; i < n; i+=BLOCKSIZE){
		as[4*(ly * BLOCKSIZE + lx)] = a[tidy * n + (lx + i)];
		bs[4*(ly * BLOCKSIZE + lx)] = b[(ly + i) * n  + tidx];
		__syncthreads();
		for(int j = 0; j < BLOCKSIZE; j++){
			cs[BLOCKSIZE * ly + lx] += as[4*(BLOCKSIZE * ly + j)] * bs[4*(BLOCKSIZE * j + lx)]; 
		}
		__syncthreads();
		//c[tidy * n + tidx] += cs[BLOCKSIZE * ly + lx];
	}
	//__syncthreads();
	c[tidy * n + tidx] += cs[BLOCKSIZE * ly + lx];
}

__host__ void fillMatrix(NUM *a, int n){
	for(int i = 0; i < n * n; i++){
		a[i] = rand()%3 - 1;
	}
}

__host__ void fillMatrixZeros(int *a, int n){
	for(int i = 0; i < n*n; i++){
		a[i] = 0;
	}
}

__host__ void hostMatMul(int n, NUM *a, NUM *b, int *c){
	for(int i=0; i<n; ++i){
		for(int j=0; j<n; ++j){
			int val = c[i*n + j];
			for(int k=0; k<n; ++k){
				val += a[i*n+k] * b[k*n +j];
			 }
			c[i*n + j] = val;
		}
	}
}

__host__ int verify(int n, int *a, int *b){
	int cont = 0;
	for(int i=0; i<n; ++i){
		for(int j=0; j<n; ++j){
			cont++;
			if(a[i*n+j]!=b[i*n+j]){
				printf("FALLO %d\t%d!=%d\n",cont , a[i*n+j], b[i*n+j]);
				//return 1;
			}	
		}
	}
	return 0;
}

__host__ void printmat(int *a, int n, const char *name){
	printf("mat %s:\n", name);
	for(int i=0; i<n; ++i){
 		for(int j=0; j<n; ++j){
			printf("%i ", a[i*n + j]);
		}
		printf("\n");
	}
	printf("\n");
}


int main(int argc, char *argv[]){
	if (argc != 3){
		printf("Ejecute como ./prog N\n");
		return EXIT_FAILURE;
	}	
	int n = atoi(argv[1]);
	srand(atoi(argv[2]));

	NUM *a, *b, *a_d, *b_d;
	int *c, *d, *c_d, *d_d, *matmul_simple, *matmul_shared;

	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	float ms = 0;

	a = (NUM*)malloc(sizeof(NUM)*n*n);
	b = (NUM*)malloc(sizeof(NUM)*n*n);
	c = (int*)malloc(sizeof(int)*n*n);
	d = (int*)malloc(sizeof(int)*n*n);
	matmul_simple = (int*)malloc(sizeof(int)*n*n);
	matmul_shared = (int*)malloc(sizeof(int)*n*n);

	fillMatrix(a, n);
	fillMatrix(b, n);
	//fillMatrixZeros(c, n);

	hipMalloc(&a_d, sizeof(NUM)*n*n);
	hipMalloc(&b_d, sizeof(NUM)*n*n);
	hipMalloc(&c_d, sizeof(int)*n*n);
	hipMalloc(&d_d, sizeof(int)*n*n);
	
	hipMemcpy(a_d, a, sizeof(NUM) * n * n, hipMemcpyHostToDevice);
	hipMemcpy(b_d, b, sizeof(NUM) * n * n, hipMemcpyHostToDevice);
	hipMemcpy(c_d, c, sizeof(int) * n * n, hipMemcpyHostToDevice);
	hipMemcpy(d_d, d, sizeof(int) * n * n, hipMemcpyHostToDevice);
	
	dim3 block(BLOCKSIZE, BLOCKSIZE, 1);
	dim3 grid(n/BLOCKSIZE, n/BLOCKSIZE, 1);
/*
	printf("block: %d %d %d\n", block.x, block.y, block.z);
	printf("grid : %d %d %d\n", grid.x, grid.y, grid.z);
*/
	
	hipEventRecord(start);
	MatMul<<<grid,block>>>(n ,a_d, b_d, c_d);
	hipEventRecord(stop);
	hipDeviceSynchronize();

	hipEventSynchronize(stop);
	hipEventElapsedTime(&ms, start, stop);
//	printf("GPU Simple...ok! in %f ms\n", ms);
	printf("%f\n", ms);
/*
	cudaEventRecord(start);
	SharedMatMul<<<grid,block>>>(n ,a_d, b_d, d_d);
	cudaEventRecord(stop);
	cudaDeviceSynchronize();

	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&ms, start, stop);
	printf("GPU Shared Memory...ok! in %f ms\n", ms);

	cudaMemcpy(matmul_shared, d_d, sizeof(int) * n * n, cudaMemcpyDeviceToHost);
	cudaMemcpy(matmul_simple, c_d, sizeof(int) * n * n, cudaMemcpyDeviceToHost);

//	hostMatMul(n, a, b, c);

	if(verify(n, matmul_simple, matmul_shared) != 0){
        	fprintf(stderr, "error verifying result\n");
        	exit(EXIT_FAILURE);
    	}
*/
	return 0;
}

	.text
	.file	"matmul_simple.hip"
	.globl	_Z21__device_stub__MatMuliPcS_Pi # -- Begin function _Z21__device_stub__MatMuliPcS_Pi
	.type	_Z21__device_stub__MatMuliPcS_Pi,@function
_Z21__device_stub__MatMuliPcS_Pi:       # @_Z21__device_stub__MatMuliPcS_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6MatMuliPcS_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__MatMuliPcS_Pi, .Lfunc_end0-_Z21__device_stub__MatMuliPcS_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__SharedMatMuliPcS_Pi # -- Begin function _Z27__device_stub__SharedMatMuliPcS_Pi
	.type	_Z27__device_stub__SharedMatMuliPcS_Pi,@function
_Z27__device_stub__SharedMatMuliPcS_Pi: # @_Z27__device_stub__SharedMatMuliPcS_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12SharedMatMuliPcS_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__SharedMatMuliPcS_Pi, .Lfunc_end1-_Z27__device_stub__SharedMatMuliPcS_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10fillMatrixPci               # -- Begin function _Z10fillMatrixPci
	.type	_Z10fillMatrixPci,@function
_Z10fillMatrixPci:                      # @_Z10fillMatrixPci
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	je	.LBB2_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	imull	%ebx, %ebx
	cmpl	$1, %ebx
	adcl	$0, %ebx
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1431655766, %rax, %rcx         # imm = 0x55555556
	movq	%rcx, %rdx
	shrq	$63, %rdx
	shrq	$32, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,2), %ecx
	subl	%ecx, %eax
	decb	%al
	movb	%al, (%r14,%r15)
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB2_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_4:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z10fillMatrixPci, .Lfunc_end2-_Z10fillMatrixPci
	.cfi_endproc
                                        # -- End function
	.globl	_Z15fillMatrixZerosPii          # -- Begin function _Z15fillMatrixZerosPii
	.type	_Z15fillMatrixZerosPii,@function
_Z15fillMatrixZerosPii:                 # @_Z15fillMatrixZerosPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	je	.LBB3_1
# %bb.2:                                # %.lr.ph.preheader
	movl	%esi, %edx
	imull	%edx, %edx
	cmpl	$1, %edx
	adcl	$0, %edx
	shlq	$2, %rdx
	xorl	%esi, %esi
	jmp	memset@PLT                      # TAILCALL
.LBB3_1:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z15fillMatrixZerosPii, .Lfunc_end3-_Z15fillMatrixZerosPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10hostMatMuliPcS_Pi           # -- Begin function _Z10hostMatMuliPcS_Pi
	.type	_Z10hostMatMuliPcS_Pi,@function
_Z10hostMatMuliPcS_Pi:                  # @_Z10hostMatMuliPcS_Pi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, -8(%rsp)                  # 8-byte Spill
	testl	%edi, %edi
	jle	.LBB4_7
# %bb.1:                                # %.preheader.lr.ph
	movl	%edi, %eax
	xorl	%ecx, %ecx
	xorl	%r9d, %r9d
.LBB4_2:                                # %.lr.ph33
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
                                        #       Child Loop BB4_4 Depth 3
	movl	%ecx, %r10d
	addq	%rsi, %r10
	movq	%r9, %r11
	imulq	%rax, %r11
	movq	-8(%rsp), %r8                   # 8-byte Reload
	leaq	(%r8,%r11,4), %r11
	movq	%rdx, %rbx
	xorl	%r14d, %r14d
.LBB4_3:                                # %.lr.ph
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_4 Depth 3
	movl	(%r11,%r14,4), %ebp
	movq	%rbx, %r15
	xorl	%r12d, %r12d
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        #     Parent Loop BB4_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsbl	(%r10,%r12), %r13d
	movsbl	(%r15), %r8d
	imull	%r13d, %r8d
	addl	%r8d, %ebp
	incq	%r12
	addq	%rax, %r15
	cmpq	%r12, %rax
	jne	.LBB4_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_3 Depth=2
	movl	%ebp, (%r11,%r14,4)
	incq	%r14
	incq	%rbx
	cmpq	%rax, %r14
	jne	.LBB4_3
# %bb.6:                                # %._crit_edge34
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%r9
	addl	%edi, %ecx
	cmpq	%rax, %r9
	jne	.LBB4_2
.LBB4_7:                                # %._crit_edge36
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z10hostMatMuliPcS_Pi, .Lfunc_end4-_Z10hostMatMuliPcS_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z6verifyiPiS_                  # -- Begin function _Z6verifyiPiS_
	.type	_Z6verifyiPiS_,@function
_Z6verifyiPiS_:                         # @_Z6verifyiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movl	%edi, 8(%rsp)                   # 4-byte Spill
	testl	%edi, %edi
	jle	.LBB5_7
# %bb.1:                                # %.preheader.lr.ph
	movl	8(%rsp), %eax                   # 4-byte Reload
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %r13
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB5_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_3 Depth 2
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movl	%eax, %eax
	movq	32(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r12
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%ebx, %ebx
.LBB5_3:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	incl	%r15d
	movl	(%rbp,%rbx), %edx
	movl	(%r12,%rbx), %ecx
	cmpl	%ecx, %edx
	je	.LBB5_5
# %bb.4:                                #   in Loop: Header=BB5_3 Depth=2
	movl	$.L.str, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_5:                                #   in Loop: Header=BB5_3 Depth=2
	addq	$4, %rbx
	cmpq	%rbx, %r13
	jne	.LBB5_3
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incq	%r14
	movl	12(%rsp), %eax                  # 4-byte Reload
	addl	8(%rsp), %eax                   # 4-byte Folded Reload
	cmpq	16(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB5_2
.LBB5_7:                                # %._crit_edge32
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z6verifyiPiS_, .Lfunc_end5-_Z6verifyiPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8printmatPiiPKc               # -- Begin function _Z8printmatPiiPKc
	.type	_Z8printmatPiiPKc,@function
_Z8printmatPiiPKc:                      # @_Z8printmatPiiPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movl	$.L.str.1, %edi
	movq	%rdx, %rsi
	xorl	%eax, %eax
	callq	printf
	testl	%ebx, %ebx
	jle	.LBB6_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebx, %r15d
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB6_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_3 Depth 2
	movl	%ebp, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	xorl	%r14d, %r14d
.LBB6_3:                                #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r13,%r14,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB6_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addl	%ebx, %ebp
	cmpq	%r15, %r12
	jne	.LBB6_2
.LBB6_5:                                # %._crit_edge15
	movl	$10, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end6:
	.size	_Z8printmatPiiPKc, .Lfunc_end6-_Z8printmatPiiPKc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB7_1
# %bb.2:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %edi
	callq	srand
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$0, 20(%rsp)
	movslq	%ebx, %r15
	imulq	%r15, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbp
	leaq	(,%r15,4), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	je	.LBB7_7
# %bb.3:                                # %.lr.ph.preheader.i
	movq	24(%rsp), %rbx                  # 8-byte Reload
                                        # kill: def $ebx killed $ebx killed $rbx def $rbx
	imull	%ebx, %ebx
	cmpl	$1, %ebx
	adcl	$0, %ebx
	xorl	%r13d, %r13d
.LBB7_4:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1431655766, %rax, %rcx         # imm = 0x55555556
	movq	%rcx, %rdx
	shrq	$63, %rdx
	shrq	$32, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,2), %ecx
	subl	%ecx, %eax
	decb	%al
	movb	%al, (%r12,%r13)
	incq	%r13
	cmpq	%r13, %rbx
	jne	.LBB7_4
# %bb.5:                                # %.lr.ph.i53.preheader
	xorl	%r13d, %r13d
.LBB7_6:                                # %.lr.ph.i53
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1431655766, %rax, %rcx         # imm = 0x55555556
	movq	%rcx, %rdx
	shrq	$63, %rdx
	shrq	$32, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,2), %ecx
	subl	%ecx, %eax
	decb	%al
	movb	%al, (%rbp,%r13)
	incq	%r13
	cmpq	%r13, %rbx
	jne	.LBB7_6
.LBB7_7:                                # %_Z10fillMatrixPci.exit57
	leaq	80(%rsp), %r13
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rax
	movq	(%rax), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %r15                  # 8-byte Reload
	leal	31(%r15), %eax
	testl	%r15d, %r15d
	cmovnsl	%r15d, %eax
	sarl	$5, %eax
	movq	%rax, %rbx
	shlq	$32, %rbx
	orq	%rax, %rbx
	movq	32(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_9
# %bb.8:
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	40(%rsp), %rcx
	movl	%r15d, %edi
	callq	_Z21__device_stub__MatMuliPcS_Pi
.LBB7_9:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	20(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	jmp	.LBB7_10
.LBB7_1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %r14d
.LBB7_10:
	movl	%r14d, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6MatMuliPcS_Pi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12SharedMatMuliPcS_Pi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6MatMuliPcS_Pi,@object        # @_Z6MatMuliPcS_Pi
	.section	.rodata,"a",@progbits
	.globl	_Z6MatMuliPcS_Pi
	.p2align	3, 0x0
_Z6MatMuliPcS_Pi:
	.quad	_Z21__device_stub__MatMuliPcS_Pi
	.size	_Z6MatMuliPcS_Pi, 8

	.type	_Z12SharedMatMuliPcS_Pi,@object # @_Z12SharedMatMuliPcS_Pi
	.globl	_Z12SharedMatMuliPcS_Pi
	.p2align	3, 0x0
_Z12SharedMatMuliPcS_Pi:
	.quad	_Z27__device_stub__SharedMatMuliPcS_Pi
	.size	_Z12SharedMatMuliPcS_Pi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"FALLO %d\t%d!=%d\n"
	.size	.L.str, 17

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"mat %s:\n"
	.size	.L.str.1, 9

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%i "
	.size	.L.str.2, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%f\n"
	.size	.L.str.5, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6MatMuliPcS_Pi"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12SharedMatMuliPcS_Pi"
	.size	.L__unnamed_2, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Ejecute como ./prog N"
	.size	.Lstr, 22

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__MatMuliPcS_Pi
	.addrsig_sym _Z27__device_stub__SharedMatMuliPcS_Pi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6MatMuliPcS_Pi
	.addrsig_sym _Z12SharedMatMuliPcS_Pi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6MatMuliPcS_Pi        ; -- Begin function _Z6MatMuliPcS_Pi
	.globl	_Z6MatMuliPcS_Pi
	.p2align	8
	.type	_Z6MatMuliPcS_Pi,@function
_Z6MatMuliPcS_Pi:                       ; @_Z6MatMuliPcS_Pi
; %bb.0:
	s_clause 0x2
	s_load_b32 s7, s[0:1], 0x2c
	s_load_b32 s6, s[0:1], 0x0
	s_load_b64 s[4:5], s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_load_b128 s[0:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s7, 16
	s_and_b32 s7, s7, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s8, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_cmp_lt_i32 s6, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, s14, s7, v[3:4]
	v_mul_lo_u32 v3, v2, s6
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v2, 31, v3
	v_add_co_u32 v1, vcc_lo, s0, v3
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s0, s6
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v7, 31, v5
	v_add_co_u32 v6, vcc_lo, s2, v5
	v_add_nc_u32_e32 v5, s6, v5
	s_add_i32 s0, s0, -1
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	s_cmp_eq_u32 s0, 0
	global_load_i8 v8, v[1:2], off
	global_load_i8 v6, v[6:7], off
	v_add_co_u32 v1, vcc_lo, v1, 1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_i32_i24 v4, v6, v8, v4
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v4, 0
.LBB0_4:                                ; %Flow40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6MatMuliPcS_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6MatMuliPcS_Pi, .Lfunc_end0-_Z6MatMuliPcS_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12SharedMatMuliPcS_Pi ; -- Begin function _Z12SharedMatMuliPcS_Pi
	.globl	_Z12SharedMatMuliPcS_Pi
	.p2align	8
	.type	_Z12SharedMatMuliPcS_Pi,@function
_Z12SharedMatMuliPcS_Pi:                ; @_Z12SharedMatMuliPcS_Pi
; %bb.0:
	s_clause 0x2
	s_load_b32 s7, s[0:1], 0x2c
	s_load_b32 s6, s[0:1], 0x0
	s_load_b64 s[4:5], s[0:1], 0x18
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_load_b128 s[0:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s7, 16
	s_and_b32 s7, s7, 0xffff
	v_mad_u64_u32 v[4:5], null, s15, s8, v[2:3]
	v_lshl_add_u32 v5, v2, 5, v3
	s_cmp_lt_i32 s6, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, s14, s7, v[3:4]
	v_mul_lo_u32 v1, v4, s6
	v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v4, 2, v5
	ds_store_b32 v4, v5 offset:8192
	s_cbranch_scc1 .LBB1_6
; %bb.1:                                ; %.lr.ph
	v_add_nc_u32_e32 v5, 0x2000, v4
	v_add_nc_u32_e32 v6, v1, v3
	v_lshl_or_b32 v3, v3, 2, 0x1000
	v_lshlrev_b32_e32 v7, 7, v2
	s_mov_b32 s7, 0
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, s7, v2
	s_mov_b32 s8, 0
	v_mad_u64_u32 v[8:9], null, v10, s6, v[0:1]
	v_add_nc_u32_e32 v9, s7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v12, 31, v8
	v_add_co_u32 v9, vcc_lo, s0, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	v_add_co_u32 v11, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	global_load_u8 v8, v[9:10], off
	global_load_u8 v9, v[11:12], off
	s_waitcnt vmcnt(1)
	ds_store_b8 v4, v8
	s_waitcnt vmcnt(0)
	ds_store_b8 v4, v9 offset:4096
	v_mov_b32_e32 v9, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v8, v5
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v10, s8, v7
	s_add_i32 s8, s8, 4
	ds_load_i8 v11, v9
	ds_load_i8 v10, v10
	v_add_nc_u32_e32 v9, 0x80, v9
	s_cmpk_eq_i32 s8, 0x80
	s_waitcnt lgkmcnt(0)
	v_mad_i32_i24 v8, v11, v10, v8
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s7, s7, 32
	ds_store_b32 v5, v8
	s_cmp_ge_i32 s7, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
; %bb.5:                                ; %._crit_edge.loopexit
	ds_load_b32 v5, v5
.LBB1_6:                                ; %Flow
	v_add_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, v2, v5
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12SharedMatMuliPcS_Pi
		.amdhsa_group_segment_fixed_size 12288
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12SharedMatMuliPcS_Pi, .Lfunc_end1-_Z12SharedMatMuliPcS_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 12288 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6MatMuliPcS_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6MatMuliPcS_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 12288
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12SharedMatMuliPcS_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12SharedMatMuliPcS_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
