#include "includes.h"
__global__ void NmDistanceKernel(int b,int n,const float * xyz,int m,const float * xyz2,float * result,int * result_i){
const int batch=2048;
__shared__ float buf[batch*5];
for (int i=blockIdx.x;i<b;i+=gridDim.x){
for (int k2=0;k2<m;k2+=batch){
int end_k=min(m,k2+batch)-k2;
for (int j=threadIdx.x;j<end_k*5;j+=blockDim.x){
buf[j]=xyz2[(i*m+k2)*5+j];
}
__syncthreads();
for (int j=threadIdx.x+blockIdx.y*blockDim.x;j<n;j+=blockDim.x*gridDim.y){
float x1=xyz[(i*n+j)*5+0];
float y1=xyz[(i*n+j)*5+1];
float r1=xyz[(i*n+j)*5+2];
float g1=xyz[(i*n+j)*5+3];
float b1=xyz[(i*n+j)*5+4];
int best_i=0;
float best=0;
int end_ka=end_k-(end_k&5);
if (end_ka==batch){
for (int k=0;k<batch;k+=4){
{
float x2=buf[k*5+0]-x1;
float y2=buf[k*5+1]-y1;
float r2=buf[k*5+2]-r1;
float g2=buf[k*5+3]-g1;
float b2=buf[k*5+4]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (k==0 || d<best){
best=d;
best_i=k+k2;
}
}
{
float x2=buf[k*5+5]-x1;
float y2=buf[k*5+6]-y1;
float r2=buf[k*5+7]-r1;
float g2=buf[k*5+8]-g1;
float b2=buf[k*5+9]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+1;
}
}
{
float x2=buf[k*5+10]-x1;
float y2=buf[k*5+11]-y1;
float r2=buf[k*5+12]-r1;
float g2=buf[k*5+13]-g1;
float b2=buf[k*5+14]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+2;
}
}
{
float x2=buf[k*5+15]-x1;
float y2=buf[k*5+16]-y1;
float r2=buf[k*5+17]-r1;
float g2=buf[k*5+18]-g1;
float b2=buf[k*5+19]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+3;
}
}
}
}else{
for (int k=0;k<end_ka;k+=4){
{
float x2=buf[k*5+0]-x1;
float y2=buf[k*5+1]-y1;
float r2=buf[k*5+2]-r1;
float g2=buf[k*5+3]-g1;
float b2=buf[k*5+4]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (k==0 || d<best){
best=d;
best_i=k+k2;
}
}
{
float x2=buf[k*5+5]-x1;
float y2=buf[k*5+6]-y1;
float r2=buf[k*5+7]-r1;
float g2=buf[k*5+8]-g1;
float b2=buf[k*5+9]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+1;
}
}
{
float x2=buf[k*5+10]-x1;
float y2=buf[k*5+11]-y1;
float r2=buf[k*5+12]-r1;
float g2=buf[k*5+13]-g1;
float b2=buf[k*5+14]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+2;
}
}
{
float x2=buf[k*5+15]-x1;
float y2=buf[k*5+16]-y1;
float r2=buf[k*5+17]-r1;
float g2=buf[k*5+18]-g1;
float b2=buf[k*5+19]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+3;
}
}
}
}
for (int k=end_ka;k<end_k;k++){
float x2=buf[k*5+0]-x1;
float y2=buf[k*5+1]-y1;
float r2=buf[k*5+2]-r1;
float g2=buf[k*5+3]-g1;
float b2=buf[k*5+4]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (k==0 || d<best){
best=d;
best_i=k+k2;
}
}
if (k2==0 || result[(i*n+j)]>best){
result[(i*n+j)]=best;
result_i[(i*n+j)]=best_i;
}
}
__syncthreads();
}
}
}
	.file	"tmpxft_0023f6c5_00000000-6_NmDistanceKernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z47__device_stub__Z16NmDistanceKerneliiPKfiS0_PfPiiiPKfiS0_PfPi
	.type	_Z47__device_stub__Z16NmDistanceKerneliiPKfiS0_PfPiiiPKfiS0_PfPi, @function
_Z47__device_stub__Z16NmDistanceKerneliiPKfiS0_PfPiiiPKfiS0_PfPi:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16NmDistanceKerneliiPKfiS0_PfPi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z47__device_stub__Z16NmDistanceKerneliiPKfiS0_PfPiiiPKfiS0_PfPi, .-_Z47__device_stub__Z16NmDistanceKerneliiPKfiS0_PfPiiiPKfiS0_PfPi
	.globl	_Z16NmDistanceKerneliiPKfiS0_PfPi
	.type	_Z16NmDistanceKerneliiPKfiS0_PfPi, @function
_Z16NmDistanceKerneliiPKfiS0_PfPi:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z16NmDistanceKerneliiPKfiS0_PfPiiiPKfiS0_PfPi
	.cfi_endproc
.LFE2033:
	.size	_Z16NmDistanceKerneliiPKfiS0_PfPi, .-_Z16NmDistanceKerneliiPKfiS0_PfPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z16NmDistanceKerneliiPKfiS0_PfPi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16NmDistanceKerneliiPKfiS0_PfPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void NmDistanceKernel(int b,int n,const float * xyz,int m,const float * xyz2,float * result,int * result_i){
const int batch=2048;
__shared__ float buf[batch*5];
for (int i=blockIdx.x;i<b;i+=gridDim.x){
for (int k2=0;k2<m;k2+=batch){
int end_k=min(m,k2+batch)-k2;
for (int j=threadIdx.x;j<end_k*5;j+=blockDim.x){
buf[j]=xyz2[(i*m+k2)*5+j];
}
__syncthreads();
for (int j=threadIdx.x+blockIdx.y*blockDim.x;j<n;j+=blockDim.x*gridDim.y){
float x1=xyz[(i*n+j)*5+0];
float y1=xyz[(i*n+j)*5+1];
float r1=xyz[(i*n+j)*5+2];
float g1=xyz[(i*n+j)*5+3];
float b1=xyz[(i*n+j)*5+4];
int best_i=0;
float best=0;
int end_ka=end_k-(end_k&5);
if (end_ka==batch){
for (int k=0;k<batch;k+=4){
{
float x2=buf[k*5+0]-x1;
float y2=buf[k*5+1]-y1;
float r2=buf[k*5+2]-r1;
float g2=buf[k*5+3]-g1;
float b2=buf[k*5+4]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (k==0 || d<best){
best=d;
best_i=k+k2;
}
}
{
float x2=buf[k*5+5]-x1;
float y2=buf[k*5+6]-y1;
float r2=buf[k*5+7]-r1;
float g2=buf[k*5+8]-g1;
float b2=buf[k*5+9]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+1;
}
}
{
float x2=buf[k*5+10]-x1;
float y2=buf[k*5+11]-y1;
float r2=buf[k*5+12]-r1;
float g2=buf[k*5+13]-g1;
float b2=buf[k*5+14]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+2;
}
}
{
float x2=buf[k*5+15]-x1;
float y2=buf[k*5+16]-y1;
float r2=buf[k*5+17]-r1;
float g2=buf[k*5+18]-g1;
float b2=buf[k*5+19]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+3;
}
}
}
}else{
for (int k=0;k<end_ka;k+=4){
{
float x2=buf[k*5+0]-x1;
float y2=buf[k*5+1]-y1;
float r2=buf[k*5+2]-r1;
float g2=buf[k*5+3]-g1;
float b2=buf[k*5+4]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (k==0 || d<best){
best=d;
best_i=k+k2;
}
}
{
float x2=buf[k*5+5]-x1;
float y2=buf[k*5+6]-y1;
float r2=buf[k*5+7]-r1;
float g2=buf[k*5+8]-g1;
float b2=buf[k*5+9]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+1;
}
}
{
float x2=buf[k*5+10]-x1;
float y2=buf[k*5+11]-y1;
float r2=buf[k*5+12]-r1;
float g2=buf[k*5+13]-g1;
float b2=buf[k*5+14]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+2;
}
}
{
float x2=buf[k*5+15]-x1;
float y2=buf[k*5+16]-y1;
float r2=buf[k*5+17]-r1;
float g2=buf[k*5+18]-g1;
float b2=buf[k*5+19]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (d<best){
best=d;
best_i=k+k2+3;
}
}
}
}
for (int k=end_ka;k<end_k;k++){
float x2=buf[k*5+0]-x1;
float y2=buf[k*5+1]-y1;
float r2=buf[k*5+2]-r1;
float g2=buf[k*5+3]-g1;
float b2=buf[k*5+4]-b1;
float d=x2*x2+y2*y2+r2*r2+g2*g2+b2*b2;
if (k==0 || d<best){
best=d;
best_i=k+k2;
}
}
if (k2==0 || result[(i*n+j)]>best){
result[(i*n+j)]=best;
result_i[(i*n+j)]=best_i;
}
}
__syncthreads();
}
}
}
	.text
	.file	"NmDistanceKernel.hip"
	.globl	_Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi # -- Begin function _Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi
	.type	_Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi,@function
_Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi: # @_Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16NmDistanceKerneliiPKfiS0_PfPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi, .Lfunc_end0-_Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16NmDistanceKerneliiPKfiS0_PfPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16NmDistanceKerneliiPKfiS0_PfPi,@object # @_Z16NmDistanceKerneliiPKfiS0_PfPi
	.section	.rodata,"a",@progbits
	.globl	_Z16NmDistanceKerneliiPKfiS0_PfPi
	.p2align	3, 0x0
_Z16NmDistanceKerneliiPKfiS0_PfPi:
	.quad	_Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi
	.size	_Z16NmDistanceKerneliiPKfiS0_PfPi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16NmDistanceKerneliiPKfiS0_PfPi"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__NmDistanceKerneliiPKfiS0_PfPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16NmDistanceKerneliiPKfiS0_PfPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16NmDistanceKerneliiPKfiS0_PfPi ; -- Begin function _Z16NmDistanceKerneliiPKfiS0_PfPi
	.globl	_Z16NmDistanceKerneliiPKfiS0_PfPi
	.p2align	8
	.type	_Z16NmDistanceKerneliiPKfiS0_PfPi,@function
_Z16NmDistanceKerneliiPKfiS0_PfPi:      ; @_Z16NmDistanceKerneliiPKfiS0_PfPi
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s14, s2
	s_cbranch_scc1 .LBB0_28
; %bb.1:                                ; %.preheader335.lr.ph
	s_clause 0x4
	s_load_b32 s16, s[0:1], 0x10
	s_load_b32 s17, s[0:1], 0x30
	s_load_b64 s[8:9], s[0:1], 0x8
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b64 s[10:11], s[0:1], 0x28
	v_lshlrev_b32_e32 v8, 2, v0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s16, 0
	s_mul_i32 s19, s14, s16
	s_cselect_b32 s18, -1, 0
	s_add_u32 s12, s0, 48
	s_mul_i32 s0, s17, s16
	s_addc_u32 s13, s1, 0
	s_mul_i32 s1, s19, 5
	s_mul_i32 s19, s0, 5
.LBB0_2:                                ; %.preheader335
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
                                        ;         Child Loop BB0_17 Depth 4
                                        ;         Child Loop BB0_19 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_27
; %bb.3:                                ; %.lr.ph358
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s0, s[12:13], 0xc
	s_mul_i32 s21, s14, s3
	s_mov_b32 s22, 0
	s_movk_i32 s23, 0x800
	s_mov_b32 s24, s1
	s_mov_b32 s26, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s20, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, s15, s20, v[0:1]
	v_cmp_gt_i32_e64 s0, s3, v5
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
                                        ;         Child Loop BB0_17 Depth 4
                                        ;         Child Loop BB0_19 Depth 4
	s_add_i32 s25, s26, 0x800
	s_mov_b32 s30, exec_lo
	s_min_i32 s29, s16, s25
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s27, s29, s26
	s_mul_i32 s28, s27, 5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s28, v0
	s_cbranch_execz .LBB0_7
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_load_b32 s31, s[12:13], 0xc
	v_mov_b32_e32 v1, v8
	v_mov_b32_e32 v2, v0
	s_mov_b32 s34, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s31, s31, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s33, s31, 2
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_nc_u32_e32 v3, s24, v2
	v_add_nc_u32_e32 v2, s31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s28, v2
	global_load_b32 v3, v[3:4], off
	s_or_b32 s34, vcc_lo, s34
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v3
	v_add_nc_u32_e32 v1, s33, v1
	s_and_not1_b32 exec_lo, exec_lo, s34
	s_cbranch_execnz .LBB0_6
.LBB0_7:                                ; %Flow455
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s28, s0
	s_cbranch_execz .LBB0_26
; %bb.8:                                ; %.lr.ph355
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_load_b32 s37, s[12:13], 0x4
	s_and_b32 s38, s29, 5
	s_min_i32 s36, s16, s23
	s_sub_i32 s29, s27, s38
	v_mov_b32_e32 v9, v5
	s_cmpk_lg_i32 s29, 0x800
	s_mov_b32 s31, 0
	s_cselect_b32 s30, -1, 0
	s_cmp_gt_i32 s29, 0
	s_cselect_b32 s33, -1, 0
	s_cmp_lg_u32 s38, 0
	s_cselect_b32 s34, -1, 0
	s_cmp_lg_u32 s26, 0
	s_cselect_b32 s35, -1, 0
	s_add_i32 s39, s36, s22
	s_sub_i32 s36, s36, s38
	s_sub_i32 s38, s39, s38
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s37, s37, s20
	s_mul_i32 s38, s38, 20
.LBB0_9:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_12 Depth 4
                                        ;         Child Loop BB0_17 Depth 4
                                        ;         Child Loop BB0_19 Depth 4
	v_add_nc_u32_e32 v6, s21, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v6, 2, v6
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v10, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v2, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s30
	s_clause 0x1
	global_load_b128 v[1:4], v[10:11], off
	global_load_b32 v7, v[10:11], off offset:16
	s_cbranch_vccz .LBB0_14
; %bb.10:                               ; %.preheader333
                                        ;   in Loop: Header=BB0_9 Depth=3
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 0
	s_and_not1_b32 vcc_lo, exec_lo, s33
	s_cbranch_vccnz .LBB0_13
; %bb.11:                               ; %.lr.ph340.preheader
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_mov_b32 s39, 0
	s_mov_b32 s40, 0
.LBB0_12:                               ; %.lr.ph340
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v28, s39
	s_cmp_eq_u32 s40, 0
	ds_load_b128 v[12:15], v28
	ds_load_b128 v[16:19], v28 offset:16
	ds_load_b128 v[20:23], v28 offset:32
	ds_load_b128 v[24:27], v28 offset:48
	ds_load_b128 v[28:31], v28 offset:64
	s_cselect_b32 s41, -1, 0
	s_add_i32 s42, s26, s40
	s_add_i32 s40, s40, 4
	s_addk_i32 s39, 0x50
	s_waitcnt vmcnt(1) lgkmcnt(4)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	s_waitcnt vmcnt(0) lgkmcnt(3)
	v_dual_sub_f32 v15, v15, v4 :: v_dual_sub_f32 v16, v16, v7
	s_waitcnt lgkmcnt(2)
	v_sub_f32_e32 v23, v23, v2
	v_dual_sub_f32 v18, v18, v2 :: v_dual_sub_f32 v19, v19, v3
	s_waitcnt lgkmcnt(1)
	v_dual_sub_f32 v26, v26, v7 :: v_dual_mul_f32 v13, v13, v13
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v28, v28, v2 :: v_dual_sub_f32 v29, v29, v3
	v_dual_sub_f32 v14, v14, v3 :: v_dual_sub_f32 v17, v17, v1
	v_dual_sub_f32 v22, v22, v1 :: v_dual_sub_f32 v25, v25, v4
	v_dual_sub_f32 v24, v24, v3 :: v_dual_sub_f32 v27, v27, v1
	v_dual_mul_f32 v18, v18, v18 :: v_dual_mul_f32 v23, v23, v23
	v_mul_f32_e32 v28, v28, v28
	v_fmac_f32_e32 v13, v12, v12
	v_dual_sub_f32 v30, v30, v4 :: v_dual_sub_f32 v31, v31, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v18, v17, v17 :: v_dual_fmac_f32 v23, v22, v22
	v_dual_fmac_f32 v28, v27, v27 :: v_dual_fmac_f32 v13, v14, v14
	v_dual_sub_f32 v20, v20, v4 :: v_dual_sub_f32 v21, v21, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v18, v19, v19 :: v_dual_fmac_f32 v23, v24, v24
	v_dual_fmac_f32 v28, v29, v29 :: v_dual_fmac_f32 v13, v15, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v18, v20, v20 :: v_dual_fmac_f32 v23, v25, v25
	v_dual_fmac_f32 v28, v30, v30 :: v_dual_fmac_f32 v13, v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v18, v21, v21 :: v_dual_fmac_f32 v23, v26, v26
	v_fmac_f32_e32 v28, v31, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v13, v11
	s_or_b32 vcc_lo, s41, vcc_lo
	s_add_i32 s41, s42, 1
	v_cndmask_b32_e32 v11, v11, v13, vcc_lo
	v_cndmask_b32_e64 v10, v10, s42, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, v18, v11
	v_cndmask_b32_e32 v11, v11, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, s41, vcc_lo
	s_add_i32 s41, s42, 2
	s_add_i32 s42, s42, 3
	s_cmp_lt_i32 s40, s29
	v_cmp_lt_f32_e32 vcc_lo, v23, v11
	v_cndmask_b32_e32 v11, v11, v23, vcc_lo
	v_cndmask_b32_e64 v10, v10, s41, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_lt_f32_e32 vcc_lo, v28, v11
	v_cndmask_b32_e32 v11, v11, v28, vcc_lo
	v_cndmask_b32_e64 v10, v10, s42, vcc_lo
	s_cbranch_scc1 .LBB0_12
.LBB0_13:                               ; %Flow448
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_mov_b32 s39, 0
	s_branch .LBB0_15
.LBB0_14:                               ;   in Loop: Header=BB0_9 Depth=3
	s_mov_b32 s39, -1
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr11
.LBB0_15:                               ; %Flow450
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s39
	s_cbranch_vccnz .LBB0_18
; %bb.16:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_9 Depth=3
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 0
	s_mov_b32 s39, 0
	s_mov_b32 s40, 0
.LBB0_17:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v28, s39
	s_cmp_eq_u32 s40, 0
	ds_load_b128 v[12:15], v28
	ds_load_b128 v[16:19], v28 offset:16
	ds_load_b128 v[20:23], v28 offset:32
	ds_load_b128 v[24:27], v28 offset:48
	ds_load_b128 v[28:31], v28 offset:64
	s_cselect_b32 s41, -1, 0
	s_add_i32 s42, s26, s40
	s_addk_i32 s39, 0x50
	s_waitcnt vmcnt(1) lgkmcnt(4)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	s_waitcnt vmcnt(0) lgkmcnt(3)
	v_dual_sub_f32 v15, v15, v4 :: v_dual_sub_f32 v16, v16, v7
	s_waitcnt lgkmcnt(2)
	v_sub_f32_e32 v23, v23, v2
	v_dual_sub_f32 v18, v18, v2 :: v_dual_sub_f32 v19, v19, v3
	s_waitcnt lgkmcnt(1)
	v_dual_sub_f32 v26, v26, v7 :: v_dual_mul_f32 v13, v13, v13
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v28, v28, v2 :: v_dual_sub_f32 v29, v29, v3
	v_dual_sub_f32 v14, v14, v3 :: v_dual_sub_f32 v17, v17, v1
	v_dual_sub_f32 v22, v22, v1 :: v_dual_sub_f32 v25, v25, v4
	v_dual_sub_f32 v24, v24, v3 :: v_dual_sub_f32 v27, v27, v1
	v_dual_mul_f32 v18, v18, v18 :: v_dual_mul_f32 v23, v23, v23
	v_mul_f32_e32 v28, v28, v28
	v_fmac_f32_e32 v13, v12, v12
	v_dual_sub_f32 v30, v30, v4 :: v_dual_sub_f32 v31, v31, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v18, v17, v17 :: v_dual_fmac_f32 v23, v22, v22
	v_dual_fmac_f32 v28, v27, v27 :: v_dual_fmac_f32 v13, v14, v14
	v_dual_sub_f32 v20, v20, v4 :: v_dual_sub_f32 v21, v21, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v18, v19, v19 :: v_dual_fmac_f32 v23, v24, v24
	v_dual_fmac_f32 v28, v29, v29 :: v_dual_fmac_f32 v13, v15, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v18, v20, v20 :: v_dual_fmac_f32 v23, v25, v25
	v_dual_fmac_f32 v28, v30, v30 :: v_dual_fmac_f32 v13, v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v18, v21, v21 :: v_dual_fmac_f32 v23, v26, v26
	v_fmac_f32_e32 v28, v31, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v13, v11
	s_or_b32 vcc_lo, s41, vcc_lo
	s_add_i32 s41, s42, 1
	v_cndmask_b32_e32 v11, v11, v13, vcc_lo
	v_cndmask_b32_e64 v10, v10, s42, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, v18, v11
	v_cndmask_b32_e32 v11, v11, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v10, s41, vcc_lo
	s_add_i32 s41, s42, 2
	s_add_i32 s42, s42, 3
	v_cmp_lt_f32_e32 vcc_lo, v23, v11
	v_cndmask_b32_e32 v11, v11, v23, vcc_lo
	v_cndmask_b32_e64 v10, v10, s41, vcc_lo
	s_add_i32 s41, s40, 4
	s_cmpk_gt_u32 s40, 0x7fb
	s_mov_b32 s40, s41
	v_cmp_lt_f32_e32 vcc_lo, v28, v11
	v_cndmask_b32_e32 v11, v11, v28, vcc_lo
	v_cndmask_b32_e64 v10, v10, s42, vcc_lo
	s_cbranch_scc0 .LBB0_17
.LBB0_18:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_and_not1_b32 vcc_lo, exec_lo, s34
	s_mov_b32 s39, s38
	s_mov_b32 s40, s36
	s_cbranch_vccnz .LBB0_20
.LBB0_19:                               ; %.lr.ph349
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v16, s39
	s_add_i32 s41, s22, s40
	ds_load_2addr_b32 v[12:13], v16 offset1:1
	ds_load_2addr_b32 v[14:15], v16 offset0:2 offset1:3
	ds_load_b32 v16, v16 offset:16
	s_cmp_eq_u32 s41, 0
	s_cselect_b32 s41, -1, 0
	s_add_i32 s39, s39, 20
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v14, v14, v3
	v_sub_f32_e32 v12, v12, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v13, v13
	v_fmac_f32_e32 v13, v12, v12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v13, v14, v14 :: v_dual_sub_f32 v14, v16, v7
	v_sub_f32_e32 v12, v15, v4
	v_fmac_f32_e32 v13, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v14
	v_cmp_lt_f32_e32 vcc_lo, v13, v11
	s_or_b32 vcc_lo, s41, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v10, v10, s40, vcc_lo
	s_add_i32 s40, s40, 1
	v_cndmask_b32_e32 v11, v11, v13, vcc_lo
	s_add_i32 s41, s22, s40
	s_cmp_ge_i32 s41, s27
	s_cbranch_scc0 .LBB0_19
.LBB0_20:                               ; %._crit_edge350
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v6
	s_and_b32 vcc_lo, exec_lo, s35
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[6:7]
	s_cbranch_vccz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v3, v11
	s_or_not1_b32 s40, vcc_lo, exec_lo
	s_branch .LBB0_23
.LBB0_22:                               ;   in Loop: Header=BB0_9 Depth=3
	s_mov_b32 s40, -1
.LBB0_23:                               ; %Flow
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s39, s40
	s_cbranch_execz .LBB0_25
; %bb.24:                               ; %._crit_edge350._crit_edge
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v3, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	global_store_b32 v[3:4], v11, off
	global_store_b32 v[1:2], v10, off
.LBB0_25:                               ;   in Loop: Header=BB0_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s39
	v_add_nc_u32_e32 v9, s37, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s3, v9
	s_or_b32 s31, vcc_lo, s31
	s_and_not1_b32 exec_lo, exec_lo, s31
	s_cbranch_execnz .LBB0_9
.LBB0_26:                               ; %Flow453
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_addk_i32 s24, 0x2800
	s_addk_i32 s22, 0xf800
	s_addk_i32 s23, 0x800
	s_cmp_ge_i32 s25, s16
	s_mov_b32 s26, s25
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_4
.LBB0_27:                               ; %._crit_edge359
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s14, s17, s14
	s_add_i32 s1, s1, s19
	s_cmp_ge_i32 s14, s2
	s_cbranch_scc0 .LBB0_2
.LBB0_28:                               ; %._crit_edge361
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16NmDistanceKerneliiPKfiS0_PfPi
		.amdhsa_group_segment_fixed_size 40960
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 32
		.amdhsa_next_free_sgpr 43
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16NmDistanceKerneliiPKfiS0_PfPi, .Lfunc_end0-_Z16NmDistanceKerneliiPKfiS0_PfPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1688
; NumSgprs: 45
; NumVgprs: 32
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 40960 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 45
; NumVGPRsForWavesPerEU: 32
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 40960
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16NmDistanceKerneliiPKfiS0_PfPi
    .private_segment_fixed_size: 0
    .sgpr_count:     45
    .sgpr_spill_count: 0
    .symbol:         _Z16NmDistanceKerneliiPKfiS0_PfPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     32
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
