//******************************************************************************
// Final Project
// Name: Andrew McKissick
// GPU Computing Date: 12/5/16
//******************************************************************************
// This program performs a Fast Fourier transform on a set of complex numbers.
// Input is read from a file (data.txt) as floating point pairs. Error checking
// is not performed on input data, so anything other than an even number less
// than or equal to 2*N of decimal numbers separated by whitespace will cause
// undefined behavior. Output is to stdout and limited to the first 8 terms,
// and the time required for program and funcion execution, though this is
// easily configurable in the code. No user interaction is required beyond
// creating a valid input file and running the program.
//******************************************************************************

#define _CRT_SECURE_NO_WARNINGS
#include <stdio.h>
#define _USE_MATH_DEFINES
#include <math.h>
#include <time.h>

//number of elements in each array
#define N 16384

__global__ void FFTCalc(double realIn[], double imagIn[], double realOut[], double imagOut[]);

int main()
{
	//clock_t prog_start, prog_end, calc_start, calc_end, read_start, read_end;
	float comm_time_1, comm_time_2, calc_time;
	cudaEvent_t start, stop;
	
	//prog_start = clock();
	FILE *data;
	data = fopen("data.txt", "r");
	
	const int DATASIZE = N*sizeof(double);

	double xReal[N];
	double xImag[N];
	
	double* dev_xReal;
	double* dev_xImag;
	
	double* dev_XReal;
	double* dev_XImag;

	//read from data.txt into the real and imaginary arrays until EOF
	//read_start = clock();
	int i = 0;
	while (fscanf(data, "%lf", &xReal[i]) != EOF)
	{
		fscanf(data, "%lf", &xImag[i]);
		i++;
	}
	//read_end = clock();

	fclose(data);

	//fill the remaining indices in the real and imaginary arrays with 0.0
	for (; i < N; i++)
	{
		xReal[i] = 0.0;
		xImag[i] = 0.0;
	}
	
	cudaEventCreate(&start);
  cudaEventRecord(start,0);
	
	cudaMalloc((void**)&dev_xReal, DATASIZE);
	cudaMalloc((void**)&dev_xImag, DATASIZE);
	
	cudaMalloc((void**)&dev_XReal, DATASIZE);
	cudaMalloc((void**)&dev_XImag, DATASIZE);
	
	cudaMemcpy(dev_xReal, xReal, DATASIZE, cudaMemcpyHostToDevice);
	cudaMemcpy(dev_xImag, xImag, DATASIZE, cudaMemcpyHostToDevice);
	
	cudaEventCreate(&stop);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
	
	cudaEventElapsedTime(&comm_time_1, start, stop);
	
	cudaEventDestroy(start);
	cudaEventDestroy(stop);
	
	dim3 dimGrid(N/1024, 1); 	
	dim3 dimBlock(1024, 1);

	double XReal[N];
	double XImag[N];

	//calculate the FFT
	//calc_start = clock();
	
	cudaEventCreate(&start);
  cudaEventRecord(start,0);
	
	FFTCalc<<<dimGrid, dimBlock>>>(dev_xReal, dev_xImag, dev_XReal, dev_XImag);
	cudaThreadSynchronize();
	
	cudaEventCreate(&stop);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
	
	cudaEventElapsedTime(&calc_time, start, stop);
	
	cudaEventDestroy(start);
	cudaEventDestroy(stop);
	
	//calc_end = clock();
	
	cudaEventCreate(&start);
  cudaEventRecord(start,0);
	
	cudaMemcpy(XReal, dev_XReal, DATASIZE, cudaMemcpyDeviceToHost);
	cudaMemcpy(XImag, dev_XImag, DATASIZE, cudaMemcpyDeviceToHost);
	
	cudaFree(dev_xReal);
	cudaFree(dev_xImag);
	
	cudaFree(dev_XReal);
	cudaFree(dev_XImag);
	
	cudaEventCreate(&stop);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
	
	cudaEventElapsedTime(&comm_time_2, start, stop);
	
	cudaEventDestroy(start);
	cudaEventDestroy(stop);
	
	//prog_end = clock();
	
	//prog_time = (double)(prog_end - prog_start) / CLOCKS_PER_SEC;
	//calc_time = (double)(calc_end - calc_start) / CLOCKS_PER_SEC;
	//read_time = (double)(read_end - read_start) / CLOCKS_PER_SEC;

	//display the first 8 values
	printf("TOTAL PROCESSED SAMPLES: %d\n", N);
	printf("================================================================================\n");
	for (i = 0; i < 8; i++)
	{
		printf("XR[%d]: %f\n", i, XReal[i]);
		printf("XI[%d]: %f\n\n", i, XImag[i]);
	}
	printf("================================================================================\n\n");
	printf("Time required for calculation: %f\n", calc_time);
	printf("Time required for communication: %f\n", (comm_time_1 + comm_time_2));

	//printf("Time required for file read: %f\n", read_time);
	//printf("Time required for entire program: %f\n", prog_time);

	return 0;
}

//******************************************************************************
// FFTCalc()
// This kernel calculates the coefficients of the fourier transform. It requires
// two double arrays of size N containing the real and imaginary parts of the
// function to be transformed, and two double arrays for storing the real and
// imaginary parts of the result. No error check is performed so if these
// requirements are not met it is likely the program will crash. This program
// computes large sums in sequence to avoid data corrumption. While it is
// possible to make these calculations more parallel, I felt that given the
// number of data accesses this would require and the number of threads
// available on a node, that this would likely be counterproductive to
// efficiently calculating the fourier transform.
//******************************************************************************
__global__ void FFTCalc(double realIn[], double imagIn[], double realOut[], double imagOut[])
{
	//accumulators. e = even index, o = odd index.
	double eReal = 0, eImag = 0, oCosReal = 0, oCosImag = 0, oSinReal = 0, oSinImag = 0;

	//frequently used elements. Precalculated here or at the beginning of the loop
	double theta = (-2.0 * M_PI * (double)(threadIdx.x + blockIdx.x * 1024)) / (double)N;
	double cos2MTheta = 0, sin2MTheta = 0;
	int m = 0, twoM = 0, twoMPlus = 0;

	for (; m < (N / 2); m++)
	{
		twoM = 2 * m;
		twoMPlus = twoM + 1;
		cos2MTheta = cos((double)twoM * theta);
		sin2MTheta = sin((double)twoM * theta);

		eReal += ((realIn[twoM] * cos2MTheta) - (imagIn[twoM] * sin2MTheta));
		eImag += ((realIn[twoM] * sin2MTheta) + (imagIn[twoM] * cos2MTheta));
		oCosReal += ((realIn[twoMPlus] * cos2MTheta) - (imagIn[twoMPlus] * sin2MTheta));
		oCosImag += ((realIn[twoMPlus] * sin2MTheta) + (imagIn[twoMPlus] * cos2MTheta));
		oSinReal -= ((realIn[twoMPlus] * sin2MTheta) + (imagIn[twoMPlus] * cos2MTheta));
		oSinImag += ((realIn[twoMPlus] * cos2MTheta) - (imagIn[twoMPlus] * sin2MTheta));
	}
	realOut[threadIdx.x + blockIdx.x * 1024] = eReal + cos(theta) * oCosReal + sin(theta) * oSinReal;
	imagOut[threadIdx.x + blockIdx.x * 1024] = eImag + cos(theta) * oCosImag + sin(theta) * oSinImag;

	return;
}
	.file	"tmpxft_0032010a_00000000-6_FFT_parallel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z7FFTCalcPdS_S_S_PdS_S_S_
	.type	_Z32__device_stub__Z7FFTCalcPdS_S_S_PdS_S_S_, @function
_Z32__device_stub__Z7FFTCalcPdS_S_S_PdS_S_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7FFTCalcPdS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z32__device_stub__Z7FFTCalcPdS_S_S_PdS_S_S_, .-_Z32__device_stub__Z7FFTCalcPdS_S_S_PdS_S_S_
	.globl	_Z7FFTCalcPdS_S_S_
	.type	_Z7FFTCalcPdS_S_S_, @function
_Z7FFTCalcPdS_S_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z7FFTCalcPdS_S_S_PdS_S_S_
	.cfi_endproc
.LFE2053:
	.size	_Z7FFTCalcPdS_S_S_, .-_Z7FFTCalcPdS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"data.txt"
.LC2:
	.string	"%lf"
.LC4:
	.string	"TOTAL PROCESSED SAMPLES: %d\n"
.LC5:
	.string	"================================================================================\n"
.LC6:
	.string	"XR[%d]: %f\n"
.LC7:
	.string	"XI[%d]: %f\n\n"
.LC8:
	.string	"================================================================================\n\n"
.LC9:
	.string	"Time required for calculation: %f\n"
.LC10:
	.string	"Time required for communication: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-524288(%rsp), %r11
	.cfi_def_cfa 11, 524344
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$104, %rsp
	.cfi_def_cfa_offset 524448
	leaq	.LC0(%rip), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%ebx, %ebx
	leaq	.LC2(%rip), %r15
	movq	%fs:40, %rax
	movq	%rax, 524376(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movq	%rax, %rbp
.L9:
	leaq	0(,%rbx,8), %r12
	xorl	%eax, %eax
	movq	%r15, %rsi
	movq	%rbp, %rdi
	leaq	88(%rsp), %r14
	leaq	131160(%rsp), %r13
	leaq	(%r14,%r12), %rdx
	call	__isoc23_fscanf@PLT
	incl	%eax
	je	.L18
	leaq	0(%r13,%r12), %rdx
	movq	%r15, %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	incq	%rbx
	jmp	.L9
.L18:
	movq	%rbp, %rdi
	call	fclose@PLT
	movslq	%ebx, %rax
.L11:
	cmpl	$16383, %eax
	jg	.L19
	movq	$0x000000000, (%r14,%rax,8)
	movq	$0x000000000, 0(%r13,%rax,8)
	incq	%rax
	jmp	.L11
.L19:
	leaq	16(%rsp), %rbp
	leaq	24(%rsp), %rbx
	movq	%rbp, %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	32(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	$268435457, %eax
	movq	%rbp, %rdi
	movl	$1, 72(%rsp)
	salq	$4, %rax
	movl	$1, 84(%rsp)
	movq	%rax, 64(%rsp)
	addq	$1008, %rax
	movq	%rax, 76(%rsp)
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	84(%rsp), %ecx
	movl	72(%rsp), %esi
	xorl	%r9d, %r9d
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z32__device_stub__Z7FFTCalcPdS_S_S_PdS_S_S_
.L13:
	call	cudaThreadSynchronize@PLT
	movq	%rbx, %rdi
	leaq	262232(%rsp), %r13
	leaq	393304(%rsp), %r12
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	leaq	.LC6(%rip), %r14
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	%rbp, %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	xorl	%ebx, %ebx
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	8(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	$16384, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	movsd	0(%r13,%rbx,8), %xmm0
	movl	%ebx, %edx
	movq	%r14, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	(%r12,%rbx,8), %xmm0
	movl	%ebx, %edx
	movb	$1, %al
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$8, %rbx
	jne	.L14
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	movss	4(%rsp), %xmm0
	addss	8(%rsp), %xmm0
	leaq	.LC10(%rip), %rsi
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	524376(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$524392, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z7FFTCalcPdS_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7FFTCalcPdS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//******************************************************************************
// Final Project
// Name: Andrew McKissick
// GPU Computing Date: 12/5/16
//******************************************************************************
// This program performs a Fast Fourier transform on a set of complex numbers.
// Input is read from a file (data.txt) as floating point pairs. Error checking
// is not performed on input data, so anything other than an even number less
// than or equal to 2*N of decimal numbers separated by whitespace will cause
// undefined behavior. Output is to stdout and limited to the first 8 terms,
// and the time required for program and funcion execution, though this is
// easily configurable in the code. No user interaction is required beyond
// creating a valid input file and running the program.
//******************************************************************************

#define _CRT_SECURE_NO_WARNINGS

#include <hip/hip_runtime.h>
#include <stdio.h>
#define _USE_MATH_DEFINES
#include <math.h>
#include <time.h>

//number of elements in each array
#define N 16384

__global__ void FFTCalc(double realIn[], double imagIn[], double realOut[], double imagOut[]);

int main()
{
	//clock_t prog_start, prog_end, calc_start, calc_end, read_start, read_end;
	float comm_time_1, comm_time_2, calc_time;
	hipEvent_t start, stop;
	
	//prog_start = clock();
	FILE *data;
	data = fopen("data.txt", "r");
	
	const int DATASIZE = N*sizeof(double);

	double xReal[N];
	double xImag[N];
	
	double* dev_xReal;
	double* dev_xImag;
	
	double* dev_XReal;
	double* dev_XImag;

	//read from data.txt into the real and imaginary arrays until EOF
	//read_start = clock();
	int i = 0;
	while (fscanf(data, "%lf", &xReal[i]) != EOF)
	{
		fscanf(data, "%lf", &xImag[i]);
		i++;
	}
	//read_end = clock();

	fclose(data);

	//fill the remaining indices in the real and imaginary arrays with 0.0
	for (; i < N; i++)
	{
		xReal[i] = 0.0;
		xImag[i] = 0.0;
	}
	
	hipEventCreate(&start);
  hipEventRecord(start,0);
	
	hipMalloc((void**)&dev_xReal, DATASIZE);
	hipMalloc((void**)&dev_xImag, DATASIZE);
	
	hipMalloc((void**)&dev_XReal, DATASIZE);
	hipMalloc((void**)&dev_XImag, DATASIZE);
	
	hipMemcpy(dev_xReal, xReal, DATASIZE, hipMemcpyHostToDevice);
	hipMemcpy(dev_xImag, xImag, DATASIZE, hipMemcpyHostToDevice);
	
	hipEventCreate(&stop);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
	
	hipEventElapsedTime(&comm_time_1, start, stop);
	
	hipEventDestroy(start);
	hipEventDestroy(stop);
	
	dim3 dimGrid(N/1024, 1); 	
	dim3 dimBlock(1024, 1);

	double XReal[N];
	double XImag[N];

	//calculate the FFT
	//calc_start = clock();
	
	hipEventCreate(&start);
  hipEventRecord(start,0);
	
	FFTCalc<<<dimGrid, dimBlock>>>(dev_xReal, dev_xImag, dev_XReal, dev_XImag);
	hipDeviceSynchronize();
	
	hipEventCreate(&stop);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
	
	hipEventElapsedTime(&calc_time, start, stop);
	
	hipEventDestroy(start);
	hipEventDestroy(stop);
	
	//calc_end = clock();
	
	hipEventCreate(&start);
  hipEventRecord(start,0);
	
	hipMemcpy(XReal, dev_XReal, DATASIZE, hipMemcpyDeviceToHost);
	hipMemcpy(XImag, dev_XImag, DATASIZE, hipMemcpyDeviceToHost);
	
	hipFree(dev_xReal);
	hipFree(dev_xImag);
	
	hipFree(dev_XReal);
	hipFree(dev_XImag);
	
	hipEventCreate(&stop);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
	
	hipEventElapsedTime(&comm_time_2, start, stop);
	
	hipEventDestroy(start);
	hipEventDestroy(stop);
	
	//prog_end = clock();
	
	//prog_time = (double)(prog_end - prog_start) / CLOCKS_PER_SEC;
	//calc_time = (double)(calc_end - calc_start) / CLOCKS_PER_SEC;
	//read_time = (double)(read_end - read_start) / CLOCKS_PER_SEC;

	//display the first 8 values
	printf("TOTAL PROCESSED SAMPLES: %d\n", N);
	printf("================================================================================\n");
	for (i = 0; i < 8; i++)
	{
		printf("XR[%d]: %f\n", i, XReal[i]);
		printf("XI[%d]: %f\n\n", i, XImag[i]);
	}
	printf("================================================================================\n\n");
	printf("Time required for calculation: %f\n", calc_time);
	printf("Time required for communication: %f\n", (comm_time_1 + comm_time_2));

	//printf("Time required for file read: %f\n", read_time);
	//printf("Time required for entire program: %f\n", prog_time);

	return 0;
}

//******************************************************************************
// FFTCalc()
// This kernel calculates the coefficients of the fourier transform. It requires
// two double arrays of size N containing the real and imaginary parts of the
// function to be transformed, and two double arrays for storing the real and
// imaginary parts of the result. No error check is performed so if these
// requirements are not met it is likely the program will crash. This program
// computes large sums in sequence to avoid data corrumption. While it is
// possible to make these calculations more parallel, I felt that given the
// number of data accesses this would require and the number of threads
// available on a node, that this would likely be counterproductive to
// efficiently calculating the fourier transform.
//******************************************************************************
__global__ void FFTCalc(double realIn[], double imagIn[], double realOut[], double imagOut[])
{
	//accumulators. e = even index, o = odd index.
	double eReal = 0, eImag = 0, oCosReal = 0, oCosImag = 0, oSinReal = 0, oSinImag = 0;

	//frequently used elements. Precalculated here or at the beginning of the loop
	double theta = (-2.0 * M_PI * (double)(threadIdx.x + blockIdx.x * 1024)) / (double)N;
	double cos2MTheta = 0, sin2MTheta = 0;
	int m = 0, twoM = 0, twoMPlus = 0;

	for (; m < (N / 2); m++)
	{
		twoM = 2 * m;
		twoMPlus = twoM + 1;
		cos2MTheta = cos((double)twoM * theta);
		sin2MTheta = sin((double)twoM * theta);

		eReal += ((realIn[twoM] * cos2MTheta) - (imagIn[twoM] * sin2MTheta));
		eImag += ((realIn[twoM] * sin2MTheta) + (imagIn[twoM] * cos2MTheta));
		oCosReal += ((realIn[twoMPlus] * cos2MTheta) - (imagIn[twoMPlus] * sin2MTheta));
		oCosImag += ((realIn[twoMPlus] * sin2MTheta) + (imagIn[twoMPlus] * cos2MTheta));
		oSinReal -= ((realIn[twoMPlus] * sin2MTheta) + (imagIn[twoMPlus] * cos2MTheta));
		oSinImag += ((realIn[twoMPlus] * cos2MTheta) - (imagIn[twoMPlus] * sin2MTheta));
	}
	realOut[threadIdx.x + blockIdx.x * 1024] = eReal + cos(theta) * oCosReal + sin(theta) * oSinReal;
	imagOut[threadIdx.x + blockIdx.x * 1024] = eImag + cos(theta) * oCosImag + sin(theta) * oSinImag;

	return;
}
	.text
	.file	"FFT_parallel.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$524360, %rsp                   # imm = 0x80048
	.cfi_def_cfa_offset 524400
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	64(%rsp), %rdx
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	cmpl	$-1, %eax
	je	.LBB0_10
# %bb.1:                                # %.lr.ph.preheader
	leaq	131136(%rsp), %r14
	leaq	72(%rsp), %r15
	xorl	%r12d, %r12d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	addq	$8, %r14
	incl	%r12d
	addq	$8, %r15
	cmpl	$-1, %eax
	jne	.LBB0_2
# %bb.3:                                # %._crit_edge
	movq	%rbx, %rdi
	callq	fclose
	cmpl	$16383, %r12d                   # imm = 0x3FFF
	jbe	.LBB0_4
	jmp	.LBB0_5
.LBB0_10:                               # %._crit_edge.thread
	movq	%rbx, %rdi
	callq	fclose
	xorl	%r12d, %r12d
.LBB0_4:                                # %.lr.ph29.preheader
	shll	$3, %r12d
	leaq	(%rsp,%r12), %rdi
	addq	$64, %rdi
	movl	%r12d, %ebx
	xorl	$131064, %ebx                   # imm = 0x1FFF8
	addl	$8, %ebx
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	leaq	(%rsp,%r12), %rdi
	addq	$131136, %rdi                   # imm = 0x20040
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
.LBB0_5:                                # %._crit_edge30
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	40(%rsp), %r15
	movl	$131072, %esi                   # imm = 0x20000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r14
	movl	$131072, %esi                   # imm = 0x20000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$131072, %esi                   # imm = 0x20000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$131072, %esi                   # imm = 0x20000
	callq	hipMalloc
	movq	(%r15), %rdi
	leaq	64(%rsp), %rsi
	movl	$131072, %edx                   # imm = 0x20000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	131136(%rsp), %rsi
	movl	$131072, %edx                   # imm = 0x20000
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rdi
	callq	hipEventSynchronize
	movq	(%rbx), %rsi
	movq	(%r14), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	(%rbx), %rdi
	callq	hipEventDestroy
	movq	(%r14), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	leaq	1008(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_7
# %bb.6:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	callq	_Z22__device_stub__FFTCalcPdS_S_S_
.LBB0_7:
	callq	hipDeviceSynchronize
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rdi
	callq	hipEventSynchronize
	leaq	56(%rsp), %r15
	movq	(%r15), %rsi
	movq	(%r14), %rdx
	leaq	20(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	(%r15), %rdi
	callq	hipEventDestroy
	movq	(%r14), %rdi
	callq	hipEventDestroy
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rsi
	leaq	393280(%rsp), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rsi
	leaq	262208(%rsp), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rdi
	callq	hipEventSynchronize
	movq	(%r15), %rsi
	movq	(%r14), %rdx
	leaq	24(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	(%r15), %rdi
	callq	hipEventDestroy
	movq	(%r14), %rdi
	callq	hipEventDestroy
	movl	$.L.str.3, %edi
	movl	$16384, %esi                    # imm = 0x4000
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB0_8:                                # =>This Inner Loop Header: Depth=1
	movsd	393280(%rsp,%rbx,8), %xmm0      # xmm0 = mem[0],zero
	movl	$.L.str.5, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	movsd	262208(%rsp,%rbx,8), %xmm0      # xmm0 = mem[0],zero
	movl	$.L.str.6, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$8, %rbx
	jne	.LBB0_8
# %bb.9:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	addss	24(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$524360, %rsp                   # imm = 0x80048
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__FFTCalcPdS_S_S_ # -- Begin function _Z22__device_stub__FFTCalcPdS_S_S_
	.type	_Z22__device_stub__FFTCalcPdS_S_S_,@function
_Z22__device_stub__FFTCalcPdS_S_S_:     # @_Z22__device_stub__FFTCalcPdS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7FFTCalcPdS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__FFTCalcPdS_S_S_, .Lfunc_end1-_Z22__device_stub__FFTCalcPdS_S_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7FFTCalcPdS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"data.txt"
	.size	.L.str, 9

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%lf"
	.size	.L.str.2, 4

	.type	_Z7FFTCalcPdS_S_S_,@object      # @_Z7FFTCalcPdS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z7FFTCalcPdS_S_S_
	.p2align	3, 0x0
_Z7FFTCalcPdS_S_S_:
	.quad	_Z22__device_stub__FFTCalcPdS_S_S_
	.size	_Z7FFTCalcPdS_S_S_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"TOTAL PROCESSED SAMPLES: %d\n"
	.size	.L.str.3, 29

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"XR[%d]: %f\n"
	.size	.L.str.5, 12

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"XI[%d]: %f\n\n"
	.size	.L.str.6, 13

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Time required for calculation: %f\n"
	.size	.L.str.8, 35

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Time required for communication: %f\n"
	.size	.L.str.9, 37

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7FFTCalcPdS_S_S_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"================================================================================"
	.size	.Lstr, 81

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"================================================================================\n"
	.size	.Lstr.1, 82

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__FFTCalcPdS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7FFTCalcPdS_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7FFTCalcPdS_S_S_      ; -- Begin function _Z7FFTCalcPdS_S_S_
	.globl	_Z7FFTCalcPdS_S_S_
	.p2align	8
	.type	_Z7FFTCalcPdS_S_S_,@function
_Z7FFTCalcPdS_S_S_:                     ; @_Z7FFTCalcPdS_S_S_
; %bb.0:
	v_lshl_or_b32 v8, s15, 10, v0
	s_mov_b32 s9, 0xc01921fb
	s_mov_b32 s8, 0x54442d18
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mov_b32_e32 v9, 0
	v_cvt_f64_u32_e32 v[0:1], v8
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v15, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v2, v9
	v_mov_b32_e32 v4, v9
	v_dual_mov_b32 v6, v9 :: v_dual_mov_b32 v7, v10
	v_mov_b32_e32 v3, v10
	v_dual_mov_b32 v12, v10 :: v_dual_mov_b32 v11, v9
	v_mov_b32_e32 v5, v10
	v_dual_mov_b32 v14, v10 :: v_dual_mov_b32 v13, v9
	s_mov_b32 s14, 0x33145c00
	s_mov_b32 s16, 0x252049c0
	s_mov_b32 s18, 0x9037ab78
	s_mov_b32 s20, 0x46cc5e42
	s_mov_b32 s22, 0xa17f65f6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s46, s0, 8
	s_addc_u32 s47, s1, 0
	s_add_u32 s48, s2, 8
	s_addc_u32 s49, s3, 0
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s24, 0x19f4ec90
	s_mov_b32 s26, 0x16c16967
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0xb42fdfa7
	s_mov_b32 s34, 0xf9a43bb8
	s_mov_b32 s36, 0x796cde01
	s_mov_b32 s38, 0x19e83e5c
	s_mov_b32 s40, 0x11110bb3
	s_mov_b32 s33, 0
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s13, 0x3c91a626
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s15, 0xbc91a626
	s_mov_b32 s17, 0xb97b839a
	s_mov_b32 s19, 0x3e21eeb6
	v_mul_f64 v[0:1], v[0:1], s[8:9]
	s_mov_b32 s21, 0xbda907db
	s_mov_b32 s23, 0xbe927e4f
	s_mov_b32 s25, 0x3efa01a0
	s_mov_b32 s27, 0xbf56c16c
	s_mov_b32 s29, 0x3fa55555
	s_mov_b32 s31, 0xbe5ae600
	s_mov_b32 s35, 0x3de5e0b2
	s_mov_b32 s37, 0x3ec71de3
	s_mov_b32 s39, 0xbf2a01a0
	s_mov_b32 s41, 0x3f811111
	s_mov_b32 s42, 0x33145c07
	s_mov_b32 s9, 0xbff921fb
	s_mov_b32 s45, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], -14
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[16:17], s33
                                        ; implicit-def: $vgpr35
                                        ; implicit-def: $vgpr19_vgpr20
                                        ; implicit-def: $vgpr21_vgpr22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], v[0:1], v[16:17]
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[17:18]|
	v_trig_preop_f64 v[27:28], |v[17:18]|, 0
	v_trig_preop_f64 v[25:26], |v[17:18]|, 1
	v_ldexp_f64 v[29:30], |v[17:18]|, 0xffffff80
	v_trig_preop_f64 v[23:24], |v[17:18]|, 2
	v_and_b32_e32 v36, 0x7fffffff, v18
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s12, exec_lo, s0
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[17:18]|
	s_mov_b32 s10, s8
	s_mov_b32 s43, s13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v20, v36, v30 :: v_dual_cndmask_b32 v19, v17, v29
	v_mul_f64 v[21:22], v[27:28], v[19:20]
	v_mul_f64 v[31:32], v[25:26], v[19:20]
	v_mul_f64 v[45:46], v[23:24], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[27:28], v[19:20], -v[21:22]
	v_fma_f64 v[47:48], v[25:26], v[19:20], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[23:24], v[19:20], -v[45:46]
	v_add_f64 v[37:38], v[31:32], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[37:38], -v[31:32]
	v_add_f64 v[43:44], v[21:22], v[37:38]
	v_add_f64 v[41:42], v[37:38], -v[39:40]
	v_add_f64 v[33:34], v[33:34], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[39:40], v[43:44], -2
	v_add_f64 v[21:22], v[43:44], -v[21:22]
	v_add_f64 v[31:32], v[31:32], -v[41:42]
	v_add_f64 v[41:42], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[39:40]|
	v_add_f64 v[21:22], v[37:38], -v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[33:34], v[31:32]
	v_fract_f64_e32 v[33:34], v[39:40]
	v_add_f64 v[37:38], v[41:42], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v34, 0, v34 :: v_dual_cndmask_b32 v33, 0, v33
	v_ldexp_f64 v[33:34], v[33:34], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[21:22], v[37:38]
	v_add_f64 v[49:50], v[37:38], -v[41:42]
	v_add_f64 v[43:44], v[39:40], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[55:56], v[37:38], -v[49:50]
	v_add_f64 v[31:32], v[31:32], -v[49:50]
	v_add_f64 v[21:22], v[39:40], -v[21:22]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[43:44]
	v_add_f64 v[43:44], v[41:42], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[37:38], -v[21:22]
	v_cndmask_b32_e64 v16, 0, 0x40100000, vcc_lo
	v_add_f64 v[53:54], v[41:42], -v[43:44]
	v_add_f64 v[43:44], v[47:48], -v[43:44]
	v_add_f64 v[41:42], v[41:42], -v[55:56]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[33:34], v[15:16]
	v_add_f64 v[47:48], v[45:46], -v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[31:32], v[41:42]
	v_add_f64 v[51:52], v[39:40], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], v[47:48]
	v_cvt_i32_f64_e32 v16, v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[43:44], v[31:32]
	v_cvt_f64_i32_e32 v[49:50], v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[31:32]
	v_add_f64 v[33:34], v[33:34], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[21:22], v[19:20]
	v_add_f64 v[41:42], v[39:40], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[41:42], -v[33:34]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[41:42]
	v_add_f64 v[21:22], v[39:40], -v[31:32]
	v_add_co_ci_u32_e64 v35, s0, 0, v16, vcc_lo
	v_cndmask_b32_e64 v16, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_add_f64 v[21:22], v[41:42], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[21:22], v[19:20]
	v_mul_f64 v[33:34], v[31:32], s[10:11]
	v_add_f64 v[21:22], v[31:32], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[37:38], v[31:32], s[10:11], -v[33:34]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[31:32], s[42:43], v[37:38]
	v_fma_f64 v[21:22], v[19:20], s[10:11], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[33:34], v[21:22]
	v_add_f64 v[31:32], v[19:20], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[31:32]
.LBB0_3:                                ; %Flow154
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s0, s12
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_f64 v[19:20], |v[17:18]|, s[2:3]
	s_mov_b32 s12, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[31:32], v[19:20]
	v_fma_f64 v[19:20], v[31:32], s[8:9], |v[17:18]|
	v_mul_f64 v[21:22], v[31:32], s[14:15]
	v_cvt_i32_f64_e32 v35, v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[31:32], s[14:15], v[19:20]
	v_add_f64 v[33:34], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], -v[33:34]
	v_add_f64 v[33:34], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_fma_f64 v[21:22], v[31:32], s[12:13], v[21:22]
	v_add_f64 v[19:20], v[33:34], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	v_fma_f64 v[21:22], v[31:32], s[16:17], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[37:38], v[21:22]
	v_add_f64 v[33:34], v[19:20], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[33:34]
.LBB0_5:                                ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr37
                                        ; implicit-def: $vgpr31_vgpr32
                                        ; implicit-def: $vgpr33_vgpr34
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[17:18]|
	s_mov_b32 s10, s8
	s_mov_b32 s43, s13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v30, v36, v30 :: v_dual_cndmask_b32 v29, v17, v29
	v_mul_f64 v[31:32], v[27:28], v[29:30]
	v_mul_f64 v[33:34], v[25:26], v[29:30]
	v_mul_f64 v[44:45], v[23:24], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], v[27:28], v[29:30], -v[31:32]
	v_fma_f64 v[25:26], v[25:26], v[29:30], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[23:24], v[29:30], -v[44:45]
	v_add_f64 v[36:37], v[33:34], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[36:37], -v[33:34]
	v_add_f64 v[42:43], v[31:32], v[36:37]
	v_add_f64 v[40:41], v[36:37], -v[38:39]
	v_add_f64 v[27:28], v[27:28], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[38:39], v[42:43], -2
	v_add_f64 v[31:32], v[42:43], -v[31:32]
	v_add_f64 v[33:34], v[33:34], -v[40:41]
	v_add_f64 v[40:41], v[44:45], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[38:39]|
	v_add_f64 v[31:32], v[36:37], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], v[33:34]
	v_fract_f64_e32 v[33:34], v[38:39]
	v_add_f64 v[36:37], v[40:41], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v34, 0, v34 :: v_dual_cndmask_b32 v33, 0, v33
	v_ldexp_f64 v[33:34], v[33:34], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[31:32], v[36:37]
	v_add_f64 v[46:47], v[36:37], -v[40:41]
	v_add_f64 v[42:43], v[38:39], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[36:37], -v[46:47]
	v_add_f64 v[27:28], v[27:28], -v[46:47]
	v_add_f64 v[29:30], v[38:39], -v[31:32]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[42:43]
	v_add_f64 v[42:43], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[36:37], -v[29:30]
	v_cndmask_b32_e64 v16, 0, 0x40100000, vcc_lo
	v_add_f64 v[50:51], v[40:41], -v[42:43]
	v_add_f64 v[25:26], v[25:26], -v[42:43]
	v_add_f64 v[40:41], v[40:41], -v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[33:34], v[15:16]
	v_add_f64 v[42:43], v[44:45], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[27:28], v[40:41]
	v_add_f64 v[48:49], v[38:39], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[42:43]
	v_cvt_i32_f64_e32 v16, v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[27:28]
	v_cvt_f64_i32_e32 v[46:47], v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[33:34], v[33:34], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[29:30], v[23:24]
	v_add_f64 v[27:28], v[38:39], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[27:28], -v[33:34]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[27:28]
	v_add_f64 v[25:26], v[38:39], -v[25:26]
	v_add_co_ci_u32_e64 v37, s0, 0, v16, vcc_lo
	v_cndmask_b32_e64 v16, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[27:28], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], v[23:24]
	v_mul_f64 v[29:30], v[27:28], s[10:11]
	v_add_f64 v[25:26], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], s[10:11], -v[29:30]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[27:28], s[42:43], v[31:32]
	v_fma_f64 v[23:24], v[23:24], s[10:11], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[29:30], v[23:24]
	v_add_f64 v[25:26], v[31:32], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[33:34], v[23:24], -v[25:26]
.LBB0_7:                                ; %Flow153
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_f64 v[23:24], |v[17:18]|, s[2:3]
	s_mov_b32 s12, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_fma_f64 v[25:26], v[23:24], s[8:9], |v[17:18]|
	v_mul_f64 v[27:28], v[23:24], s[14:15]
	v_cvt_i32_f64_e32 v37, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[23:24], s[14:15], v[25:26]
	v_add_f64 v[29:30], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	v_add_f64 v[29:30], v[29:30], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[27:28]
	v_fma_f64 v[27:28], v[23:24], s[12:13], v[27:28]
	v_add_f64 v[25:26], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[27:28]
	v_fma_f64 v[25:26], v[23:24], s[16:17], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[33:34], v[25:26]
	v_add_f64 v[27:28], v[31:32], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[33:34], v[25:26], -v[27:28]
.LBB0_9:                                ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[23:24], v[19:20], v[19:20]
	v_mul_f64 v[25:26], v[31:32], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[50:51], v[21:22], 0.5
	v_mul_f64 v[56:57], v[33:34], 0.5
	s_mov_b32 s44, s28
	v_cmp_class_f64_e64 s0, v[17:18], 0x1f8
	v_and_b32_e32 v16, 1, v35
	s_add_u32 s50, s46, -8
	s_addc_u32 s51, s47, -1
	s_add_u32 s52, s48, -8
	s_addc_u32 s53, s49, -1
	v_cmp_eq_u32_e32 vcc_lo, 0, v16
	s_load_b128 s[52:55], s[52:53], 0x0
	s_load_b128 s[56:59], s[50:51], 0x0
	s_add_i32 s33, s33, 2
	s_add_u32 s46, s46, 16
	s_addc_u32 s47, s47, 0
	s_add_u32 s48, s48, 16
	s_addc_u32 s49, s49, 0
	s_cmpk_lg_i32 s33, 0x4000
	v_and_b32_e32 v17, 1, v37
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, 0, v17
	v_fma_f64 v[27:28], v[23:24], s[34:35], s[30:31]
	v_fma_f64 v[29:30], v[25:26], s[34:35], s[30:31]
	v_fma_f64 v[38:39], v[23:24], s[20:21], s[18:19]
	v_mul_f64 v[40:41], v[23:24], 0.5
	v_fma_f64 v[42:43], v[25:26], s[20:21], s[18:19]
	v_mul_f64 v[44:45], v[25:26], 0.5
	v_mul_f64 v[52:53], v[19:20], -v[23:24]
	v_mul_f64 v[58:59], v[31:32], -v[25:26]
	v_fma_f64 v[27:28], v[23:24], v[27:28], s[36:37]
	v_fma_f64 v[29:30], v[25:26], v[29:30], s[36:37]
	v_fma_f64 v[38:39], v[23:24], v[38:39], s[22:23]
	v_add_f64 v[46:47], -v[40:41], 1.0
	v_fma_f64 v[42:43], v[25:26], v[42:43], s[22:23]
	v_add_f64 v[48:49], -v[44:45], 1.0
	v_fma_f64 v[27:28], v[23:24], v[27:28], s[38:39]
	v_fma_f64 v[29:30], v[25:26], v[29:30], s[38:39]
	v_fma_f64 v[38:39], v[23:24], v[38:39], s[24:25]
	v_add_f64 v[54:55], -v[46:47], 1.0
	v_fma_f64 v[42:43], v[25:26], v[42:43], s[24:25]
	v_add_f64 v[60:61], -v[48:49], 1.0
	v_fma_f64 v[27:28], v[23:24], v[27:28], s[40:41]
	v_fma_f64 v[29:30], v[25:26], v[29:30], s[40:41]
	v_fma_f64 v[38:39], v[23:24], v[38:39], s[26:27]
	v_add_f64 v[40:41], v[54:55], -v[40:41]
	v_fma_f64 v[42:43], v[25:26], v[42:43], s[26:27]
	v_add_f64 v[44:45], v[60:61], -v[44:45]
	v_fma_f64 v[27:28], v[52:53], v[27:28], v[50:51]
	v_fma_f64 v[29:30], v[58:59], v[29:30], v[56:57]
	v_mul_f64 v[50:51], v[23:24], v[23:24]
	v_fma_f64 v[38:39], v[23:24], v[38:39], s[28:29]
	v_fma_f64 v[40:41], v[19:20], -v[21:22], v[40:41]
	v_fma_f64 v[21:22], v[23:24], v[27:28], -v[21:22]
	v_mul_f64 v[23:24], v[25:26], v[25:26]
	v_fma_f64 v[27:28], v[25:26], v[42:43], s[28:29]
	v_fma_f64 v[42:43], v[31:32], -v[33:34], v[44:45]
	v_fma_f64 v[25:26], v[25:26], v[29:30], -v[33:34]
	v_fma_f64 v[29:30], v[50:51], v[38:39], v[40:41]
	v_fma_f64 v[21:22], v[52:53], s[44:45], v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[23:24], v[23:24], v[27:28], v[42:43]
	v_fma_f64 v[25:26], v[58:59], s[44:45], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[27:28], v[46:47], v[29:30]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[48:49], v[23:24]
	v_add_f64 v[23:24], v[31:32], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v16, v19, v27, vcc_lo
	v_xor_b32_e32 v20, 0x80000000, v20
	v_lshlrev_b32_e32 v19, 30, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v16, 0, v16, s0
	v_cndmask_b32_e32 v20, v20, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v18, v19, v18
	v_cndmask_b32_e64 v19, v22, v24, s1
	v_and_b32_e32 v17, 0x80000000, v18
	v_cndmask_b32_e64 v18, v21, v23, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v19, v19, v17
	v_cndmask_b32_e64 v17, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v18, 0x7ff80000, v19, s0
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[21:22], s[52:53], v[17:18]
	v_mul_f64 v[23:24], s[56:57], v[17:18]
	v_mul_f64 v[25:26], s[54:55], v[17:18]
	v_mul_f64 v[18:19], s[58:59], v[17:18]
	v_lshlrev_b32_e32 v17, 30, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v17, 0x80000000, v17
	v_xor_b32_e32 v17, v20, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, 0x7ff80000, v17, s0
	v_fma_f64 v[20:21], s[56:57], v[16:17], -v[21:22]
	v_fma_f64 v[22:23], s[52:53], v[16:17], v[23:24]
	v_fma_f64 v[24:25], s[58:59], v[16:17], -v[25:26]
	v_fma_f64 v[16:17], s[54:55], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], v[20:21]
	v_add_f64 v[6:7], v[6:7], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[13:14], v[24:25]
	v_add_f64 v[4:5], v[4:5], v[16:17]
	v_add_f64 v[11:12], v[11:12], -v[16:17]
	v_add_f64 v[2:3], v[2:3], v[24:25]
	s_cbranch_scc1 .LBB0_1
; %bb.10:
	v_cmp_ngt_f64_e64 s2, 0x41d00000, |v[0:1]|
	v_trig_preop_f64 v[19:20], |v[0:1]|, 0
	v_trig_preop_f64 v[17:18], |v[0:1]|, 1
	v_ldexp_f64 v[21:22], |v[0:1]|, 0xffffff80
	v_trig_preop_f64 v[15:16], |v[0:1]|, 2
	v_and_b32_e32 v31, 0x7fffffff, v1
                                        ; implicit-def: $vgpr32
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr25_vgpr26
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v44, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v24, v31, v22 :: v_dual_cndmask_b32 v23, v0, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[19:20], v[23:24]
	v_mul_f64 v[27:28], v[17:18], v[23:24]
	v_mul_f64 v[40:41], v[15:16], v[23:24]
	v_fma_f64 v[29:30], v[19:20], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[17:18], v[23:24], -v[27:28]
	v_fma_f64 v[23:24], v[15:16], v[23:24], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], v[27:28], v[29:30]
	v_add_f64 v[34:35], v[32:33], -v[27:28]
	v_add_f64 v[38:39], v[25:26], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[32:33], -v[34:35]
	v_add_f64 v[29:30], v[29:30], -v[34:35]
	v_ldexp_f64 v[34:35], v[38:39], -2
	v_add_f64 v[25:26], v[38:39], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[27:28], v[27:28], -v[36:37]
	v_add_f64 v[36:37], v[40:41], v[42:43]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[34:35]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[32:33], -v[25:26]
	v_add_f64 v[27:28], v[29:30], v[27:28]
	v_fract_f64_e32 v[29:30], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[36:37], v[27:28]
	v_dual_cndmask_b32 v30, 0, v30 :: v_dual_cndmask_b32 v29, 0, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[29:30], v[29:30], 2
	v_add_f64 v[34:35], v[25:26], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[34:35], v[29:30]
	v_add_f64 v[25:26], v[34:35], -v[25:26]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[38:39]
	v_add_f64 v[38:39], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[32:33], -v[25:26]
	v_cndmask_b32_e64 v45, 0, 0x40100000, vcc_lo
	v_add_f64 v[49:50], v[36:37], -v[38:39]
	v_add_f64 v[38:39], v[42:43], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[29:30], v[44:45]
	v_add_f64 v[45:46], v[32:33], -v[36:37]
	v_add_f64 v[42:43], v[40:41], -v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[34:35], v[29:30]
	v_add_f64 v[51:52], v[32:33], -v[45:46]
	v_add_f64 v[27:28], v[27:28], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[38:39], v[42:43]
	v_cvt_i32_f64_e32 v47, v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[36:37], -v[51:52]
	v_cvt_f64_i32_e32 v[45:46], v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], v[36:37]
	v_add_f64 v[29:30], v[29:30], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[38:39], v[27:28]
	v_add_f64 v[36:37], v[34:35], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[27:28]
	v_add_f64 v[27:28], v[36:37], -v[29:30]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_add_f64 v[25:26], v[34:35], -v[27:28]
	v_cndmask_b32_e64 v45, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v32, s0, 0, v47, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[36:37], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], v[23:24]
	v_mul_f64 v[29:30], v[27:28], s[8:9]
	v_add_f64 v[25:26], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[33:34], v[27:28], s[8:9], -v[29:30]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[27:28], s[10:11], v[33:34]
	v_fma_f64 v[25:26], v[23:24], s[8:9], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[29:30], v[25:26]
	v_add_f64 v[27:28], v[23:24], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[27:28]
.LBB0_12:                               ; %Flow152
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_14
; %bb.13:
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[23:24], |v[0:1]|, s[8:9]
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[27:28], v[23:24]
	v_fma_f64 v[23:24], v[27:28], s[8:9], |v[0:1]|
	v_mul_f64 v[25:26], v[27:28], s[10:11]
	s_mov_b32 s8, 0x252049c0
	s_mov_b32 s9, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[27:28], s[10:11], v[23:24]
	v_add_f64 v[29:30], v[23:24], v[25:26]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[29:30]
	v_add_f64 v[29:30], v[29:30], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_fma_f64 v[25:26], v[27:28], s[10:11], v[25:26]
	v_add_f64 v[23:24], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	v_fma_f64 v[25:26], v[27:28], s[8:9], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[32:33], v[25:26]
	v_add_f64 v[29:30], v[23:24], -v[32:33]
	v_cvt_i32_f64_e32 v32, v[27:28]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[29:30]
.LBB0_14:                               ; %_ZL3cosd.exit79
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr27_vgpr28
                                        ; implicit-def: $vgpr29_vgpr30
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v49, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v28, v31, v22 :: v_dual_cndmask_b32 v27, v0, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[29:30], v[19:20], v[27:28]
	v_mul_f64 v[33:34], v[17:18], v[27:28]
	v_mul_f64 v[45:46], v[15:16], v[27:28]
	v_fma_f64 v[35:36], v[19:20], v[27:28], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[17:18], v[27:28], -v[33:34]
	v_fma_f64 v[27:28], v[15:16], v[27:28], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[33:34], v[35:36]
	v_add_f64 v[39:40], v[37:38], -v[33:34]
	v_add_f64 v[43:44], v[29:30], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[37:38], -v[39:40]
	v_add_f64 v[35:36], v[35:36], -v[39:40]
	v_ldexp_f64 v[39:40], v[43:44], -2
	v_add_f64 v[29:30], v[43:44], -v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[33:34], -v[41:42]
	v_add_f64 v[41:42], v[45:46], v[47:48]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[39:40]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[37:38], -v[29:30]
	v_add_f64 v[33:34], v[35:36], v[33:34]
	v_fract_f64_e32 v[35:36], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[41:42], v[33:34]
	v_dual_cndmask_b32 v36, 0, v36 :: v_dual_cndmask_b32 v35, 0, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[35:36], v[35:36], 2
	v_add_f64 v[39:40], v[29:30], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[39:40], v[35:36]
	v_add_f64 v[29:30], v[39:40], -v[29:30]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[43:44]
	v_add_f64 v[43:44], v[41:42], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[37:38], -v[29:30]
	v_cndmask_b32_e64 v50, 0, 0x40100000, vcc_lo
	v_add_f64 v[54:55], v[41:42], -v[43:44]
	v_add_f64 v[43:44], v[47:48], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[35:36], v[49:50]
	v_add_f64 v[50:51], v[37:38], -v[41:42]
	v_add_f64 v[47:48], v[45:46], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[52:53], v[39:40], v[35:36]
	v_add_f64 v[56:57], v[37:38], -v[50:51]
	v_add_f64 v[33:34], v[33:34], -v[50:51]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[43:44], v[47:48]
	v_cvt_i32_f64_e32 v52, v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], -v[56:57]
	v_cvt_f64_i32_e32 v[50:51], v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], v[41:42]
	v_add_f64 v[35:36], v[35:36], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[43:44], v[33:34]
	v_add_f64 v[41:42], v[39:40], v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], v[33:34]
	v_add_f64 v[33:34], v[41:42], -v[35:36]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[29:30], v[27:28]
	v_add_f64 v[29:30], v[39:40], -v[33:34]
	v_cndmask_b32_e64 v50, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v33, s0, 0, v52, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[27:28], v[29:30]
	v_add_f64 v[29:30], v[41:42], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[29:30], v[27:28]
	v_mul_f64 v[36:37], v[34:35], s[8:9]
	v_add_f64 v[29:30], v[34:35], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[8:9], -v[36:37]
	v_add_f64 v[27:28], v[27:28], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[34:35], s[10:11], v[38:39]
	v_fma_f64 v[29:30], v[27:28], s[8:9], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[36:37], v[29:30]
	v_add_f64 v[34:35], v[27:28], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[34:35]
.LBB0_16:                               ; %Flow151
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_18
; %bb.17:
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[27:28], |v[0:1]|, s[8:9]
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[33:34], v[27:28]
	v_fma_f64 v[27:28], v[33:34], s[8:9], |v[0:1]|
	v_mul_f64 v[29:30], v[33:34], s[10:11]
	s_mov_b32 s8, 0x252049c0
	s_mov_b32 s9, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[37:38], v[33:34], s[10:11], v[27:28]
	v_add_f64 v[35:36], v[27:28], v[29:30]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[27:28], -v[35:36]
	v_add_f64 v[35:36], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], v[29:30]
	v_fma_f64 v[29:30], v[33:34], s[10:11], v[29:30]
	v_add_f64 v[27:28], v[35:36], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[27:28], -v[29:30]
	v_fma_f64 v[29:30], v[33:34], s[8:9], v[27:28]
	v_cvt_i32_f64_e32 v33, v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[37:38], v[29:30]
	v_add_f64 v[35:36], v[27:28], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[35:36]
.LBB0_18:                               ; %_ZL3sind.exit84
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[34:35], v[23:24], v[23:24]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s8, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s9, 0x3de5e0b2
	v_mul_f64 v[38:39], v[27:28], v[27:28]
	s_mov_b32 s10, 0x9037ab78
	s_mov_b32 s12, 0x46cc5e42
	s_mov_b32 s14, 0x796cde01
	s_mov_b32 s11, 0x3e21eeb6
	s_mov_b32 s13, 0xbda907db
	s_mov_b32 s15, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[52:53], v[25:26], 0.5
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x1f8
	v_fma_f64 v[36:37], v[34:35], s[8:9], s[0:1]
	v_fma_f64 v[40:41], v[34:35], s[12:13], s[10:11]
	v_mul_f64 v[42:43], v[34:35], 0.5
	v_mul_f64 v[54:55], v[23:24], -v[34:35]
	v_mul_f64 v[62:63], v[34:35], v[34:35]
	v_fma_f64 v[44:45], v[38:39], s[8:9], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s8, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s9, 0xbf2a01a0
	v_fma_f64 v[48:49], v[38:39], s[12:13], s[10:11]
	v_mul_f64 v[50:51], v[38:39], 0.5
	s_mov_b32 s10, 0x19f4ec90
	s_mov_b32 s12, 0x11110bb3
	s_mov_b32 s11, 0x3efa01a0
	s_mov_b32 s13, 0x3f811111
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[14:15]
	v_fma_f64 v[40:41], v[34:35], v[40:41], s[0:1]
	v_add_f64 v[46:47], -v[42:43], 1.0
	v_fma_f64 v[44:45], v[38:39], v[44:45], s[14:15]
	v_fma_f64 v[48:49], v[38:39], v[48:49], s[0:1]
	v_add_f64 v[58:59], -v[50:51], 1.0
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[8:9]
	v_fma_f64 v[40:41], v[34:35], v[40:41], s[10:11]
	v_add_f64 v[56:57], -v[46:47], 1.0
	v_fma_f64 v[44:45], v[38:39], v[44:45], s[8:9]
	s_mov_b32 s8, 0x55555555
	s_mov_b32 s9, 0x3fa55555
	v_fma_f64 v[48:49], v[38:39], v[48:49], s[10:11]
	v_add_f64 v[60:61], -v[58:59], 1.0
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[12:13]
	v_fma_f64 v[40:41], v[34:35], v[40:41], s[0:1]
	v_add_f64 v[42:43], v[56:57], -v[42:43]
	v_mul_f64 v[56:57], v[27:28], -v[38:39]
	v_fma_f64 v[44:45], v[38:39], v[44:45], s[12:13]
	v_fma_f64 v[36:37], v[54:55], v[36:37], v[52:53]
	v_mul_f64 v[52:53], v[29:30], 0.5
	v_fma_f64 v[40:41], v[34:35], v[40:41], s[8:9]
	v_fma_f64 v[42:43], v[23:24], -v[25:26], v[42:43]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[25:26], v[34:35], v[36:37], -v[25:26]
	v_fma_f64 v[34:35], v[38:39], v[48:49], s[0:1]
	v_add_f64 v[36:37], v[60:61], -v[50:51]
	v_fma_f64 v[44:45], v[56:57], v[44:45], v[52:53]
	s_mov_b32 s1, 0xbfc55555
	s_mov_b32 s0, s8
	v_fma_f64 v[40:41], v[62:63], v[40:41], v[42:43]
	v_mul_f64 v[42:43], v[38:39], v[38:39]
	v_fma_f64 v[25:26], v[54:55], s[0:1], v[25:26]
	v_fma_f64 v[34:35], v[38:39], v[34:35], s[8:9]
	v_fma_f64 v[36:37], v[27:28], -v[29:30], v[36:37]
	v_fma_f64 v[29:30], v[38:39], v[44:45], -v[29:30]
	v_add_f64 v[38:39], v[46:47], v[40:41]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[42:43], v[34:35], v[36:37]
	v_fma_f64 v[29:30], v[56:57], s[0:1], v[29:30]
	v_and_b32_e32 v34, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v34
	v_cndmask_b32_e64 v34, v23, v38, s0
	v_xor_b32_e32 v35, 0x80000000, v24
	v_lshlrev_b32_e32 v32, 30, v32
	v_add_f64 v[23:24], v[58:59], v[25:26]
	v_add_f64 v[25:26], v[27:28], -v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v27, v35, v39, s0
	v_and_b32_e32 v28, 0x80000000, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v28, v27, v28
	v_cndmask_b32_e32 v27, 0, v34, vcc_lo
	v_cndmask_b32_e32 v28, 0x7ff80000, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], v[13:14], v[27:28], v[9:10]
	v_and_b32_e32 v13, 1, v33
	v_lshlrev_b32_e32 v14, 30, v33
	v_cmp_eq_u32_e64 s0, 0, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v13, v14, v1
	v_and_b32_e32 v13, 0x80000000, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, v23, v25, s0
	v_cndmask_b32_e64 v23, v24, v26, s0
	v_xor_b32_e32 v23, v23, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v13, 0, v14, vcc_lo
	v_cndmask_b32_e32 v14, 0x7ff80000, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[11:12], v[13:14], v[9:10]
	v_mov_b32_e32 v9, 0
                                        ; implicit-def: $vgpr14
	v_lshlrev_b64 v[10:11], 3, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v23, s0, s4, v10
	v_add_co_ci_u32_e64 v24, s0, s5, v11, s0
	global_store_b64 v[23:24], v[12:13], off
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $vgpr23_vgpr24
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_cmp_le_f64_e64 s0, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v42, v9
	v_mov_b32_e32 v8, v9
	s_mov_b32 s4, 0x33145c07
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v13, v31, v22, s0
	v_cndmask_b32_e64 v12, v0, v21, s0
	v_mul_f64 v[23:24], v[19:20], v[12:13]
	v_mul_f64 v[25:26], v[17:18], v[12:13]
	v_mul_f64 v[38:39], v[15:16], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], v[19:20], v[12:13], -v[23:24]
	v_fma_f64 v[40:41], v[17:18], v[12:13], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[15:16], v[12:13], -v[38:39]
	v_add_f64 v[29:30], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[29:30], -v[25:26]
	v_add_f64 v[36:37], v[23:24], v[29:30]
	v_add_f64 v[34:35], v[29:30], -v[32:33]
	v_add_f64 v[27:28], v[27:28], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[32:33], v[36:37], -2
	v_add_f64 v[23:24], v[36:37], -v[23:24]
	v_add_f64 v[25:26], v[25:26], -v[34:35]
	v_add_f64 v[34:35], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[32:33]|
	v_add_f64 v[23:24], v[29:30], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[27:28], v[25:26]
	v_fract_f64_e32 v[27:28], v[32:33]
	v_add_f64 v[29:30], v[34:35], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v28, 0, v28, s0
	v_cndmask_b32_e64 v27, 0, v27, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[27:28], v[27:28], 2
	v_add_f64 v[32:33], v[23:24], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[32:33], v[27:28]
	v_add_f64 v[23:24], v[32:33], -v[23:24]
	v_cmp_gt_f64_e64 s0, 0, v[36:37]
	v_add_f64 v[36:37], v[34:35], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[29:30], -v[23:24]
	v_cndmask_b32_e64 v43, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[46:47], v[34:35], -v[36:37]
	v_add_f64 v[36:37], v[40:41], -v[36:37]
	v_add_f64 v[27:28], v[27:28], v[42:43]
	v_add_f64 v[42:43], v[29:30], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[38:39], -v[46:47]
	v_add_f64 v[44:45], v[32:33], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[29:30], -v[42:43]
	v_add_f64 v[25:26], v[25:26], -v[42:43]
	v_add_f64 v[36:37], v[36:37], v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v14, v[44:45]
	v_add_f64 v[34:35], v[34:35], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[42:43], v14
	v_add_f64 v[25:26], v[25:26], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], -v[42:43]
	v_add_f64 v[25:26], v[36:37], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[32:33], v[27:28]
	v_add_f64 v[12:13], v[12:13], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[34:35], -v[27:28]
	v_cmp_le_f64_e64 s0, 0.5, v[34:35]
	v_add_f64 v[12:13], v[23:24], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[32:33], -v[25:26]
	v_cndmask_b32_e64 v9, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v14, s1, 0, v14, s0
	s_mov_b32 s0, 0x54442d18
	s_mov_b32 s1, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[34:35], -v[8:9]
	v_add_f64 v[12:13], v[12:13], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[8:9], v[12:13]
	v_mul_f64 v[25:26], v[23:24], s[0:1]
	v_add_f64 v[8:9], v[23:24], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], v[23:24], s[0:1], -v[25:26]
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[23:24], s[4:5], v[27:28]
	v_fma_f64 v[8:9], v[8:9], s[0:1], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[25:26], v[8:9]
	v_add_f64 v[23:24], v[12:13], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[23:24], v[8:9], -v[23:24]
.LBB0_20:                               ; %Flow150
	s_and_not1_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_22
; %bb.21:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[8:9], |v[0:1]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[8:9]
	v_fma_f64 v[12:13], v[8:9], s[4:5], |v[0:1]|
	v_mul_f64 v[23:24], v[8:9], s[8:9]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v14, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], v[8:9], s[8:9], v[12:13]
	v_add_f64 v[25:26], v[12:13], v[23:24]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[25:26]
	v_add_f64 v[25:26], v[25:26], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[23:24]
	v_fma_f64 v[23:24], v[8:9], s[8:9], v[23:24]
	v_add_f64 v[12:13], v[25:26], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[23:24]
	v_fma_f64 v[23:24], v[8:9], s[4:5], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[27:28], v[23:24]
	v_add_f64 v[25:26], v[12:13], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[25:26]
.LBB0_22:                               ; %_ZL3cosd.exit89
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr25_vgpr26
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.23:
	v_cmp_le_f64_e64 s0, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v37, 0
	s_mov_b32 s4, 0x33145c07
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, v31, v22, s0
	v_cndmask_b32_e64 v8, v0, v21, s0
	v_mul_f64 v[21:22], v[19:20], v[8:9]
	v_mul_f64 v[25:26], v[17:18], v[8:9]
	v_mul_f64 v[35:36], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[19:20], v[8:9], -v[21:22]
	v_fma_f64 v[17:18], v[17:18], v[8:9], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[15:16], v[8:9], -v[35:36]
	v_add_f64 v[27:28], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[27:28], -v[25:26]
	v_add_f64 v[33:34], v[21:22], v[27:28]
	v_add_f64 v[31:32], v[27:28], -v[29:30]
	v_add_f64 v[19:20], v[19:20], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[29:30], v[33:34], -2
	v_add_f64 v[21:22], v[33:34], -v[21:22]
	v_add_f64 v[25:26], v[25:26], -v[31:32]
	v_add_f64 v[31:32], v[35:36], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[29:30]|
	v_add_f64 v[21:22], v[27:28], -v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[25:26]
	v_fract_f64_e32 v[25:26], v[29:30]
	v_add_f64 v[27:28], v[31:32], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, 0, v26, s0
	v_cndmask_b32_e64 v25, 0, v25, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[25:26], v[25:26], 2
	v_add_f64 v[29:30], v[21:22], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[29:30], v[25:26]
	v_add_f64 v[15:16], v[29:30], -v[21:22]
	v_cmp_gt_f64_e64 s0, 0, v[33:34]
	v_add_f64 v[33:34], v[31:32], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[27:28], -v[15:16]
	v_cndmask_b32_e64 v38, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[31:32], -v[33:34]
	v_add_f64 v[17:18], v[17:18], -v[33:34]
	v_add_f64 v[25:26], v[25:26], v[37:38]
	v_add_f64 v[38:39], v[27:28], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[35:36], -v[42:43]
	v_add_f64 v[40:41], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[27:28], -v[38:39]
	v_add_f64 v[19:20], v[19:20], -v[38:39]
	v_add_f64 v[17:18], v[17:18], v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v40, v[40:41]
	v_add_f64 v[31:32], v[31:32], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[38:39], v40
	v_add_f64 v[19:20], v[19:20], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[38:39]
	v_add_f64 v[17:18], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[29:30], v[25:26]
	v_add_f64 v[8:9], v[8:9], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[19:20], -v[25:26]
	v_cmp_le_f64_e64 s0, 0.5, v[19:20]
	v_add_f64 v[8:9], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[29:30], -v[17:18]
	v_cndmask_b32_e64 v38, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v27, s1, 0, v40, s0
	s_mov_b32 s0, 0x54442d18
	s_mov_b32 s1, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], v[15:16]
	v_add_f64 v[15:16], v[19:20], -v[37:38]
	v_add_f64 v[17:18], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[19:20], v[17:18], s[0:1]
	v_add_f64 v[15:16], v[17:18], -v[15:16]
	v_fma_f64 v[21:22], v[17:18], s[0:1], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[15:16]
	v_fma_f64 v[15:16], v[17:18], s[4:5], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[8:9], s[0:1], v[15:16]
	v_add_f64 v[8:9], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[8:9], -v[19:20]
	v_add_f64 v[25:26], v[15:16], -v[17:18]
.LBB0_24:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_26
; %bb.25:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s5, 0xbc91a626
	v_mul_f64 v[8:9], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s4, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[8:9]
	v_fma_f64 v[8:9], v[15:16], s[2:3], |v[0:1]|
	v_mul_f64 v[17:18], v[15:16], s[4:5]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	v_cvt_i32_f64_e32 v27, v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[15:16], s[4:5], v[8:9]
	v_add_f64 v[19:20], v[8:9], v[17:18]
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[19:20]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[17:18]
	v_fma_f64 v[17:18], v[15:16], s[4:5], v[17:18]
	v_add_f64 v[8:9], v[19:20], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[17:18]
	v_fma_f64 v[17:18], v[15:16], s[2:3], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[21:22], v[17:18]
	v_add_f64 v[19:20], v[8:9], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[17:18], -v[19:20]
.LBB0_26:                               ; %_ZL3sind.exit94
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[15:16], v[12:13], v[12:13]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	v_mul_f64 v[19:20], v[8:9], v[8:9]
	s_mov_b32 s4, 0x796cde01
	s_mov_b32 s5, 0x3ec71de3
	s_mov_b32 s8, 0x9037ab78
	s_mov_b32 s10, 0x46cc5e42
	s_mov_b32 s9, 0x3e21eeb6
	s_mov_b32 s11, 0xbda907db
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[38:39], v[23:24], 0.5
	v_mul_f64 v[46:47], v[25:26], 0.5
	v_and_b32_e32 v0, 1, v14
	v_fma_f64 v[17:18], v[15:16], s[2:3], s[0:1]
	v_fma_f64 v[21:22], v[15:16], s[10:11], s[8:9]
	v_mul_f64 v[30:31], v[15:16], 0.5
	v_mul_f64 v[40:41], v[12:13], -v[15:16]
	v_fma_f64 v[28:29], v[19:20], s[2:3], s[0:1]
	s_mov_b32 s0, 0x19e83e5c
	s_mov_b32 s1, 0xbf2a01a0
	s_mov_b32 s2, 0xa17f65f6
	s_mov_b32 s3, 0xbe927e4f
	v_mul_f64 v[32:33], v[19:20], 0.5
	v_fma_f64 v[34:35], v[19:20], s[10:11], s[8:9]
	s_mov_b32 s8, 0x11110bb3
	s_mov_b32 s9, 0x3f811111
	v_mul_f64 v[48:49], v[8:9], -v[19:20]
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[4:5]
	v_fma_f64 v[21:22], v[15:16], v[21:22], s[2:3]
	v_add_f64 v[36:37], -v[30:31], 1.0
	v_fma_f64 v[28:29], v[19:20], v[28:29], s[4:5]
	s_mov_b32 s4, 0x19f4ec90
	s_mov_b32 s5, 0x3efa01a0
	v_add_f64 v[42:43], -v[32:33], 1.0
	v_fma_f64 v[34:35], v[19:20], v[34:35], s[2:3]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fa55555
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[0:1]
	v_fma_f64 v[21:22], v[15:16], v[21:22], s[4:5]
	v_add_f64 v[44:45], -v[36:37], 1.0
	v_fma_f64 v[28:29], v[19:20], v[28:29], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	v_fma_f64 v[34:35], v[19:20], v[34:35], s[4:5]
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[8:9]
	v_fma_f64 v[21:22], v[15:16], v[21:22], s[0:1]
	v_add_f64 v[30:31], v[44:45], -v[30:31]
	v_mul_f64 v[44:45], v[15:16], v[15:16]
	v_fma_f64 v[28:29], v[19:20], v[28:29], s[8:9]
	v_fma_f64 v[34:35], v[19:20], v[34:35], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_mov_b32 s0, s2
	v_fma_f64 v[17:18], v[40:41], v[17:18], v[38:39]
	v_add_f64 v[38:39], -v[42:43], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[15:16], v[17:18], -v[23:24]
	v_add_f64 v[32:33], v[38:39], -v[32:33]
	v_fma_f64 v[15:16], v[15:16], v[21:22], s[2:3]
	v_fma_f64 v[21:22], v[48:49], v[28:29], v[46:47]
	v_fma_f64 v[23:24], v[12:13], -v[23:24], v[30:31]
	v_mul_f64 v[28:29], v[19:20], v[19:20]
	v_fma_f64 v[30:31], v[19:20], v[34:35], s[2:3]
	v_fma_f64 v[17:18], v[40:41], s[0:1], v[17:18]
	v_fma_f64 v[32:33], v[8:9], -v[25:26], v[32:33]
	v_fma_f64 v[19:20], v[19:20], v[21:22], -v[25:26]
	v_fma_f64 v[15:16], v[44:45], v[15:16], v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[17:18]
	v_fma_f64 v[17:18], v[28:29], v[30:31], v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[48:49], s[0:1], v[19:20]
	v_add_f64 v[15:16], v[36:37], v[15:16]
	v_cmp_eq_u32_e64 s0, 0, v0
	v_lshlrev_b32_e32 v0, 30, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_and_b32_e32 v0, 0x80000000, v0
	v_xor_b32_e32 v21, 0x80000000, v13
	v_add_f64 v[13:14], v[42:43], v[17:18]
	v_add_f64 v[8:9], v[8:9], -v[19:20]
	v_cndmask_b32_e64 v12, v12, v15, s0
	v_cndmask_b32_e64 v15, v21, v16, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v15, v0
	v_cndmask_b32_e32 v15, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v16, 0x7ff80000, v0, vcc_lo
	v_and_b32_e32 v0, 1, v27
	v_fma_f64 v[4:5], v[4:5], v[15:16], v[6:7]
	v_lshlrev_b32_e32 v6, 30, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s0, 0, v0
	v_xor_b32_e32 v0, v6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v0, 0x80000000, v0
	v_cndmask_b32_e64 v6, v14, v9, s0
	v_cndmask_b32_e64 v1, v13, v8, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v6, v6, v0
	v_cndmask_b32_e32 v0, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0x7ff80000, v6, vcc_lo
	v_fma_f64 v[0:1], v[2:3], v[0:1], v[4:5]
	v_add_co_u32 v2, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v11, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7FFTCalcPdS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 64
		.amdhsa_next_free_sgpr 60
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7FFTCalcPdS_S_S_, .Lfunc_end0-_Z7FFTCalcPdS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 8228
; NumSgprs: 62
; NumVgprs: 64
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 62
; NumVGPRsForWavesPerEU: 64
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7FFTCalcPdS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     62
    .sgpr_spill_count: 0
    .symbol:         _Z7FFTCalcPdS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     64
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
