#include <iostream>
#include <algorithm>
#include <cstdlib>
#include <ctime>
#include <cuda.h>
#include <stdio.h>
#include <cassert>
//define the chunk sizes that each threadblock will work on
#define BLKXSIZE 32
#define BLKYSIZE 4
#define BLKZSIZE 4
#define Q 19
#define lx 10
#define ly 10
#define lz 5

// for cuda error checking
#define cudaCheckErrors(msg) \
    do { \
        cudaError_t __err = cudaGetLastError(); \
        if (__err != cudaSuccess) { \
            fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
                msg, cudaGetErrorString(__err), \
                __FILE__, __LINE__); \
            fprintf(stderr, "*** FAILED - ABORTING\n"); \
            return 1; \
        } \
    } while (0)

template <typename T> __device__ void swap ( T& a, T& b )
{
  T c(a); a=b; b=c;
}

template <typename Ttype>
Ttype**** create_4d_harray() {
  Ttype**** array;
  array = new Ttype***[lx];
  assert(array != nullptr);
  
  array[0] = (Ttype***)malloc(sizeof(Ttype)*lx*ly*lz*Q);
  for (int i = 1; i < lx; i++) {//from i=0 to i=1;
    // array[i] = new Ttype**[ly];
    array[i] = array[i-1] + ly*lz*Q;
    assert(array[i] != nullptr);
    array[i][0] = (Ttype**)malloc(sizeof(Ttype)*ly*lz*Q);
    for (int j = 1; j < ly; j++) {
      //array[i][j] = new Ttype*[lz];
      array[i][j] = array[i][j-1] + lz*Q;
      assert(array[i][j] != nullptr);
      array[i][j][0] = (Ttype*)malloc(sizeof(Ttype)*Q);
      for (int k = 1; k < lz; k++) {
        //array[i][j][k] = new Ttype[n];  
        array[i][j][k] = array[i][j][k-1]+ Q;
        assert(array[i][j][k] != nullptr);
      }
    }
  }
  return array;
}

template <typename Ttype>
void free_4d_harray(Ttype**** array) {
  for (size_t i = 0; i < lx; ++i) {
    for (size_t j = 0; j < ly; ++j) {
      for (size_t k = 0; k < lz; ++k) {
        delete[] array[i][j][k];
      }
      delete[] array[i][j];
    }
    delete[] array[i];
  }
  delete[] array;
}


template <typename Ttype>
Ttype (*create_4d_darray())[ly][lz][Q] {
  // const int d_lx = lx, d_ly = ly, d_lz = lz, d_n = n;
  //Ttype array_4d[lx][ly][lz][Q];
  //typedef Ttype array_4d[ly][lz][Q];
  //array_4d* dptr_4d_array;
  Ttype(*dptr_4d_array)[ly][lz][Q];
  cudaMalloc((void**)&dptr_4d_array,
             (lx * ly * lz * Q) * sizeof(Ttype));
  return dptr_4d_array;
}

__global__ void gpu_array_swap(int ptr_gpu[][ly][lz][Q]) {
  // int thread_id = thread_idx(grid_dim, block_dim);
  unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
  unsigned idy = blockIdx.y * blockDim.y + threadIdx.y;
  unsigned idz = blockIdx.z * blockDim.z + threadIdx.z;
  if ((idx < lx) && (idy < ly) && (idz < lz)) {
    for (size_t i = 1; i <= 9; i++)
          swap(ptr_gpu[idx][idy][idz][i], ptr_gpu[idx][idy][idz][i + 9]);
  }
}

void set_array(int**** array) {
  int m = 0;
  for (int l = 0; l < Q; ++l) {
    for (int i = 0; i < lz; ++i) {
      for (int j = 0; j < ly; ++j) {
        for (int k = 0; k < lx; ++k) {
          array[i][j][k][l] = ++m;
        }
      }
    }
  }
}

void print_array(int**** array) {
  for (int i = 0; i < lx; ++i) {
    for (int j = 0; j < ly; ++j) {
      for (int k = 0; k < lz; ++k) {
        for (int l = 0; l < Q; ++l) {
          std::cout << array[i][j][k][l] << "  ";
          if (l == (Q - 1)) std::cout << std::endl;
        }
      }
    }
  }
}

int main() {

  //int lx=10,ly=10,lz=5,Q=19;
  int**** host_4d_array=create_4d_harray<int>();
  int(* device_4d_array)[ly][lz][Q]=create_4d_darray<int>();
  
  const dim3 blockSize(BLKXSIZE, BLKYSIZE, BLKZSIZE);
  const dim3 gridSize(((lx + BLKXSIZE - 1) / BLKXSIZE),
                      ((ly + BLKYSIZE - 1) / BLKYSIZE),
                      ((lz + BLKZSIZE - 1) / BLKZSIZE));

  set_array(host_4d_array);
  print_array(host_4d_array);
  
  // allocate GPU device buffers

  cudaCheckErrors("Failed to allocate device buffer");
  cudaMemcpy(device_4d_array, host_4d_array, (lx * ly * lz * Q) * sizeof(int),
             cudaMemcpyHostToDevice);
  
  // compute result
  gpu_array_swap<<<gridSize, blockSize>>>(device_4d_array);
  cudaCheckErrors("Kernel launch failure");
  // copy output data back to host

  cudaMemcpy(host_4d_array, device_4d_array, ((lx * ly * lz * Q) * sizeof(int)),
             cudaMemcpyDeviceToHost);
  cudaCheckErrors("CUDA memcpy failure");
  free_4d_harray(host_4d_array);
  cudaFree(device_4d_array);
  cudaCheckErrors("cudaFree fail");
  return 0;
}

	.file	"tmpxft_0024cc39_00000000-6_template_array_swap.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3898:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3898:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9set_arrayPPPPi
	.type	_Z9set_arrayPPPPi, @function
_Z9set_arrayPPPPi:
.LFB3893:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
.L3:
	imull	$125, %eax, %r8d
	xorl	%ecx, %ecx
.L9:
	movq	(%rdi,%rcx,8), %r10
	movl	%r8d, %r9d
	movl	$1, %esi
.L7:
	movq	-8(%r10,%rsi,8), %r11
	movl	$1, %edx
.L4:
	movq	-8(%r11,%rdx,8), %r14
	leal	(%r9,%rdx), %ebx
	incq	%rdx
	movl	%ebx, (%r14,%rax)
	cmpq	$11, %rdx
	jne	.L4
	incq	%rsi
	addl	$10, %r9d
	cmpq	$11, %rsi
	jne	.L7
	incq	%rcx
	addl	$100, %r8d
	cmpq	$5, %rcx
	jne	.L9
	addq	$4, %rax
	cmpq	$76, %rax
	jne	.L3
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3893:
	.size	_Z9set_arrayPPPPi, .-_Z9set_arrayPPPPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"  "
	.text
	.globl	_Z11print_arrayPPPPi
	.type	_Z11print_arrayPPPPi, @function
_Z11print_arrayPPPPi:
.LFB3894:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	_ZSt4cout(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rdx
	.cfi_def_cfa_offset 64
.L14:
	xorl	%ebx, %ebx
.L21:
	xorl	%r12d, %r12d
.L19:
	xorl	%r13d, %r13d
.L16:
	movq	(%r14,%rbp,8), %rax
	movq	%r15, %rdi
	movq	(%rax,%rbx), %rax
	movq	(%rax,%r12), %rax
	movl	(%rax,%r13,4), %esi
	call	_ZNSolsEi@PLT
	movl	$2, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	cmpq	$18, %r13
	je	.L15
	incq	%r13
	jmp	.L16
.L15:
	movq	%r15, %rdi
	addq	$8, %r12
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$40, %r12
	jne	.L19
	addq	$8, %rbx
	cmpq	$80, %rbx
	jne	.L21
	incq	%rbp
	cmpq	$10, %rbp
	jne	.L14
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3894:
	.size	_Z11print_arrayPPPPi, .-_Z11print_arrayPPPPi
	.globl	_Z45__device_stub__Z14gpu_array_swapPA10_A5_A19_iPA10_A5_A19_i
	.type	_Z45__device_stub__Z14gpu_array_swapPA10_A5_A19_iPA10_A5_A19_i, @function
_Z45__device_stub__Z14gpu_array_swapPA10_A5_A19_iPA10_A5_A19_i:
.LFB3920:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z14gpu_array_swapPA10_A5_A19_i(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L23:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3920:
	.size	_Z45__device_stub__Z14gpu_array_swapPA10_A5_A19_iPA10_A5_A19_i, .-_Z45__device_stub__Z14gpu_array_swapPA10_A5_A19_iPA10_A5_A19_i
	.globl	_Z14gpu_array_swapPA10_A5_A19_i
	.type	_Z14gpu_array_swapPA10_A5_A19_i, @function
_Z14gpu_array_swapPA10_A5_A19_i:
.LFB3921:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z14gpu_array_swapPA10_A5_A19_iPA10_A5_A19_i
	.cfi_endproc
.LFE3921:
	.size	_Z14gpu_array_swapPA10_A5_A19_i, .-_Z14gpu_array_swapPA10_A5_A19_i
	.section	.rodata.str1.1
.LC1:
	.string	"_Z14gpu_array_swapPA10_A5_A19_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3923:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14gpu_array_swapPA10_A5_A19_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3923:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._Z16create_4d_harrayIiEPPPPT_v,"axG",@progbits,_Z16create_4d_harrayIiEPPPPT_v,comdat
	.weak	_Z16create_4d_harrayIiEPPPPT_v
	.type	_Z16create_4d_harrayIiEPPPPT_v, @function
_Z16create_4d_harrayIiEPPPPT_v:
.LFB4226:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$80, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	_Znam@PLT
	movl	$38000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rax, (%rbx)
.L33:
	movq	(%rbx,%rbp), %r13
	movl	$3800, %edi
	xorl	%r12d, %r12d
	leaq	7600(%r13), %rax
	movq	%rax, 8(%rbx,%rbp)
	call	malloc@PLT
	movq	%rax, 7600(%r13)
.L32:
	movq	7600(%r13,%r12), %r14
	movl	$76, %edi
	leaq	760(%r14), %rax
	movq	%rax, 7608(%r13,%r12)
	call	malloc@PLT
	movq	%rax, 760(%r14)
	xorl	%eax, %eax
.L31:
	movq	760(%r14,%rax), %rcx
	leaq	76(%rcx), %rdx
	movq	%rdx, 768(%r14,%rax)
	addq	$8, %rax
	cmpq	$32, %rax
	jne	.L31
	addq	$8, %r12
	cmpq	$72, %r12
	jne	.L32
	addq	$8, %rbp
	cmpq	$72, %rbp
	jne	.L33
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4226:
	.size	_Z16create_4d_harrayIiEPPPPT_v, .-_Z16create_4d_harrayIiEPPPPT_v
	.section	.text._Z14free_4d_harrayIiEvPPPPT_,"axG",@progbits,_Z14free_4d_harrayIiEvPPPPT_,comdat
	.weak	_Z14free_4d_harrayIiEvPPPPT_
	.type	_Z14free_4d_harrayIiEvPPPPT_, @function
_Z14free_4d_harrayIiEvPPPPT_:
.LFB4228:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L39:
	xorl	%r12d, %r12d
.L46:
	xorl	%r13d, %r13d
.L41:
	movq	(%rbx,%rbp,8), %rax
	movq	(%rax,%r12), %rax
	movq	(%rax,%r13), %rdi
	testq	%rdi, %rdi
	je	.L40
	call	_ZdaPv@PLT
.L40:
	addq	$8, %r13
	cmpq	$40, %r13
	jne	.L41
	movq	(%rbx,%rbp,8), %rax
	movq	(%rax,%r12), %rdi
	testq	%rdi, %rdi
	je	.L42
	call	_ZdaPv@PLT
.L42:
	addq	$8, %r12
	cmpq	$80, %r12
	jne	.L46
	movq	(%rbx,%rbp,8), %rdi
	testq	%rdi, %rdi
	je	.L44
	call	_ZdaPv@PLT
.L44:
	incq	%rbp
	cmpq	$10, %rbp
	jne	.L39
	popq	%rax
	.cfi_def_cfa_offset 40
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_ZdaPv@PLT
	.cfi_endproc
.LFE4228:
	.size	_Z14free_4d_harrayIiEvPPPPT_, .-_Z14free_4d_harrayIiEvPPPPT_
	.section	.rodata.str1.1
.LC2:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/Amber1995/qiuyu/master/cuda_test/template_array_swap.cu"
.LC3:
	.string	"Failed to allocate device buffer"
.LC4:
	.string	"Fatal error: %s (%s at %s:%d)\n"
.LC5:
	.string	"*** FAILED - ABORTING\n"
.LC6:
	.string	"Kernel launch failure"
.LC7:
	.string	"CUDA memcpy failure"
.LC8:
	.string	"cudaFree fail"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3895:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Z16create_4d_harrayIiEPPPPT_v
	movl	$38000, %esi
	leaq	24(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	$536870913, %eax
	movq	%rbx, %rdi
	movq	24(%rsp), %rbp
	salq	$5, %rax
	movl	$4, 20(%rsp)
	movq	%rax, 12(%rsp)
	movabsq	$12884901889, %rax
	movq	%rax, 24(%rsp)
	movl	$2, 32(%rsp)
	call	_Z9set_arrayPPPPi
	call	_Z11print_arrayPPPPi
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L59
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rcx
	pushq	%r9
	.cfi_remember_state
	.cfi_def_cfa_offset 88
	movq	%rax, %r8
	leaq	.LC2(%rip), %r9
	pushq	$142
	.cfi_def_cfa_offset 96
	jmp	.L69
.L59:
	.cfi_restore_state
	movl	$1, %ecx
	movl	$38000, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	20(%rsp), %ecx
	movl	32(%rsp), %esi
	xorl	%r9d, %r9d
	movq	12(%rsp), %rdx
	movq	24(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movq	%rbp, %rdi
	call	_Z45__device_stub__Z14gpu_array_swapPA10_A5_A19_iPA10_A5_A19_i
.L61:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L62
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r9
	leaq	.LC6(%rip), %rcx
	pushq	%rdi
	.cfi_def_cfa_offset 88
	movq	%rax, %r8
	pushq	$148
	.cfi_def_cfa_offset 96
.L69:
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	stderr(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 88
	xorl	%eax, %eax
	popq	%rsi
	.cfi_def_cfa_offset 80
	leaq	.LC5(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %eax
	jmp	.L58
.L62:
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$38000, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L64
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r9
	leaq	.LC7(%rip), %rcx
	pushq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 88
	movq	%rax, %r8
	pushq	$153
	.cfi_def_cfa_offset 96
	jmp	.L69
.L64:
	.cfi_restore_state
	movq	%rbx, %rdi
	call	_Z14free_4d_harrayIiEvPPPPT_
	movq	%rbp, %rdi
	call	cudaFree@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	xorl	%eax, %eax
	testl	%edi, %edi
	je	.L58
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r9
	leaq	.LC8(%rip), %rcx
	movq	%rax, %r8
	pushq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 88
	pushq	$156
	.cfi_def_cfa_offset 96
	jmp	.L69
.L58:
	.cfi_restore_state
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L65
	call	__stack_chk_fail@PLT
.L65:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3895:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <algorithm>
#include <cstdlib>
#include <ctime>
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <cassert>
//define the chunk sizes that each threadblock will work on
#define BLKXSIZE 32
#define BLKYSIZE 4
#define BLKZSIZE 4
#define Q 19
#define lx 10
#define ly 10
#define lz 5

// for cuda error checking
#define cudaCheckErrors(msg) \
    do { \
        hipError_t __err = hipGetLastError(); \
        if (__err != hipSuccess) { \
            fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
                msg, hipGetErrorString(__err), \
                __FILE__, __LINE__); \
            fprintf(stderr, "*** FAILED - ABORTING\n"); \
            return 1; \
        } \
    } while (0)

template <typename T> __device__ void swap ( T& a, T& b )
{
  T c(a); a=b; b=c;
}

template <typename Ttype>
Ttype**** create_4d_harray() {
  Ttype**** array;
  array = new Ttype***[lx];
  assert(array != nullptr);
  
  array[0] = (Ttype***)malloc(sizeof(Ttype)*lx*ly*lz*Q);
  for (int i = 1; i < lx; i++) {//from i=0 to i=1;
    // array[i] = new Ttype**[ly];
    array[i] = array[i-1] + ly*lz*Q;
    assert(array[i] != nullptr);
    array[i][0] = (Ttype**)malloc(sizeof(Ttype)*ly*lz*Q);
    for (int j = 1; j < ly; j++) {
      //array[i][j] = new Ttype*[lz];
      array[i][j] = array[i][j-1] + lz*Q;
      assert(array[i][j] != nullptr);
      array[i][j][0] = (Ttype*)malloc(sizeof(Ttype)*Q);
      for (int k = 1; k < lz; k++) {
        //array[i][j][k] = new Ttype[n];  
        array[i][j][k] = array[i][j][k-1]+ Q;
        assert(array[i][j][k] != nullptr);
      }
    }
  }
  return array;
}

template <typename Ttype>
void free_4d_harray(Ttype**** array) {
  for (size_t i = 0; i < lx; ++i) {
    for (size_t j = 0; j < ly; ++j) {
      for (size_t k = 0; k < lz; ++k) {
        delete[] array[i][j][k];
      }
      delete[] array[i][j];
    }
    delete[] array[i];
  }
  delete[] array;
}


template <typename Ttype>
Ttype (*create_4d_darray())[ly][lz][Q] {
  // const int d_lx = lx, d_ly = ly, d_lz = lz, d_n = n;
  //Ttype array_4d[lx][ly][lz][Q];
  //typedef Ttype array_4d[ly][lz][Q];
  //array_4d* dptr_4d_array;
  Ttype(*dptr_4d_array)[ly][lz][Q];
  hipMalloc((void**)&dptr_4d_array,
             (lx * ly * lz * Q) * sizeof(Ttype));
  return dptr_4d_array;
}

__global__ void gpu_array_swap(int ptr_gpu[][ly][lz][Q]) {
  // int thread_id = thread_idx(grid_dim, block_dim);
  unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
  unsigned idy = blockIdx.y * blockDim.y + threadIdx.y;
  unsigned idz = blockIdx.z * blockDim.z + threadIdx.z;
  if ((idx < lx) && (idy < ly) && (idz < lz)) {
    for (size_t i = 1; i <= 9; i++)
          swap(ptr_gpu[idx][idy][idz][i], ptr_gpu[idx][idy][idz][i + 9]);
  }
}

void set_array(int**** array) {
  int m = 0;
  for (int l = 0; l < Q; ++l) {
    for (int i = 0; i < lz; ++i) {
      for (int j = 0; j < ly; ++j) {
        for (int k = 0; k < lx; ++k) {
          array[i][j][k][l] = ++m;
        }
      }
    }
  }
}

void print_array(int**** array) {
  for (int i = 0; i < lx; ++i) {
    for (int j = 0; j < ly; ++j) {
      for (int k = 0; k < lz; ++k) {
        for (int l = 0; l < Q; ++l) {
          std::cout << array[i][j][k][l] << "  ";
          if (l == (Q - 1)) std::cout << std::endl;
        }
      }
    }
  }
}

int main() {

  //int lx=10,ly=10,lz=5,Q=19;
  int**** host_4d_array=create_4d_harray<int>();
  int(* device_4d_array)[ly][lz][Q]=create_4d_darray<int>();
  
  const dim3 blockSize(BLKXSIZE, BLKYSIZE, BLKZSIZE);
  const dim3 gridSize(((lx + BLKXSIZE - 1) / BLKXSIZE),
                      ((ly + BLKYSIZE - 1) / BLKYSIZE),
                      ((lz + BLKZSIZE - 1) / BLKZSIZE));

  set_array(host_4d_array);
  print_array(host_4d_array);
  
  // allocate GPU device buffers

  cudaCheckErrors("Failed to allocate device buffer");
  hipMemcpy(device_4d_array, host_4d_array, (lx * ly * lz * Q) * sizeof(int),
             hipMemcpyHostToDevice);
  
  // compute result
  gpu_array_swap<<<gridSize, blockSize>>>(device_4d_array);
  cudaCheckErrors("Kernel launch failure");
  // copy output data back to host

  hipMemcpy(host_4d_array, device_4d_array, ((lx * ly * lz * Q) * sizeof(int)),
             hipMemcpyDeviceToHost);
  cudaCheckErrors("CUDA memcpy failure");
  free_4d_harray(host_4d_array);
  hipFree(device_4d_array);
  cudaCheckErrors("hipFree fail");
  return 0;
}

	.text
	.file	"template_array_swap.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__gpu_array_swapPA10_A5_A19_i # -- Begin function _Z29__device_stub__gpu_array_swapPA10_A5_A19_i
	.type	_Z29__device_stub__gpu_array_swapPA10_A5_A19_i,@function
_Z29__device_stub__gpu_array_swapPA10_A5_A19_i: # @_Z29__device_stub__gpu_array_swapPA10_A5_A19_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14gpu_array_swapPA10_A5_A19_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__gpu_array_swapPA10_A5_A19_i, .Lfunc_end0-_Z29__device_stub__gpu_array_swapPA10_A5_A19_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9set_arrayPPPPi               # -- Begin function _Z9set_arrayPPPPi
	.type	_Z9set_arrayPPPPi,@function
_Z9set_arrayPPPPi:                      # @_Z9set_arrayPPPPi
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_1:                                # %.preheader18
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
                                        #       Child Loop BB1_3 Depth 3
                                        #         Child Loop BB1_4 Depth 4
	xorl	%edx, %edx
.LBB1_2:                                # %.preheader17
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_3 Depth 3
                                        #         Child Loop BB1_4 Depth 4
	movq	(%rdi,%rdx,8), %rsi
	xorl	%r8d, %r8d
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_2 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB1_4 Depth 4
	movq	(%rsi,%r8,8), %r9
	xorl	%r10d, %r10d
.LBB1_4:                                #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_2 Depth=2
                                        #       Parent Loop BB1_3 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	incl	%ecx
	movq	(%r9,%r10), %r11
	movl	%ecx, (%r11,%rax,4)
	addq	$8, %r10
	cmpq	$80, %r10
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=3
	incq	%r8
	cmpq	$10, %r8
	jne	.LBB1_3
# %bb.6:                                #   in Loop: Header=BB1_2 Depth=2
	incq	%rdx
	cmpq	$5, %rdx
	jne	.LBB1_2
# %bb.7:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rax
	cmpq	$19, %rax
	jne	.LBB1_1
# %bb.8:
	retq
.Lfunc_end1:
	.size	_Z9set_arrayPPPPi, .Lfunc_end1-_Z9set_arrayPPPPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z11print_arrayPPPPi            # -- Begin function _Z11print_arrayPPPPi
	.type	_Z11print_arrayPPPPi,@function
_Z11print_arrayPPPPi:                   # @_Z11print_arrayPPPPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
.LBB2_1:                                # %.preheader17
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #       Child Loop BB2_3 Depth 3
                                        #         Child Loop BB2_4 Depth 4
	xorl	%r12d, %r12d
.LBB2_2:                                # %.preheader16
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_3 Depth 3
                                        #         Child Loop BB2_4 Depth 4
	xorl	%r13d, %r13d
.LBB2_3:                                # %.preheader
                                        #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB2_4 Depth 4
	xorl	%ebp, %ebp
.LBB2_4:                                #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        #       Parent Loop BB2_3 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movq	(%rbx,%r14,8), %rax
	movq	(%rax,%r12,8), %rax
	movq	(%rax,%r13,8), %rax
	movl	(%rax,%rbp,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbp
	cmpq	$19, %rbp
	jne	.LBB2_4
# %bb.5:                                #   in Loop: Header=BB2_3 Depth=3
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	cmpq	$5, %r13
	jne	.LBB2_3
# %bb.6:                                #   in Loop: Header=BB2_2 Depth=2
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB2_2
# %bb.7:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB2_1
# %bb.8:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11print_arrayPPPPi, .Lfunc_end2-_Z11print_arrayPPPPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	callq	_Z16create_4d_harrayIiEPPPPT_v
	movq	%rax, %rbx
	movq	%rsp, %r14
	movl	$38000, %esi                    # imm = 0x9470
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %r14
	movq	%rbx, %rdi
	callq	_Z9set_arrayPPPPi
	movq	%rbx, %rdi
	callq	_Z11print_arrayPPPPi
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_1
# %bb.2:
	movl	$38000, %edx                    # imm = 0x9470
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$12884901889, %rdi              # imm = 0x300000001
	movabsq	$17179869216, %rdx              # imm = 0x400000020
	movl	$2, %esi
	movl	$4, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	%r14, %rdi
	callq	_Z29__device_stub__gpu_array_swapPA10_A5_A19_i
.LBB3_4:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_5
# %bb.6:
	movl	$38000, %edx                    # imm = 0x9470
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_7
# %bb.8:
	movq	%rbx, %rdi
	callq	_Z14free_4d_harrayIiEvPPPPT_
	movq	%r14, %rdi
	callq	hipFree
	callq	hipGetLastError
	xorl	%ecx, %ecx
	testl	%eax, %eax
	je	.LBB3_11
# %bb.9:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.3, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$156, %r9d
	jmp	.LBB3_10
.LBB3_1:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %edx
	movl	$.L.str.3, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$142, %r9d
	jmp	.LBB3_10
.LBB3_5:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %edx
	movl	$.L.str.3, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$148, %r9d
	jmp	.LBB3_10
.LBB3_7:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %edx
	movl	$.L.str.3, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$153, %r9d
.LBB3_10:                               # %.sink.split
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rcx
	movl	$.L.str.4, %edi
	movl	$22, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %ecx
.LBB3_11:
	movl	%ecx, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16create_4d_harrayIiEPPPPT_v,"axG",@progbits,_Z16create_4d_harrayIiEPPPPT_v,comdat
	.weak	_Z16create_4d_harrayIiEPPPPT_v  # -- Begin function _Z16create_4d_harrayIiEPPPPT_v
	.type	_Z16create_4d_harrayIiEPPPPT_v,@function
_Z16create_4d_harrayIiEPPPPT_v:         # @_Z16create_4d_harrayIiEPPPPT_v
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$80, %edi
	callq	_Znam
	movq	%rax, %rbx
	movl	$38000, %edi                    # imm = 0x9470
	callq	malloc
	movq	%rax, (%rbx)
	movl	$1, %r14d
.LBB4_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
                                        #       Child Loop BB4_3 Depth 3
	movq	-8(%rbx,%r14,8), %r12
	leaq	7600(%r12), %r15
	movq	%r15, (%rbx,%r14,8)
	movl	$3800, %edi                     # imm = 0xED8
	callq	malloc
	movq	%rax, 7600(%r12)
	movl	$1, %r12d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_3 Depth 3
	movq	-8(%r15,%r12,8), %r13
	leaq	760(%r13), %rax
	movq	%rax, (%r15,%r12,8)
	movl	$76, %edi
	callq	malloc
	movq	%rax, 760(%r13)
	xorl	%eax, %eax
.LBB4_3:                                #   Parent Loop BB4_1 Depth=1
                                        #     Parent Loop BB4_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	(%r15,%r12,8), %rcx
	movq	(%rcx,%rax,8), %rdx
	addq	$76, %rdx
	movq	%rdx, 8(%rcx,%rax,8)
	incq	%rax
	cmpq	$4, %rax
	jne	.LBB4_3
# %bb.4:                                #   in Loop: Header=BB4_2 Depth=2
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB4_2
# %bb.5:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB4_1
# %bb.6:
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z16create_4d_harrayIiEPPPPT_v, .Lfunc_end4-_Z16create_4d_harrayIiEPPPPT_v
	.cfi_endproc
                                        # -- End function
	.section	.text._Z14free_4d_harrayIiEvPPPPT_,"axG",@progbits,_Z14free_4d_harrayIiEvPPPPT_,comdat
	.weak	_Z14free_4d_harrayIiEvPPPPT_    # -- Begin function _Z14free_4d_harrayIiEvPPPPT_
	.type	_Z14free_4d_harrayIiEvPPPPT_,@function
_Z14free_4d_harrayIiEvPPPPT_:           # @_Z14free_4d_harrayIiEvPPPPT_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB5_1:                                # %.preheader21
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
                                        #       Child Loop BB5_3 Depth 3
	xorl	%r15d, %r15d
.LBB5_2:                                # %.preheader
                                        #   Parent Loop BB5_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_3 Depth 3
	xorl	%r12d, %r12d
.LBB5_3:                                #   Parent Loop BB5_1 Depth=1
                                        #     Parent Loop BB5_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	(%rbx,%r14,8), %rax
	movq	(%rax,%r15,8), %rax
	movq	(%rax,%r12,8), %rdi
	testq	%rdi, %rdi
	je	.LBB5_5
# %bb.4:                                #   in Loop: Header=BB5_3 Depth=3
	callq	_ZdaPv
.LBB5_5:                                #   in Loop: Header=BB5_3 Depth=3
	incq	%r12
	cmpq	$5, %r12
	jne	.LBB5_3
# %bb.6:                                #   in Loop: Header=BB5_2 Depth=2
	movq	(%rbx,%r14,8), %rax
	movq	(%rax,%r15,8), %rdi
	testq	%rdi, %rdi
	je	.LBB5_8
# %bb.7:                                #   in Loop: Header=BB5_2 Depth=2
	callq	_ZdaPv
.LBB5_8:                                #   in Loop: Header=BB5_2 Depth=2
	incq	%r15
	cmpq	$10, %r15
	jne	.LBB5_2
# %bb.9:                                #   in Loop: Header=BB5_1 Depth=1
	movq	(%rbx,%r14,8), %rdi
	testq	%rdi, %rdi
	je	.LBB5_11
# %bb.10:                               #   in Loop: Header=BB5_1 Depth=1
	callq	_ZdaPv
.LBB5_11:                               #   in Loop: Header=BB5_1 Depth=1
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB5_1
# %bb.12:
	movq	%rbx, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZdaPv                          # TAILCALL
.Lfunc_end5:
	.size	_Z14free_4d_harrayIiEvPPPPT_, .Lfunc_end5-_Z14free_4d_harrayIiEvPPPPT_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14gpu_array_swapPA10_A5_A19_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14gpu_array_swapPA10_A5_A19_i,@object # @_Z14gpu_array_swapPA10_A5_A19_i
	.section	.rodata,"a",@progbits
	.globl	_Z14gpu_array_swapPA10_A5_A19_i
	.p2align	3, 0x0
_Z14gpu_array_swapPA10_A5_A19_i:
	.quad	_Z29__device_stub__gpu_array_swapPA10_A5_A19_i
	.size	_Z14gpu_array_swapPA10_A5_A19_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"  "
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Fatal error: %s (%s at %s:%d)\n"
	.size	.L.str.1, 31

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device buffer"
	.size	.L.str.2, 33

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Amber1995/qiuyu/master/cuda_test/template_array_swap.hip"
	.size	.L.str.3, 119

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"*** FAILED - ABORTING\n"
	.size	.L.str.4, 23

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Kernel launch failure"
	.size	.L.str.5, 22

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CUDA memcpy failure"
	.size	.L.str.6, 20

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"hipFree fail"
	.size	.L.str.7, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14gpu_array_swapPA10_A5_A19_i"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__gpu_array_swapPA10_A5_A19_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14gpu_array_swapPA10_A5_A19_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14gpu_array_swapPA10_A5_A19_i ; -- Begin function _Z14gpu_array_swapPA10_A5_A19_i
	.globl	_Z14gpu_array_swapPA10_A5_A19_i
	.p2align	8
	.type	_Z14gpu_array_swapPA10_A5_A19_i,@function
_Z14gpu_array_swapPA10_A5_A19_i:        ; @_Z14gpu_array_swapPA10_A5_A19_i
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x14
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v6, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_mad_u64_u32 v[4:5], null, s14, s4, v[6:7]
	s_and_b32 s2, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v0, v1, v4
	v_cmp_gt_u32_e32 vcc_lo, 10, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, 5, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.preheader
	v_mad_u64_u32 v[5:6], null, 0x17c, v4, 0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0xed8, v1, v[5:6]
	v_mad_u64_u32 v[0:1], null, 0x4c, v2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_mov_b64 s[0:1], 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v2, vcc_lo, v0, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_clause 0x1
	global_load_b32 v4, v[2:3], off offset:40
	global_load_b32 v5, v[2:3], off offset:4
	s_cmp_lg_u64 s[0:1], 36
	s_waitcnt vmcnt(1)
	global_store_b32 v[2:3], v4, off offset:4
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v5, off offset:40
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14gpu_array_swapPA10_A5_A19_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14gpu_array_swapPA10_A5_A19_i, .Lfunc_end0-_Z14gpu_array_swapPA10_A5_A19_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14gpu_array_swapPA10_A5_A19_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14gpu_array_swapPA10_A5_A19_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
