#include<stdio.h>
#include<stdlib.h>
#include<cuda.h>
#include<time.h>

//************variables globales***************
int msk=3, dimx=1040, dimy=1388, tam_imag=1388*1040;

//*******************kernel********************

__global__ void kernel (int *Gext_d,float *var_d){

	int i, dimy_ext, id_p, M_d[9], dimy=1388,tam_imag=1388*1040,msk=3;
	int idx = threadIdx.x + blockIdx.x*blockDim.x;
	int idy = threadIdx.y + blockIdx.y*blockDim.y;
	int offset=idx + idy*blockDim.x*gridDim.x;
	int id=offset;

	float X=0.f,Xprom=0.f,Y=0.f;
		
	var_d[id]=0;
	dimy_ext=dimy+2;

	if(offset<tam_imag){
		
		offset+=2*idy;
		id_p=offset+(dimy+msk);

		M_d[0]=Gext_d[offset];
		M_d[1]=Gext_d[offset+1];
		M_d[2]=Gext_d[offset+2];
		M_d[3]=Gext_d[id_p-1];
		M_d[4]=Gext_d[id_p];
		M_d[5]=Gext_d[id_p+1];
		M_d[6]=Gext_d[(id_p-1)+dimy_ext];
		M_d[7]=Gext_d[id_p+dimy_ext];
		M_d[8]=Gext_d[(id_p+1)+dimy_ext];

		for(i=0;i<msk*msk;i++)
			X+=M_d[i];
		Xprom=((float)X)/(msk*msk);

		for(i=0;i<msk*msk;i++)
			Y+=(Xprom-M_d[i])*(Xprom-M_d[i]);
		var_d[id]=Y/(msk*msk);

	}
}


//*****************Funcion Main**********************

int main(int argc,char* argv[]){

	//***************Declaracion de variables**************

	int i,j,d,m,cont,tam_ext,init,fin;
	int *Gext_d, *Gext_h;
	//, **G;

	float t, *var_d,*var_h;

	FILE *archV, *matrizG;

	init=atoi(argv[1]);
	fin=atoi(argv[2]);

	clock_t tinicio, t_GPU;
	tinicio=clock();

	tam_ext=(dimx+2)*(dimy+2);

	//*************For que recorre todas las imagenes ************
	for(d=init;d<=fin;d++){

		printf("d=%d \n", d);
		
		Gext_h=(int *)malloc(sizeof(int)*tam_ext);
		cudaMalloc((void**)&Gext_d, tam_ext*sizeof(int));
		var_h=(float *)malloc(sizeof(float)*tam_imag);
		cudaMalloc((void**)&var_d,tam_imag*sizeof(float));
		

		//*****************Lectura Matriz G****************

		char rutaG[]="MiTesis/";
		sprintf(rutaG, "%s%d%s","RGB/",d,"/G"); 
		matrizG=fopen(rutaG,"r+");

		cont=0;
		for(i=0;i<dimx+2;i++){
			for(j=0;j<dimy+2;j++){
				if (i==0 || j==0 || i==dimx+1 || j==dimy+1){
					Gext_h[cont]=0;
				} else{
					fscanf(matrizG, "%d", &Gext_h[cont]); 
				}
				cont++;
			}
		}
		fclose(matrizG);


		//******************Llamado de kernel*******************

		dim3 Grid(347,20);
		dim3 Block(13,16);

		cudaMemcpy(Gext_d,Gext_h,sizeof(int)*tam_ext,cudaMemcpyHostToDevice);

		kernel<<<Grid,Block>>>(Gext_d,var_d);

		cudaMemcpy(var_h,var_d,sizeof(float)*tam_imag,cudaMemcpyDeviceToHost);


		//****************Almacenamiento matriz de Varianza**************

		char rutaV[]="VARIANZAS/";
		sprintf(rutaV, "%s%d", rutaV,d);
		archV=fopen(rutaV,"w+");

		for(m=0;m<tam_imag;m++){
			if(m%dimy==0 && m!=0){
				fprintf(archV,"\n");
			}
			fprintf(archV,"%f ",var_h[m]);
		}
		fclose(archV);

		free(Gext_h);
		free(var_h);
		//free(G);
		cudaFree(var_d);
		cudaFree(Gext_d);
	}


	t_GPU=clock();
	t = ((float)t_GPU-(float)tinicio)/CLOCKS_PER_SEC;
	printf("\ntiempo de procesamiento de varianzas: %6.3fs\n",t);

	return 0;

}//FIN funcion main()

	.file	"tmpxft_0025ed9b_00000000-6_1.2_varianza-SinMatricesExtra.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z27__device_stub__Z6kernelPiPfPiPf
	.type	_Z27__device_stub__Z6kernelPiPfPiPf, @function
_Z27__device_stub__Z6kernelPiPfPiPf:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6kernelPiPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z27__device_stub__Z6kernelPiPfPiPf, .-_Z27__device_stub__Z6kernelPiPfPiPf
	.globl	_Z6kernelPiPf
	.type	_Z6kernelPiPf, @function
_Z6kernelPiPf:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6kernelPiPfPiPf
	.cfi_endproc
.LFE2053:
	.size	_Z6kernelPiPf, .-_Z6kernelPiPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"d=%d \n"
.LC1:
	.string	"RGB/"
.LC2:
	.string	"%s%d%s"
.LC3:
	.string	"/G"
.LC4:
	.string	"r+"
.LC5:
	.string	"%d"
.LC6:
	.string	"%s%d"
.LC7:
	.string	"w+"
.LC8:
	.string	"\n"
.LC9:
	.string	"%f "
.LC11:
	.string	"\ntiempo de procesamiento de varianzas: %6.3fs\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %r14d
	call	clock@PLT
	movl	dimy(%rip), %ecx
	movq	%rax, 16(%rsp)
	movl	dimx(%rip), %eax
	leal	2(%rcx), %edx
	addl	$2, %eax
	imull	%edx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, (%rsp)
.L9:
	cmpl	%r14d, %ebx
	jg	.L31
	movl	%ebx, %edx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	malloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	movslq	tam_imag(%rip), %r13
	salq	$2, %r13
	movq	%r13, %rdi
	call	malloc@PLT
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	leaq	84(%rsp), %r13
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movb	$0, 92(%rsp)
	movl	%ebx, %r9d
	movq	%r13, %rdi
	movabsq	$3419192486446524749, %rax
	leaq	.LC1(%rip), %r8
	movl	$2, %esi
	movq	%rax, 84(%rsp)
	leaq	.LC3(%rip), %rax
	leaq	.LC2(%rip), %rcx
	pushq	%rdx
	.cfi_def_cfa_offset 184
	movl	$9, %edx
	pushq	%rax
	.cfi_def_cfa_offset 192
	xorl	%eax, %eax
	call	__sprintf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 184
	movq	%r13, %rdi
	popq	%rsi
	.cfi_def_cfa_offset 176
	leaq	.LC4(%rip), %rsi
	call	fopen@PLT
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
	movq	%rax, %rdi
.L10:
	movl	dimx(%rip), %eax
	incl	%eax
	cmpl	%ecx, %eax
	jl	.L16
	movslq	%r8d, %rax
	xorl	%r15d, %r15d
	leaq	(%r12,%rax,4), %r13
.L17:
	movl	dimy(%rip), %eax
	movl	dimx(%rip), %esi
	incl	%eax
	cmpl	%r15d, %eax
	jl	.L32
	testl	%ecx, %ecx
	je	.L11
	testl	%r15d, %r15d
	je	.L11
	incl	%esi
	cmpl	%ecx, %esi
	je	.L11
	cmpl	%r15d, %eax
	jne	.L12
.L11:
	xorl	%eax, %eax
	movl	%eax, 0(%r13)
	jmp	.L14
.L12:
	movq	%r13, %rdx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	%ecx, 24(%rsp)
	movl	%r8d, 28(%rsp)
	movq	%rdi, 8(%rsp)
	call	__isoc23_fscanf@PLT
	movl	28(%rsp), %r8d
	movl	24(%rsp), %ecx
	movq	8(%rsp), %rdi
.L14:
	incl	%r15d
	addq	$4, %r13
	jmp	.L17
.L32:
	addl	%r15d, %r8d
	incl	%ecx
	jmp	.L10
.L16:
	call	fclose@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r12, %rsi
	movabsq	$85899346267, %rax
	movl	$1, %ecx
	movl	$1, 68(%rsp)
	movq	%rax, 60(%rsp)
	movabsq	$68719476749, %rax
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	call	cudaMemcpy@PLT
	movl	80(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	72(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z27__device_stub__Z6kernelPiPfPiPf
.L18:
	movslq	tam_imag(%rip), %rdx
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	leaq	93(%rsp), %r13
	leaq	.LC8(%rip), %r15
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	%r13, %r8
	movq	%r13, %rdi
	movl	%ebx, %r9d
	movabsq	$4709162402679243094, %rax
	movl	$11, %edx
	movl	$2, %esi
	movq	%rax, 93(%rsp)
	leaq	.LC6(%rip), %rcx
	xorl	%eax, %eax
	movl	$3101505, 100(%rsp)
	call	__sprintf_chk@PLT
	movq	%r13, %rdi
	leaq	.LC7(%rip), %rsi
	xorl	%r13d, %r13d
	call	fopen@PLT
	movq	%rax, 8(%rsp)
.L19:
	cmpl	%r13d, tam_imag(%rip)
	movl	%r13d, %esi
	jle	.L33
	movl	%esi, %eax
	cltd
	idivl	dimy(%rip)
	testl	%edx, %edx
	jne	.L20
	testl	%esi, %esi
	je	.L20
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L20:
	movq	8(%rsp), %rdi
	leaq	.LC9(%rip), %rdx
	movl	$2, %esi
	movb	$1, %al
	cvtss2sd	0(%rbp,%r13,4), %xmm0
	incq	%r13
	call	__fprintf_chk@PLT
	jmp	.L19
.L33:
	movq	8(%rsp), %rdi
	incl	%ebx
	call	fclose@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	jmp	.L9
.L31:
	call	clock@PLT
	cvtsi2ssq	16(%rsp), %xmm1
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	subss	%xmm1, %xmm0
	divss	.LC10(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z6kernelPiPf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	tam_imag
	.data
	.align 4
	.type	tam_imag, @object
	.size	tam_imag, 4
tam_imag:
	.long	1443520
	.globl	dimy
	.align 4
	.type	dimy, @object
	.size	dimy, 4
dimy:
	.long	1388
	.globl	dimx
	.align 4
	.type	dimx, @object
	.size	dimx, 4
dimx:
	.long	1040
	.globl	msk
	.align 4
	.type	msk, @object
	.size	msk, 4
msk:
	.long	3
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC10:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<stdio.h>
#include<stdlib.h>
#include<hip/hip_runtime.h>
#include<time.h>

//************variables globales***************
int msk=3, dimx=1040, dimy=1388, tam_imag=1388*1040;

//*******************kernel********************

__global__ void kernel (int *Gext_d,float *var_d){

	int i, dimy_ext, id_p, M_d[9], dimy=1388,tam_imag=1388*1040,msk=3;
	int idx = threadIdx.x + blockIdx.x*blockDim.x;
	int idy = threadIdx.y + blockIdx.y*blockDim.y;
	int offset=idx + idy*blockDim.x*gridDim.x;
	int id=offset;

	float X=0.f,Xprom=0.f,Y=0.f;
		
	var_d[id]=0;
	dimy_ext=dimy+2;

	if(offset<tam_imag){
		
		offset+=2*idy;
		id_p=offset+(dimy+msk);

		M_d[0]=Gext_d[offset];
		M_d[1]=Gext_d[offset+1];
		M_d[2]=Gext_d[offset+2];
		M_d[3]=Gext_d[id_p-1];
		M_d[4]=Gext_d[id_p];
		M_d[5]=Gext_d[id_p+1];
		M_d[6]=Gext_d[(id_p-1)+dimy_ext];
		M_d[7]=Gext_d[id_p+dimy_ext];
		M_d[8]=Gext_d[(id_p+1)+dimy_ext];

		for(i=0;i<msk*msk;i++)
			X+=M_d[i];
		Xprom=((float)X)/(msk*msk);

		for(i=0;i<msk*msk;i++)
			Y+=(Xprom-M_d[i])*(Xprom-M_d[i]);
		var_d[id]=Y/(msk*msk);

	}
}


//*****************Funcion Main**********************

int main(int argc,char* argv[]){

	//***************Declaracion de variables**************

	int i,j,d,m,cont,tam_ext,init,fin;
	int *Gext_d, *Gext_h;
	//, **G;

	float t, *var_d,*var_h;

	FILE *archV, *matrizG;

	init=atoi(argv[1]);
	fin=atoi(argv[2]);

	clock_t tinicio, t_GPU;
	tinicio=clock();

	tam_ext=(dimx+2)*(dimy+2);

	//*************For que recorre todas las imagenes ************
	for(d=init;d<=fin;d++){

		printf("d=%d \n", d);
		
		Gext_h=(int *)malloc(sizeof(int)*tam_ext);
		hipMalloc((void**)&Gext_d, tam_ext*sizeof(int));
		var_h=(float *)malloc(sizeof(float)*tam_imag);
		hipMalloc((void**)&var_d,tam_imag*sizeof(float));
		

		//*****************Lectura Matriz G****************

		char rutaG[]="MiTesis/";
		sprintf(rutaG, "%s%d%s","RGB/",d,"/G"); 
		matrizG=fopen(rutaG,"r+");

		cont=0;
		for(i=0;i<dimx+2;i++){
			for(j=0;j<dimy+2;j++){
				if (i==0 || j==0 || i==dimx+1 || j==dimy+1){
					Gext_h[cont]=0;
				} else{
					fscanf(matrizG, "%d", &Gext_h[cont]); 
				}
				cont++;
			}
		}
		fclose(matrizG);


		//******************Llamado de kernel*******************

		dim3 Grid(347,20);
		dim3 Block(13,16);

		hipMemcpy(Gext_d,Gext_h,sizeof(int)*tam_ext,hipMemcpyHostToDevice);

		kernel<<<Grid,Block>>>(Gext_d,var_d);

		hipMemcpy(var_h,var_d,sizeof(float)*tam_imag,hipMemcpyDeviceToHost);


		//****************Almacenamiento matriz de Varianza**************

		char rutaV[]="VARIANZAS/";
		sprintf(rutaV, "%s%d", rutaV,d);
		archV=fopen(rutaV,"w+");

		for(m=0;m<tam_imag;m++){
			if(m%dimy==0 && m!=0){
				fprintf(archV,"\n");
			}
			fprintf(archV,"%f ",var_h[m]);
		}
		fclose(archV);

		free(Gext_h);
		free(var_h);
		//free(G);
		hipFree(var_d);
		hipFree(Gext_d);
	}


	t_GPU=clock();
	t = ((float)t_GPU-(float)tinicio)/CLOCKS_PER_SEC;
	printf("\ntiempo de procesamiento de varianzas: %6.3fs\n",t);

	return 0;

}//FIN funcion main()

	.text
	.file	"1.2_varianza-SinMatricesExtra.hip"
	.globl	_Z21__device_stub__kernelPiPf   # -- Begin function _Z21__device_stub__kernelPiPf
	.type	_Z21__device_stub__kernelPiPf,@function
_Z21__device_stub__kernelPiPf:          # @_Z21__device_stub__kernelPiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPiPf, .Lfunc_end0-_Z21__device_stub__kernelPiPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	callq	clock
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	%ebp, 24(%rsp)                  # 4-byte Spill
	cmpl	%ebp, %ebx
	jg	.LBB1_24
# %bb.1:                                # %.lr.ph74
	movslq	dimy(%rip), %rax
	addq	$2, %rax
	movslq	dimx(%rip), %r15
	addq	$2, %r15
	imulq	%rax, %r15
	shlq	$2, %r15
	movq	%r15, 56(%rsp)                  # 8-byte Spill
.LBB1_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_6 Depth 3
                                        #     Child Loop BB1_19 Depth 2
	movl	$.L.str, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, (%rsp)                    # 8-byte Spill
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	tam_imag(%rip), %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movabsq	$3419192486446524749, %rax      # imm = 0x2F7369736554694D
	movq	%rax, 39(%rsp)
	movb	$0, 47(%rsp)
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %edx
	movl	$.L.str.3, %r8d
	leaq	39(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	sprintf
	movl	$.L.str.4, %esi
	movq	%r15, %rdi
	callq	fopen
	movq	%rax, %rbp
	movl	dimx(%rip), %edx
	cmpl	$-1, %edx
	jl	.LBB1_15
# %bb.3:                                # %.preheader.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%r15d, %r15d
	movl	dimy(%rip), %eax
	movl	%eax, %ecx
	xorl	%ebx, %ebx
.LBB1_4:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_6 Depth 3
	cmpl	$-1, %ecx
	jl	.LBB1_14
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB1_4 Depth=2
	movslq	%ebx, %rdx
	movq	(%rsp), %rsi                    # 8-byte Reload
	leaq	(%rsi,%rdx,4), %r12
	xorl	%r13d, %r13d
.LBB1_6:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	testl	%r15d, %r15d
	je	.LBB1_10
# %bb.7:                                #   in Loop: Header=BB1_6 Depth=3
	testl	%r13d, %r13d
	je	.LBB1_10
# %bb.8:                                #   in Loop: Header=BB1_6 Depth=3
	movl	dimx(%rip), %edx
	incl	%edx
	cmpl	%edx, %r15d
	je	.LBB1_10
# %bb.9:                                #   in Loop: Header=BB1_6 Depth=3
	incl	%ecx
	cmpl	%ecx, %r13d
	je	.LBB1_10
# %bb.11:                               #   in Loop: Header=BB1_6 Depth=3
	movl	$.L.str.5, %esi
	movq	%rbp, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	dimy(%rip), %eax
	jmp	.LBB1_12
.LBB1_10:                               #   in Loop: Header=BB1_6 Depth=3
	movl	$0, (%r12)
.LBB1_12:                               #   in Loop: Header=BB1_6 Depth=3
	leal	1(%r13), %edx
	addq	$4, %r12
	movl	%eax, %ecx
	cmpl	%eax, %r13d
	movl	%edx, %r13d
	jle	.LBB1_6
# %bb.13:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_4 Depth=2
	addl	%edx, %ebx
	movl	dimx(%rip), %edx
	movl	%eax, %ecx
.LBB1_14:                               # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=2
	leal	1(%r15), %esi
	cmpl	%edx, %r15d
	movl	%esi, %r15d
	jle	.LBB1_4
.LBB1_15:                               # %._crit_edge66
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	%rbp, %rdi
	callq	fclose
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	56(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$85899346267, %rdi              # imm = 0x140000015B
	movl	$1, %esi
	movabsq	$68719476749, %rdx              # imm = 0x100000000D
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:                               #   in Loop: Header=BB1_2 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z21__device_stub__kernelPiPf
.LBB1_17:                               #   in Loop: Header=BB1_2 Depth=1
	movq	8(%rsp), %rsi
	movslq	tam_imag(%rip), %rdx
	shlq	$2, %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movabsq	$4709162402679243094, %rax      # imm = 0x415A4E4149524156
	movq	%rax, 28(%rsp)
	movw	$12115, 36(%rsp)                # imm = 0x2F53
	movb	$0, 38(%rsp)
	movl	$.L.str.6, %esi
	leaq	28(%rsp), %r12
	movq	%r12, %rdi
	movq	%r12, %rdx
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	sprintf
	movl	$.L.str.7, %esi
	movq	%r12, %rdi
	callq	fopen
	movq	%rax, %r12
	cmpl	$0, tam_imag(%rip)
	jle	.LBB1_23
# %bb.18:                               # %.lr.ph69.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%ebp, %ebp
.LBB1_19:                               # %.lr.ph69
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ebp, %eax
	cltd
	idivl	dimy(%rip)
	testq	%rbp, %rbp
	je	.LBB1_22
# %bb.20:                               # %.lr.ph69
                                        #   in Loop: Header=BB1_19 Depth=2
	testl	%edx, %edx
	jne	.LBB1_22
# %bb.21:                               #   in Loop: Header=BB1_19 Depth=2
	movl	$10, %edi
	movq	%r12, %rsi
	callq	fputc@PLT
.LBB1_22:                               #   in Loop: Header=BB1_19 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%rbp,4), %xmm0
	movl	$.L.str.9, %esi
	movq	%r12, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%rbp
	movslq	tam_imag(%rip), %rax
	cmpq	%rax, %rbp
	jl	.LBB1_19
.LBB1_23:                               # %._crit_edge70
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	%r12, %rdi
	callq	fclose
	movq	(%rsp), %rdi                    # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	leal	1(%rbx), %eax
	cmpl	24(%rsp), %ebx                  # 4-byte Folded Reload
	movl	%eax, %ebx
	jne	.LBB1_2
.LBB1_24:                               # %._crit_edge75
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	cvtsi2ssq	48(%rsp), %xmm1         # 8-byte Folded Reload
	subss	%xmm1, %xmm0
	divss	.LCPI1_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPiPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	msk,@object                     # @msk
	.data
	.globl	msk
	.p2align	2, 0x0
msk:
	.long	3                               # 0x3
	.size	msk, 4

	.type	dimx,@object                    # @dimx
	.globl	dimx
	.p2align	2, 0x0
dimx:
	.long	1040                            # 0x410
	.size	dimx, 4

	.type	dimy,@object                    # @dimy
	.globl	dimy
	.p2align	2, 0x0
dimy:
	.long	1388                            # 0x56c
	.size	dimy, 4

	.type	tam_imag,@object                # @tam_imag
	.globl	tam_imag
	.p2align	2, 0x0
tam_imag:
	.long	1443520                         # 0x1606c0
	.size	tam_imag, 4

	.type	_Z6kernelPiPf,@object           # @_Z6kernelPiPf
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPiPf
	.p2align	3, 0x0
_Z6kernelPiPf:
	.quad	_Z21__device_stub__kernelPiPf
	.size	_Z6kernelPiPf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"d=%d \n"
	.size	.L.str, 7

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%s%d%s"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"RGB/"
	.size	.L.str.2, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/G"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"r+"
	.size	.L.str.4, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d"
	.size	.L.str.5, 3

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%s%d"
	.size	.L.str.6, 5

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"w+"
	.size	.L.str.7, 3

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%f "
	.size	.L.str.9, 4

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"\ntiempo de procesamiento de varianzas: %6.3fs\n"
	.size	.L.str.10, 47

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPiPf"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPiPf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPiPf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPiPf           ; -- Begin function _Z6kernelPiPf
	.globl	_Z6kernelPiPf
	.p2align	8
	.type	_Z6kernelPiPf,@function
_Z6kernelPiPf:                          ; @_Z6kernelPiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b32 s2, s[0:1], 0x10
	v_bfe_u32 v3, v0, 10, 10
	v_dual_mov_b32 v11, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v1, s2, s[14:15]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v4, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v4, vcc_lo
	s_mov_b32 s2, exec_lo
	global_store_b32 v[9:10], v11, off
	v_cmpx_gt_i32_e32 0x1606c0, v2
	s_cbranch_execz .LBB0_6
; %bb.1:
	v_lshl_add_u32 v0, v1, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_mov_b64 s[0:1], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, 0x1000, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v1, vcc_lo
	s_clause 0x2
	global_load_b96 v[0:2], v[0:1], off
	global_load_b96 v[3:5], v[3:4], off offset:1464
	global_load_b96 v[6:8], v[6:7], off offset:2928
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_waitcnt vmcnt(0)
	v_movrels_b32_e32 v12, v0
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v12, v12
	v_add_f32_e32 v11, v11, v12
	s_cbranch_scc1 .LBB0_2
; %bb.3:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_scale_f32 v12, null, 0x41100000, 0x41100000, v11
	v_div_scale_f32 v15, vcc_lo, v11, 0x41100000, v11
	s_mov_b64 s[0:1], 0
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v13
	v_mul_f32_e32 v14, v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v12, v14, v15
	v_fmac_f32_e32 v14, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v12, v14, v15
	v_div_fmas_f32 v12, v12, v13, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v12, v12, 0x41100000, v11
	v_mov_b32_e32 v11, 0
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v13, v0
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v13, v13
	v_sub_f32_e32 v13, v12, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v13
	s_cbranch_scc1 .LBB0_4
; %bb.5:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v0, null, 0x41100000, 0x41100000, v11
	v_rcp_f32_e32 v1, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, -v0, v1, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v2, v1
	v_div_scale_f32 v2, vcc_lo, v11, 0x41100000, v11
	v_mul_f32_e32 v3, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, -v0, v3, v2
	v_fmac_f32_e32 v3, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, -v0, v3, v2
	v_div_fmas_f32 v0, v0, v1, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v0, v0, 0x41100000, v11
	global_store_b32 v[9:10], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPiPf, .Lfunc_end0-_Z6kernelPiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 588
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPiPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPiPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
