#include <stdio.h>
#include <cuda.h>

#define MAX_TESS_POINTS 32 

struct BezierLine{
    float2 CP[3];//control points for the line
    float2 vertexPos[MAX_TESS_POINTS];//Vertex position array to tessellate into 
                                      //Number of tessellated vertices
    int nVertices;
};

__forceinline__ __device__ float2 operator+(float2 a,float2 b){
    float2 c;
    c.x = a.x + b.x;
    c.y = a.y + b.y;
    return c;
}

__forceinline__ __device__ float2 operator-(float2 a, float2 b){
    float2 c;
    c.x = a.x - b.x;
    c.y = a.y - b.y;
    return c;
}

__forceinline__ __device__ float2 operator*(float a, float2 b){
    float2 c;
    c.x = a * b.x;
    c.y = a * b.y;
    return c;
} 

__forceinline__ __device__ float length(float2 a){
    return sqrtf(a.x * a.x + a.y * a.y);
}

__device__ float computeCurvature(BezierLine* bLines){
    int bidx = blockIdx.x;

    float curvature = length(bLines[bidx].CP[1] - 0.5f * (bLines[bidx].CP[0] + bLines[bidx].CP[2]))/length(bLines[bidx].CP[2] - bLines[bidx].CP[0]);
    return curvature;
}

__global__ void computeBezierLines(BezierLine* bLines, int nLines){
    int bidx = blockIdx.x;

    if(bidx < nLines){
        //compute the curvature of the line
        float curvature = computeCurvature(bLines);

        //From the curvature, compute the number of tessellation points
        int nTessPoints = min(max((int)(curvature * 16.0f),4),32);
        bLines[bidx].nVertices = nTessPoints;

        //Loop through vertices to be tessellated, incrementing by blockDim.x
        for(int inc = 0;inc < nTessPoints;inc += blockDim.x){
            int idx = inc + threadIdx.x;//Compute a unique index for this point
            if(idx < nTessPoints){
                float u = (float)idx /(float)(nTessPoints - 1);//compute u from idx
                float omu = 1.0f - u;
                float B3u[3];
                B3u[0] = omu * omu;
                B3u[1] = 2.0f * u * omu;
                B3u[2] = u * u;
                float2 position = {0,0};
                for(int i = 0;i<3;i++){
                    position = position + B3u[i] * bLines[bidx].CP[i];
                }
                bLines[bidx].vertexPos[idx] = position;
            }
        }
    }
}

#define N_LINES 256
#define BLOCK_DIM 32

void initializeBLines(BezierLine * bLines_h){
    float2 last = {0,0};
    for(int i = 0;i<N_LINES;i++){
        bLines_h[i].CP[0] = last;
        for(int j = 1;j<3;j++){
            bLines_h[i].CP[j].x = (float)rand()/(float)RAND_MAX;
            bLines_h[i].CP[j].y = (float)rand()/(float)RAND_MAX;
        }
        last = bLines_h[i].CP[2];
        bLines_h[i].nVertices = 0;
    }
}

int main(){
    BezierLine * bLines_h = new BezierLine[N_LINES];
    initializeBLines(bLines_h);

    BezierLine * bLines_d;
    cudaMalloc((void**)&bLines_d,N_LINES*sizeof(BezierLine));
    cudaMemcpy(bLines_d,bLines_h,N_LINES*sizeof(BezierLine),cudaMemcpyHostToDevice);

    computeBezierLines<<<N_LINES,BLOCK_DIM>>>(bLines_d,N_LINES);

    cudaFree(bLines_d);
    delete[] bLines_h;
}


	.file	"tmpxft_0026188a_00000000-6_bezier_curve.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16computeCurvatureP10BezierLine
	.type	_Z16computeCurvatureP10BezierLine, @function
_Z16computeCurvatureP10BezierLine:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z16computeCurvatureP10BezierLine, .-_Z16computeCurvatureP10BezierLine
	.globl	_Z16initializeBLinesP10BezierLine
	.type	_Z16initializeBLinesP10BezierLine, @function
_Z16initializeBLinesP10BezierLine:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorps	%xmm0, %xmm0
	leaq	73728(%rdi), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movaps	%xmm0, %xmm1
	movq	%rdi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
.L5:
	movss	%xmm1, (%rbx)
	addq	$288, %rbx
	movss	%xmm0, -284(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, -280(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, -276(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, -272(%rbx)
	call	rand@PLT
	xorl	%edx, %edx
	movss	-272(%rbx), %xmm1
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	movl	%edx, -8(%rbx)
	movss	%xmm0, -268(%rbx)
	cmpq	%rbp, %rbx
	jne	.L5
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z16initializeBLinesP10BezierLine, .-_Z16initializeBLinesP10BezierLine
	.globl	_Z50__device_stub__Z18computeBezierLinesP10BezierLineiP10BezierLinei
	.type	_Z50__device_stub__Z18computeBezierLinesP10BezierLineiP10BezierLinei, @function
_Z50__device_stub__Z18computeBezierLinesP10BezierLineiP10BezierLinei:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18computeBezierLinesP10BezierLinei(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L9:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z50__device_stub__Z18computeBezierLinesP10BezierLineiP10BezierLinei, .-_Z50__device_stub__Z18computeBezierLinesP10BezierLineiP10BezierLinei
	.globl	_Z18computeBezierLinesP10BezierLinei
	.type	_Z18computeBezierLinesP10BezierLinei, @function
_Z18computeBezierLinesP10BezierLinei:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z18computeBezierLinesP10BezierLineiP10BezierLinei
	.cfi_endproc
.LFE2059:
	.size	_Z18computeBezierLinesP10BezierLinei, .-_Z18computeBezierLinesP10BezierLinei
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$73728, %edi
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_Z16initializeBLinesP10BezierLine
	leaq	8(%rsp), %rdi
	movl	$73728, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$73728, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16777217, %edi
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$8, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	8(%rsp), %rdi
	movl	$256, %esi
	call	_Z50__device_stub__Z18computeBezierLinesP10BezierLineiP10BezierLinei
.L15:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z18computeBezierLinesP10BezierLinei"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18computeBezierLinesP10BezierLinei(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

#define MAX_TESS_POINTS 32 

struct BezierLine{
    float2 CP[3];//control points for the line
    float2 vertexPos[MAX_TESS_POINTS];//Vertex position array to tessellate into 
                                      //Number of tessellated vertices
    int nVertices;
};

__forceinline__ __device__ float2 operator+(float2 a,float2 b){
    float2 c;
    c.x = a.x + b.x;
    c.y = a.y + b.y;
    return c;
}

__forceinline__ __device__ float2 operator-(float2 a, float2 b){
    float2 c;
    c.x = a.x - b.x;
    c.y = a.y - b.y;
    return c;
}

__forceinline__ __device__ float2 operator*(float a, float2 b){
    float2 c;
    c.x = a * b.x;
    c.y = a * b.y;
    return c;
} 

__forceinline__ __device__ float length(float2 a){
    return sqrtf(a.x * a.x + a.y * a.y);
}

__device__ float computeCurvature(BezierLine* bLines){
    int bidx = blockIdx.x;

    float curvature = length(bLines[bidx].CP[1] - 0.5f * (bLines[bidx].CP[0] + bLines[bidx].CP[2]))/length(bLines[bidx].CP[2] - bLines[bidx].CP[0]);
    return curvature;
}

__global__ void computeBezierLines(BezierLine* bLines, int nLines){
    int bidx = blockIdx.x;

    if(bidx < nLines){
        //compute the curvature of the line
        float curvature = computeCurvature(bLines);

        //From the curvature, compute the number of tessellation points
        int nTessPoints = min(max((int)(curvature * 16.0f),4),32);
        bLines[bidx].nVertices = nTessPoints;

        //Loop through vertices to be tessellated, incrementing by blockDim.x
        for(int inc = 0;inc < nTessPoints;inc += blockDim.x){
            int idx = inc + threadIdx.x;//Compute a unique index for this point
            if(idx < nTessPoints){
                float u = (float)idx /(float)(nTessPoints - 1);//compute u from idx
                float omu = 1.0f - u;
                float B3u[3];
                B3u[0] = omu * omu;
                B3u[1] = 2.0f * u * omu;
                B3u[2] = u * u;
                float2 position = {0,0};
                for(int i = 0;i<3;i++){
                    position = position + B3u[i] * bLines[bidx].CP[i];
                }
                bLines[bidx].vertexPos[idx] = position;
            }
        }
    }
}

#define N_LINES 256
#define BLOCK_DIM 32

void initializeBLines(BezierLine * bLines_h){
    float2 last = {0,0};
    for(int i = 0;i<N_LINES;i++){
        bLines_h[i].CP[0] = last;
        for(int j = 1;j<3;j++){
            bLines_h[i].CP[j].x = (float)rand()/(float)RAND_MAX;
            bLines_h[i].CP[j].y = (float)rand()/(float)RAND_MAX;
        }
        last = bLines_h[i].CP[2];
        bLines_h[i].nVertices = 0;
    }
}

int main(){
    BezierLine * bLines_h = new BezierLine[N_LINES];
    initializeBLines(bLines_h);

    BezierLine * bLines_d;
    hipMalloc((void**)&bLines_d,N_LINES*sizeof(BezierLine));
    hipMemcpy(bLines_d,bLines_h,N_LINES*sizeof(BezierLine),hipMemcpyHostToDevice);

    computeBezierLines<<<N_LINES,BLOCK_DIM>>>(bLines_d,N_LINES);

    hipFree(bLines_d);
    delete[] bLines_h;
}


	.text
	.file	"bezier_curve.hip"
	.globl	_Z33__device_stub__computeBezierLinesP10BezierLinei # -- Begin function _Z33__device_stub__computeBezierLinesP10BezierLinei
	.type	_Z33__device_stub__computeBezierLinesP10BezierLinei,@function
_Z33__device_stub__computeBezierLinesP10BezierLinei: # @_Z33__device_stub__computeBezierLinesP10BezierLinei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18computeBezierLinesP10BezierLinei, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__computeBezierLinesP10BezierLinei, .Lfunc_end0-_Z33__device_stub__computeBezierLinesP10BezierLinei
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z16initializeBLinesP10BezierLine
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z16initializeBLinesP10BezierLine
	.type	_Z16initializeBLinesP10BezierLine,@function
_Z16initializeBLinesP10BezierLine:      # @_Z16initializeBLinesP10BezierLine
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	leaq	12(%rdi), %r14
	xorps	%xmm0, %xmm0
	xorl	%r15d, %r15d
.LBB1_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	leaq	(%r15,%r15,8), %r12
	shlq	$5, %r12
	leaq	(%rbx,%r12), %r13
	movlps	%xmm0, (%rbx,%r12)
	xorl	%ebp, %ebp
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, -4(%r14,%rbp,8)
	callq	rand
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%rbp,8)
	incq	%rbp
	cmpq	$2, %rbp
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movsd	16(%r13), %xmm0                 # xmm0 = mem[0],zero
	movl	$0, 280(%rbx,%r12)
	incq	%r15
	addq	$288, %r14                      # imm = 0x120
	cmpq	$256, %r15                      # imm = 0x100
	jne	.LBB1_1
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z16initializeBLinesP10BezierLine, .Lfunc_end1-_Z16initializeBLinesP10BezierLine
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$73728, %edi                    # imm = 0x12000
	callq	_Znam
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_Z16initializeBLinesP10BezierLine
	movq	%rsp, %r14
	movl	$73728, %esi                    # imm = 0x12000
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$73728, %edx                    # imm = 0x12000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967328, %rdx               # imm = 0x100000020
	leaq	224(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	_Z33__device_stub__computeBezierLinesP10BezierLinei
.LBB2_2:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18computeBezierLinesP10BezierLinei, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18computeBezierLinesP10BezierLinei,@object # @_Z18computeBezierLinesP10BezierLinei
	.section	.rodata,"a",@progbits
	.globl	_Z18computeBezierLinesP10BezierLinei
	.p2align	3, 0x0
_Z18computeBezierLinesP10BezierLinei:
	.quad	_Z33__device_stub__computeBezierLinesP10BezierLinei
	.size	_Z18computeBezierLinesP10BezierLinei, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z18computeBezierLinesP10BezierLinei"
	.size	.L__unnamed_1, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__computeBezierLinesP10BezierLinei
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18computeBezierLinesP10BezierLinei
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18computeBezierLinesP10BezierLinei ; -- Begin function _Z18computeBezierLinesP10BezierLinei
	.globl	_Z18computeBezierLinesP10BezierLinei
	.p2align	8
	.type	_Z18computeBezierLinesP10BezierLinei,@function
_Z18computeBezierLinesP10BezierLinei:   ; @_Z18computeBezierLinesP10BezierLinei
; %bb.0:
	s_load_b32 s2, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB0_7
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x0
	s_mul_i32 s2, s15, 0x120
	s_mul_hi_i32 s3, s15, 0x120
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s4, s2
	s_addc_u32 s7, s5, s3
	s_clause 0x1
	s_load_b128 s[8:11], s[6:7], 0x0
	s_load_b64 s[2:3], s[6:7], 0x10
	s_waitcnt lgkmcnt(0)
	v_add_f32_e64 v1, s9, s3
	v_sub_f32_e64 v2, s3, s9
	v_add_f32_e64 v3, s8, s2
	v_sub_f32_e64 v4, s2, s8
	s_mov_b32 s8, 0
	v_fma_f32 v1, v1, -0.5, s11
	v_mul_f32_e32 v2, v2, v2
	v_fma_f32 v3, v3, -0.5, s10
	s_mul_hi_i32 s9, s15, 0x120
	s_mul_i32 s11, s15, 0x120
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v1, v1, v1 :: v_dual_fmac_f32 v2, v4, v4
	v_fmac_f32_e32 v1, v3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	v_mul_f32_e32 v4, 0x4f800000, v1
	v_cmp_gt_f32_e64 s2, 0xf800000, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cndmask_b32_e64 v1, v1, v4, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sqrt_f32_e32 v3, v2
	v_sqrt_f32_e32 v4, v1
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, -1, v3
	v_add_nc_u32_e32 v7, 1, v3
	v_add_nc_u32_e32 v6, -1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v9, -v5, v3, v2
	v_add_nc_u32_e32 v8, 1, v4
	v_fma_f32 v11, -v7, v3, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v10, -v6, v4, v1
	v_cmp_ge_f32_e64 s3, 0, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v8, v4, v1
	v_cndmask_b32_e64 v3, v3, v5, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s3, 0, v10
	v_cndmask_b32_e64 v4, v4, v6, s3
	v_cmp_lt_f32_e64 s3, 0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, v3, v7, s3
	v_cmp_lt_f32_e64 s3, 0, v12
	v_mul_f32_e32 v5, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v8, s3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_mul_f32 v6, 0x37800000, v4
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, v4, v6, s2
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v1, 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v4, v1, vcc_lo
	v_div_scale_f32 v3, null, v2, v2, v1
	v_div_scale_f32 v6, vcc_lo, v1, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	v_fmac_f32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v6, v4
	v_fma_f32 v7, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v4
	v_fma_f32 v3, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v3, v3, v4, v5
	v_mov_b32_e32 v5, 0
	v_div_fixup_f32 v1, v3, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, 0x41800000, v1
	v_cvt_i32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_med3_i32 v6, v1, 4, 32
	global_store_b32 v5, v6, s[6:7] offset:280
	s_load_b32 s0, s[0:1], 0x1c
	v_add_nc_u32_e32 v1, -1, v6
	v_cvt_f32_i32_e32 v7, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s0, 0xffff
	s_add_u32 s0, s6, 4
	s_addc_u32 s1, s7, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_add_nc_u32_e32 v1, s8, v0
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v1, v6
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cvt_f32_i32_e32 v2, v1
	s_mov_b64 s[2:3], 0
	s_mov_b64 s[6:7], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v7, v7, v2
	v_div_scale_f32 v9, vcc_lo, v2, v7, v2
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v8, v4
	v_mul_f32_e32 v8, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v3, v8, v9
	v_fmac_f32_e32 v8, v10, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v8, v9
	v_div_fmas_f32 v3, v3, v4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v2, v3, v7, v2
	v_dual_mov_b32 v3, 0 :: v_dual_sub_f32 v4, 1.0, v2
	v_add_f32_e32 v9, v2, v2
	v_mul_f32_e32 v2, v2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v8, v4, v4
	v_dual_mul_f32 v9, v9, v4 :: v_dual_mov_b32 v4, 0
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[10:11], v5, s[6:7] offset:-4
	s_cmp_eq_u32 s2, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 2
	v_cndmask_b32_e32 v12, v8, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_add_u32 s6, s6, 8
	v_cndmask_b32_e32 v12, v12, v2, vcc_lo
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s2, 3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v3, v12, v10
	v_fmac_f32_e32 v4, v12, v11
	s_cbranch_scc0 .LBB0_4
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_u32 s2, s4, s11
	s_addc_u32 s3, s5, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b64 v[1:2], v[3:4], off offset:24
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s8, s8, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, s8, v6
	s_cbranch_vccnz .LBB0_2
.LBB0_7:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18computeBezierLinesP10BezierLinei
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18computeBezierLinesP10BezierLinei, .Lfunc_end0-_Z18computeBezierLinesP10BezierLinei
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 928
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18computeBezierLinesP10BezierLinei
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18computeBezierLinesP10BezierLinei.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
