#include <stdio.h>
#include <math.h>

void printMatrix(const int *A, int rows, int cols) {
    for(int i = 0; i < rows*cols*4; i++){
        printf("%d ", A[i]);   
        printf(" ");
        if ((i+1)%9 == 0){
          printf("|");
        }
    }
    printf("\n");
};

void readInput_soa(const char *filename, int **Soa,  int *rows, int *cols) {
  FILE *file;
  file = fopen(filename, "r");
  fscanf(file, "%d %d", rows, cols);
  int * A_F0 = (int *) malloc(*rows * (*cols)* (4) * sizeof(int));
  for(int i = 0; i < *rows*(*cols)*(4); i++) { 
    fscanf(file, "%d ", &A_F0[i]); 
  }
  fclose(file);
  *Soa = A_F0;
};

void readInput_aos(const char *filename, int **Aos, int *rows, int *cols) {
  FILE *file;
  file = fopen(filename, "r");
  fscanf(file, "%d %d", rows, cols);
  int * A_F1 = (int *) malloc(*rows * (*cols)* (4) * sizeof(int));
  for(int j = 0; j <  4; j++) {
    int counter = 0;
    for(int i = 0; i < *cols*(*rows); i++){
      fscanf(file, "%d ", &A_F1[counter +j]);
      counter = counter + 4;
      }
  }
  fclose(file);
  *Aos = A_F1;
}

__global__ void step_periodic_Soa(int * array,int rows, int cols){
  int tId = threadIdx.x + blockIdx.x * blockDim.x;
  if (tId < rows*cols){

    int x = tId%(cols);
    int y = (int) tId/rows;

    //Colission
    if (array[tId] == 1 && array[tId + 2*rows*cols] == 1){
      if(array[tId + rows*cols] == 0 && array[tId+rows*cols*3] == 0){
        array[tId] = 0;
        array[tId + 2*rows*cols] = 0;
        array[tId + rows*cols] = 1;
        array[tId+rows*cols*3] = 1;
      }
    }
    if (array[tId + rows*cols] == 1 && array[tId+rows*cols*3] == 1){
      if(array[tId] == 0 && array[tId + 2*rows*cols] == 0){
        array[tId + rows*cols] = 0;
        array[tId+rows*cols*3] = 0;
        array[tId] = 1;
        array[tId + 2*rows*cols] = 1;
      }
    }
    //streaming
    int c_aux = x + 1; 
    if (c_aux == cols){
        c_aux = 0;
      }
    if (array[tId] == 1){
        array[(y*rows + c_aux)] = array[tId]*2;
    }
    //left
    c_aux = x - 1;
    if (c_aux < 0){
      c_aux = cols -1;
    }
    if (array[tId+ 2*rows*cols] == 1){
      array[(y*rows + c_aux) + 2*rows*cols] = array[tId+ 2*rows*cols]*2;
    }

    //top
    c_aux = y + 1;
    if (c_aux == rows){
      c_aux = 0;
    }
    if (array[tId + rows*cols] == 1){
      array[(c_aux*rows + x) + + rows*cols] = array[tId+ rows*cols]*2;
    }

    //bottom
    c_aux = y + 1;
    if (c_aux < 0){
      c_aux = rows-1;
    }
    if (array[tId+ 3*rows*cols] == 1){
      array[(c_aux*rows + x)+ 3*rows*cols] = array[tId+ 3*rows*cols]*2;
    }

    //Correction
    if(array[tId] == 1){
      array[tId] = 0;
    }
    if(array[tId] == 2){
      array[tId] = 1;
    }
    if(array[tId+ rows*cols] == 1){
      array[tId+ rows*cols] = 0;
    }
    if(array[tId+ rows*cols] == 2){
      array[tId+ rows*cols] = 1;
    }
    if(array[tId+ 2*rows*cols] == 1){
      array[tId+ 2*rows*cols] = 0;
    }
    if(array[tId+ 2*rows*cols] == 2){
      array[tId+ 2*rows*cols] = 1;
    }
    if(array[tId+ 3*rows*cols] == 1){
      array[tId+ 3*rows*cols] = 0;
    }
    if(array[tId+ 3*rows*cols] == 2){
      array[tId+ 3*rows*cols] = 1;
    }

  }
};

//Periodic boundaries condition Array of Structures

__global__ void step_periodic_Aos(int * array,int rows, int cols){
  int tId = threadIdx.x + blockIdx.x * blockDim.x;
  if (tId < rows*cols){
    int x = tId%(cols);
    int y = (int) tId/rows;

    //Colission

    if (array[tId*4+0] == 1 && array[tId*4+2] == 1){
      if(array[tId*4+1] == 0 && array[tId*4+3] == 0){
        array[tId*4+0] = 0;
        array[tId*4+2] = 0;
        array[tId*4+1] = 1;
        array[tId*4+3] = 1;
      }
    }
    if (array[tId*4+1] == 1 && array[tId*4+3] == 1){
      if(array[tId*4+0] == 0 && array[tId*4+2] == 0){
        array[tId*4+1] = 0;
        array[tId*4+3] = 0;
        array[tId*4+0] = 1;
        array[tId*4+2] = 1;
      }
    }

    //streaming 

    //right
    int c_aux = x + 1;
    if (c_aux == cols){
      c_aux = 0;
    }
    if (array[tId*4] == 1){
      array[(y*rows + c_aux)*4] = array[tId*4]*2;
    }

    //left
    c_aux = x - 1;
    if (c_aux < 0){
      c_aux = cols -1;
    }
    if (array[tId*4+2] == 1){
      array[(y*rows + c_aux)*4 + 2] = array[tId*4+2]*2;
    }

    //top
    c_aux = y + 1;
    if (c_aux == rows){
      c_aux = 0;
    }
    if (array[tId*4+1] == 1){
      array[(c_aux*rows + x)*4 + 1] = array[tId*4+1]*2;
    }

    //bottom
    c_aux = y + 1;
    if (c_aux < 0){
      c_aux = rows-1;
    }
    if (array[tId*4+3] == 1){
      array[(c_aux*rows + x)*4 + 3] = array[tId*4+3]*2;
    }

    //Correction
    for(int i = 0; i < 4; i++){
      if(array[tId*4+i] == 1){
        array[tId*4+i] = 0;
      }
      if(array[tId*4+i] == 2){
        array[tId*4+i] = 1;
      }
    };
  }
};  

int main(int argc, char const *argv[])
{
  int rows, cols;
  int *Aos, *Soa;
  int *d_Aos, *d_Soa;

  readInput_aos("initial.txt", &Aos, &rows, &cols);
  readInput_soa("initial.txt", &Soa, &rows, &cols);

  //printMatrix(Soa,rows,cols);

  int n = (int)(rows*cols);
  int block_size = 256;
  int grid_size = (int) ceil((float)n / block_size);

  cudaMalloc(&d_Aos, 4 * rows * cols * sizeof(int));
  cudaMalloc(&d_Soa, 4 * rows * cols * sizeof(int));

  cudaMemcpy(d_Aos, Aos, 4 * rows * cols * sizeof(int), cudaMemcpyHostToDevice);
  cudaMemcpy(d_Soa, Soa, 4 * rows * cols * sizeof(int), cudaMemcpyHostToDevice);

  for(int k = 0; k < 1000; k++){
    //step_periodic_Aos<<<grid_size, block_size>>>(d_Aos, rows, cols);
    step_periodic_Soa<<<grid_size, block_size>>>(d_Soa, rows, cols);
  }

  cudaMemcpy(Aos, d_Aos, 4 * rows * cols * sizeof(int), cudaMemcpyDeviceToHost);
  cudaMemcpy(Soa, d_Soa, 4 * rows * cols * sizeof(int), cudaMemcpyDeviceToHost);

  cudaFree(d_Aos);
  cudaFree(d_Soa);
  //printf("----- \n");
  //printMatrix(Soa,rows,cols);


  //printMatrix(Aos,rows,cols);
  //printf("----- \n");
  //printMatrix(Soa,rows,cols);

return 0;

}
	.file	"tmpxft_003a8c3c_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	" "
.LC2:
	.string	"|"
.LC3:
	.string	"\n"
	.text
	.globl	_Z11printMatrixPKiii
	.type	_Z11printMatrixPKiii, @function
_Z11printMatrixPKiii:
.LFB2027:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leal	0(,%rsi,4), %ebp
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L8
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	1(%rbx), %eax
	movl	$9, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L4
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L4:
	incq	%rbx
	jmp	.L3
.L8:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC3(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z11printMatrixPKiii, .-_Z11printMatrixPKiii
	.section	.rodata.str1.1
.LC4:
	.string	"r"
.LC5:
	.string	"%d %d"
	.text
	.globl	_Z13readInput_soaPKcPPiS1_S1_
	.type	_Z13readInput_soaPKcPPiS1_S1_, @function
_Z13readInput_soaPKcPPiS1_S1_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	leaq	.LC4(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	fopen@PLT
	movq	%rbp, %rcx
	movq	%r12, %rdx
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	(%r12), %edi
	imull	0(%rbp), %edi
	sall	$2, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, %r14
	movq	%rax, %r15
.L10:
	movl	(%r12), %eax
	imull	0(%rbp), %eax
	sall	$2, %eax
	cmpl	%ebx, %eax
	jle	.L13
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	incl	%ebx
	leaq	.LC0(%rip), %rsi
	addq	$4, %r15
	call	__isoc23_fscanf@PLT
	jmp	.L10
.L13:
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	%r14, 0(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z13readInput_soaPKcPPiS1_S1_, .-_Z13readInput_soaPKcPPiS1_S1_
	.globl	_Z13readInput_aosPKcPPiS1_S1_
	.type	_Z13readInput_aosPKcPPiS1_S1_, @function
_Z13readInput_aosPKcPPiS1_S1_:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	leaq	.LC4(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	call	fopen@PLT
	movq	%r12, %rcx
	movq	%rbp, %rdx
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	0(%rbp), %edi
	imull	(%r12), %edi
	sall	$2, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	xorl	%r9d, %r9d
	movq	%rax, %r14
	movq	%rax, %r8
.L15:
	movq	%r8, %r15
	xorl	%ebx, %ebx
.L18:
	movl	(%r12), %eax
	imull	0(%rbp), %eax
	cmpl	%ebx, %eax
	jle	.L20
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	movq	%r8, 24(%rsp)
	leaq	.LC0(%rip), %rsi
	movl	%r9d, 20(%rsp)
	incl	%ebx
	addq	$16, %r15
	call	__isoc23_fscanf@PLT
	movq	24(%rsp), %r8
	movl	20(%rsp), %r9d
	jmp	.L18
.L20:
	incl	%r9d
	addq	$4, %r8
	cmpl	$4, %r9d
	jne	.L15
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	%r14, 0(%r13)
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z13readInput_aosPKcPPiS1_S1_, .-_Z13readInput_aosPKcPPiS1_S1_
	.globl	_Z39__device_stub__Z17step_periodic_SoaPiiiPiii
	.type	_Z39__device_stub__Z17step_periodic_SoaPiiiPiii, @function
_Z39__device_stub__Z17step_periodic_SoaPiiiPiii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17step_periodic_SoaPiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L21:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z39__device_stub__Z17step_periodic_SoaPiiiPiii, .-_Z39__device_stub__Z17step_periodic_SoaPiiiPiii
	.globl	_Z17step_periodic_SoaPiii
	.type	_Z17step_periodic_SoaPiii, @function
_Z17step_periodic_SoaPiii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17step_periodic_SoaPiiiPiii
	.cfi_endproc
.LFE2056:
	.size	_Z17step_periodic_SoaPiii, .-_Z17step_periodic_SoaPiii
	.section	.rodata.str1.1
.LC6:
	.string	"initial.txt"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movabsq	$4294967552, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	$1000, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	.LC6(%rip), %rbx
	movq	%rbx, %rdi
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %r12
	leaq	8(%rsp), %rbp
	movq	%r12, %rcx
	movq	%rbp, %rdx
	leaq	16(%rsp), %rsi
	call	_Z13readInput_aosPKcPPiS1_S1_
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rdi
	leaq	24(%rsp), %rsi
	call	_Z13readInput_soaPKcPPiS1_S1_
	movl	8(%rsp), %ebx
	imull	12(%rsp), %ebx
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC7(%rip), %xmm0
	call	ceilf@PLT
	leal	0(,%rbx,4), %esi
	leaq	32(%rsp), %rdi
	movslq	%esi, %rsi
	cvttss2sil	%xmm0, %ebp
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	8(%rsp), %esi
	imull	12(%rsp), %esi
	leaq	40(%rsp), %rdi
	sall	$2, %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	8(%rsp), %edx
	imull	12(%rsp), %edx
	movl	$1, %ecx
	movq	16(%rsp), %r12
	movq	32(%rsp), %rdi
	sall	$2, %edx
	movq	%r12, %rsi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	8(%rsp), %edx
	imull	12(%rsp), %edx
	movl	$1, %ecx
	movq	24(%rsp), %rbx
	movq	40(%rsp), %rdi
	sall	$2, %edx
	movq	%rbx, %rsi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
.L28:
	movl	%ebp, 48(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movl	12(%rsp), %edx
	movl	8(%rsp), %esi
	movq	40(%rsp), %rdi
	call	_Z39__device_stub__Z17step_periodic_SoaPiiiPiii
.L27:
	decl	%r13d
	jne	.L28
	movl	8(%rsp), %edx
	imull	12(%rsp), %edx
	movl	$2, %ecx
	movq	%r12, %rdi
	movq	32(%rsp), %rsi
	sall	$2, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	8(%rsp), %edx
	imull	12(%rsp), %edx
	movq	%rbx, %rdi
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	sall	$2, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.text
	.globl	_Z39__device_stub__Z17step_periodic_AosPiiiPiii
	.type	_Z39__device_stub__Z17step_periodic_AosPiiiPiii, @function
_Z39__device_stub__Z17step_periodic_AosPiiiPiii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17step_periodic_AosPiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L32:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z39__device_stub__Z17step_periodic_AosPiiiPiii, .-_Z39__device_stub__Z17step_periodic_AosPiiiPiii
	.globl	_Z17step_periodic_AosPiii
	.type	_Z17step_periodic_AosPiii, @function
_Z17step_periodic_AosPiii:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17step_periodic_AosPiiiPiii
	.cfi_endproc
.LFE2058:
	.size	_Z17step_periodic_AosPiii, .-_Z17step_periodic_AosPiii
	.section	.rodata.str1.1
.LC8:
	.string	"_Z17step_periodic_AosPiii"
.LC9:
	.string	"_Z17step_periodic_SoaPiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17step_periodic_AosPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17step_periodic_SoaPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC7:
	.long	998244352
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>

void printMatrix(const int *A, int rows, int cols) {
    for(int i = 0; i < rows*cols*4; i++){
        printf("%d ", A[i]);   
        printf(" ");
        if ((i+1)%9 == 0){
          printf("|");
        }
    }
    printf("\n");
};

void readInput_soa(const char *filename, int **Soa,  int *rows, int *cols) {
  FILE *file;
  file = fopen(filename, "r");
  fscanf(file, "%d %d", rows, cols);
  int * A_F0 = (int *) malloc(*rows * (*cols)* (4) * sizeof(int));
  for(int i = 0; i < *rows*(*cols)*(4); i++) { 
    fscanf(file, "%d ", &A_F0[i]); 
  }
  fclose(file);
  *Soa = A_F0;
};

void readInput_aos(const char *filename, int **Aos, int *rows, int *cols) {
  FILE *file;
  file = fopen(filename, "r");
  fscanf(file, "%d %d", rows, cols);
  int * A_F1 = (int *) malloc(*rows * (*cols)* (4) * sizeof(int));
  for(int j = 0; j <  4; j++) {
    int counter = 0;
    for(int i = 0; i < *cols*(*rows); i++){
      fscanf(file, "%d ", &A_F1[counter +j]);
      counter = counter + 4;
      }
  }
  fclose(file);
  *Aos = A_F1;
}

__global__ void step_periodic_Soa(int * array,int rows, int cols){
  int tId = threadIdx.x + blockIdx.x * blockDim.x;
  if (tId < rows*cols){

    int x = tId%(cols);
    int y = (int) tId/rows;

    //Colission
    if (array[tId] == 1 && array[tId + 2*rows*cols] == 1){
      if(array[tId + rows*cols] == 0 && array[tId+rows*cols*3] == 0){
        array[tId] = 0;
        array[tId + 2*rows*cols] = 0;
        array[tId + rows*cols] = 1;
        array[tId+rows*cols*3] = 1;
      }
    }
    if (array[tId + rows*cols] == 1 && array[tId+rows*cols*3] == 1){
      if(array[tId] == 0 && array[tId + 2*rows*cols] == 0){
        array[tId + rows*cols] = 0;
        array[tId+rows*cols*3] = 0;
        array[tId] = 1;
        array[tId + 2*rows*cols] = 1;
      }
    }
    //streaming
    int c_aux = x + 1; 
    if (c_aux == cols){
        c_aux = 0;
      }
    if (array[tId] == 1){
        array[(y*rows + c_aux)] = array[tId]*2;
    }
    //left
    c_aux = x - 1;
    if (c_aux < 0){
      c_aux = cols -1;
    }
    if (array[tId+ 2*rows*cols] == 1){
      array[(y*rows + c_aux) + 2*rows*cols] = array[tId+ 2*rows*cols]*2;
    }

    //top
    c_aux = y + 1;
    if (c_aux == rows){
      c_aux = 0;
    }
    if (array[tId + rows*cols] == 1){
      array[(c_aux*rows + x) + + rows*cols] = array[tId+ rows*cols]*2;
    }

    //bottom
    c_aux = y + 1;
    if (c_aux < 0){
      c_aux = rows-1;
    }
    if (array[tId+ 3*rows*cols] == 1){
      array[(c_aux*rows + x)+ 3*rows*cols] = array[tId+ 3*rows*cols]*2;
    }

    //Correction
    if(array[tId] == 1){
      array[tId] = 0;
    }
    if(array[tId] == 2){
      array[tId] = 1;
    }
    if(array[tId+ rows*cols] == 1){
      array[tId+ rows*cols] = 0;
    }
    if(array[tId+ rows*cols] == 2){
      array[tId+ rows*cols] = 1;
    }
    if(array[tId+ 2*rows*cols] == 1){
      array[tId+ 2*rows*cols] = 0;
    }
    if(array[tId+ 2*rows*cols] == 2){
      array[tId+ 2*rows*cols] = 1;
    }
    if(array[tId+ 3*rows*cols] == 1){
      array[tId+ 3*rows*cols] = 0;
    }
    if(array[tId+ 3*rows*cols] == 2){
      array[tId+ 3*rows*cols] = 1;
    }

  }
};

//Periodic boundaries condition Array of Structures

__global__ void step_periodic_Aos(int * array,int rows, int cols){
  int tId = threadIdx.x + blockIdx.x * blockDim.x;
  if (tId < rows*cols){
    int x = tId%(cols);
    int y = (int) tId/rows;

    //Colission

    if (array[tId*4+0] == 1 && array[tId*4+2] == 1){
      if(array[tId*4+1] == 0 && array[tId*4+3] == 0){
        array[tId*4+0] = 0;
        array[tId*4+2] = 0;
        array[tId*4+1] = 1;
        array[tId*4+3] = 1;
      }
    }
    if (array[tId*4+1] == 1 && array[tId*4+3] == 1){
      if(array[tId*4+0] == 0 && array[tId*4+2] == 0){
        array[tId*4+1] = 0;
        array[tId*4+3] = 0;
        array[tId*4+0] = 1;
        array[tId*4+2] = 1;
      }
    }

    //streaming 

    //right
    int c_aux = x + 1;
    if (c_aux == cols){
      c_aux = 0;
    }
    if (array[tId*4] == 1){
      array[(y*rows + c_aux)*4] = array[tId*4]*2;
    }

    //left
    c_aux = x - 1;
    if (c_aux < 0){
      c_aux = cols -1;
    }
    if (array[tId*4+2] == 1){
      array[(y*rows + c_aux)*4 + 2] = array[tId*4+2]*2;
    }

    //top
    c_aux = y + 1;
    if (c_aux == rows){
      c_aux = 0;
    }
    if (array[tId*4+1] == 1){
      array[(c_aux*rows + x)*4 + 1] = array[tId*4+1]*2;
    }

    //bottom
    c_aux = y + 1;
    if (c_aux < 0){
      c_aux = rows-1;
    }
    if (array[tId*4+3] == 1){
      array[(c_aux*rows + x)*4 + 3] = array[tId*4+3]*2;
    }

    //Correction
    for(int i = 0; i < 4; i++){
      if(array[tId*4+i] == 1){
        array[tId*4+i] = 0;
      }
      if(array[tId*4+i] == 2){
        array[tId*4+i] = 1;
      }
    };
  }
};  

int main(int argc, char const *argv[])
{
  int rows, cols;
  int *Aos, *Soa;
  int *d_Aos, *d_Soa;

  readInput_aos("initial.txt", &Aos, &rows, &cols);
  readInput_soa("initial.txt", &Soa, &rows, &cols);

  //printMatrix(Soa,rows,cols);

  int n = (int)(rows*cols);
  int block_size = 256;
  int grid_size = (int) ceil((float)n / block_size);

  hipMalloc(&d_Aos, 4 * rows * cols * sizeof(int));
  hipMalloc(&d_Soa, 4 * rows * cols * sizeof(int));

  hipMemcpy(d_Aos, Aos, 4 * rows * cols * sizeof(int), hipMemcpyHostToDevice);
  hipMemcpy(d_Soa, Soa, 4 * rows * cols * sizeof(int), hipMemcpyHostToDevice);

  for(int k = 0; k < 1000; k++){
    //step_periodic_Aos<<<grid_size, block_size>>>(d_Aos, rows, cols);
    step_periodic_Soa<<<grid_size, block_size>>>(d_Soa, rows, cols);
  }

  hipMemcpy(Aos, d_Aos, 4 * rows * cols * sizeof(int), hipMemcpyDeviceToHost);
  hipMemcpy(Soa, d_Soa, 4 * rows * cols * sizeof(int), hipMemcpyDeviceToHost);

  hipFree(d_Aos);
  hipFree(d_Soa);
  //printf("----- \n");
  //printMatrix(Soa,rows,cols);


  //printMatrix(Aos,rows,cols);
  //printf("----- \n");
  //printMatrix(Soa,rows,cols);

return 0;

}
	.text
	.file	"main.hip"
	.globl	_Z11printMatrixPKiii            # -- Begin function _Z11printMatrixPKiii
	.type	_Z11printMatrixPKiii,@function
_Z11printMatrixPKiii:                   # @_Z11printMatrixPKiii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	shll	$2, %esi
	testl	%esi, %esi
	jle	.LBB0_6
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	movl	$1, %ebp
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebp, %eax
	imulq	$954437177, %rax, %rax          # imm = 0x38E38E39
	shrq	$33, %rax
	leal	(%rax,%rax,8), %r12d
	decl	%r12d
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$32, %edi
	callq	putchar@PLT
	cmpl	%r15d, %r12d
	jne	.LBB0_4
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=1
	movl	$124, %edi
	callq	putchar@PLT
.LBB0_4:                                #   in Loop: Header=BB0_2 Depth=1
	incq	%r15
	incl	%ebp
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB0_6:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z11printMatrixPKiii, .Lfunc_end0-_Z11printMatrixPKiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13readInput_soaPKcPPiS1_S1_   # -- Begin function _Z13readInput_soaPKcPPiS1_S1_
	.type	_Z13readInput_soaPKcPPiS1_S1_,@function
_Z13readInput_soaPKcPPiS1_S1_:          # @_Z13readInput_soaPKcPPiS1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, (%rsp)                    # 8-byte Spill
	movl	$.L.str.4, %esi
	callq	fopen
	movq	%rax, %r12
	movl	$.L.str.5, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	movq	%r14, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r15), %eax
	imull	(%r14), %eax
	shll	$2, %eax
	movslq	%eax, %rbx
	leaq	(,%rbx,4), %rdi
	callq	malloc
	movq	%rax, %r13
	testl	%ebx, %ebx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%r13, %rbp
	xorl	%ebx, %ebx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %esi
	movq	%r12, %rdi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%rbx
	movl	(%r15), %eax
	imull	(%r14), %eax
	shll	$2, %eax
	cltq
	addq	$4, %rbp
	cmpq	%rax, %rbx
	jl	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movq	%r12, %rdi
	callq	fclose
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	%r13, (%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13readInput_soaPKcPPiS1_S1_, .Lfunc_end1-_Z13readInput_soaPKcPPiS1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13readInput_aosPKcPPiS1_S1_   # -- Begin function _Z13readInput_aosPKcPPiS1_S1_
	.type	_Z13readInput_aosPKcPPiS1_S1_,@function
_Z13readInput_aosPKcPPiS1_S1_:          # @_Z13readInput_aosPKcPPiS1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r14
	movq	%rdx, %rbx
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movl	$.L.str.4, %esi
	callq	fopen
	movl	$.L.str.5, %esi
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movq	%r14, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movl	(%rbx), %ebx
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movl	(%r14), %ebp
	movl	%ebx, %eax
	imull	%ebp, %eax
	shll	$2, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$0, 12(%rsp)                    # 4-byte Folded Spill
	movq	24(%rsp), %r12                  # 8-byte Reload
	movq	16(%rsp), %r13                  # 8-byte Reload
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	movl	%ebx, %eax
	imull	%ebp, %eax
	testl	%eax, %eax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	movq	40(%rsp), %rdx                  # 8-byte Reload
	jle	.LBB2_4
# %bb.2:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	xorl	%r14d, %r14d
	movl	12(%rsp), %r15d                 # 4-byte Reload
.LBB2_3:                                # %.lr.ph
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r15d, %eax
	movq	%rdx, %rbp
	leaq	(,%rax,4), %rdx
	addq	%r13, %rdx
	movl	$.L.str, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	movq	%rcx, %rbx
	callq	__isoc23_fscanf
	movq	%rbp, %rdx
	movq	%rbx, %rcx
	incl	%r14d
	movl	(%rbx), %ebp
	movl	(%rdx), %ebx
	movl	%ebx, %eax
	imull	%ebp, %eax
	addl	$4, %r15d
	cmpl	%eax, %r14d
	jl	.LBB2_3
.LBB2_4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_1 Depth=1
	movl	12(%rsp), %eax                  # 4-byte Reload
	incl	%eax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	cmpl	$4, %eax
	jne	.LBB2_1
# %bb.5:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rcx, (%rax)
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z13readInput_aosPKcPPiS1_S1_, .Lfunc_end2-_Z13readInput_aosPKcPPiS1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__step_periodic_SoaPiii # -- Begin function _Z32__device_stub__step_periodic_SoaPiii
	.type	_Z32__device_stub__step_periodic_SoaPiii,@function
_Z32__device_stub__step_periodic_SoaPiii: # @_Z32__device_stub__step_periodic_SoaPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17step_periodic_SoaPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z32__device_stub__step_periodic_SoaPiii, .Lfunc_end3-_Z32__device_stub__step_periodic_SoaPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__step_periodic_AosPiii # -- Begin function _Z32__device_stub__step_periodic_AosPiii
	.type	_Z32__device_stub__step_periodic_AosPiii,@function
_Z32__device_stub__step_periodic_AosPiii: # @_Z32__device_stub__step_periodic_AosPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17step_periodic_AosPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z32__device_stub__step_periodic_AosPiii, .Lfunc_end4-_Z32__device_stub__step_periodic_AosPiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0x3b800000                      # float 0.00390625
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	leaq	48(%rsp), %rsi
	leaq	12(%rsp), %r13
	leaq	8(%rsp), %rbp
	movl	$.L.str.6, %edi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	_Z13readInput_aosPKcPPiS1_S1_
	leaq	40(%rsp), %rsi
	movl	$.L.str.6, %edi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	_Z13readInput_soaPKcPPiS1_S1_
	movl	(%rbp), %r15d
	imull	(%r13), %r15d
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14d
	shll	$2, %r15d
	movslq	%r15d, %rsi
	shlq	$2, %rsi
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	callq	hipMalloc
	movslq	(%r13), %rax
	movslq	(%rbp), %rsi
	imulq	%rax, %rsi
	shlq	$4, %rsi
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	leaq	48(%rsp), %rax
	movq	(%rax), %rsi
	movslq	(%r13), %rax
	movslq	(%rbp), %rdx
	imulq	%rax, %rdx
	shlq	$4, %rdx
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	leaq	40(%rsp), %rax
	movq	(%rax), %r12
	movslq	(%r13), %rax
	movslq	(%rbp), %rdx
	imulq	%rax, %rdx
	shlq	$4, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	btsq	$32, %r14
	movl	$1000, %ebp                     # imm = 0x3E8
	addq	$256, %rbx                      # imm = 0x100
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_3
# %bb.2:                                #   in Loop: Header=BB5_1 Depth=1
	movq	16(%rsp), %rdi
	movl	12(%rsp), %esi
	movl	8(%rsp), %edx
	callq	_Z32__device_stub__step_periodic_SoaPiii
.LBB5_3:                                #   in Loop: Header=BB5_1 Depth=1
	decl	%ebp
	jne	.LBB5_1
# %bb.4:
	movq	24(%rsp), %rsi
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$4, %rdx
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$4, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17step_periodic_SoaPiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17step_periodic_AosPiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"r"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d %d"
	.size	.L.str.5, 6

	.type	_Z17step_periodic_SoaPiii,@object # @_Z17step_periodic_SoaPiii
	.section	.rodata,"a",@progbits
	.globl	_Z17step_periodic_SoaPiii
	.p2align	3, 0x0
_Z17step_periodic_SoaPiii:
	.quad	_Z32__device_stub__step_periodic_SoaPiii
	.size	_Z17step_periodic_SoaPiii, 8

	.type	_Z17step_periodic_AosPiii,@object # @_Z17step_periodic_AosPiii
	.globl	_Z17step_periodic_AosPiii
	.p2align	3, 0x0
_Z17step_periodic_AosPiii:
	.quad	_Z32__device_stub__step_periodic_AosPiii
	.size	_Z17step_periodic_AosPiii, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"initial.txt"
	.size	.L.str.6, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17step_periodic_SoaPiii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17step_periodic_AosPiii"
	.size	.L__unnamed_2, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__step_periodic_SoaPiii
	.addrsig_sym _Z32__device_stub__step_periodic_AosPiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17step_periodic_SoaPiii
	.addrsig_sym _Z17step_periodic_AosPiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17step_periodic_SoaPiii ; -- Begin function _Z17step_periodic_SoaPiii
	.globl	_Z17step_periodic_SoaPiii
	.p2align	8
	.type	_Z17step_periodic_SoaPiii,@function
_Z17step_periodic_SoaPiii:              ; @_Z17step_periodic_SoaPiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s4, v4
	s_cbranch_execz .LBB0_27
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v2
	s_cbranch_execz .LBB0_6
; %bb.2:
	s_lshl_b32 s6, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s7, s6, 31
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v2, vcc_lo, v0, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v6
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.3:
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[4:5], 2
	v_add_co_u32 v6, vcc_lo, v0, s10
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.4:
	v_add3_u32 v8, s6, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	global_load_b32 v10, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	s_and_b32 exec_lo, exec_lo, vcc_lo
; %bb.5:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 1
	s_clause 0x3
	global_store_b32 v[0:1], v10, off
	global_store_b32 v[2:3], v10, off
	global_store_b32 v[6:7], v11, off
	global_store_b32 v[8:9], v11, off
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s8
	s_ashr_i32 s5, s4, 31
	v_add_nc_u32_e32 v7, s4, v4
	s_lshl_b64 s[6:7], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v2, vcc_lo, v0, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v6
	v_lshl_add_u32 v6, s4, 1, v7
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.7:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v9
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.8:
	global_load_b32 v9, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.9:
	v_subrev_nc_u32_e32 v9, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	global_load_b32 v11, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v11
	s_and_b32 exec_lo, exec_lo, vcc_lo
; %bb.10:
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, 1
	s_clause 0x3
	global_store_b32 v[2:3], v11, off
	global_store_b32 v[7:8], v11, off
	global_store_b32 v[0:1], v12, off
	global_store_b32 v[9:10], v12, off
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b32 v7, v[0:1], off
	s_ashr_i32 s5, s3, 31
	v_add_nc_u32_e32 v4, v4, v5
	s_add_i32 s6, s3, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, s6, s5
	s_ashr_i32 s6, s2, 31
	v_cvt_f32_u32_e32 v8, s5
	s_add_i32 s7, s2, s6
	s_sub_i32 s8, 0, s5
	s_xor_b32 s7, s7, s6
	v_xor_b32_e32 v4, v4, v5
	v_rcp_iflag_f32_e32 v8, v8
	v_cvt_f32_u32_e32 v9, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v8, 0x4f7ffffe, v8 :: v_dual_mul_f32 v9, 0x4f7ffffe, v9
	v_cvt_u32_f32_e32 v8, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v9, v9
	v_mul_lo_u32 v10, s8, v8
	s_sub_i32 s8, 0, s7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v11, s8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v8, v10
	v_mul_hi_u32 v11, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v8, v10
	v_add_nc_u32_e32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v8, v4, v8
	v_mul_hi_u32 v9, v4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v8, v8, s5
	v_mul_lo_u32 v10, v9, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v4, v8
	v_sub_nc_u32_e32 v4, v4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v11, s5, v8
	v_cmp_le_u32_e32 vcc_lo, s5, v8
	v_add_nc_u32_e32 v10, 1, v9
	v_cndmask_b32_e32 v8, v8, v11, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v4
	v_subrev_nc_u32_e32 v11, s7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v10 :: v_dual_cndmask_b32 v4, v4, v11
	v_add_nc_u32_e32 v11, 1, v9
	v_subrev_nc_u32_e32 v10, s5, v8
	v_cmp_le_u32_e32 vcc_lo, s5, v8
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v4
	v_xor_b32_e32 v10, s6, v5
	v_xor_b32_e32 v8, v8, v5
	v_cndmask_b32_e32 v4, v9, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v8, v5
	v_xor_b32_e32 v4, v4, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v9, v4, v10
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v7
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_dual_mov_b32 v7, 2 :: v_dual_add_nc_u32 v4, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, s3, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_mad_u64_u32 v[10:11], null, v9, s2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[4:5], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_store_b32 v[4:5], v7, off
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b32 s6, s4, 1
	s_mov_b32 s5, exec_lo
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[6:7], 2
	v_add_co_u32 v4, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v7
	s_cbranch_execz .LBB0_15
; %bb.14:
	v_cmp_gt_i32_e32 vcc_lo, 1, v8
	v_mul_lo_u32 v7, v9, s2
	v_cndmask_b32_e64 v10, v8, s3, vcc_lo
	s_add_i32 s3, s6, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v10, s3, v10, v7
	v_mov_b32_e32 v7, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	global_store_b32 v[10:11], v7, off
.LBB0_15:
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b32 v7, v[2:3], off
	v_add_nc_u32_e32 v10, 1, v9
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v7
	s_cbranch_execz .LBB0_17
; %bb.16:
	v_cmp_ne_u32_e32 vcc_lo, s2, v10
	v_cndmask_b32_e32 v7, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v7, s2
	v_add3_u32 v11, v8, s4, v7
	v_mov_b32_e32 v7, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s0, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
	global_store_b32 v[11:12], v7, off
.LBB0_17:
	s_or_b32 exec_lo, exec_lo, s3
	v_ashrrev_i32_e32 v7, 31, v6
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v11, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v11
	s_cbranch_execz .LBB0_19
; %bb.18:
	v_cmp_gt_i32_e32 vcc_lo, -1, v9
	s_add_i32 s5, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, v10, s5, vcc_lo
	v_mov_b32_e32 v10, 2
	v_mul_lo_u32 v9, v9, s2
	s_mul_i32 s2, s4, 3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v8, v8, s2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	global_store_b32 v[8:9], v10, off
.LBB0_19:
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v8, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, 0, s0
	v_cmp_eq_u32_e32 vcc_lo, 2, v8
	s_or_b32 s1, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_21
; %bb.20:
	v_cndmask_b32_e64 v8, v8, 1, vcc_lo
	global_store_b32 v[0:1], v8, off
.LBB0_21:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, 0, s0
	v_cmp_eq_u32_e32 vcc_lo, 2, v0
	s_or_b32 s1, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_23
; %bb.22:
	v_cndmask_b32_e64 v0, v0, 1, vcc_lo
	global_store_b32 v[2:3], v0, off
.LBB0_23:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v0, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, 0, s0
	v_cmp_eq_u32_e32 vcc_lo, 2, v0
	s_or_b32 s1, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_25
; %bb.24:
	v_cndmask_b32_e64 v0, v0, 1, vcc_lo
	global_store_b32 v[4:5], v0, off
.LBB0_25:                               ; %condstore.split
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v0, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, 0, s0
	v_cmp_eq_u32_e32 vcc_lo, 2, v0
	s_or_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_27
; %bb.26:
	v_cndmask_b32_e64 v0, v0, 1, vcc_lo
	global_store_b32 v[6:7], v0, off
.LBB0_27:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17step_periodic_SoaPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17step_periodic_SoaPiii, .Lfunc_end0-_Z17step_periodic_SoaPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1664
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17step_periodic_AosPiii ; -- Begin function _Z17step_periodic_AosPiii
	.globl	_Z17step_periodic_AosPiii
	.p2align	8
	.type	_Z17step_periodic_AosPiii,@function
_Z17step_periodic_AosPiii:              ; @_Z17step_periodic_AosPiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[6:7], null, s15, s4, v[0:1]
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s4, v6
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB1_27
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v6
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v0, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB1_9
; %bb.2:
	global_load_b32 v0, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_mov_b32_e32 v0, 1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.3:
	global_load_b32 v0, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_mov_b32_e32 v0, 1
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB1_7
; %bb.4:
	global_load_b32 v0, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_mov_b32_e32 v0, 1
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v3, v1
	global_store_b128 v[4:5], v[0:3], off
.LBB1_6:                                ; %Flow124
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_7:                                ; %Flow125
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_8:                                ; %Flow126
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_9:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v1, v[4:5], off offset:4
	s_mov_b32 s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v1
	s_cbranch_execz .LBB1_15
; %bb.10:
	global_load_b32 v1, v[4:5], off offset:12
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s1, -1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, s0, vcc_lo
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB1_14
; %bb.11:
	global_load_b32 v0, v[4:5], off offset:8
	s_mov_b32 s7, -1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_mov_b32_e32 v0, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_13
; %bb.12:
	v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 0
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v3, v1
	global_store_b128 v[4:5], v[0:3], off
.LBB1_13:                               ; %Flow122
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s1, s7, exec_lo
.LBB1_14:                               ; %Flow123
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
.LBB1_15:
	s_or_b32 exec_lo, exec_lo, s6
	s_ashr_i32 s0, s3, 31
	s_ashr_i32 s6, s2, 31
	s_add_i32 s7, s3, s0
	s_add_i32 s8, s2, s6
	s_xor_b32 s7, s7, s0
	s_xor_b32 s8, s8, s6
	v_cvt_f32_u32_e32 v1, s7
	v_cvt_f32_u32_e32 v2, s8
	s_sub_i32 s9, 0, s8
	s_sub_i32 s0, 0, s7
	v_ashrrev_i32_e32 v8, 31, v6
	v_rcp_iflag_f32_e32 v1, v1
	v_rcp_iflag_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v6, v8
	v_xor_b32_e32 v6, v6, v8
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v1, 0x4f7ffffe, v1 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v1, v1
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, s0, v1
	v_mul_lo_u32 v7, s9, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, v3
	v_mul_hi_u32 v7, v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v7
	v_mul_hi_u32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v3
	v_mul_hi_u32 v1, v6, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v2, s8
	v_mul_lo_u32 v1, v1, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v6, v3
	v_subrev_nc_u32_e32 v9, s8, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v6, v1
	v_cmp_le_u32_e32 vcc_lo, s8, v3
	v_subrev_nc_u32_e32 v7, s7, v1
	v_cmp_le_u32_e64 s0, s7, v1
	v_cndmask_b32_e32 v3, v3, v9, vcc_lo
	v_xor_b32_e32 v9, s6, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v1, v7, s0
	s_mov_b32 s0, exec_lo
	v_subrev_nc_u32_e32 v7, s7, v1
	v_add_nc_u32_e32 v6, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v3
	v_add_nc_u32_e32 v6, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v1
	v_xor_b32_e32 v2, v2, v9
	v_cndmask_b32_e32 v1, v1, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v9
	v_xor_b32_e32 v1, v1, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v8
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB1_17
; %bb.16:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 1, v1
	v_mul_lo_u32 v3, v2, s2
	v_cmp_ne_u32_e32 vcc_lo, s3, v0
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v6, v0, v3, 2
	v_mov_b32_e32 v0, 2
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[6:7], v0, off
.LBB1_17:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v0, v[4:5], off offset:8
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB1_19
; %bb.18:
	v_cmp_gt_i32_e32 vcc_lo, 1, v1
	v_cndmask_b32_e64 v0, v1, s3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[6:7], null, v2, s2, v[0:1]
	v_mov_b32_e32 v0, 2
	v_lshl_add_u32 v6, v6, 2, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[6:7], v0, off offset:8
.LBB1_19:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, 1, v2
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_21
; %bb.20:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, s2, v0
	v_cndmask_b32_e32 v3, 0, v0, vcc_lo
	v_mul_lo_u32 v3, v3, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v6, v3, v1, 2
	v_mov_b32_e32 v3, 2
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[6:7], v3, off offset:4
.LBB1_21:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v3, v[4:5], off offset:12
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v3
	s_cbranch_execz .LBB1_23
; %bb.22:
	v_cmp_gt_i32_e32 vcc_lo, -1, v2
	s_add_i32 s1, s2, -1
	v_mov_b32_e32 v2, 2
	v_cndmask_b32_e64 v0, v0, s1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s2
	v_add_lshl_u32 v0, v0, v1, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off offset:12
.LBB1_23:                               ; %.preheader
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b64 s[2:3], 0
.LBB1_24:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v2
	v_cndmask_b32_e64 v2, v2, 0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 2, v2
	s_or_b32 s1, s0, vcc_lo
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_26
; %bb.25:                               ;   in Loop: Header=BB1_24 Depth=1
	v_cndmask_b32_e64 v2, v2, 1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_26:                               ;   in Loop: Header=BB1_24 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 16
	s_cbranch_scc1 .LBB1_24
.LBB1_27:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17step_periodic_AosPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17step_periodic_AosPiii, .Lfunc_end1-_Z17step_periodic_AosPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1260
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17step_periodic_SoaPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17step_periodic_SoaPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17step_periodic_AosPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17step_periodic_AosPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
