//
// Created by heidies on 7/8/18.
//
#include <cuda_runtime.h>
#include <iostream>
#include <sys/time.h>

using namespace std;

#define CHECK(call)                                                                 \
{                                                                                  \
    const cudaError_t error = call;                                                   \
    if(error != cudaSuccess){                                                        \
        printf("Error: %s %d, ", __FILE__, __LINE__);                                \
        printf("code: %d, reason %s\n", error, cudaGetErrorString(error));              \
        exit(1);                                                                    \
    }                                                                              \
}


int recursiveReduce(int *data, const int size){
    if(size == 1) return data[0];
    int const stride = size / 2;

    for(int i = 0; i < stride; i++){
        data[i] += data[i + stride];
    }

    return recursiveReduce(data, stride);
}


__global__ void warmingUp(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return ;

    for(int stride = 1; stride < blockDim.x; stride <<= 1){
        if(tid % (2 * stride) == 0)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceNeighbored(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return ;

    for(int stride = 1; stride < blockDim.x; stride <<= 1){
        if(tid % (2 * stride) == 0)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceNeighboredLess(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return;

    for(int stride = 1; stride < blockDim.x; stride <<= 1){
        int index = 2 * stride * tid;
        if(index < blockDim.x / 2)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceInterleaved(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return;

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrolling2(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (2 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (2 * blockIdx.x) * blockDim.x;

    if(idx + blockDim.x < n) g_idata[idx] += g_idata[idx + blockDim.x];
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrolling4(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (4 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (4 * blockIdx.x) * blockDim.x;

    if(idx + 3 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
    }
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrolling8(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrollWarps8(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 32; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid < 32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid + 32];
        vmem[tid] += vmem[tid + 16];
        vmem[tid] += vmem[tid + 8];
        vmem[tid] += vmem[tid + 4];
        vmem[tid] += vmem[tid + 2];
        vmem[tid] += vmem[tid + 1];
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceCompleteUnrollWarps8(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    if(blockDim.x >= 1024 && tid < 512)
        idata[tid] += idata[tid + 512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256)
        idata[tid] += idata[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128)
        idata[tid] += idata[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64)
        idata[idx] += idata[tid + 64];
    __syncthreads();

    if(tid < 32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid + 32];
        vmem[tid] += vmem[tid + 16];
        vmem[tid] += vmem[tid + 8];
        vmem[tid] += vmem[tid + 4];
        vmem[tid] += vmem[tid + 2];
        vmem[tid] += vmem[tid + 1];
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


template <unsigned int iBlockSize>
__global__ void reduceCompleteUnroll(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    if(iBlockSize >= 1024 && tid < 512)
        idata[tid] += idata[tid + 512];
    __syncthreads();
    if(iBlockSize >= 512 && tid < 256)
        idata[tid] += idata[tid + 256];
    __syncthreads();
    if(iBlockSize >= 256 && tid < 128)
        idata[tid] += idata[tid + 128];
    __syncthreads();
    if(iBlockSize >= 128 && tid < 64)
        idata[idx] += idata[tid + 64];
    __syncthreads();

    if(tid < 32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid + 32];
        vmem[tid] += vmem[tid + 16];
        vmem[tid] += vmem[tid + 8];
        vmem[tid] += vmem[tid + 4];
        vmem[tid] += vmem[tid + 2];
        vmem[tid] += vmem[tid + 1];
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


double seconds(){
    struct timeval tp;
    gettimeofday(&tp, NULL);
    return ((double)tp.tv_sec + (double)tp.tv_usec * 1e-6) * 1e+3;
}


int main(int argc, char **argv){
    int dev = 0;
    cudaDeviceProp deviceProp;
    cudaGetDeviceProperties(&deviceProp, dev);
    cout << "Starting reduction at " << argv[0] << " ";
    cout << "device " << dev << ": " << deviceProp.name << " ";
    cudaSetDevice(dev);

    bool bResult = false;

    int size = 1 << 24;
    cout << "   with array size " << size << "   ";

    int blocksize = 512;
    if(argc > 1)
        blocksize = atoi(argv[1]);

    dim3 block (blocksize, 1);
    dim3 grid ((size + block.x - 1) / block.x, 1);

    cout << "grid " << grid.x << " block " << block.x << endl;

    size_t nBytes = size * sizeof(int);
    int *h_idata = (int *)malloc(nBytes);
    int *h_odata = (int *)malloc(grid.x * sizeof(int));
    int *tmp = (int *)malloc(nBytes);

    for(int i = 0; i < size; ++ i){
        h_idata[i] = (int)(rand() & 0xFF);
    }
    memcpy(tmp, h_idata, nBytes);

    double iStart, iElaps;
    int gpu_sum = 0;
    int *d_idata = NULL;
    cudaMalloc((void **)&d_idata, nBytes);
    int *d_odata = NULL;
    cudaMalloc((void **)&d_odata, grid.x * sizeof(int));

    iStart = seconds();
    int cpu_sum = recursiveReduce(tmp, size);
    iElaps = seconds() - iStart;
    cout << "cpu reduce     elapsed " << iElaps << " ms cpu_sum: " << cpu_sum << endl;


    cudaMemcpy(d_idata, h_idata, nBytes, cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    warmingUp<<<grid, block>>>(d_idata, d_odata, size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata, d_odata, grid.x * sizeof(int), cudaMemcpyDeviceToHost);
    gpu_sum = 0;

    for(int i = 0; i < grid.x; ++ i){
        gpu_sum += h_odata[i];
    }
    cout << "gpu warmingUp elapsed " << iElaps << " ms gpu_sum: " << gpu_sum << " <<<grid " << grid.x << " block " << block.x << ">>>" << endl;

    cudaMemcpy(d_idata, h_idata, nBytes, cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceNeighbored<<<grid, block>>>(d_idata, d_odata, size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata, d_odata, grid.x * sizeof(int), cudaMemcpyDeviceToHost);
    gpu_sum = 0;

    for(int i = 0; i < grid.x; ++ i){
        gpu_sum += h_odata[i];
    }
    cout << "gpu Neighbored elapsed " << iElaps << " ms gpu_sum: " << gpu_sum << " <<<grid " << grid.x << " block " << block.x << ">>>" << endl;

    cudaMemcpy(d_idata, h_idata, nBytes, cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceCompleteUnrollWarps8<<<grid.x / 8, block>>>(d_idata, d_odata, size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata, d_odata, grid.x * sizeof(int), cudaMemcpyDeviceToHost);
    gpu_sum = 0;

    for(int i = 0; i < grid.x / 8; ++ i){
        gpu_sum += h_odata[i];
    }
    cout << "gpu nroll elapsed " << iElaps << " ms gpu_sum: " << gpu_sum << " <<<grid " << grid.x / 8 << " block " << block.x << ">>>" << endl;

    free(h_idata);
    free(h_odata);
    free(tmp);

    cudaFree(d_idata);
    cudaFree(d_odata);

    cudaDeviceReset();
    bResult = (gpu_sum == cpu_sum);
    if(!bResult) cout << "Test failed!" << endl;
    return EXIT_SUCCESS;
}
	.file	"tmpxft_002806b0_00000000-6_reduceInteger.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4314:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4314:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z15recursiveReducePii
	.type	_Z15recursiveReducePii, @function
_Z15recursiveReducePii:
.LFB3635:
	.cfi_startproc
	endbr64
	movl	$2, %ecx
.L7:
	cmpl	$1, %esi
	je	.L9
	movl	%esi, %eax
	cltd
	idivl	%ecx
	movslq	%eax, %rdx
	movq	%rdx, %rsi
	leaq	(%rdi,%rdx,4), %r8
	xorl	%edx, %edx
.L5:
	cmpl	%edx, %eax
	jle	.L7
	movl	(%r8,%rdx,4), %r9d
	addl	%r9d, (%rdi,%rdx,4)
	incq	%rdx
	jmp	.L5
.L9:
	movl	(%rdi), %eax
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z15recursiveReducePii, .-_Z15recursiveReducePii
	.globl	_Z7secondsv
	.type	_Z7secondsv, @function
_Z7secondsv:
.LFB3638:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	mulsd	.LC1(%rip), %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z7secondsv, .-_Z7secondsv
	.globl	_Z31__device_stub__Z9warmingUpPiS_jPiS_j
	.type	_Z31__device_stub__Z9warmingUpPiS_jPiS_j, @function
_Z31__device_stub__Z9warmingUpPiS_jPiS_j:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9warmingUpPiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L14:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z31__device_stub__Z9warmingUpPiS_jPiS_j, .-_Z31__device_stub__Z9warmingUpPiS_jPiS_j
	.globl	_Z9warmingUpPiS_j
	.type	_Z9warmingUpPiS_j, @function
_Z9warmingUpPiS_j:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9warmingUpPiS_jPiS_j
	.cfi_endproc
.LFE3665:
	.size	_Z9warmingUpPiS_j, .-_Z9warmingUpPiS_j
	.globl	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
	.type	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j, @function
_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16reduceNeighboredPiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L19:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j, .-_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
	.globl	_Z16reduceNeighboredPiS_j
	.type	_Z16reduceNeighboredPiS_j, @function
_Z16reduceNeighboredPiS_j:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
	.cfi_endproc
.LFE3667:
	.size	_Z16reduceNeighboredPiS_j, .-_Z16reduceNeighboredPiS_j
	.globl	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j
	.type	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j, @function
_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z20reduceNeighboredLessPiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L24:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j, .-_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j
	.globl	_Z20reduceNeighboredLessPiS_j
	.type	_Z20reduceNeighboredLessPiS_j, @function
_Z20reduceNeighboredLessPiS_j:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j
	.cfi_endproc
.LFE3669:
	.size	_Z20reduceNeighboredLessPiS_j, .-_Z20reduceNeighboredLessPiS_j
	.globl	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j
	.type	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j, @function
_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j:
.LFB3670:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z17reduceInterleavedPiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L29:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j, .-_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j
	.globl	_Z17reduceInterleavedPiS_j
	.type	_Z17reduceInterleavedPiS_j, @function
_Z17reduceInterleavedPiS_j:
.LFB3671:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j
	.cfi_endproc
.LFE3671:
	.size	_Z17reduceInterleavedPiS_j, .-_Z17reduceInterleavedPiS_j
	.globl	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j
	.type	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j, @function
_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j:
.LFB3672:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16reduceUnrolling2PiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L34:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3672:
	.size	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j, .-_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j
	.globl	_Z16reduceUnrolling2PiS_j
	.type	_Z16reduceUnrolling2PiS_j, @function
_Z16reduceUnrolling2PiS_j:
.LFB3673:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j
	.cfi_endproc
.LFE3673:
	.size	_Z16reduceUnrolling2PiS_j, .-_Z16reduceUnrolling2PiS_j
	.globl	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j
	.type	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j, @function
_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j:
.LFB3674:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16reduceUnrolling4PiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L39:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3674:
	.size	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j, .-_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j
	.globl	_Z16reduceUnrolling4PiS_j
	.type	_Z16reduceUnrolling4PiS_j, @function
_Z16reduceUnrolling4PiS_j:
.LFB3675:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j
	.cfi_endproc
.LFE3675:
	.size	_Z16reduceUnrolling4PiS_j, .-_Z16reduceUnrolling4PiS_j
	.globl	_Z39__device_stub__Z16reduceUnrolling8PiS_jPiS_j
	.type	_Z39__device_stub__Z16reduceUnrolling8PiS_jPiS_j, @function
_Z39__device_stub__Z16reduceUnrolling8PiS_jPiS_j:
.LFB3676:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16reduceUnrolling8PiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L44:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3676:
	.size	_Z39__device_stub__Z16reduceUnrolling8PiS_jPiS_j, .-_Z39__device_stub__Z16reduceUnrolling8PiS_jPiS_j
	.globl	_Z16reduceUnrolling8PiS_j
	.type	_Z16reduceUnrolling8PiS_j, @function
_Z16reduceUnrolling8PiS_j:
.LFB3677:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16reduceUnrolling8PiS_jPiS_j
	.cfi_endproc
.LFE3677:
	.size	_Z16reduceUnrolling8PiS_j, .-_Z16reduceUnrolling8PiS_j
	.globl	_Z41__device_stub__Z18reduceUnrollWarps8PiS_jPiS_j
	.type	_Z41__device_stub__Z18reduceUnrollWarps8PiS_jPiS_j, @function
_Z41__device_stub__Z18reduceUnrollWarps8PiS_jPiS_j:
.LFB3678:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z18reduceUnrollWarps8PiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L49:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3678:
	.size	_Z41__device_stub__Z18reduceUnrollWarps8PiS_jPiS_j, .-_Z41__device_stub__Z18reduceUnrollWarps8PiS_jPiS_j
	.globl	_Z18reduceUnrollWarps8PiS_j
	.type	_Z18reduceUnrollWarps8PiS_j, @function
_Z18reduceUnrollWarps8PiS_j:
.LFB3679:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z18reduceUnrollWarps8PiS_jPiS_j
	.cfi_endproc
.LFE3679:
	.size	_Z18reduceUnrollWarps8PiS_j, .-_Z18reduceUnrollWarps8PiS_j
	.globl	_Z49__device_stub__Z26reduceCompleteUnrollWarps8PiS_jPiS_j
	.type	_Z49__device_stub__Z26reduceCompleteUnrollWarps8PiS_jPiS_j, @function
_Z49__device_stub__Z26reduceCompleteUnrollWarps8PiS_jPiS_j:
.LFB3680:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z26reduceCompleteUnrollWarps8PiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L54:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3680:
	.size	_Z49__device_stub__Z26reduceCompleteUnrollWarps8PiS_jPiS_j, .-_Z49__device_stub__Z26reduceCompleteUnrollWarps8PiS_jPiS_j
	.globl	_Z26reduceCompleteUnrollWarps8PiS_j
	.type	_Z26reduceCompleteUnrollWarps8PiS_j, @function
_Z26reduceCompleteUnrollWarps8PiS_j:
.LFB3681:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z26reduceCompleteUnrollWarps8PiS_jPiS_j
	.cfi_endproc
.LFE3681:
	.size	_Z26reduceCompleteUnrollWarps8PiS_j, .-_Z26reduceCompleteUnrollWarps8PiS_j
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Starting reduction at "
.LC3:
	.string	" "
.LC4:
	.string	"device "
.LC5:
	.string	": "
.LC6:
	.string	"   with array size "
.LC7:
	.string	"   "
.LC8:
	.string	"grid "
.LC9:
	.string	" block "
.LC10:
	.string	"cpu reduce     elapsed "
.LC11:
	.string	" ms cpu_sum: "
.LC12:
	.string	"gpu warmingUp elapsed "
.LC13:
	.string	" ms gpu_sum: "
.LC14:
	.string	" <<<grid "
.LC15:
	.string	">>>"
.LC16:
	.string	"gpu Neighbored elapsed "
.LC17:
	.string	"gpu nroll elapsed "
.LC18:
	.string	"Test failed!"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$512, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC3(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	xorl	%esi, %esi
	subq	$1144, %rsp
	.cfi_def_cfa_offset 1200
	movq	%fs:40, %rax
	movq	%rax, 1128(%rsp)
	xorl	%eax, %eax
	leaq	96(%rsp), %r13
	movq	%r13, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%esi, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$16777216, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	decl	%ebp
	jle	.L60
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %r15d
.L60:
	leal	16777215(%r15), %ebx
	xorl	%edx, %edx
	leaq	.LC8(%rip), %rsi
	movl	$1, 64(%rsp)
	movl	%ebx, %eax
	leaq	_ZSt4cout(%rip), %rdi
	movl	$1, 68(%rsp)
	xorl	%r13d, %r13d
	divl	%r15d
	movl	$1, 76(%rsp)
	movl	$1, 80(%rsp)
	movl	%eax, %r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%r14, %rbx
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	movl	%r15d, %eax
	movq	%rax, 16(%rsp)
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$67108864, %edi
	call	malloc@PLT
	movq	%rax, %r12
	leaq	0(,%r14,4), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, 8(%rsp)
.L61:
	call	rand@PLT
	movzbl	%al, %eax
	movl	%eax, (%r12,%r13,4)
	incq	%r13
	cmpq	$16777216, %r13
	jne	.L61
	movq	8(%rsp), %rdi
	movq	%r13, %rcx
	movq	%r12, %rsi
	xorl	%eax, %eax
	rep movsl
	leaq	40(%rsp), %rdi
	movl	$67108864, %esi
	movq	%rax, 40(%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	xorl	%edx, %edx
	leaq	48(%rsp), %rdi
	movq	%rdx, 48(%rsp)
	call	cudaMalloc@PLT
	call	_Z7secondsv
	movq	8(%rsp), %rdi
	movl	$16777216, %esi
	movsd	%xmm0, 24(%rsp)
	call	_Z15recursiveReducePii
	movl	%eax, %r13d
	call	_Z7secondsv
	subsd	24(%rsp), %xmm0
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movsd	%xmm0, 24(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	%ebx, 72(%rsp)
	movl	68(%rsp), %ecx
	xorl	%r9d, %r9d
	movl	%r15d, 60(%rsp)
	movq	72(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdx
	movl	80(%rsp), %esi
	movsd	%xmm0, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z31__device_stub__Z9warmingUpPiS_jPiS_j
.L62:
	call	cudaDeviceSynchronize@PLT
	xorl	%r15d, %r15d
	call	_Z7secondsv
	subsd	24(%rsp), %xmm0
	movq	(%rsp), %rdx
	movq	%rbp, %rdi
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movsd	%xmm0, 24(%rsp)
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
.L63:
	cmpl	%ebx, %eax
	jnb	.L77
	addl	0(%rbp,%rax,4), %r15d
	incq	%rax
	jmp	.L63
.L77:
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	68(%rsp), %ecx
	movl	80(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%r8d, %r8d
	movsd	%xmm0, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
.L65:
	call	cudaDeviceSynchronize@PLT
	xorl	%r15d, %r15d
	call	_Z7secondsv
	subsd	24(%rsp), %xmm0
	movq	(%rsp), %rdx
	movq	%rbp, %rdi
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movsd	%xmm0, 24(%rsp)
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
.L66:
	cmpl	%ebx, %eax
	jnb	.L78
	addl	0(%rbp,%rax,4), %r15d
	incq	%rax
	jmp	.L66
.L78:
	leaq	.LC16(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	shrl	$3, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	%ebx, 84(%rsp)
	movl	68(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	xorl	%r8d, %r8d
	movsd	%xmm0, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	84(%rsp), %rdi
	movl	92(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L68
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z49__device_stub__Z26reduceCompleteUnrollWarps8PiS_jPiS_j
.L68:
	call	cudaDeviceSynchronize@PLT
	xorl	%r14d, %r14d
	call	_Z7secondsv
	subsd	24(%rsp), %xmm0
	movq	(%rsp), %rdx
	movq	%rbp, %rdi
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%xmm0, %r15
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
.L69:
	cmpl	%ebx, %eax
	jnb	.L79
	addl	0(%rbp,%rax,4), %r14d
	incq	%rax
	jmp	.L69
.L79:
	leaq	.LC17(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r15, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceReset@PLT
	cmpl	%r13d, %r14d
	je	.L71
	leaq	.LC18(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L71:
	movq	1128(%rsp), %rax
	subq	%fs:40, %rax
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	addq	$1144, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z26reduceCompleteUnrollWarps8PiS_j"
.LC20:
	.string	"_Z18reduceUnrollWarps8PiS_j"
.LC21:
	.string	"_Z16reduceUnrolling8PiS_j"
.LC22:
	.string	"_Z16reduceUnrolling4PiS_j"
.LC23:
	.string	"_Z16reduceUnrolling2PiS_j"
.LC24:
	.string	"_Z17reduceInterleavedPiS_j"
.LC25:
	.string	"_Z20reduceNeighboredLessPiS_j"
.LC26:
	.string	"_Z16reduceNeighboredPiS_j"
.LC27:
	.string	"_Z9warmingUpPiS_j"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3683:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z26reduceCompleteUnrollWarps8PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18reduceUnrollWarps8PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16reduceUnrolling8PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16reduceUnrolling4PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16reduceUnrolling2PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17reduceInterleavedPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20reduceNeighboredLessPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16reduceNeighboredPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC27(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z9warmingUpPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3683:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC1:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//
// Created by heidies on 7/8/18.
//
#include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>

using namespace std;

#define CHECK(call)                                                                 \
{                                                                                  \
    const hipError_t error = call;                                                   \
    if(error != hipSuccess){                                                        \
        printf("Error: %s %d, ", __FILE__, __LINE__);                                \
        printf("code: %d, reason %s\n", error, hipGetErrorString(error));              \
        exit(1);                                                                    \
    }                                                                              \
}


int recursiveReduce(int *data, const int size){
    if(size == 1) return data[0];
    int const stride = size / 2;

    for(int i = 0; i < stride; i++){
        data[i] += data[i + stride];
    }

    return recursiveReduce(data, stride);
}


__global__ void warmingUp(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return ;

    for(int stride = 1; stride < blockDim.x; stride <<= 1){
        if(tid % (2 * stride) == 0)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceNeighbored(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return ;

    for(int stride = 1; stride < blockDim.x; stride <<= 1){
        if(tid % (2 * stride) == 0)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceNeighboredLess(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return;

    for(int stride = 1; stride < blockDim.x; stride <<= 1){
        int index = 2 * stride * tid;
        if(index < blockDim.x / 2)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceInterleaved(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;

    int *idata = g_idata + blockIdx.x * blockDim.x;

    if(idx >= n) return;

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrolling2(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (2 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (2 * blockIdx.x) * blockDim.x;

    if(idx + blockDim.x < n) g_idata[idx] += g_idata[idx + blockDim.x];
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrolling4(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (4 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (4 * blockIdx.x) * blockDim.x;

    if(idx + 3 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
    }
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrolling8(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceUnrollWarps8(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    for(int stride = blockDim.x / 2; stride > 32; stride >>= 1){
        if(tid < stride)
            idata[tid] += idata[tid + stride];
        __syncthreads();
    }

    if(tid < 32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid + 32];
        vmem[tid] += vmem[tid + 16];
        vmem[tid] += vmem[tid + 8];
        vmem[tid] += vmem[tid + 4];
        vmem[tid] += vmem[tid + 2];
        vmem[tid] += vmem[tid + 1];
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


__global__ void reduceCompleteUnrollWarps8(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    if(blockDim.x >= 1024 && tid < 512)
        idata[tid] += idata[tid + 512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256)
        idata[tid] += idata[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128)
        idata[tid] += idata[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64)
        idata[idx] += idata[tid + 64];
    __syncthreads();

    if(tid < 32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid + 32];
        vmem[tid] += vmem[tid + 16];
        vmem[tid] += vmem[tid + 8];
        vmem[tid] += vmem[tid + 4];
        vmem[tid] += vmem[tid + 2];
        vmem[tid] += vmem[tid + 1];
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


template <unsigned int iBlockSize>
__global__ void reduceCompleteUnroll(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = (8 * blockIdx.x) * blockDim.x + threadIdx.x;

    int *idata = g_idata + (8 * blockIdx.x) * blockDim.x;

    if(idx + 7 * blockDim.x < n){
        g_idata[idx] += g_idata[idx + blockDim.x];
        g_idata[idx] += g_idata[idx + 2 * blockDim.x];
        g_idata[idx] += g_idata[idx + 3 * blockDim.x];
        g_idata[idx] += g_idata[idx + 4 * blockDim.x];
        g_idata[idx] += g_idata[idx + 5 * blockDim.x];
        g_idata[idx] += g_idata[idx + 6 * blockDim.x];
        g_idata[idx] += g_idata[idx + 7 * blockDim.x];
    }
    __syncthreads();

    if(iBlockSize >= 1024 && tid < 512)
        idata[tid] += idata[tid + 512];
    __syncthreads();
    if(iBlockSize >= 512 && tid < 256)
        idata[tid] += idata[tid + 256];
    __syncthreads();
    if(iBlockSize >= 256 && tid < 128)
        idata[tid] += idata[tid + 128];
    __syncthreads();
    if(iBlockSize >= 128 && tid < 64)
        idata[idx] += idata[tid + 64];
    __syncthreads();

    if(tid < 32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid + 32];
        vmem[tid] += vmem[tid + 16];
        vmem[tid] += vmem[tid + 8];
        vmem[tid] += vmem[tid + 4];
        vmem[tid] += vmem[tid + 2];
        vmem[tid] += vmem[tid + 1];
    }

    if(tid == 0) g_odata[blockIdx.x] = idata[0];
}


double seconds(){
    struct timeval tp;
    gettimeofday(&tp, NULL);
    return ((double)tp.tv_sec + (double)tp.tv_usec * 1e-6) * 1e+3;
}


int main(int argc, char **argv){
    int dev = 0;
    hipDeviceProp_t deviceProp;
    hipGetDeviceProperties(&deviceProp, dev);
    cout << "Starting reduction at " << argv[0] << " ";
    cout << "device " << dev << ": " << deviceProp.name << " ";
    hipSetDevice(dev);

    bool bResult = false;

    int size = 1 << 24;
    cout << "   with array size " << size << "   ";

    int blocksize = 512;
    if(argc > 1)
        blocksize = atoi(argv[1]);

    dim3 block (blocksize, 1);
    dim3 grid ((size + block.x - 1) / block.x, 1);

    cout << "grid " << grid.x << " block " << block.x << endl;

    size_t nBytes = size * sizeof(int);
    int *h_idata = (int *)malloc(nBytes);
    int *h_odata = (int *)malloc(grid.x * sizeof(int));
    int *tmp = (int *)malloc(nBytes);

    for(int i = 0; i < size; ++ i){
        h_idata[i] = (int)(rand() & 0xFF);
    }
    memcpy(tmp, h_idata, nBytes);

    double iStart, iElaps;
    int gpu_sum = 0;
    int *d_idata = NULL;
    hipMalloc((void **)&d_idata, nBytes);
    int *d_odata = NULL;
    hipMalloc((void **)&d_odata, grid.x * sizeof(int));

    iStart = seconds();
    int cpu_sum = recursiveReduce(tmp, size);
    iElaps = seconds() - iStart;
    cout << "cpu reduce     elapsed " << iElaps << " ms cpu_sum: " << cpu_sum << endl;


    hipMemcpy(d_idata, h_idata, nBytes, hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    warmingUp<<<grid, block>>>(d_idata, d_odata, size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata, d_odata, grid.x * sizeof(int), hipMemcpyDeviceToHost);
    gpu_sum = 0;

    for(int i = 0; i < grid.x; ++ i){
        gpu_sum += h_odata[i];
    }
    cout << "gpu warmingUp elapsed " << iElaps << " ms gpu_sum: " << gpu_sum << " <<<grid " << grid.x << " block " << block.x << ">>>" << endl;

    hipMemcpy(d_idata, h_idata, nBytes, hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceNeighbored<<<grid, block>>>(d_idata, d_odata, size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata, d_odata, grid.x * sizeof(int), hipMemcpyDeviceToHost);
    gpu_sum = 0;

    for(int i = 0; i < grid.x; ++ i){
        gpu_sum += h_odata[i];
    }
    cout << "gpu Neighbored elapsed " << iElaps << " ms gpu_sum: " << gpu_sum << " <<<grid " << grid.x << " block " << block.x << ">>>" << endl;

    hipMemcpy(d_idata, h_idata, nBytes, hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceCompleteUnrollWarps8<<<grid.x / 8, block>>>(d_idata, d_odata, size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata, d_odata, grid.x * sizeof(int), hipMemcpyDeviceToHost);
    gpu_sum = 0;

    for(int i = 0; i < grid.x / 8; ++ i){
        gpu_sum += h_odata[i];
    }
    cout << "gpu nroll elapsed " << iElaps << " ms gpu_sum: " << gpu_sum << " <<<grid " << grid.x / 8 << " block " << block.x << ">>>" << endl;

    free(h_idata);
    free(h_odata);
    free(tmp);

    hipFree(d_idata);
    hipFree(d_odata);

    hipDeviceReset();
    bResult = (gpu_sum == cpu_sum);
    if(!bResult) cout << "Test failed!" << endl;
    return EXIT_SUCCESS;
}
	.text
	.file	"reduceInteger.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15recursiveReducePii          # -- Begin function _Z15recursiveReducePii
	.type	_Z15recursiveReducePii,@function
_Z15recursiveReducePii:                 # @_Z15recursiveReducePii
	.cfi_startproc
# %bb.0:
	cmpl	$1, %esi
	je	.LBB0_1
.LBB0_3:                                # %.lr.ph19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_5 Depth 2
	movl	%esi, %eax
	shrl	$31, %esi
	addl	%eax, %esi
	sarl	%esi
	cmpl	$2, %eax
	jl	.LBB0_2
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_3 Depth=1
	movl	%esi, %ecx
	leaq	(%rdi,%rcx,4), %rdx
	xorl	%r8d, %r8d
.LBB0_5:                                # %.lr.ph
                                        #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rdx,%r8,4), %r9d
	addl	%r9d, (%rdi,%r8,4)
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB0_5
.LBB0_2:                                # %tailrecurse.loopexit
                                        #   in Loop: Header=BB0_3 Depth=1
	andl	$-2, %eax
	cmpl	$2, %eax
	jne	.LBB0_3
.LBB0_1:                                # %tailrecurse._crit_edge
	movl	(%rdi), %eax
	retq
.Lfunc_end0:
	.size	_Z15recursiveReducePii, .Lfunc_end0-_Z15recursiveReducePii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__warmingUpPiS_j # -- Begin function _Z24__device_stub__warmingUpPiS_j
	.type	_Z24__device_stub__warmingUpPiS_j,@function
_Z24__device_stub__warmingUpPiS_j:      # @_Z24__device_stub__warmingUpPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9warmingUpPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__warmingUpPiS_j, .Lfunc_end1-_Z24__device_stub__warmingUpPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__reduceNeighboredPiS_j # -- Begin function _Z31__device_stub__reduceNeighboredPiS_j
	.type	_Z31__device_stub__reduceNeighboredPiS_j,@function
_Z31__device_stub__reduceNeighboredPiS_j: # @_Z31__device_stub__reduceNeighboredPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceNeighboredPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z31__device_stub__reduceNeighboredPiS_j, .Lfunc_end2-_Z31__device_stub__reduceNeighboredPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__reduceNeighboredLessPiS_j # -- Begin function _Z35__device_stub__reduceNeighboredLessPiS_j
	.type	_Z35__device_stub__reduceNeighboredLessPiS_j,@function
_Z35__device_stub__reduceNeighboredLessPiS_j: # @_Z35__device_stub__reduceNeighboredLessPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20reduceNeighboredLessPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z35__device_stub__reduceNeighboredLessPiS_j, .Lfunc_end3-_Z35__device_stub__reduceNeighboredLessPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__reduceInterleavedPiS_j # -- Begin function _Z32__device_stub__reduceInterleavedPiS_j
	.type	_Z32__device_stub__reduceInterleavedPiS_j,@function
_Z32__device_stub__reduceInterleavedPiS_j: # @_Z32__device_stub__reduceInterleavedPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17reduceInterleavedPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z32__device_stub__reduceInterleavedPiS_j, .Lfunc_end4-_Z32__device_stub__reduceInterleavedPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__reduceUnrolling2PiS_j # -- Begin function _Z31__device_stub__reduceUnrolling2PiS_j
	.type	_Z31__device_stub__reduceUnrolling2PiS_j,@function
_Z31__device_stub__reduceUnrolling2PiS_j: # @_Z31__device_stub__reduceUnrolling2PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceUnrolling2PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z31__device_stub__reduceUnrolling2PiS_j, .Lfunc_end5-_Z31__device_stub__reduceUnrolling2PiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__reduceUnrolling4PiS_j # -- Begin function _Z31__device_stub__reduceUnrolling4PiS_j
	.type	_Z31__device_stub__reduceUnrolling4PiS_j,@function
_Z31__device_stub__reduceUnrolling4PiS_j: # @_Z31__device_stub__reduceUnrolling4PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceUnrolling4PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z31__device_stub__reduceUnrolling4PiS_j, .Lfunc_end6-_Z31__device_stub__reduceUnrolling4PiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__reduceUnrolling8PiS_j # -- Begin function _Z31__device_stub__reduceUnrolling8PiS_j
	.type	_Z31__device_stub__reduceUnrolling8PiS_j,@function
_Z31__device_stub__reduceUnrolling8PiS_j: # @_Z31__device_stub__reduceUnrolling8PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceUnrolling8PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z31__device_stub__reduceUnrolling8PiS_j, .Lfunc_end7-_Z31__device_stub__reduceUnrolling8PiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__reduceUnrollWarps8PiS_j # -- Begin function _Z33__device_stub__reduceUnrollWarps8PiS_j
	.type	_Z33__device_stub__reduceUnrollWarps8PiS_j,@function
_Z33__device_stub__reduceUnrollWarps8PiS_j: # @_Z33__device_stub__reduceUnrollWarps8PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18reduceUnrollWarps8PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z33__device_stub__reduceUnrollWarps8PiS_j, .Lfunc_end8-_Z33__device_stub__reduceUnrollWarps8PiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j # -- Begin function _Z41__device_stub__reduceCompleteUnrollWarps8PiS_j
	.type	_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j,@function
_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j: # @_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26reduceCompleteUnrollWarps8PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j, .Lfunc_end9-_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7secondsv
.LCPI10_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI10_1:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	_Z7secondsv
	.type	_Z7secondsv,@function
_Z7secondsv:                            # @_Z7secondsv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI10_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	mulsd	.LCPI10_1(%rip), %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z7secondsv, .Lfunc_end10-_Z7secondsv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI11_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI11_1:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 1632
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	104(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %r14
	testq	%r14, %r14
	je	.LBB11_1
# %bb.2:
	movq	%r14, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB11_3
.LBB11_1:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB11_3:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	xorl	%esi, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	104(%rsp), %r15
	movq	%r15, %rdi
	callq	strlen
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	_ZNSolsEi
	movl	$.L.str.5, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cmpl	$2, %ebp
	jl	.LBB11_4
# %bb.5:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
	orq	%r12, %r14
	jmp	.LBB11_6
.LBB11_4:
	leaq	512(%r12), %r14
.LBB11_6:
	leal	16777215(%r14), %eax
	xorl	%r15d, %r15d
	xorl	%edx, %edx
	divl	%r14d
	movl	%eax, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movl	%r14d, %esi
	movq	%rbx, %rdi
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r14
	leaq	(,%rbp,4), %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r12
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %rbx
.LBB11_7:                               # =>This Inner Loop Header: Depth=1
	callq	rand
	movzbl	%al, %eax
	movl	%eax, (%r14,%r15,4)
	incq	%r15
	cmpq	$16777216, %r15                 # imm = 0x1000000
	jne	.LBB11_7
# %bb.8:
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	memcpy@PLT
	movq	%rbx, 88(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	leaq	24(%rsp), %rdi
	movq	%rbx, (%rdi)
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, (%rdi)
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm0
	cvtsi2sdq	8(%rbx), %xmm1
	movq	88(%rsp), %r9                   # 8-byte Reload
	mulsd	.LCPI11_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movl	$16777216, %eax                 # imm = 0x1000000
.LBB11_10:                              # %.lr.ph19.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_12 Depth 2
	movl	%eax, %ecx
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	$2, %ecx
	jl	.LBB11_9
# %bb.11:                               # %.lr.ph.preheader.i
                                        #   in Loop: Header=BB11_10 Depth=1
	movl	%eax, %edx
	movq	%r9, %rsi
	movq	%rdx, %rdi
.LBB11_12:                              # %.lr.ph.i
                                        #   Parent Loop BB11_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rsi,%rdx,4), %r8d
	addl	%r8d, (%rsi)
	addq	$4, %rsi
	decq	%rdi
	jne	.LBB11_12
.LBB11_9:                               # %tailrecurse.loopexit.i
                                        #   in Loop: Header=BB11_10 Depth=1
	andl	$-2, %ecx
	cmpl	$2, %ecx
	jne	.LBB11_10
# %bb.13:                               # %_Z15recursiveReducePii.exit
	movq	%rbp, %rcx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rcx
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	mulsd	.LCPI11_1(%rip), %xmm1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	movl	(%r9), %r13d
	xorl	%ebx, %ebx
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r15), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r15), %xmm1
	mulsd	.LCPI11_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	mulsd	.LCPI11_1(%rip), %xmm1
	subsd	40(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.9, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	movl	%r13d, 40(%rsp)                 # 4-byte Spill
	movl	%r13d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r15), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r15), %xmm1
	mulsd	.LCPI11_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	mulsd	.LCPI11_1(%rip), %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_15
# %bb.14:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z24__device_stub__warmingUpPiS_j
.LBB11_15:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r15), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r15), %xmm1
	mulsd	.LCPI11_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	mulsd	.LCPI11_1(%rip), %xmm1
	subsd	32(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movq	16(%rsp), %rsi
	movq	%r12, %rdi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$-16777216, %r13d               # imm = 0xFF000000
	ja	.LBB11_18
# %bb.16:                               # %.lr.ph.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB11_17:                              # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r12,%rax,4), %ebx
	incq	%rax
	cmpq	%rbp, %rax
	jb	.LBB11_17
.LBB11_18:                              # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.11, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.12, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.13, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	xorl	%ebx, %ebx
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r15), %xmm0
	cvtsi2sdq	8(%r15), %xmm1
	mulsd	.LCPI11_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	mulsd	.LCPI11_1(%rip), %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_20
# %bb.19:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z31__device_stub__reduceNeighboredPiS_j
.LBB11_20:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r15), %xmm0
	movsd	%xmm0, 96(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r15), %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rsi
	movq	%r12, %rdi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI11_0(%rip), %xmm0
	addsd	96(%rsp), %xmm0                 # 8-byte Folded Reload
	mulsd	.LCPI11_1(%rip), %xmm0
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	cmpl	$-16777216, %r13d               # imm = 0xFF000000
	ja	.LBB11_23
# %bb.21:                               # %.lr.ph143.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB11_22:                              # %.lr.ph143
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r12,%rax,4), %ebx
	incq	%rax
	cmpq	%rbp, %rax
	jb	.LBB11_22
.LBB11_23:                              # %._crit_edge144
	movl	$_ZSt4cout, %edi
	movl	$.L.str.14, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.11, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.12, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.13, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	xorl	%r15d, %r15d
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI11_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	mulsd	.LCPI11_1(%rip), %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movl	%ebp, %ebx
	shrl	$3, %ebx
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	%rbx, %rdi
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_25
# %bb.24:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j
.LBB11_25:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI11_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	mulsd	.LCPI11_1(%rip), %xmm1
	subsd	8(%rsp), %xmm1                  # 8-byte Folded Reload
	movsd	%xmm1, 48(%rsp)                 # 8-byte Spill
	movq	16(%rsp), %rsi
	movq	%r12, %rdi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$8, %ebp
	jb	.LBB11_28
# %bb.26:                               # %.lr.ph149.preheader
	xorl	%eax, %eax
	xorl	%r15d, %r15d
.LBB11_27:                              # %.lr.ph149
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r12,%rax,4), %r15d
	incq	%rax
	cmpq	%rbx, %rax
	jb	.LBB11_27
.LBB11_28:                              # %._crit_edge150
	movl	$_ZSt4cout, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	48(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.11, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r13, %rdi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r13
	movl	$.L.str.12, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.13, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	callq	hipDeviceReset
	cmpl	40(%rsp), %r15d                 # 4-byte Folded Reload
	je	.LBB11_30
# %bb.29:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB11_30:
	xorl	%eax, %eax
	addq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	main, .Lfunc_end11-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB12_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB12_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9warmingUpPiS_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceNeighboredPiS_j, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20reduceNeighboredLessPiS_j, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17reduceInterleavedPiS_j, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceUnrolling2PiS_j, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceUnrolling4PiS_j, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceUnrolling8PiS_j, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18reduceUnrollWarps8PiS_j, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26reduceCompleteUnrollWarps8PiS_j, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end12:
	.size	__hip_module_ctor, .Lfunc_end12-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB13_2:
	retq
.Lfunc_end13:
	.size	__hip_module_dtor, .Lfunc_end13-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9warmingUpPiS_j,@object       # @_Z9warmingUpPiS_j
	.section	.rodata,"a",@progbits
	.globl	_Z9warmingUpPiS_j
	.p2align	3, 0x0
_Z9warmingUpPiS_j:
	.quad	_Z24__device_stub__warmingUpPiS_j
	.size	_Z9warmingUpPiS_j, 8

	.type	_Z16reduceNeighboredPiS_j,@object # @_Z16reduceNeighboredPiS_j
	.globl	_Z16reduceNeighboredPiS_j
	.p2align	3, 0x0
_Z16reduceNeighboredPiS_j:
	.quad	_Z31__device_stub__reduceNeighboredPiS_j
	.size	_Z16reduceNeighboredPiS_j, 8

	.type	_Z20reduceNeighboredLessPiS_j,@object # @_Z20reduceNeighboredLessPiS_j
	.globl	_Z20reduceNeighboredLessPiS_j
	.p2align	3, 0x0
_Z20reduceNeighboredLessPiS_j:
	.quad	_Z35__device_stub__reduceNeighboredLessPiS_j
	.size	_Z20reduceNeighboredLessPiS_j, 8

	.type	_Z17reduceInterleavedPiS_j,@object # @_Z17reduceInterleavedPiS_j
	.globl	_Z17reduceInterleavedPiS_j
	.p2align	3, 0x0
_Z17reduceInterleavedPiS_j:
	.quad	_Z32__device_stub__reduceInterleavedPiS_j
	.size	_Z17reduceInterleavedPiS_j, 8

	.type	_Z16reduceUnrolling2PiS_j,@object # @_Z16reduceUnrolling2PiS_j
	.globl	_Z16reduceUnrolling2PiS_j
	.p2align	3, 0x0
_Z16reduceUnrolling2PiS_j:
	.quad	_Z31__device_stub__reduceUnrolling2PiS_j
	.size	_Z16reduceUnrolling2PiS_j, 8

	.type	_Z16reduceUnrolling4PiS_j,@object # @_Z16reduceUnrolling4PiS_j
	.globl	_Z16reduceUnrolling4PiS_j
	.p2align	3, 0x0
_Z16reduceUnrolling4PiS_j:
	.quad	_Z31__device_stub__reduceUnrolling4PiS_j
	.size	_Z16reduceUnrolling4PiS_j, 8

	.type	_Z16reduceUnrolling8PiS_j,@object # @_Z16reduceUnrolling8PiS_j
	.globl	_Z16reduceUnrolling8PiS_j
	.p2align	3, 0x0
_Z16reduceUnrolling8PiS_j:
	.quad	_Z31__device_stub__reduceUnrolling8PiS_j
	.size	_Z16reduceUnrolling8PiS_j, 8

	.type	_Z18reduceUnrollWarps8PiS_j,@object # @_Z18reduceUnrollWarps8PiS_j
	.globl	_Z18reduceUnrollWarps8PiS_j
	.p2align	3, 0x0
_Z18reduceUnrollWarps8PiS_j:
	.quad	_Z33__device_stub__reduceUnrollWarps8PiS_j
	.size	_Z18reduceUnrollWarps8PiS_j, 8

	.type	_Z26reduceCompleteUnrollWarps8PiS_j,@object # @_Z26reduceCompleteUnrollWarps8PiS_j
	.globl	_Z26reduceCompleteUnrollWarps8PiS_j
	.p2align	3, 0x0
_Z26reduceCompleteUnrollWarps8PiS_j:
	.quad	_Z41__device_stub__reduceCompleteUnrollWarps8PiS_j
	.size	_Z26reduceCompleteUnrollWarps8PiS_j, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Starting reduction at "
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"device "
	.size	.L.str.2, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	": "
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"   with array size "
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"   "
	.size	.L.str.5, 4

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"grid "
	.size	.L.str.6, 6

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" block "
	.size	.L.str.7, 8

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"cpu reduce     elapsed "
	.size	.L.str.8, 24

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	" ms cpu_sum: "
	.size	.L.str.9, 14

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"gpu warmingUp elapsed "
	.size	.L.str.10, 23

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	" ms gpu_sum: "
	.size	.L.str.11, 14

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	" <<<grid "
	.size	.L.str.12, 10

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	">>>"
	.size	.L.str.13, 4

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"gpu Neighbored elapsed "
	.size	.L.str.14, 24

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"gpu nroll elapsed "
	.size	.L.str.15, 19

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Test failed!"
	.size	.L.str.16, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9warmingUpPiS_j"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16reduceNeighboredPiS_j"
	.size	.L__unnamed_2, 26

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z20reduceNeighboredLessPiS_j"
	.size	.L__unnamed_3, 30

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z17reduceInterleavedPiS_j"
	.size	.L__unnamed_4, 27

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z16reduceUnrolling2PiS_j"
	.size	.L__unnamed_5, 26

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z16reduceUnrolling4PiS_j"
	.size	.L__unnamed_6, 26

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z16reduceUnrolling8PiS_j"
	.size	.L__unnamed_7, 26

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z18reduceUnrollWarps8PiS_j"
	.size	.L__unnamed_8, 28

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z26reduceCompleteUnrollWarps8PiS_j"
	.size	.L__unnamed_9, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__warmingUpPiS_j
	.addrsig_sym _Z31__device_stub__reduceNeighboredPiS_j
	.addrsig_sym _Z35__device_stub__reduceNeighboredLessPiS_j
	.addrsig_sym _Z32__device_stub__reduceInterleavedPiS_j
	.addrsig_sym _Z31__device_stub__reduceUnrolling2PiS_j
	.addrsig_sym _Z31__device_stub__reduceUnrolling4PiS_j
	.addrsig_sym _Z31__device_stub__reduceUnrolling8PiS_j
	.addrsig_sym _Z33__device_stub__reduceUnrollWarps8PiS_j
	.addrsig_sym _Z41__device_stub__reduceCompleteUnrollWarps8PiS_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9warmingUpPiS_j
	.addrsig_sym _Z16reduceNeighboredPiS_j
	.addrsig_sym _Z20reduceNeighboredLessPiS_j
	.addrsig_sym _Z17reduceInterleavedPiS_j
	.addrsig_sym _Z16reduceUnrolling2PiS_j
	.addrsig_sym _Z16reduceUnrolling4PiS_j
	.addrsig_sym _Z16reduceUnrolling8PiS_j
	.addrsig_sym _Z18reduceUnrollWarps8PiS_j
	.addrsig_sym _Z26reduceCompleteUnrollWarps8PiS_j
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9warmingUpPiS_j       ; -- Begin function _Z9warmingUpPiS_j
	.globl	_Z9warmingUpPiS_j
	.p2align	8
	.type	_Z9warmingUpPiS_j,@function
_Z9warmingUpPiS_j:                      ; @_Z9warmingUpPiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s6, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	s_mov_b32 s4, s15
	s_lshl_b64 s[6:7], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	s_mov_b32 s6, 1
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s8, s6, 1
	s_mov_b32 s9, exec_lo
	s_add_i32 s7, s8, -1
	v_and_b32_e32 v3, s7, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_add_co_u32 v3, vcc_lo, v1, s6
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_cmp_ge_u32 s8, s5
	s_mov_b32 s6, s8
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_3
.LBB0_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9warmingUpPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9warmingUpPiS_j, .Lfunc_end0-_Z9warmingUpPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16reduceNeighboredPiS_j ; -- Begin function _Z16reduceNeighboredPiS_j
	.globl	_Z16reduceNeighboredPiS_j
	.p2align	8
	.type	_Z16reduceNeighboredPiS_j,@function
_Z16reduceNeighboredPiS_j:              ; @_Z16reduceNeighboredPiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s6, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB1_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	s_mov_b32 s4, s15
	s_lshl_b64 s[6:7], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB1_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	s_mov_b32 s6, 1
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s8, s6, 1
	s_mov_b32 s9, exec_lo
	s_add_i32 s7, s8, -1
	v_and_b32_e32 v3, s7, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_add_co_u32 v3, vcc_lo, v1, s6
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB1_5:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_cmp_ge_u32 s8, s5
	s_mov_b32 s6, s8
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_3
.LBB1_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceNeighboredPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16reduceNeighboredPiS_j, .Lfunc_end1-_Z16reduceNeighboredPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20reduceNeighboredLessPiS_j ; -- Begin function _Z20reduceNeighboredLessPiS_j
	.globl	_Z20reduceNeighboredLessPiS_j
	.p2align	8
	.type	_Z20reduceNeighboredLessPiS_j,@function
_Z20reduceNeighboredLessPiS_j:          ; @_Z20reduceNeighboredLessPiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s6, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB2_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	s_mov_b32 s4, s15
	s_lshl_b64 s[6:7], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB2_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_lshr_b32 s8, s5, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	s_mov_b32 s6, 1
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s9, s6, 1
	s_mov_b32 s10, exec_lo
	v_mul_lo_u32 v3, s9, v0
	v_cmpx_gt_u32_e64 s8, v3
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_add_co_u32 v3, vcc_lo, v1, s6
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB2_5:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_cmp_ge_u32 s9, s5
	s_mov_b32 s6, s9
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_3
.LBB2_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20reduceNeighboredLessPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z20reduceNeighboredLessPiS_j, .Lfunc_end2-_Z20reduceNeighboredLessPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17reduceInterleavedPiS_j ; -- Begin function _Z17reduceInterleavedPiS_j
	.globl	_Z17reduceInterleavedPiS_j
	.p2align	8
	.type	_Z17reduceInterleavedPiS_j,@function
_Z17reduceInterleavedPiS_j:             ; @_Z17reduceInterleavedPiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s6, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB3_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	s_mov_b32 s4, s15
	s_lshl_b64 s[8:9], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB3_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB3_3:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_3 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB3_5:                                ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_3
.LBB3_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB3_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17reduceInterleavedPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z17reduceInterleavedPiS_j, .Lfunc_end3-_Z17reduceInterleavedPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16reduceUnrolling2PiS_j ; -- Begin function _Z16reduceUnrolling2PiS_j
	.globl	_Z16reduceUnrolling2PiS_j
	.p2align	8
	.type	_Z16reduceUnrolling2PiS_j,@function
_Z16reduceUnrolling2PiS_j:              ; @_Z16reduceUnrolling2PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 1
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s5, v1
	v_cmp_gt_u32_e32 vcc_lo, s7, v3
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB4_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB4_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_barrier
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmp_lt_u32 s5, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB4_7
; %bb.3:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB4_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB4_6
; %bb.5:                                ;   in Loop: Header=BB4_4 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB4_6:                                ;   in Loop: Header=BB4_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB4_4
.LBB4_7:                                ; %._crit_edge
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB4_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceUnrolling2PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z16reduceUnrolling2PiS_j, .Lfunc_end4-_Z16reduceUnrolling2PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16reduceUnrolling4PiS_j ; -- Begin function _Z16reduceUnrolling4PiS_j
	.globl	_Z16reduceUnrolling4PiS_j
	.p2align	8
	.type	_Z16reduceUnrolling4PiS_j,@function
_Z16reduceUnrolling4PiS_j:              ; @_Z16reduceUnrolling4PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v3, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s5, 3, v[3:4]
	v_cmp_gt_u32_e32 vcc_lo, s7, v1
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB5_2
; %bb.1:
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v5, s5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v6
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	s_clause 0x1
	global_load_b32 v4, v[7:8], off
	global_load_b32 v7, v[9:10], off
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v3, v[2:3], off
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	global_store_b32 v[9:10], v3, off
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	global_store_b32 v[9:10], v1, off
.LBB5_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_barrier
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmp_lt_u32 s5, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB5_7
; %bb.3:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB5_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB5_6
; %bb.5:                                ;   in Loop: Header=BB5_4 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB5_6:                                ;   in Loop: Header=BB5_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB5_4
.LBB5_7:                                ; %._crit_edge
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB5_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB5_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceUnrolling4PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z16reduceUnrolling4PiS_j, .Lfunc_end5-_Z16reduceUnrolling4PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 540
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16reduceUnrolling8PiS_j ; -- Begin function _Z16reduceUnrolling8PiS_j
	.globl	_Z16reduceUnrolling8PiS_j
	.p2align	8
	.type	_Z16reduceUnrolling8PiS_j,@function
_Z16reduceUnrolling8PiS_j:              ; @_Z16reduceUnrolling8PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 3
	v_add_nc_u32_e32 v3, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s5, 7, v[3:4]
	v_cmp_gt_u32_e32 vcc_lo, s7, v1
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB6_2
; %bb.1:
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v5, s5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v6
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_clause 0x1
	global_load_b32 v4, v[7:8], off
	global_load_b32 v7, v[9:10], off
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v3, v[2:3], off
	v_mov_b32_e32 v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v3, v4
	global_store_b32 v[9:10], v3, off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	global_store_b32 v[9:10], v1, off
.LBB6_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_barrier
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmp_lt_u32 s5, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_7
; %bb.3:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB6_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB6_6
; %bb.5:                                ;   in Loop: Header=BB6_4 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB6_6:                                ;   in Loop: Header=BB6_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB6_4
.LBB6_7:                                ; %._crit_edge
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB6_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB6_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceUnrolling8PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z16reduceUnrolling8PiS_j, .Lfunc_end6-_Z16reduceUnrolling8PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 752
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18reduceUnrollWarps8PiS_j ; -- Begin function _Z18reduceUnrollWarps8PiS_j
	.globl	_Z18reduceUnrollWarps8PiS_j
	.p2align	8
	.type	_Z18reduceUnrollWarps8PiS_j,@function
_Z18reduceUnrollWarps8PiS_j:            ; @_Z18reduceUnrollWarps8PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 3
	v_add_nc_u32_e32 v3, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s5, 7, v[3:4]
	v_cmp_gt_u32_e32 vcc_lo, s7, v1
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB7_2
; %bb.1:
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v5, s5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v6
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_clause 0x1
	global_load_b32 v4, v[7:8], off
	global_load_b32 v7, v[9:10], off
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v7, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v7, v4
	global_store_b32 v[9:10], v4, off
	global_load_b32 v3, v[2:3], off
	v_mov_b32_e32 v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v3, v4
	global_store_b32 v[9:10], v3, off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	global_store_b32 v[9:10], v1, off
.LBB7_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	v_lshlrev_b32_e32 v3, 2, v0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmpk_lt_u32 s5, 0x42
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB7_7
; %bb.3:                                ; %.lr.ph
	v_add_co_u32 v1, s6, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB7_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB7_6
; %bb.5:                                ;   in Loop: Header=BB7_4 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v4, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	global_store_b32 v[1:2], v4, off
.LBB7_6:                                ;   in Loop: Header=BB7_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmpk_lt_u32 s5, 0x84
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB7_4
.LBB7_7:                                ; %._crit_edge
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB7_9
; %bb.8:
	v_or_b32_e32 v1, 0x80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	v_add_co_u32 v3, s6, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, s1, 0, s6
	flat_load_b32 v1, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB7_9:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB7_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB7_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18reduceUnrollWarps8PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z18reduceUnrollWarps8PiS_j, .Lfunc_end7-_Z18reduceUnrollWarps8PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1048
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26reduceCompleteUnrollWarps8PiS_j ; -- Begin function _Z26reduceCompleteUnrollWarps8PiS_j
	.globl	_Z26reduceCompleteUnrollWarps8PiS_j
	.p2align	8
	.type	_Z26reduceCompleteUnrollWarps8PiS_j,@function
_Z26reduceCompleteUnrollWarps8PiS_j:    ; @_Z26reduceCompleteUnrollWarps8PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 3
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s5, 7, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s7, v3
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB8_2
; %bb.1:
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v4, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v5
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_nc_u32_e32 v4, s5, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[6:7], off
	global_load_b32 v10, v[8:9], off
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_nc_u32_e32 v4, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v10, v2
	global_store_b32 v[8:9], v2, off
	global_load_b32 v10, v[6:7], off
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_nc_u32_e32 v4, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v10, v2
	global_store_b32 v[8:9], v2, off
	global_load_b32 v10, v[6:7], off
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_nc_u32_e32 v4, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v10, v2
	global_store_b32 v[8:9], v2, off
	global_load_b32 v10, v[6:7], off
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_nc_u32_e32 v4, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v10, v2
	global_store_b32 v[8:9], v2, off
	global_load_b32 v10, v[6:7], off
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_mov_b32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v10, v10, v2
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	global_store_b32 v[8:9], v10, off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v6, v10
	global_store_b32 v[8:9], v4, off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v2, v4
	global_store_b32 v[8:9], v2, off
.LBB8_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	s_lshl_b64 s[6:7], s[6:7], 2
	v_lshlrev_b32_e32 v3, 2, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_cmpk_gt_u32 s5, 0x3ff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB8_4
; %bb.3:
	s_clause 0x1
	global_load_b32 v2, v3, s[0:1] offset:2048
	global_load_b32 v4, v3, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v4, v2
	global_store_b32 v3, v2, s[0:1]
.LBB8_4:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s5, 0x1ff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB8_6
; %bb.5:
	s_clause 0x1
	global_load_b32 v2, v3, s[0:1] offset:1024
	global_load_b32 v4, v3, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v4, v2
	global_store_b32 v3, v2, s[0:1]
.LBB8_6:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s5, 0xff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB8_8
; %bb.7:
	s_clause 0x1
	global_load_b32 v2, v3, s[0:1] offset:512
	global_load_b32 v4, v3, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v4, v2
	global_store_b32 v3, v2, s[0:1]
.LBB8_8:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s5, 0x7f
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s5, -1, 0
	s_barrier
	s_and_b32 s6, vcc_lo, s5
	buffer_gl0_inv
	s_and_saveexec_b32 s5, s6
	s_cbranch_execz .LBB8_10
; %bb.9:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v3, s[0:1] offset:256
	global_load_b32 v5, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	global_store_b32 v[1:2], v4, off
.LBB8_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB8_12
; %bb.11:
	v_or_b32_e32 v1, 0x80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	v_add_co_u32 v3, s6, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, s1, 0, s6
	flat_load_b32 v1, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB8_12:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB8_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB8_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26reduceCompleteUnrollWarps8PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z26reduceCompleteUnrollWarps8PiS_j, .Lfunc_end8-_Z26reduceCompleteUnrollWarps8PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1276
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9warmingUpPiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9warmingUpPiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16reduceNeighboredPiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16reduceNeighboredPiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
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