/***************************************************************************//**
 * \file weight.cu
 * \author Christopher Minar (minarc@oregonstate.edu)
 */

#include "weight.h"

namespace kernels
{
__global__
void alpha_u(double *alpha, int *ghostTagsUV, int *hybridTagsUV, double *yu, double *xu,
				double *body_intercept_x, double *body_intercept_y, double *image_point_x, double *image_point_y,
				int *i_start, int *j_start, int width, int nx, int ny)
{
	int idx	= threadIdx.x + blockDim.x * blockIdx.x,
		i	= idx % (width),
		j	= idx / (width),
		I	= i_start[0] + i,
		J	= j_start[0] + j,
		iu = J*(nx-1) + I;
	if (iu > J*(nx-1) + I) //return if we're out of bounds
		return;
	if (hybridTagsUV[iu]<=0) //return if we're not at a hybrid node point
		return;

	double  delta_1 = 0,
			delta_2 = 0,
			dx = xu[I]-xu[I-1],
			dy = yu[J]-yu[J-1];
	//find ghost node in x direction
	//west is inside
	if (ghostTagsUV[iu-1]>0)
		delta_1 = sqrt( pow(body_intercept_x[iu-1]-xu[I-1],2 ) + pow( (body_intercept_y[iu-1]-yu[J]), 2 ) );
	//east is inside
	else if(ghostTagsUV[iu+1]>0)
		delta_1 = sqrt( pow( (body_intercept_x[iu+1]-xu[I+1]),2 ) + pow( (body_intercept_y[iu+1]-yu[J]), 2 ) );
	//find ghost node in y direction
	//south is inside
	if (ghostTagsUV[iu-(nx-1)]>0)
		delta_2 = sqrt( pow( body_intercept_x[iu-(nx-1)]-xu[I],2 ) + pow( body_intercept_y[iu-(nx-1)]-yu[J-1], 2 ) );
	//north is inside
	if (ghostTagsUV[iu+(nx-1)]>0)
		delta_2 = sqrt( pow( body_intercept_x[iu+(nx-1)]-xu[I],2 ) + pow( body_intercept_y[iu+(nx-1)]-yu[J+1], 2 ) );
	//calculate alpha
	alpha[iu] = sqrt( pow( delta_1/dx , 2 ) + pow( delta_2/dy , 2 ) );
	//alpha[iu] = 1;
}

__global__
void alpha_v(double *alpha, int *ghostTagsUV, int *hybridTagsUV, double *yv, double *xv,
				double *body_intercept_x, double *body_intercept_y, double *image_point_x, double *image_point_y,
				int *i_start, int *j_start, int width, int nx, int ny)
{
	int idx	= threadIdx.x + blockDim.x * blockIdx.x,
		i	= idx % (width),
		j	= idx / (width),
		I	= i_start[0] + i,
		J	= j_start[0] + j,
		iv = J*nx + I + (nx-1)*ny;
	if (J*nx + I > nx*(ny-1)) //return if we're out of bound
		return;
	if (hybridTagsUV[iv]<=0) //return if we're not at an interpolation point
		return;

	double  delta_1 = 0,
			delta_2 = 0,
			dx = xv[I]-xv[I-1],
			dy = yv[J]-yv[J-1];
	//find ghost node in x direction
	//west is inside
	if (ghostTagsUV[iv-1]>0)
		delta_1 = sqrt( pow( body_intercept_x[iv-1]-xv[I-1],2 ) + pow( body_intercept_y[iv-1]-yv[J], 2 ) );
	//east is inside
	else if(ghostTagsUV[iv+1]>0)
		delta_1 = sqrt( pow( body_intercept_x[iv+1]-xv[I+1],2 ) + pow( body_intercept_y[iv+1]-yv[J], 2 ) );
	//find ghost node in y direction
	//south is inside
	if (ghostTagsUV[iv-nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[iv-nx]-xv[I],2 ) + pow( body_intercept_y[iv-nx]-yv[J-1], 2 ) );
	//north is inside
	if (ghostTagsUV[iv+nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[iv+nx]-xv[I],2 ) + pow( body_intercept_y[iv+nx]-yv[J+1], 2 ) );
	//calculate alpha
	alpha[iv] = sqrt( pow( delta_1/dx , 2 ) + pow( delta_2/dy , 2 ) );
	//alpha[iv] = 1;
}

__global__
void alpha_p(double *alpha, int *ghostTagsP, int *hybridTagsP, double *yu, double *xv,
				double *body_intercept_x, double *body_intercept_y, double *image_point_x, double *image_point_y,
				int *i_start, int *j_start, int width, int nx, int ny)
{
	int idx	= threadIdx.x + blockDim.x * blockIdx.x,
		i	= idx % (width),
		j	= idx / (width),
		I	= i_start[0] + i,
		J	= j_start[0] + j,
		ip = J*nx + I;
	if (J*nx + I > nx*ny) //return if we're out of bound
		return;
	if (hybridTagsP[ip]<=0) //return if we're not at an interpolation point
		return;

	double  delta_1 = 0,
			delta_2 = 0,
			dx = xv[I]-xv[I-1],
			dy = yu[J]-yu[J-1];
	//find ghost node in x direction
	//west is inside
	if (ghostTagsP[ip-1]>0)
		delta_1 = sqrt( pow( body_intercept_x[ip-1]-xv[I-1],2 ) + pow( body_intercept_y[ip-1]-yu[J], 2 ) );
	//east is inside
	else if(ghostTagsP[ip+1]>0)
		delta_1 = sqrt( pow( body_intercept_x[ip+1]-xv[I+1],2 ) + pow( body_intercept_y[ip+1]-yu[J], 2 ) );
	//find ghost node in y direction
	//south is inside
	if (ghostTagsP[ip-nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[ip-nx]-xv[I],2 ) + pow( body_intercept_y[ip-nx]-yu[J-1], 2 ) );
	//north is inside
	if (ghostTagsP[ip+nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[ip+nx]-xv[I],2 ) + pow( body_intercept_y[ip+nx]-yu[J+1], 2 ) );
	//calculate alpha
	alpha[ip] = sqrt( pow( delta_1/dx , 2 ) + pow( delta_2/dy , 2 ) );
	//alpha[ip] = 1;
}

}

	.file	"tmpxft_0035f2a1_00000000-6_weight.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z68__device_stub__ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.type	_Z68__device_stub__ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii, @function
_Z68__device_stub__ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$296, %rsp
	.cfi_def_cfa_offset 304
	movq	304(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	120(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	132(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	312(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	104(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	320(%rsp), %rax
	movq	%rcx, 64(%rsp)
	leaq	112(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	328(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	336(%rsp), %rax
	movq	%r9, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 272(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 120(%rsp)
	movl	$1, 128(%rsp)
	movq	%rax, 132(%rsp)
	movl	$1, 140(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	112(%rsp)
	.cfi_def_cfa_offset 312
	leaq	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii(%rip), %rdi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 320
	movq	148(%rsp), %rcx
	movl	156(%rsp), %r8d
	movq	136(%rsp), %rsi
	movl	144(%rsp), %edx
	leaq	184(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 312
	popq	%rdx
	.cfi_def_cfa_offset 304
.L2:
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$296, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z68__device_stub__ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii, .-_Z68__device_stub__ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.globl	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.type	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, @function
_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z68__device_stub__ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.cfi_endproc
.LFE2033:
	.size	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .-_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.globl	_Z68__device_stub__ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.type	_Z68__device_stub__ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii, @function
_Z68__device_stub__ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$296, %rsp
	.cfi_def_cfa_offset 304
	movq	304(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	120(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	132(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	312(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	104(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	320(%rsp), %rax
	movq	%rcx, 64(%rsp)
	leaq	112(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	328(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	336(%rsp), %rax
	movq	%r9, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 272(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 120(%rsp)
	movl	$1, 128(%rsp)
	movq	%rax, 132(%rsp)
	movl	$1, 140(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	112(%rsp)
	.cfi_def_cfa_offset 312
	leaq	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii(%rip), %rdi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 320
	movq	148(%rsp), %rcx
	movl	156(%rsp), %r8d
	movq	136(%rsp), %rsi
	movl	144(%rsp), %edx
	leaq	184(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 312
	popq	%rdx
	.cfi_def_cfa_offset 304
.L8:
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$296, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z68__device_stub__ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii, .-_Z68__device_stub__ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.globl	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.type	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, @function
_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z68__device_stub__ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.cfi_endproc
.LFE2035:
	.size	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .-_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.globl	_Z68__device_stub__ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.type	_Z68__device_stub__ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii, @function
_Z68__device_stub__ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$296, %rsp
	.cfi_def_cfa_offset 304
	movq	304(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	120(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	132(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	312(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	104(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	320(%rsp), %rax
	movq	%rcx, 64(%rsp)
	leaq	112(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	328(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	336(%rsp), %rax
	movq	%r9, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 272(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 120(%rsp)
	movl	$1, 128(%rsp)
	movq	%rax, 132(%rsp)
	movl	$1, 140(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	112(%rsp)
	.cfi_def_cfa_offset 312
	leaq	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii(%rip), %rdi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 320
	movq	148(%rsp), %rcx
	movl	156(%rsp), %r8d
	movq	136(%rsp), %rsi
	movl	144(%rsp), %edx
	leaq	184(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 312
	popq	%rdx
	.cfi_def_cfa_offset 304
.L13:
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$296, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z68__device_stub__ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii, .-_Z68__device_stub__ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.globl	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.type	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, @function
_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii:
.LFB2037:
	.cfi_startproc
	endbr64
	jmp	_Z68__device_stub__ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iiiPdPiS0_S_S_S_S_S_S_S0_S0_iii
	.cfi_endproc
.LFE2037:
	.size	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .-_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii"
.LC1:
	.string	"_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii"
.LC2:
	.string	"_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/***************************************************************************//**
 * \file weight.cu
 * \author Christopher Minar (minarc@oregonstate.edu)
 */


#include <hip/hip_runtime.h>
#include "weight.h"

namespace kernels
{
__global__
void alpha_u(double *alpha, int *ghostTagsUV, int *hybridTagsUV, double *yu, double *xu,
				double *body_intercept_x, double *body_intercept_y, double *image_point_x, double *image_point_y,
				int *i_start, int *j_start, int width, int nx, int ny)
{
	int idx	= threadIdx.x + blockDim.x * blockIdx.x,
		i	= idx % (width),
		j	= idx / (width),
		I	= i_start[0] + i,
		J	= j_start[0] + j,
		iu = J*(nx-1) + I;
	if (iu > J*(nx-1) + I) //return if we're out of bounds
		return;
	if (hybridTagsUV[iu]<=0) //return if we're not at a hybrid node point
		return;

	double  delta_1 = 0,
			delta_2 = 0,
			dx = xu[I]-xu[I-1],
			dy = yu[J]-yu[J-1];
	//find ghost node in x direction
	//west is inside
	if (ghostTagsUV[iu-1]>0)
		delta_1 = sqrt( pow(body_intercept_x[iu-1]-xu[I-1],2 ) + pow( (body_intercept_y[iu-1]-yu[J]), 2 ) );
	//east is inside
	else if(ghostTagsUV[iu+1]>0)
		delta_1 = sqrt( pow( (body_intercept_x[iu+1]-xu[I+1]),2 ) + pow( (body_intercept_y[iu+1]-yu[J]), 2 ) );
	//find ghost node in y direction
	//south is inside
	if (ghostTagsUV[iu-(nx-1)]>0)
		delta_2 = sqrt( pow( body_intercept_x[iu-(nx-1)]-xu[I],2 ) + pow( body_intercept_y[iu-(nx-1)]-yu[J-1], 2 ) );
	//north is inside
	if (ghostTagsUV[iu+(nx-1)]>0)
		delta_2 = sqrt( pow( body_intercept_x[iu+(nx-1)]-xu[I],2 ) + pow( body_intercept_y[iu+(nx-1)]-yu[J+1], 2 ) );
	//calculate alpha
	alpha[iu] = sqrt( pow( delta_1/dx , 2 ) + pow( delta_2/dy , 2 ) );
	//alpha[iu] = 1;
}

__global__
void alpha_v(double *alpha, int *ghostTagsUV, int *hybridTagsUV, double *yv, double *xv,
				double *body_intercept_x, double *body_intercept_y, double *image_point_x, double *image_point_y,
				int *i_start, int *j_start, int width, int nx, int ny)
{
	int idx	= threadIdx.x + blockDim.x * blockIdx.x,
		i	= idx % (width),
		j	= idx / (width),
		I	= i_start[0] + i,
		J	= j_start[0] + j,
		iv = J*nx + I + (nx-1)*ny;
	if (J*nx + I > nx*(ny-1)) //return if we're out of bound
		return;
	if (hybridTagsUV[iv]<=0) //return if we're not at an interpolation point
		return;

	double  delta_1 = 0,
			delta_2 = 0,
			dx = xv[I]-xv[I-1],
			dy = yv[J]-yv[J-1];
	//find ghost node in x direction
	//west is inside
	if (ghostTagsUV[iv-1]>0)
		delta_1 = sqrt( pow( body_intercept_x[iv-1]-xv[I-1],2 ) + pow( body_intercept_y[iv-1]-yv[J], 2 ) );
	//east is inside
	else if(ghostTagsUV[iv+1]>0)
		delta_1 = sqrt( pow( body_intercept_x[iv+1]-xv[I+1],2 ) + pow( body_intercept_y[iv+1]-yv[J], 2 ) );
	//find ghost node in y direction
	//south is inside
	if (ghostTagsUV[iv-nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[iv-nx]-xv[I],2 ) + pow( body_intercept_y[iv-nx]-yv[J-1], 2 ) );
	//north is inside
	if (ghostTagsUV[iv+nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[iv+nx]-xv[I],2 ) + pow( body_intercept_y[iv+nx]-yv[J+1], 2 ) );
	//calculate alpha
	alpha[iv] = sqrt( pow( delta_1/dx , 2 ) + pow( delta_2/dy , 2 ) );
	//alpha[iv] = 1;
}

__global__
void alpha_p(double *alpha, int *ghostTagsP, int *hybridTagsP, double *yu, double *xv,
				double *body_intercept_x, double *body_intercept_y, double *image_point_x, double *image_point_y,
				int *i_start, int *j_start, int width, int nx, int ny)
{
	int idx	= threadIdx.x + blockDim.x * blockIdx.x,
		i	= idx % (width),
		j	= idx / (width),
		I	= i_start[0] + i,
		J	= j_start[0] + j,
		ip = J*nx + I;
	if (J*nx + I > nx*ny) //return if we're out of bound
		return;
	if (hybridTagsP[ip]<=0) //return if we're not at an interpolation point
		return;

	double  delta_1 = 0,
			delta_2 = 0,
			dx = xv[I]-xv[I-1],
			dy = yu[J]-yu[J-1];
	//find ghost node in x direction
	//west is inside
	if (ghostTagsP[ip-1]>0)
		delta_1 = sqrt( pow( body_intercept_x[ip-1]-xv[I-1],2 ) + pow( body_intercept_y[ip-1]-yu[J], 2 ) );
	//east is inside
	else if(ghostTagsP[ip+1]>0)
		delta_1 = sqrt( pow( body_intercept_x[ip+1]-xv[I+1],2 ) + pow( body_intercept_y[ip+1]-yu[J], 2 ) );
	//find ghost node in y direction
	//south is inside
	if (ghostTagsP[ip-nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[ip-nx]-xv[I],2 ) + pow( body_intercept_y[ip-nx]-yu[J-1], 2 ) );
	//north is inside
	if (ghostTagsP[ip+nx]>0)
		delta_2 = sqrt( pow( body_intercept_x[ip+nx]-xv[I],2 ) + pow( body_intercept_y[ip+nx]-yu[J+1], 2 ) );
	//calculate alpha
	alpha[ip] = sqrt( pow( delta_1/dx , 2 ) + pow( delta_2/dy , 2 ) );
	//alpha[ip] = 1;
}

}

	.text
	.file	"weight.hip"
	.globl	_ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii # -- Begin function _ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.type	_ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@function
_ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii: # @_ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .Lfunc_end0-_ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.cfi_endproc
                                        # -- End function
	.globl	_ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii # -- Begin function _ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.type	_ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@function
_ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii: # @_ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .Lfunc_end1-_ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.cfi_endproc
                                        # -- End function
	.globl	_ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii # -- Begin function _ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.type	_ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@function
_ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii: # @_ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .Lfunc_end2-_ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@object # @_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.section	.rodata,"a",@progbits
	.globl	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.p2align	3, 0x0
_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii:
	.quad	_ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.size	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, 8

	.type	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@object # @_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.globl	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.p2align	3, 0x0
_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii:
	.quad	_ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.size	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, 8

	.type	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@object # @_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.globl	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.p2align	3, 0x0
_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii:
	.quad	_ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.size	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii"
	.size	.L__unnamed_1, 55

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii"
	.size	.L__unnamed_2, 55

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii"
	.size	.L__unnamed_3, 55

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZN7kernels22__device_stub__alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.addrsig_sym _ZN7kernels22__device_stub__alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.addrsig_sym _ZN7kernels22__device_stub__alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.addrsig_sym _ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.addrsig_sym _ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii ; -- Begin function _ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.globl	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.p2align	8
	.type	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@function
_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii: ; @_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[4:5], s[0:1], 0x58
	s_load_b128 s[8:11], s[0:1], 0x48
	s_load_b32 s6, s[0:1], 0x74
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s4, 31
	s_and_b32 s6, s6, 0xffff
	s_add_i32 s3, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
	s_sub_i32 s6, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	v_xor_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s3
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_load_b32 s2, s[10:11], 0x0
	s_load_b32 s3, s[8:9], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v2
	v_mul_lo_u32 v2, v0, s4
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, s2, v0
	s_add_i32 s2, s5, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v2
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, v0, s2, v[2:3]
	s_mov_b32 s2, exec_lo
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[12:13]
	v_add_co_u32 v6, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v5, vcc_lo
	global_load_b32 v1, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v1
	s_cbranch_execz .LBB0_12
; %bb.1:
	s_load_b256 s[16:23], s[0:1], 0x20
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v14, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	global_load_b32 v16, v[14:15], off offset:-4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s15, v1, vcc_lo
	global_load_b128 v[0:3], v[8:9], off offset:-8
	global_load_b128 v[4:7], v[10:11], off offset:-8
	s_waitcnt vmcnt(2)
	v_cmp_gt_i32_e32 vcc_lo, 1, v16
                                        ; implicit-def: $vgpr16_vgpr17
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_5
; %bb.2:
	global_load_b32 v18, v[14:15], off offset:4
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v18
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_lshlrev_b64 v[16:17], 3, v[12:13]
	global_load_b64 v[8:9], v[8:9], off offset:8
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s12, 0x968915a9
	s_mov_b32 s14, 0x4222de17
	v_add_co_u32 v18, vcc_lo, s18, v16
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v17, vcc_lo
	v_add_co_u32 v16, vcc_lo, s20, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s21, v17, vcc_lo
	s_mov_b32 s13, 0x3fba6564
	global_load_b64 v[18:19], v[18:19], off offset:8
	global_load_b64 v[20:21], v[16:17], off offset:8
	s_mov_b32 s15, 0x3fbdee67
	s_waitcnt vmcnt(1)
	v_add_f64 v[16:17], v[18:19], -v[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[20:21], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[18:19], |v[16:17]|
	v_frexp_mant_f64_e64 v[20:21], |v[8:9]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[18:19]
	v_cmp_gt_f64_e64 s0, s[2:3], v[20:21]
	v_cndmask_b32_e64 v22, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, 0, 1, s0
	v_ldexp_f64 v[18:19], v[18:19], v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[20:21], v[20:21], v23
	v_add_f64 v[22:23], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[20:21], 1.0
	v_add_f64 v[34:35], v[18:19], -1.0
	v_rcp_f64_e32 v[26:27], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[28:29], v[24:25]
	v_add_f64 v[38:39], v[22:23], -1.0
	v_add_f64 v[42:43], v[24:25], -1.0
	v_add_f64 v[18:19], v[18:19], -v[38:39]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_add_f64 v[30:31], v[20:21], -1.0
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[32:33], v[34:35], v[26:27]
	v_mul_f64 v[36:37], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[22:23], v[32:33]
	v_mul_f64 v[44:45], v[24:25], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[32:33], v[22:23], -v[40:41]
	v_fma_f64 v[24:25], v[36:37], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[32:33], v[18:19], v[22:23]
	v_fma_f64 v[20:21], v[36:37], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[40:41], v[18:19]
	v_add_f64 v[24:25], v[44:45], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[34:35], -v[22:23]
	v_add_f64 v[40:41], v[22:23], -v[40:41]
	v_add_f64 v[42:43], v[30:31], -v[24:25]
	v_add_f64 v[44:45], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[38:39]
	v_add_f64 v[18:19], v[40:41], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_add_f64 v[20:21], v[44:45], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[34:35], -v[22:23]
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[38:39], v[18:19]
	v_add_f64 v[20:21], v[42:43], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	v_mul_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[32:33], v[18:19]
	v_add_f64 v[24:25], v[36:37], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[22:23], -v[32:33]
	v_mul_f64 v[30:31], v[22:23], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_mul_f64 v[26:27], v[24:25], v[24:25]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[18:19]
	v_fma_f64 v[34:35], v[24:25], v[24:25], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[20:21], v[20:21]
	v_fma_f64 v[28:29], v[22:23], v[32:33], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[24:25], v[36:37], v[34:35]
	v_add_f64 v[34:35], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[26:27], v[32:33]
	v_fma_f64 v[38:39], v[34:35], s[14:15], s[12:13]
	v_add_f64 v[30:31], v[34:35], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], s[14:15], s[12:13]
	s_mov_b32 s12, 0x3abe935a
	s_mov_b32 s13, 0x3fbe25e4
	v_add_f64 v[26:27], v[36:37], -v[26:27]
	v_mul_f64 v[48:49], v[22:23], v[34:35]
	v_mul_f64 v[52:53], v[24:25], v[36:37]
	s_mov_b32 s14, 0x652b82fe
	s_mov_b32 s15, 0x3ff71547
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	v_add_f64 v[28:29], v[28:29], -v[30:31]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x47e6c9c2
	s_mov_b32 s13, 0x3fc110ef
	v_add_f64 v[26:27], v[32:33], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0xcfa74449
	s_mov_b32 s13, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x71bf3c30
	s_mov_b32 s13, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x1c7792ce
	s_mov_b32 s13, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x924920da
	s_mov_b32 s13, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x9999999c
	s_mov_b32 s13, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x3b39803f
	s_mov_b32 s13, 0x3c7abc9e
	v_mul_f64 v[42:43], v[34:35], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[36:37], v[40:41]
	v_fma_f64 v[30:31], v[34:35], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[36:37], v[40:41], -v[44:45]
	v_fma_f64 v[30:31], v[28:29], v[38:39], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[26:27], v[40:41], v[32:33]
	v_add_f64 v[38:39], v[42:43], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[44:45], v[32:33]
	v_add_f64 v[46:47], v[38:39], s[2:3]
	v_add_f64 v[42:43], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[50:51], v[40:41], s[2:3]
	v_add_f64 v[44:45], v[40:41], -v[44:45]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[54:55], v[46:47], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_fma_f64 v[42:43], v[34:35], v[22:23], -v[48:49]
	v_add_f64 v[56:57], v[50:51], s[2:3]
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_fma_f64 v[44:45], v[36:37], v[24:25], -v[52:53]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[38:39], v[38:39], -v[54:55]
	v_add_f64 v[30:31], v[30:31], s[2:3]
	v_fma_f64 v[34:35], v[34:35], v[18:19], v[42:43]
	v_add_f64 v[40:41], v[40:41], -v[56:57]
	v_add_f64 v[32:33], v[32:33], s[2:3]
	v_fma_f64 v[36:37], v[36:37], v[20:21], v[44:45]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_add_f64 v[30:31], v[30:31], v[38:39]
	v_fma_f64 v[28:29], v[28:29], v[22:23], v[34:35]
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[32:33], v[40:41]
	v_fma_f64 v[26:27], v[26:27], v[24:25], v[36:37]
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[46:47], v[30:31]
	v_add_f64 v[36:37], v[48:49], v[28:29]
	v_add_f64 v[38:39], v[50:51], v[32:33]
	v_add_f64 v[40:41], v[52:53], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[46:47], -v[34:35]
	v_mul_f64 v[44:45], v[36:37], v[34:35]
	v_add_f64 v[48:49], v[36:37], -v[48:49]
	v_add_f64 v[46:47], v[50:51], -v[38:39]
	v_mul_f64 v[50:51], v[40:41], v[38:39]
	v_add_f64 v[52:53], v[40:41], -v[52:53]
	v_add_f64 v[30:31], v[30:31], v[42:43]
	v_fma_f64 v[42:43], v[36:37], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[48:49]
	v_add_f64 v[32:33], v[32:33], v[46:47]
	v_fma_f64 v[46:47], v[40:41], v[38:39], -v[50:51]
	v_add_f64 v[26:27], v[26:27], -v[52:53]
	v_fma_f64 v[30:31], v[36:37], v[30:31], v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[40:41], v[32:33], v[46:47]
	v_fma_f64 v[28:29], v[28:29], v[34:35], v[30:31]
	v_frexp_exp_i32_f64_e32 v34, v[16:17]
	v_frexp_exp_i32_f64_e32 v35, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[26:27], v[26:27], v[38:39], v[32:33]
	v_add_f64 v[30:31], v[44:45], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	v_add_f64 v[32:33], v[50:51], v[26:27]
	v_subrev_co_ci_u32_e64 v40, vcc_lo, 0, v35, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[34:35], v34
	v_cvt_f64_i32_e32 v[40:41], v40
	v_add_f64 v[36:37], v[22:23], v[30:31]
	v_add_f64 v[38:39], v[30:31], -v[44:45]
	v_add_f64 v[42:43], v[24:25], v[32:33]
	v_add_f64 v[44:45], v[32:33], -v[50:51]
	v_mul_f64 v[46:47], v[34:35], s[2:3]
	v_add_f64 v[22:23], v[36:37], -v[22:23]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_mul_f64 v[38:39], v[40:41], s[2:3]
	v_add_f64 v[24:25], v[42:43], -v[24:25]
	v_add_f64 v[26:27], v[26:27], -v[44:45]
	v_fma_f64 v[44:45], v[34:35], s[2:3], -v[46:47]
	v_add_f64 v[22:23], v[30:31], -v[22:23]
	v_add_f64 v[18:19], v[18:19], v[28:29]
	v_fma_f64 v[28:29], v[40:41], s[2:3], -v[38:39]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[26:27], v[34:35], s[12:13], v[44:45]
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_fma_f64 v[22:23], v[40:41], s[12:13], v[28:29]
	s_mov_b32 s13, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_add_f64 v[24:25], v[46:47], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[36:37], v[18:19]
	v_add_f64 v[30:31], v[38:39], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[42:43], v[20:21]
	v_add_f64 v[46:47], v[24:25], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[24:25], v[28:29]
	v_add_f64 v[36:37], v[28:29], -v[36:37]
	v_add_f64 v[38:39], v[30:31], -v[38:39]
	v_add_f64 v[40:41], v[30:31], v[32:33]
	v_add_f64 v[42:43], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[44:45], v[34:35], -v[24:25]
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[38:39]
	v_add_f64 v[48:49], v[40:41], -v[30:31]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	v_add_f64 v[50:51], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[44:45]
	v_add_f64 v[36:37], v[26:27], v[18:19]
	v_add_f64 v[52:53], v[40:41], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[48:49]
	v_add_f64 v[24:25], v[24:25], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], -v[52:53]
	v_add_f64 v[24:25], v[28:29], v[24:25]
	v_add_f64 v[28:29], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[32:33], v[30:31]
	v_add_f64 v[32:33], v[36:37], -v[26:27]
	v_add_f64 v[24:25], v[36:37], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[28:29], -v[22:23]
	v_add_f64 v[30:31], v[28:29], v[30:31]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[36:37], v[36:37], -v[32:33]
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	v_add_f64 v[42:43], v[34:35], v[24:25]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_add_f64 v[44:45], v[40:41], v[30:31]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_add_f64 v[32:33], v[42:43], -v[34:35]
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[44:45], -v[40:41]
	v_add_f64 v[18:19], v[18:19], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_add_f64 v[20:21], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[30:31], -v[28:29]
	v_add_f64 v[18:19], v[18:19], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[22:23]
	v_add_f64 v[22:23], v[42:43], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[44:45], v[20:21]
	v_add_f64 v[26:27], v[22:23], -v[42:43]
	v_add_f64 v[28:29], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[24:25], -v[44:45]
	v_add_f64 v[32:33], v[24:25], v[24:25]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[22:23], v[22:23], 2.0, -v[28:29]
	v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x204
	v_add_f64 v[20:21], v[20:21], -v[30:31]
	v_fma_f64 v[24:25], v[24:25], 2.0, -v[32:33]
	v_cmp_class_f64_e64 s0, v[32:33], 0x204
	v_fma_f64 v[18:19], v[18:19], 2.0, v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], 2.0, v[24:25]
	v_add_f64 v[22:23], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[32:33], v[20:21]
	v_dual_cndmask_b32 v27, v23, v29 :: v_dual_cndmask_b32 v26, v22, v28
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v31, v25, v33, s0
	v_cndmask_b32_e64 v30, v24, v32, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[34:35], v[26:27], s[14:15]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[26:27]|
	v_mul_f64 v[36:37], v[30:31], s[14:15]
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[30:31]
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	v_rndne_f64_e32 v[34:35], v[34:35]
	v_rndne_f64_e32 v[36:37], v[36:37]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v19, 0, v19 :: v_dual_cndmask_b32 v18, 0, v18
	v_fma_f64 v[38:39], v[34:35], s[2:3], v[26:27]
	v_cvt_i32_f64_e32 v46, v[34:35]
	v_fma_f64 v[40:41], v[36:37], s[2:3], v[30:31]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[12:13], v[38:39]
	v_fma_f64 v[40:41], v[36:37], s[12:13], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[2:3], s[0:1]
	v_fma_f64 v[44:45], v[40:41], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[26:27]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[26:27]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[30:31]|
	v_fma_f64 v[42:43], v[38:39], v[42:43], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, 0, v21, s0
	v_cndmask_b32_e64 v20, 0, v20, s0
	v_fma_f64 v[34:35], v[38:39], v[42:43], 1.0
	v_cvt_i32_f64_e32 v38, v[36:37]
	v_fma_f64 v[36:37], v[40:41], v[44:45], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[28:29], v[34:35], v46
	v_ldexp_f64 v[32:33], v[36:37], v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v22, 0x7ff00000, v29, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[16:17]|
	v_cndmask_b32_e64 v24, 0x7ff00000, v33, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, 0, v22, s2
	v_cndmask_b32_e32 v22, 0, v28, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v25, 0, v24, s4
	v_cndmask_b32_e32 v24, 0, v32, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[8:9]|
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[22:23]
	v_cmp_class_f64_e64 vcc_lo, v[22:23], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[16:17]
	v_cmp_neq_f64_e64 s4, 0, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v19, v19, v23 :: v_dual_cndmask_b32 v8, v18, v22
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v19, 0x7fffffff, v19
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[24:25]
	v_cmp_class_f64_e64 s0, v[24:25], 0x204
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v19, 0x7ff00000, v19, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, 0, v19, s2
	v_cndmask_b32_e64 v21, v21, v25, s0
	v_cndmask_b32_e64 v18, v20, v24, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v21, 0x7fffffff, v21
	v_cndmask_b32_e64 v16, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, 0, v16, s4
	v_cndmask_b32_e32 v16, 0, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], v[16:17]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[8:9]
	v_cndmask_b32_e64 v16, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v16, 8, v16
	v_ldexp_f64 v[8:9], v[8:9], v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[16:17], v[8:9]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[8:9], v[16:17]
	v_mul_f64 v[16:17], v[16:17], 0.5
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	v_fma_f64 v[20:21], -v[18:19], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[16:17], v[18:19]
	v_fma_f64 v[20:21], -v[18:19], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[18:19]
	v_cndmask_b32_e64 v18, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x260
	v_ldexp_f64 v[16:17], v[16:17], v18
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v9 :: v_dual_cndmask_b32 v16, v16, v8
.LBB0_4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_5:                                ; %Flow120
	s_or_saveexec_b32 s6, s6
	v_lshlrev_b64 v[8:9], 3, v[12:13]
	s_xor_b32 exec_lo, exec_lo, s6
	s_cbranch_execz .LBB0_7
; %bb.6:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s18, v8
	v_add_co_ci_u32_e32 v17, vcc_lo, s19, v9, vcc_lo
	v_add_co_u32 v18, vcc_lo, s20, v8
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v9, vcc_lo
	s_mov_b32 s2, 0x55555555
	global_load_b64 v[16:17], v[16:17], off offset:-8
	global_load_b64 v[20:21], v[18:19], off offset:-8
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s12, 0x968915a9
	s_mov_b32 s14, 0x4222de17
	s_mov_b32 s13, 0x3fba6564
	s_mov_b32 s15, 0x3fbdee67
	s_waitcnt vmcnt(1)
	v_add_f64 v[18:19], v[16:17], -v[0:1]
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[20:21], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[20:21], |v[18:19]|
	v_frexp_mant_f64_e64 v[22:23], |v[16:17]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[20:21]
	v_cmp_gt_f64_e64 s0, s[2:3], v[22:23]
	v_cndmask_b32_e64 v24, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0, 1, s0
	v_ldexp_f64 v[20:21], v[20:21], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[22:23], v[22:23], v25
	v_add_f64 v[24:25], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[22:23], 1.0
	v_add_f64 v[36:37], v[20:21], -1.0
	v_rcp_f64_e32 v[28:29], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[30:31], v[26:27]
	v_add_f64 v[40:41], v[24:25], -1.0
	v_add_f64 v[44:45], v[26:27], -1.0
	v_add_f64 v[20:21], v[20:21], -v[40:41]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	v_add_f64 v[32:33], v[22:23], -1.0
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_add_f64 v[22:23], v[22:23], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[34:35], v[36:37], v[28:29]
	v_mul_f64 v[38:39], v[32:33], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[42:43], v[24:25], v[34:35]
	v_mul_f64 v[46:47], v[26:27], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[34:35], v[24:25], -v[42:43]
	v_fma_f64 v[26:27], v[38:39], v[26:27], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[34:35], v[20:21], v[24:25]
	v_fma_f64 v[22:23], v[38:39], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[42:43], v[20:21]
	v_add_f64 v[26:27], v[46:47], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[36:37], -v[24:25]
	v_add_f64 v[42:43], v[24:25], -v[42:43]
	v_add_f64 v[44:45], v[32:33], -v[26:27]
	v_add_f64 v[46:47], v[26:27], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[36:37], -v[40:41]
	v_add_f64 v[20:21], v[42:43], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_add_f64 v[22:23], v[46:47], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[36:37], -v[24:25]
	v_add_f64 v[26:27], v[32:33], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_add_f64 v[22:23], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[40:41], v[20:21]
	v_add_f64 v[22:23], v[44:45], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[28:29], v[20:21]
	v_mul_f64 v[22:23], v[30:31], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[34:35], v[20:21]
	v_add_f64 v[26:27], v[38:39], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[24:25], -v[34:35]
	v_mul_f64 v[32:33], v[24:25], v[24:25]
	v_add_f64 v[30:31], v[26:27], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_mul_f64 v[28:29], v[26:27], v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_fma_f64 v[30:31], v[24:25], v[24:25], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[20:21], v[20:21]
	v_fma_f64 v[36:37], v[26:27], v[26:27], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[22:23], v[22:23]
	v_fma_f64 v[30:31], v[24:25], v[34:35], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[26:27], v[38:39], v[36:37]
	v_add_f64 v[36:37], v[32:33], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[28:29], v[34:35]
	v_fma_f64 v[40:41], v[36:37], s[14:15], s[12:13]
	v_add_f64 v[32:33], v[36:37], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], s[14:15], s[12:13]
	s_mov_b32 s12, 0x3abe935a
	s_mov_b32 s13, 0x3fbe25e4
	v_add_f64 v[28:29], v[38:39], -v[28:29]
	v_mul_f64 v[50:51], v[24:25], v[36:37]
	v_mul_f64 v[54:55], v[26:27], v[38:39]
	s_mov_b32 s14, 0x652b82fe
	s_mov_b32 s15, 0x3ff71547
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[12:13]
	s_mov_b32 s12, 0x47e6c9c2
	s_mov_b32 s13, 0x3fc110ef
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[12:13]
	s_mov_b32 s12, 0xcfa74449
	s_mov_b32 s13, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[12:13]
	s_mov_b32 s12, 0x71bf3c30
	s_mov_b32 s13, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[12:13]
	s_mov_b32 s12, 0x1c7792ce
	s_mov_b32 s13, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[12:13]
	s_mov_b32 s12, 0x924920da
	s_mov_b32 s13, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[12:13]
	s_mov_b32 s12, 0x9999999c
	s_mov_b32 s13, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[12:13]
	s_mov_b32 s12, 0x3b39803f
	s_mov_b32 s13, 0x3c7abc9e
	v_mul_f64 v[44:45], v[36:37], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[46:47], v[38:39], v[42:43]
	v_fma_f64 v[32:33], v[36:37], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[38:39], v[42:43], -v[46:47]
	v_fma_f64 v[32:33], v[30:31], v[40:41], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[28:29], v[42:43], v[34:35]
	v_add_f64 v[40:41], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[46:47], v[34:35]
	v_add_f64 v[48:49], v[40:41], s[2:3]
	v_add_f64 v[44:45], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[52:53], v[42:43], s[2:3]
	v_add_f64 v[46:47], v[42:43], -v[46:47]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[56:57], v[48:49], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_fma_f64 v[44:45], v[36:37], v[24:25], -v[50:51]
	v_add_f64 v[58:59], v[52:53], s[2:3]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_fma_f64 v[46:47], v[38:39], v[26:27], -v[54:55]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[40:41], v[40:41], -v[56:57]
	v_add_f64 v[32:33], v[32:33], s[2:3]
	v_fma_f64 v[36:37], v[36:37], v[20:21], v[44:45]
	v_add_f64 v[42:43], v[42:43], -v[58:59]
	v_add_f64 v[34:35], v[34:35], s[2:3]
	v_fma_f64 v[38:39], v[38:39], v[22:23], v[46:47]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[32:33], v[40:41]
	v_fma_f64 v[30:31], v[30:31], v[24:25], v[36:37]
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[34:35], v[42:43]
	v_fma_f64 v[28:29], v[28:29], v[26:27], v[38:39]
	v_ldexp_f64 v[26:27], v[26:27], 1
	v_add_f64 v[36:37], v[48:49], v[32:33]
	v_add_f64 v[38:39], v[50:51], v[30:31]
	v_add_f64 v[40:41], v[52:53], v[34:35]
	v_add_f64 v[42:43], v[54:55], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[48:49], -v[36:37]
	v_mul_f64 v[46:47], v[38:39], v[36:37]
	v_add_f64 v[50:51], v[38:39], -v[50:51]
	v_add_f64 v[48:49], v[52:53], -v[40:41]
	v_mul_f64 v[52:53], v[42:43], v[40:41]
	v_add_f64 v[54:55], v[42:43], -v[54:55]
	v_add_f64 v[32:33], v[32:33], v[44:45]
	v_fma_f64 v[44:45], v[38:39], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[50:51]
	v_add_f64 v[34:35], v[34:35], v[48:49]
	v_fma_f64 v[48:49], v[42:43], v[40:41], -v[52:53]
	v_add_f64 v[28:29], v[28:29], -v[54:55]
	v_fma_f64 v[32:33], v[38:39], v[32:33], v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[42:43], v[34:35], v[48:49]
	v_fma_f64 v[30:31], v[30:31], v[36:37], v[32:33]
	v_frexp_exp_i32_f64_e32 v36, v[18:19]
	v_frexp_exp_i32_f64_e32 v37, v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[28:29], v[28:29], v[40:41], v[34:35]
	v_add_f64 v[32:33], v[46:47], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v36, vcc_lo, 0, v36, vcc_lo
	v_add_f64 v[34:35], v[52:53], v[28:29]
	v_subrev_co_ci_u32_e64 v42, vcc_lo, 0, v37, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[36:37], v36
	v_cvt_f64_i32_e32 v[42:43], v42
	v_add_f64 v[38:39], v[24:25], v[32:33]
	v_add_f64 v[40:41], v[32:33], -v[46:47]
	v_add_f64 v[44:45], v[26:27], v[34:35]
	v_add_f64 v[46:47], v[34:35], -v[52:53]
	v_mul_f64 v[48:49], v[36:37], s[2:3]
	v_add_f64 v[24:25], v[38:39], -v[24:25]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_mul_f64 v[40:41], v[42:43], s[2:3]
	v_add_f64 v[26:27], v[44:45], -v[26:27]
	v_add_f64 v[28:29], v[28:29], -v[46:47]
	v_fma_f64 v[46:47], v[36:37], s[2:3], -v[48:49]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_add_f64 v[20:21], v[20:21], v[30:31]
	v_fma_f64 v[30:31], v[42:43], s[2:3], -v[40:41]
	v_add_f64 v[26:27], v[34:35], -v[26:27]
	v_add_f64 v[22:23], v[22:23], v[28:29]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[28:29], v[36:37], s[12:13], v[46:47]
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_fma_f64 v[24:25], v[42:43], s[12:13], v[30:31]
	s_mov_b32 s13, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_add_f64 v[26:27], v[48:49], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[38:39], v[20:21]
	v_add_f64 v[32:33], v[40:41], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[44:45], v[22:23]
	v_add_f64 v[48:49], v[26:27], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[36:37], v[26:27], v[30:31]
	v_add_f64 v[38:39], v[30:31], -v[38:39]
	v_add_f64 v[40:41], v[32:33], -v[40:41]
	v_add_f64 v[42:43], v[32:33], v[34:35]
	v_add_f64 v[44:45], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[48:49]
	v_add_f64 v[46:47], v[36:37], -v[26:27]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_add_f64 v[24:25], v[24:25], -v[40:41]
	v_add_f64 v[50:51], v[42:43], -v[32:33]
	v_add_f64 v[22:23], v[22:23], -v[44:45]
	v_add_f64 v[52:53], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_add_f64 v[38:39], v[28:29], v[20:21]
	v_add_f64 v[54:55], v[42:43], -v[50:51]
	v_add_f64 v[34:35], v[34:35], -v[50:51]
	v_add_f64 v[26:27], v[26:27], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[32:33], -v[54:55]
	v_add_f64 v[26:27], v[30:31], v[26:27]
	v_add_f64 v[30:31], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[34:35], v[32:33]
	v_add_f64 v[34:35], v[38:39], -v[28:29]
	v_add_f64 v[26:27], v[38:39], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[30:31], -v[24:25]
	v_add_f64 v[32:33], v[30:31], v[32:33]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[38:39], v[38:39], -v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[34:35]
	v_add_f64 v[44:45], v[36:37], v[26:27]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_add_f64 v[46:47], v[42:43], v[32:33]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_add_f64 v[34:35], v[44:45], -v[36:37]
	v_add_f64 v[24:25], v[24:25], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[46:47], -v[42:43]
	v_add_f64 v[20:21], v[20:21], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[26:27], -v[34:35]
	v_add_f64 v[22:23], v[22:23], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[32:33], -v[30:31]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[24:25]
	v_add_f64 v[24:25], v[44:45], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[46:47], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[44:45]
	v_add_f64 v[30:31], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[26:27], -v[46:47]
	v_add_f64 v[34:35], v[26:27], v[26:27]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[24:25], v[24:25], 2.0, -v[30:31]
	v_cmp_class_f64_e64 vcc_lo, v[30:31], 0x204
	v_add_f64 v[22:23], v[22:23], -v[32:33]
	v_fma_f64 v[26:27], v[26:27], 2.0, -v[34:35]
	v_cmp_class_f64_e64 s0, v[34:35], 0x204
	v_fma_f64 v[20:21], v[20:21], 2.0, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[22:23], 2.0, v[26:27]
	v_add_f64 v[24:25], v[30:31], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[34:35], v[22:23]
	v_dual_cndmask_b32 v29, v25, v31 :: v_dual_cndmask_b32 v28, v24, v30
	v_add_f64 v[24:25], v[24:25], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v33, v27, v35, s0
	v_cndmask_b32_e64 v32, v26, v34, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[36:37], v[28:29], s[14:15]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[28:29]|
	v_mul_f64 v[38:39], v[32:33], s[14:15]
	v_add_f64 v[26:27], v[26:27], -v[34:35]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[32:33]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	v_rndne_f64_e32 v[36:37], v[36:37]
	v_rndne_f64_e32 v[38:39], v[38:39]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v21, 0, v21 :: v_dual_cndmask_b32 v20, 0, v20
	v_fma_f64 v[40:41], v[36:37], s[2:3], v[28:29]
	v_cvt_i32_f64_e32 v48, v[36:37]
	v_fma_f64 v[42:43], v[38:39], s[2:3], v[32:33]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], s[12:13], v[40:41]
	v_fma_f64 v[42:43], v[38:39], s[12:13], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], s[2:3], s[0:1]
	v_fma_f64 v[46:47], v[42:43], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[28:29]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[28:29]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[32:33]|
	v_fma_f64 v[44:45], v[40:41], v[44:45], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v23, 0, v23, s0
	v_cndmask_b32_e64 v22, 0, v22, s0
	v_fma_f64 v[36:37], v[40:41], v[44:45], 1.0
	v_cvt_i32_f64_e32 v40, v[38:39]
	v_fma_f64 v[38:39], v[42:43], v[46:47], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[30:31], v[36:37], v48
	v_ldexp_f64 v[34:35], v[38:39], v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v24, 0x7ff00000, v31, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[18:19]|
	v_cndmask_b32_e64 v26, 0x7ff00000, v35, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v25, 0, v24, s2
	v_cndmask_b32_e32 v24, 0, v30, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v27, 0, v26, s4
	v_cndmask_b32_e32 v26, 0, v34, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[16:17]|
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[24:25]
	v_cmp_class_f64_e64 vcc_lo, v[24:25], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[18:19]
	v_cmp_neq_f64_e64 s4, 0, v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v21, v21, v25 :: v_dual_cndmask_b32 v16, v20, v24
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v21, 0x7fffffff, v21
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[26:27]
	v_cmp_class_f64_e64 s0, v[26:27], 0x204
	v_cndmask_b32_e32 v16, 0, v16, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v21, 0x7ff00000, v21, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, 0, v21, s2
	v_cndmask_b32_e64 v23, v23, v27, s0
	v_cndmask_b32_e64 v20, v22, v26, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v23, 0x7fffffff, v23
	v_cndmask_b32_e64 v18, 0x7ff00000, v23, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, 0, v18, s4
	v_cndmask_b32_e32 v18, 0, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[16:17]
	v_cndmask_b32_e64 v18, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 8, v18
	v_ldexp_f64 v[16:17], v[16:17], v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[18:19], v[16:17]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_mul_f64 v[18:19], v[18:19], 0.5
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[18:19], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[20:21]
	v_cndmask_b32_e64 v20, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	v_ldexp_f64 v[18:19], v[18:19], v20
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v19, v17 :: v_dual_cndmask_b32 v16, v18, v16
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s6, s5
	s_ashr_i32 s7, s5, 31
	v_sub_co_u32 v20, vcc_lo, v12, s6
	v_subrev_co_ci_u32_e32 v21, vcc_lo, s7, v13, vcc_lo
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], 2, v[20:21]
	v_add_co_u32 v18, vcc_lo, s10, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v19, vcc_lo
	global_load_b32 v22, v[18:19], off offset:4
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v22
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_lshlrev_b64 v[18:19], 3, v[20:21]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s10, 0x968915a9
	s_mov_b32 s12, 0x4222de17
	s_mov_b32 s11, 0x3fba6564
	v_add_co_u32 v20, vcc_lo, s18, v18
	v_add_co_ci_u32_e32 v21, vcc_lo, s19, v19, vcc_lo
	v_add_co_u32 v18, vcc_lo, s20, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v19, vcc_lo
	s_mov_b32 s13, 0x3fbdee67
	global_load_b64 v[20:21], v[20:21], off offset:8
	global_load_b64 v[18:19], v[18:19], off offset:8
	s_waitcnt vmcnt(1)
	v_add_f64 v[20:21], v[20:21], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[18:19], v[18:19], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[22:23], |v[20:21]|
	v_frexp_mant_f64_e64 v[24:25], |v[18:19]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[22:23]
	v_cmp_gt_f64_e64 s0, s[2:3], v[24:25]
	v_cndmask_b32_e64 v26, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v27, 0, 1, s0
	v_ldexp_f64 v[22:23], v[22:23], v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[24:25], v[24:25], v27
	v_add_f64 v[26:27], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[24:25], 1.0
	v_add_f64 v[38:39], v[22:23], -1.0
	v_rcp_f64_e32 v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[32:33], v[28:29]
	v_add_f64 v[42:43], v[26:27], -1.0
	v_add_f64 v[46:47], v[28:29], -1.0
	v_add_f64 v[22:23], v[22:23], -v[42:43]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[36:37], -v[28:29], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[36:37], -v[28:29], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_add_f64 v[34:35], v[24:25], -1.0
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[32:33]
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[36:37], v[38:39], v[30:31]
	v_mul_f64 v[40:41], v[34:35], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[26:27], v[36:37]
	v_mul_f64 v[48:49], v[28:29], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[36:37], v[26:27], -v[44:45]
	v_fma_f64 v[28:29], v[40:41], v[28:29], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[36:37], v[22:23], v[26:27]
	v_fma_f64 v[24:25], v[40:41], v[24:25], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[44:45], v[22:23]
	v_add_f64 v[28:29], v[48:49], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[38:39], -v[26:27]
	v_add_f64 v[44:45], v[26:27], -v[44:45]
	v_add_f64 v[46:47], v[34:35], -v[28:29]
	v_add_f64 v[48:49], v[28:29], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[38:39], -v[42:43]
	v_add_f64 v[22:23], v[44:45], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_add_f64 v[24:25], v[48:49], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[38:39], -v[26:27]
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_add_f64 v[24:25], v[24:25], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[42:43], v[22:23]
	v_add_f64 v[24:25], v[46:47], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[22:23], v[30:31], v[22:23]
	v_mul_f64 v[24:25], v[32:33], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[36:37], v[22:23]
	v_add_f64 v[28:29], v[40:41], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[26:27], -v[36:37]
	v_mul_f64 v[34:35], v[26:27], v[26:27]
	v_add_f64 v[32:33], v[28:29], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_mul_f64 v[30:31], v[28:29], v[28:29]
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_fma_f64 v[32:33], v[26:27], v[26:27], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[22:23], v[22:23]
	v_fma_f64 v[38:39], v[28:29], v[28:29], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[24:25], v[24:25]
	v_fma_f64 v[32:33], v[26:27], v[36:37], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[28:29], v[40:41], v[38:39]
	v_add_f64 v[38:39], v[34:35], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[30:31], v[36:37]
	v_fma_f64 v[42:43], v[38:39], s[12:13], s[10:11]
	v_add_f64 v[34:35], v[38:39], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[44:45], v[40:41], s[12:13], s[10:11]
	s_mov_b32 s10, 0x3abe935a
	s_mov_b32 s11, 0x3fbe25e4
	v_add_f64 v[30:31], v[40:41], -v[30:31]
	v_mul_f64 v[52:53], v[26:27], v[38:39]
	v_mul_f64 v[56:57], v[28:29], v[40:41]
	s_mov_b32 s12, 0x652b82fe
	s_mov_b32 s13, 0x3ff71547
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[10:11]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[10:11]
	s_mov_b32 s10, 0x47e6c9c2
	s_mov_b32 s11, 0x3fc110ef
	v_add_f64 v[30:31], v[36:37], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[10:11]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[10:11]
	s_mov_b32 s10, 0xcfa74449
	s_mov_b32 s11, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[10:11]
	s_mov_b32 s10, 0x71bf3c30
	s_mov_b32 s11, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[10:11]
	s_mov_b32 s10, 0x1c7792ce
	s_mov_b32 s11, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[10:11]
	s_mov_b32 s10, 0x924920da
	s_mov_b32 s11, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[10:11]
	s_mov_b32 s10, 0x9999999c
	s_mov_b32 s11, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[10:11]
	s_mov_b32 s10, 0x3b39803f
	s_mov_b32 s11, 0x3c7abc9e
	v_mul_f64 v[46:47], v[38:39], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[48:49], v[40:41], v[44:45]
	v_fma_f64 v[34:35], v[38:39], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[40:41], v[44:45], -v[48:49]
	v_fma_f64 v[34:35], v[32:33], v[42:43], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[30:31], v[44:45], v[36:37]
	v_add_f64 v[42:43], v[46:47], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[48:49], v[36:37]
	v_add_f64 v[50:51], v[42:43], s[2:3]
	v_add_f64 v[46:47], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[54:55], v[44:45], s[2:3]
	v_add_f64 v[48:49], v[44:45], -v[48:49]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[58:59], v[50:51], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_fma_f64 v[46:47], v[38:39], v[26:27], -v[52:53]
	v_add_f64 v[60:61], v[54:55], s[2:3]
	v_add_f64 v[36:37], v[36:37], -v[48:49]
	v_fma_f64 v[48:49], v[40:41], v[28:29], -v[56:57]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[42:43], v[42:43], -v[58:59]
	v_add_f64 v[34:35], v[34:35], s[2:3]
	v_fma_f64 v[38:39], v[38:39], v[22:23], v[46:47]
	v_add_f64 v[44:45], v[44:45], -v[60:61]
	v_add_f64 v[36:37], v[36:37], s[2:3]
	v_fma_f64 v[40:41], v[40:41], v[24:25], v[48:49]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[34:35], v[42:43]
	v_fma_f64 v[32:33], v[32:33], v[26:27], v[38:39]
	v_ldexp_f64 v[26:27], v[26:27], 1
	v_add_f64 v[36:37], v[36:37], v[44:45]
	v_fma_f64 v[30:31], v[30:31], v[28:29], v[40:41]
	v_ldexp_f64 v[28:29], v[28:29], 1
	v_add_f64 v[38:39], v[50:51], v[34:35]
	v_add_f64 v[40:41], v[52:53], v[32:33]
	v_add_f64 v[42:43], v[54:55], v[36:37]
	v_add_f64 v[44:45], v[56:57], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[50:51], -v[38:39]
	v_mul_f64 v[48:49], v[40:41], v[38:39]
	v_add_f64 v[52:53], v[40:41], -v[52:53]
	v_add_f64 v[50:51], v[54:55], -v[42:43]
	v_mul_f64 v[54:55], v[44:45], v[42:43]
	v_add_f64 v[56:57], v[44:45], -v[56:57]
	v_add_f64 v[34:35], v[34:35], v[46:47]
	v_fma_f64 v[46:47], v[40:41], v[38:39], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[52:53]
	v_add_f64 v[36:37], v[36:37], v[50:51]
	v_fma_f64 v[50:51], v[44:45], v[42:43], -v[54:55]
	v_add_f64 v[30:31], v[30:31], -v[56:57]
	v_fma_f64 v[34:35], v[40:41], v[34:35], v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[44:45], v[36:37], v[50:51]
	v_fma_f64 v[32:33], v[32:33], v[38:39], v[34:35]
	v_frexp_exp_i32_f64_e32 v38, v[20:21]
	v_frexp_exp_i32_f64_e32 v39, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], v[30:31], v[42:43], v[36:37]
	v_add_f64 v[34:35], v[48:49], v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v38, vcc_lo, 0, v38, vcc_lo
	v_add_f64 v[36:37], v[54:55], v[30:31]
	v_subrev_co_ci_u32_e64 v44, vcc_lo, 0, v39, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[38:39], v38
	v_cvt_f64_i32_e32 v[44:45], v44
	v_add_f64 v[40:41], v[26:27], v[34:35]
	v_add_f64 v[42:43], v[34:35], -v[48:49]
	v_add_f64 v[46:47], v[28:29], v[36:37]
	v_add_f64 v[48:49], v[36:37], -v[54:55]
	v_mul_f64 v[50:51], v[38:39], s[2:3]
	v_add_f64 v[26:27], v[40:41], -v[26:27]
	v_add_f64 v[32:33], v[32:33], -v[42:43]
	v_mul_f64 v[42:43], v[44:45], s[2:3]
	v_add_f64 v[28:29], v[46:47], -v[28:29]
	v_add_f64 v[30:31], v[30:31], -v[48:49]
	v_fma_f64 v[48:49], v[38:39], s[2:3], -v[50:51]
	v_add_f64 v[26:27], v[34:35], -v[26:27]
	v_add_f64 v[22:23], v[22:23], v[32:33]
	v_fma_f64 v[32:33], v[44:45], s[2:3], -v[42:43]
	v_add_f64 v[28:29], v[36:37], -v[28:29]
	v_add_f64 v[24:25], v[24:25], v[30:31]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[30:31], v[38:39], s[10:11], v[48:49]
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_fma_f64 v[26:27], v[44:45], s[10:11], v[32:33]
	s_mov_b32 s11, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], v[28:29]
	v_add_f64 v[28:29], v[50:51], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[40:41], v[22:23]
	v_add_f64 v[34:35], v[42:43], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[46:47], v[24:25]
	v_add_f64 v[50:51], v[28:29], -v[50:51]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[38:39], v[28:29], v[32:33]
	v_add_f64 v[40:41], v[32:33], -v[40:41]
	v_add_f64 v[42:43], v[34:35], -v[42:43]
	v_add_f64 v[44:45], v[34:35], v[36:37]
	v_add_f64 v[46:47], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[50:51]
	v_add_f64 v[48:49], v[38:39], -v[28:29]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[52:53], v[44:45], -v[34:35]
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	v_add_f64 v[54:55], v[38:39], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[48:49]
	v_add_f64 v[40:41], v[30:31], v[22:23]
	v_add_f64 v[56:57], v[44:45], -v[52:53]
	v_add_f64 v[36:37], v[36:37], -v[52:53]
	v_add_f64 v[28:29], v[28:29], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], -v[56:57]
	v_add_f64 v[28:29], v[32:33], v[28:29]
	v_add_f64 v[32:33], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[36:37], v[34:35]
	v_add_f64 v[36:37], v[40:41], -v[30:31]
	v_add_f64 v[28:29], v[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[32:33], -v[26:27]
	v_add_f64 v[34:35], v[32:33], v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[40:41], v[40:41], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[36:37]
	v_add_f64 v[46:47], v[38:39], v[28:29]
	v_add_f64 v[32:33], v[32:33], -v[42:43]
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_add_f64 v[48:49], v[44:45], v[34:35]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_add_f64 v[36:37], v[46:47], -v[38:39]
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[48:49], -v[44:45]
	v_add_f64 v[22:23], v[22:23], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[36:37]
	v_add_f64 v[24:25], v[24:25], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[34:35], -v[32:33]
	v_add_f64 v[22:23], v[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[26:27]
	v_add_f64 v[26:27], v[46:47], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[48:49], v[24:25]
	v_add_f64 v[30:31], v[26:27], -v[46:47]
	v_add_f64 v[32:33], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[28:29], -v[48:49]
	v_add_f64 v[36:37], v[28:29], v[28:29]
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[26:27], v[26:27], 2.0, -v[32:33]
	v_cmp_class_f64_e64 vcc_lo, v[32:33], 0x204
	v_add_f64 v[24:25], v[24:25], -v[34:35]
	v_fma_f64 v[28:29], v[28:29], 2.0, -v[36:37]
	v_cmp_class_f64_e64 s0, v[36:37], 0x204
	v_fma_f64 v[22:23], v[22:23], 2.0, v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[24:25], 2.0, v[28:29]
	v_add_f64 v[26:27], v[32:33], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[36:37], v[24:25]
	v_dual_cndmask_b32 v31, v27, v33 :: v_dual_cndmask_b32 v30, v26, v32
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v35, v29, v37, s0
	v_cndmask_b32_e64 v34, v28, v36, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[38:39], v[30:31], s[12:13]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[30:31]|
	v_mul_f64 v[40:41], v[34:35], s[12:13]
	v_add_f64 v[28:29], v[28:29], -v[36:37]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[34:35]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_rndne_f64_e32 v[38:39], v[38:39]
	v_rndne_f64_e32 v[40:41], v[40:41]
	v_add_f64 v[24:25], v[24:25], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v22, 0, v22
	v_fma_f64 v[42:43], v[38:39], s[2:3], v[30:31]
	v_cvt_i32_f64_e32 v50, v[38:39]
	v_fma_f64 v[44:45], v[40:41], s[2:3], v[34:35]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[10:11], v[42:43]
	v_fma_f64 v[44:45], v[40:41], s[10:11], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], s[2:3], s[0:1]
	v_fma_f64 v[48:49], v[44:45], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[30:31]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[30:31]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[34:35]|
	v_fma_f64 v[46:47], v[42:43], v[46:47], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], v[44:45], v[48:49], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, 0, v25, s0
	v_cndmask_b32_e64 v24, 0, v24, s0
	v_fma_f64 v[38:39], v[42:43], v[46:47], 1.0
	v_cvt_i32_f64_e32 v42, v[40:41]
	v_fma_f64 v[40:41], v[44:45], v[48:49], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[32:33], v[38:39], v50
	v_ldexp_f64 v[36:37], v[40:41], v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, 0x7ff00000, v33, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[20:21]|
	v_cndmask_b32_e64 v28, 0x7ff00000, v37, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v27, 0, v26, s2
	v_cndmask_b32_e32 v26, 0, v32, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v29, 0, v28, s4
	v_cndmask_b32_e32 v28, 0, v36, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[18:19]|
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[20:21]
	v_cmp_neq_f64_e64 s4, 0, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v23, v23, v27 :: v_dual_cndmask_b32 v18, v22, v26
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v23, 0x7fffffff, v23
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[28:29]
	v_cmp_class_f64_e64 s0, v[28:29], 0x204
	v_cndmask_b32_e32 v18, 0, v18, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v23, 0x7ff00000, v23, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, 0, v23, s2
	v_cndmask_b32_e64 v25, v25, v29, s0
	v_cndmask_b32_e64 v22, v24, v28, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v25, 0x7fffffff, v25
	v_cndmask_b32_e64 v20, 0x7ff00000, v25, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, 0, v20, s4
	v_cndmask_b32_e32 v20, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[18:19]
	v_cndmask_b32_e64 v20, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v20, 8, v20
	v_ldexp_f64 v[18:19], v[18:19], v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[22:23], v[18:19], v[20:21]
	v_mul_f64 v[20:21], v[20:21], 0.5
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[24:25], v[20:21], v[22:23]
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[22:23]
	v_cndmask_b32_e64 v22, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[18:19], 0x260
	v_ldexp_f64 v[20:21], v[20:21], v22
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v21, v19 :: v_dual_cndmask_b32 v18, v20, v18
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b64 s[0:1], s[6:7], 2
	s_mov_b32 s5, exec_lo
	v_add_co_u32 v14, vcc_lo, v14, s0
	v_add_co_ci_u32_e32 v15, vcc_lo, s1, v15, vcc_lo
	global_load_b32 v14, v[14:15], off offset:-4
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v14
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_add_co_u32 v12, vcc_lo, v12, s6
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_mov_b32 s10, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s11, 0x3fbdee67
	v_add_co_u32 v14, vcc_lo, s18, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s19, v13, vcc_lo
	v_add_co_u32 v12, vcc_lo, s20, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo
	global_load_b64 v[14:15], v[14:15], off offset:-8
	global_load_b64 v[10:11], v[10:11], off offset:8
	global_load_b64 v[18:19], v[12:13], off offset:-8
	s_waitcnt vmcnt(2)
	v_add_f64 v[12:13], v[14:15], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[14:15], |v[12:13]|
	v_frexp_mant_f64_e64 v[18:19], |v[10:11]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[14:15]
	v_cmp_gt_f64_e64 s0, s[2:3], v[18:19]
	v_cndmask_b32_e64 v20, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, 1, s0
	v_ldexp_f64 v[14:15], v[14:15], v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[18:19], v[18:19], v21
	v_add_f64 v[20:21], v[14:15], 1.0
	v_add_f64 v[32:33], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[18:19], 1.0
	v_rcp_f64_e32 v[24:25], v[20:21]
	v_add_f64 v[36:37], v[20:21], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[26:27], v[22:23]
	v_add_f64 v[40:41], v[22:23], -1.0
	v_add_f64 v[14:15], v[14:15], -v[36:37]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[28:29], -v[20:21], v[24:25], 1.0
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[24:25]
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], -v[20:21], v[24:25], 1.0
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[24:25]
	v_add_f64 v[28:29], v[18:19], -1.0
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[30:31], v[32:33], v[24:25]
	v_mul_f64 v[34:35], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[38:39], v[20:21], v[30:31]
	v_mul_f64 v[42:43], v[22:23], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[30:31], v[20:21], -v[38:39]
	v_fma_f64 v[22:23], v[34:35], v[22:23], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[30:31], v[14:15], v[20:21]
	v_fma_f64 v[18:19], v[34:35], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[38:39], v[14:15]
	v_add_f64 v[22:23], v[42:43], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[32:33], -v[20:21]
	v_add_f64 v[38:39], v[20:21], -v[38:39]
	v_add_f64 v[40:41], v[28:29], -v[22:23]
	v_add_f64 v[42:43], v[22:23], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], -v[36:37]
	v_add_f64 v[14:15], v[38:39], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	v_add_f64 v[18:19], v[42:43], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[32:33], -v[20:21]
	v_add_f64 v[22:23], v[28:29], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_add_f64 v[18:19], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[36:37], v[14:15]
	v_add_f64 v[18:19], v[40:41], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[24:25], v[14:15]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[30:31], v[14:15]
	v_add_f64 v[22:23], v[34:35], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[20:21], -v[30:31]
	v_mul_f64 v[28:29], v[20:21], v[20:21]
	v_add_f64 v[26:27], v[22:23], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_mul_f64 v[24:25], v[22:23], v[22:23]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_fma_f64 v[26:27], v[20:21], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[14:15], v[14:15]
	v_fma_f64 v[32:33], v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[18:19], v[18:19]
	v_fma_f64 v[26:27], v[20:21], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[22:23], v[34:35], v[32:33]
	v_add_f64 v[32:33], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[24:25], v[30:31]
	v_fma_f64 v[36:37], v[32:33], s[10:11], s[6:7]
	v_add_f64 v[28:29], v[32:33], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[38:39], v[34:35], s[10:11], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[24:25], v[34:35], -v[24:25]
	v_mul_f64 v[46:47], v[20:21], v[32:33]
	v_mul_f64 v[50:51], v[22:23], v[34:35]
	s_mov_b32 s10, 0x652b82fe
	s_mov_b32 s11, 0x3ff71547
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	v_add_f64 v[26:27], v[26:27], -v[28:29]
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_mul_f64 v[40:41], v[32:33], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[42:43], v[34:35], v[38:39]
	v_fma_f64 v[28:29], v[32:33], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[34:35], v[38:39], -v[42:43]
	v_fma_f64 v[28:29], v[26:27], v[36:37], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[24:25], v[38:39], v[30:31]
	v_add_f64 v[36:37], v[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[42:43], v[30:31]
	v_add_f64 v[44:45], v[36:37], s[2:3]
	v_add_f64 v[40:41], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[48:49], v[38:39], s[2:3]
	v_add_f64 v[42:43], v[38:39], -v[42:43]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[52:53], v[44:45], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	v_fma_f64 v[40:41], v[32:33], v[20:21], -v[46:47]
	v_add_f64 v[54:55], v[48:49], s[2:3]
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_fma_f64 v[42:43], v[34:35], v[22:23], -v[50:51]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[36:37], v[36:37], -v[52:53]
	v_add_f64 v[28:29], v[28:29], s[2:3]
	v_fma_f64 v[32:33], v[32:33], v[14:15], v[40:41]
	v_add_f64 v[38:39], v[38:39], -v[54:55]
	v_add_f64 v[30:31], v[30:31], s[2:3]
	v_fma_f64 v[34:35], v[34:35], v[18:19], v[42:43]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[14:15], v[14:15], 1
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_add_f64 v[28:29], v[28:29], v[36:37]
	v_fma_f64 v[26:27], v[26:27], v[20:21], v[32:33]
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_add_f64 v[30:31], v[30:31], v[38:39]
	v_fma_f64 v[24:25], v[24:25], v[22:23], v[34:35]
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[44:45], v[28:29]
	v_add_f64 v[34:35], v[46:47], v[26:27]
	v_add_f64 v[36:37], v[48:49], v[30:31]
	v_add_f64 v[38:39], v[50:51], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[44:45], -v[32:33]
	v_mul_f64 v[42:43], v[34:35], v[32:33]
	v_add_f64 v[46:47], v[34:35], -v[46:47]
	v_add_f64 v[44:45], v[48:49], -v[36:37]
	v_mul_f64 v[48:49], v[38:39], v[36:37]
	v_add_f64 v[50:51], v[38:39], -v[50:51]
	v_add_f64 v[28:29], v[28:29], v[40:41]
	v_fma_f64 v[40:41], v[34:35], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[30:31], v[30:31], v[44:45]
	v_fma_f64 v[44:45], v[38:39], v[36:37], -v[48:49]
	v_add_f64 v[24:25], v[24:25], -v[50:51]
	v_fma_f64 v[28:29], v[34:35], v[28:29], v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[38:39], v[30:31], v[44:45]
	v_fma_f64 v[26:27], v[26:27], v[32:33], v[28:29]
	v_frexp_exp_i32_f64_e32 v32, v[12:13]
	v_frexp_exp_i32_f64_e32 v33, v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[24:25], v[36:37], v[30:31]
	v_add_f64 v[28:29], v[42:43], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v32, vcc_lo, 0, v32, vcc_lo
	v_add_f64 v[30:31], v[48:49], v[24:25]
	v_subrev_co_ci_u32_e64 v38, vcc_lo, 0, v33, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[32:33], v32
	v_cvt_f64_i32_e32 v[38:39], v38
	v_add_f64 v[34:35], v[20:21], v[28:29]
	v_add_f64 v[36:37], v[28:29], -v[42:43]
	v_add_f64 v[40:41], v[22:23], v[30:31]
	v_add_f64 v[42:43], v[30:31], -v[48:49]
	v_mul_f64 v[44:45], v[32:33], s[2:3]
	v_add_f64 v[20:21], v[34:35], -v[20:21]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_mul_f64 v[36:37], v[38:39], s[2:3]
	v_add_f64 v[22:23], v[40:41], -v[22:23]
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_fma_f64 v[42:43], v[32:33], s[2:3], -v[44:45]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_add_f64 v[14:15], v[14:15], v[26:27]
	v_fma_f64 v[26:27], v[38:39], s[2:3], -v[36:37]
	v_add_f64 v[22:23], v[30:31], -v[22:23]
	v_add_f64 v[18:19], v[18:19], v[24:25]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[24:25], v[32:33], s[6:7], v[42:43]
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_fma_f64 v[20:21], v[38:39], s[6:7], v[26:27]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[22:23], v[44:45], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[34:35], v[14:15]
	v_add_f64 v[28:29], v[36:37], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[40:41], v[18:19]
	v_add_f64 v[44:45], v[22:23], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[32:33], v[22:23], v[26:27]
	v_add_f64 v[34:35], v[26:27], -v[34:35]
	v_add_f64 v[36:37], v[28:29], -v[36:37]
	v_add_f64 v[38:39], v[28:29], v[30:31]
	v_add_f64 v[40:41], v[30:31], -v[40:41]
	v_add_f64 v[24:25], v[24:25], -v[44:45]
	v_add_f64 v[42:43], v[32:33], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[36:37]
	v_add_f64 v[46:47], v[38:39], -v[28:29]
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	v_add_f64 v[48:49], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[34:35], v[24:25], v[14:15]
	v_add_f64 v[50:51], v[38:39], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_add_f64 v[22:23], v[22:23], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[50:51]
	v_add_f64 v[22:23], v[26:27], v[22:23]
	v_add_f64 v[26:27], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[30:31], v[28:29]
	v_add_f64 v[30:31], v[34:35], -v[24:25]
	v_add_f64 v[22:23], v[34:35], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[26:27], -v[20:21]
	v_add_f64 v[28:29], v[26:27], v[28:29]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[30:31]
	v_add_f64 v[14:15], v[14:15], -v[30:31]
	v_add_f64 v[40:41], v[32:33], v[22:23]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[42:43], v[38:39], v[28:29]
	v_add_f64 v[24:25], v[24:25], -v[34:35]
	v_add_f64 v[30:31], v[40:41], -v[32:33]
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[42:43], -v[38:39]
	v_add_f64 v[14:15], v[14:15], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[18:19], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[28:29], -v[26:27]
	v_add_f64 v[14:15], v[14:15], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_add_f64 v[20:21], v[40:41], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[42:43], v[18:19]
	v_add_f64 v[24:25], v[20:21], -v[40:41]
	v_add_f64 v[26:27], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[22:23], -v[42:43]
	v_add_f64 v[30:31], v[22:23], v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[20:21], v[20:21], 2.0, -v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x204
	v_add_f64 v[18:19], v[18:19], -v[28:29]
	v_fma_f64 v[22:23], v[22:23], 2.0, -v[30:31]
	v_cmp_class_f64_e64 s0, v[30:31], 0x204
	v_fma_f64 v[14:15], v[14:15], 2.0, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[18:19], 2.0, v[22:23]
	v_add_f64 v[20:21], v[26:27], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[30:31], v[18:19]
	v_dual_cndmask_b32 v25, v21, v27 :: v_dual_cndmask_b32 v24, v20, v26
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v29, v23, v31, s0
	v_cndmask_b32_e64 v28, v22, v30, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[32:33], v[24:25], s[10:11]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[24:25]|
	v_mul_f64 v[34:35], v[28:29], s[10:11]
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[28:29]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_rndne_f64_e32 v[32:33], v[32:33]
	v_rndne_f64_e32 v[34:35], v[34:35]
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v15, 0, v15 :: v_dual_cndmask_b32 v14, 0, v14
	v_fma_f64 v[36:37], v[32:33], s[2:3], v[24:25]
	v_cvt_i32_f64_e32 v44, v[32:33]
	v_fma_f64 v[38:39], v[34:35], s[2:3], v[28:29]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[32:33], s[6:7], v[36:37]
	v_fma_f64 v[38:39], v[34:35], s[6:7], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], s[2:3], s[0:1]
	v_fma_f64 v[42:43], v[38:39], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[24:25]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[24:25]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[28:29]|
	v_fma_f64 v[40:41], v[36:37], v[40:41], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[42:43], v[38:39], v[42:43], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, 0, v19, s0
	v_cndmask_b32_e64 v18, 0, v18, s0
	v_fma_f64 v[32:33], v[36:37], v[40:41], 1.0
	v_cvt_i32_f64_e32 v36, v[34:35]
	v_fma_f64 v[34:35], v[38:39], v[42:43], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[26:27], v[32:33], v44
	v_ldexp_f64 v[30:31], v[34:35], v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v20, 0x7ff00000, v27, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[12:13]|
	v_cndmask_b32_e64 v22, 0x7ff00000, v31, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v21, 0, v20, s2
	v_cndmask_b32_e32 v20, 0, v26, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v23, 0, v22, s4
	v_cndmask_b32_e32 v22, 0, v30, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[10:11]|
	v_fma_f64 v[14:15], v[20:21], v[14:15], v[20:21]
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[12:13]
	v_cmp_neq_f64_e64 s4, 0, v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v15, v15, v21 :: v_dual_cndmask_b32 v10, v14, v20
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v15, 0x7fffffff, v15
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[22:23]
	v_cmp_class_f64_e64 s0, v[22:23], 0x204
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v15, 0x7ff00000, v15, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, 0, v15, s2
	v_cndmask_b32_e64 v19, v19, v23, s0
	v_cndmask_b32_e64 v14, v18, v22, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v19, 0x7fffffff, v19
	v_cndmask_b32_e64 v12, 0x7ff00000, v19, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v13, 0, v12, s4
	v_cndmask_b32_e32 v12, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[10:11]
	v_cndmask_b32_e64 v12, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v12, 8, v12
	v_ldexp_f64 v[10:11], v[10:11], v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[14:15], v[10:11], v[12:13]
	v_mul_f64 v[12:13], v[12:13], 0.5
	v_fma_f64 v[18:19], -v[12:13], v[14:15], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_fma_f64 v[18:19], -v[14:15], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[18:19], v[12:13], v[14:15]
	v_fma_f64 v[18:19], -v[14:15], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[14:15]
	v_cndmask_b32_e64 v14, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x260
	v_ldexp_f64 v[12:13], v[12:13], v14
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v13, v11 :: v_dual_cndmask_b32 v18, v12, v10
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_f64 v[0:1], v[2:3], -v[0:1]
	v_add_f64 v[4:5], v[6:7], -v[4:5]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s5, 0x3fba6564
	s_mov_b32 s7, 0x3fbdee67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], v[16:17]
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[18:19]
	v_div_scale_f64 v[22:23], vcc_lo, v[16:17], v[0:1], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[10:11], v[2:3]
	v_rcp_f64_e32 v[12:13], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[2:3], v[10:11], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], -v[2:3], v[10:11], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_div_scale_f64 v[14:15], s0, v[18:19], v[4:5], v[18:19]
	v_fma_f64 v[12:13], v[12:13], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[10:11]
	v_mul_f64 v[24:25], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], -v[2:3], v[20:21], v[22:23]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[10:11], v[20:21]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[2:3], v[2:3], v[0:1], v[16:17]
	v_div_fixup_f64 v[0:1], v[6:7], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[4:5], |v[2:3]|
	v_frexp_mant_f64_e64 v[6:7], |v[0:1]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	v_cmp_gt_f64_e64 s0, s[2:3], v[6:7]
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, 1, s0
	v_ldexp_f64 v[4:5], v[4:5], v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[6:7], v[6:7], v11
	v_add_f64 v[10:11], v[4:5], 1.0
	v_add_f64 v[22:23], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[6:7], 1.0
	v_rcp_f64_e32 v[14:15], v[10:11]
	v_add_f64 v[26:27], v[10:11], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[16:17], v[12:13]
	v_add_f64 v[30:31], v[12:13], -1.0
	v_add_f64 v[4:5], v[4:5], -v[26:27]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[14:15]
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[14:15]
	v_add_f64 v[18:19], v[6:7], -1.0
	v_add_f64 v[6:7], v[6:7], -v[30:31]
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[14:15]
	v_mul_f64 v[24:25], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[28:29], v[10:11], v[20:21]
	v_mul_f64 v[32:33], v[12:13], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[20:21], v[10:11], -v[28:29]
	v_fma_f64 v[12:13], v[24:25], v[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[4:5], v[10:11]
	v_fma_f64 v[6:7], v[24:25], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[28:29], v[4:5]
	v_add_f64 v[12:13], v[32:33], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[22:23], -v[10:11]
	v_add_f64 v[28:29], v[10:11], -v[28:29]
	v_add_f64 v[30:31], v[18:19], -v[12:13]
	v_add_f64 v[32:33], v[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_add_f64 v[4:5], v[28:29], -v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_add_f64 v[6:7], v[32:33], -v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[22:23], -v[10:11]
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[26:27], v[4:5]
	v_add_f64 v[6:7], v[30:31], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[6:7], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[20:21], v[4:5]
	v_add_f64 v[12:13], v[24:25], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[10:11], -v[20:21]
	v_mul_f64 v[18:19], v[10:11], v[10:11]
	v_add_f64 v[16:17], v[12:13], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	v_mul_f64 v[14:15], v[12:13], v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_fma_f64 v[16:17], v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[4:5], v[4:5]
	v_fma_f64 v[22:23], v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[6:7], v[6:7]
	v_fma_f64 v[16:17], v[10:11], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[12:13], v[24:25], v[22:23]
	v_add_f64 v[22:23], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[14:15], v[20:21]
	v_fma_f64 v[26:27], v[22:23], s[6:7], s[4:5]
	v_add_f64 v[18:19], v[22:23], -v[18:19]
	v_mul_f64 v[36:37], v[10:11], v[22:23]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[28:29], v[24:25], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[14:15], v[24:25], -v[14:15]
	v_mul_f64 v[40:41], v[12:13], v[24:25]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x3b39803f
	s_mov_b32 s5, 0x3c7abc9e
	v_mul_f64 v[30:31], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[32:33], v[24:25], v[28:29]
	v_fma_f64 v[18:19], v[22:23], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[24:25], v[28:29], -v[32:33]
	v_fma_f64 v[18:19], v[16:17], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[14:15], v[28:29], v[20:21]
	v_add_f64 v[26:27], v[30:31], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[32:33], v[20:21]
	v_add_f64 v[34:35], v[26:27], s[2:3]
	v_add_f64 v[30:31], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[38:39], v[28:29], s[2:3]
	v_add_f64 v[32:33], v[28:29], -v[32:33]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[42:43], v[34:35], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_fma_f64 v[30:31], v[22:23], v[10:11], -v[36:37]
	v_add_f64 v[44:45], v[38:39], s[2:3]
	v_add_f64 v[20:21], v[20:21], -v[32:33]
	v_fma_f64 v[32:33], v[24:25], v[12:13], -v[40:41]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[18:19], v[18:19], s[2:3]
	v_fma_f64 v[22:23], v[22:23], v[4:5], v[30:31]
	v_add_f64 v[28:29], v[28:29], -v[44:45]
	v_add_f64 v[20:21], v[20:21], s[2:3]
	v_fma_f64 v[24:25], v[24:25], v[6:7], v[32:33]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[4:5], v[4:5], 1
	v_ldexp_f64 v[6:7], v[6:7], 1
	v_add_f64 v[18:19], v[18:19], v[26:27]
	v_fma_f64 v[16:17], v[16:17], v[10:11], v[22:23]
	v_ldexp_f64 v[10:11], v[10:11], 1
	v_add_f64 v[20:21], v[20:21], v[28:29]
	v_fma_f64 v[14:15], v[14:15], v[12:13], v[24:25]
	v_ldexp_f64 v[12:13], v[12:13], 1
	v_add_f64 v[22:23], v[34:35], v[18:19]
	v_add_f64 v[24:25], v[36:37], v[16:17]
	v_add_f64 v[26:27], v[38:39], v[20:21]
	v_add_f64 v[28:29], v[40:41], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[34:35], -v[22:23]
	v_mul_f64 v[32:33], v[24:25], v[22:23]
	v_add_f64 v[36:37], v[24:25], -v[36:37]
	v_add_f64 v[34:35], v[38:39], -v[26:27]
	v_mul_f64 v[38:39], v[28:29], v[26:27]
	v_add_f64 v[40:41], v[28:29], -v[40:41]
	v_add_f64 v[18:19], v[18:19], v[30:31]
	v_fma_f64 v[30:31], v[24:25], v[22:23], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[36:37]
	v_add_f64 v[20:21], v[20:21], v[34:35]
	v_fma_f64 v[34:35], v[28:29], v[26:27], -v[38:39]
	v_add_f64 v[14:15], v[14:15], -v[40:41]
	v_fma_f64 v[18:19], v[24:25], v[18:19], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[28:29], v[20:21], v[34:35]
	v_fma_f64 v[16:17], v[16:17], v[22:23], v[18:19]
	v_frexp_exp_i32_f64_e32 v22, v[2:3]
	v_frexp_exp_i32_f64_e32 v23, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[14:15], v[26:27], v[20:21]
	v_add_f64 v[18:19], v[32:33], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v22, vcc_lo, 0, v22, vcc_lo
	v_add_f64 v[20:21], v[38:39], v[14:15]
	v_subrev_co_ci_u32_e64 v28, vcc_lo, 0, v23, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[22:23], v22
	v_cvt_f64_i32_e32 v[28:29], v28
	v_add_f64 v[24:25], v[10:11], v[18:19]
	v_add_f64 v[26:27], v[18:19], -v[32:33]
	v_add_f64 v[30:31], v[12:13], v[20:21]
	v_add_f64 v[32:33], v[20:21], -v[38:39]
	v_mul_f64 v[34:35], v[22:23], s[2:3]
	v_add_f64 v[10:11], v[24:25], -v[10:11]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_mul_f64 v[26:27], v[28:29], s[2:3]
	v_add_f64 v[12:13], v[30:31], -v[12:13]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_fma_f64 v[32:33], v[22:23], s[2:3], -v[34:35]
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	v_add_f64 v[4:5], v[4:5], v[16:17]
	v_fma_f64 v[16:17], v[28:29], s[2:3], -v[26:27]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_add_f64 v[6:7], v[6:7], v[14:15]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[14:15], v[22:23], s[4:5], v[32:33]
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_fma_f64 v[10:11], v[28:29], s[4:5], v[16:17]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_add_f64 v[12:13], v[34:35], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[24:25], v[4:5]
	v_add_f64 v[18:19], v[26:27], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[30:31], v[6:7]
	v_add_f64 v[34:35], v[12:13], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[22:23], v[12:13], v[16:17]
	v_add_f64 v[24:25], v[16:17], -v[24:25]
	v_add_f64 v[26:27], v[18:19], -v[26:27]
	v_add_f64 v[28:29], v[18:19], v[20:21]
	v_add_f64 v[30:31], v[20:21], -v[30:31]
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	v_add_f64 v[32:33], v[22:23], -v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[24:25]
	v_add_f64 v[10:11], v[10:11], -v[26:27]
	v_add_f64 v[36:37], v[28:29], -v[18:19]
	v_add_f64 v[6:7], v[6:7], -v[30:31]
	v_add_f64 v[38:39], v[22:23], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_add_f64 v[24:25], v[14:15], v[4:5]
	v_add_f64 v[40:41], v[28:29], -v[36:37]
	v_add_f64 v[20:21], v[20:21], -v[36:37]
	v_add_f64 v[12:13], v[12:13], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	v_add_f64 v[12:13], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[20:21], v[24:25], -v[14:15]
	v_add_f64 v[12:13], v[24:25], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[16:17], -v[10:11]
	v_add_f64 v[18:19], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[20:21]
	v_add_f64 v[4:5], v[4:5], -v[20:21]
	v_add_f64 v[30:31], v[22:23], v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_add_f64 v[6:7], v[6:7], -v[26:27]
	v_add_f64 v[32:33], v[28:29], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_add_f64 v[20:21], v[30:31], -v[22:23]
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[32:33], -v[28:29]
	v_add_f64 v[4:5], v[4:5], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[18:19], -v[16:17]
	v_add_f64 v[4:5], v[4:5], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[10:11], v[30:31], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[32:33], v[6:7]
	v_add_f64 v[14:15], v[10:11], -v[30:31]
	v_add_f64 v[16:17], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[12:13], -v[32:33]
	v_add_f64 v[20:21], v[12:13], v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], 2.0, -v[16:17]
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x204
	v_add_f64 v[6:7], v[6:7], -v[18:19]
	v_fma_f64 v[12:13], v[12:13], 2.0, -v[20:21]
	v_cmp_class_f64_e64 s0, v[20:21], 0x204
	v_fma_f64 v[4:5], v[4:5], 2.0, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], 2.0, v[12:13]
	v_add_f64 v[10:11], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[20:21], v[6:7]
	v_dual_cndmask_b32 v15, v11, v17 :: v_dual_cndmask_b32 v14, v10, v16
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, v13, v21, s0
	v_cndmask_b32_e64 v18, v12, v20, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[22:23], v[14:15], s[6:7]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[14:15]|
	v_mul_f64 v[24:25], v[18:19], s[6:7]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_rndne_f64_e32 v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_rndne_f64_e32 v[24:25], v[24:25]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v5, 0, v5 :: v_dual_cndmask_b32 v4, 0, v4
	v_fma_f64 v[26:27], v[22:23], s[2:3], v[14:15]
	v_cvt_i32_f64_e32 v34, v[22:23]
	v_fma_f64 v[28:29], v[24:25], s[2:3], v[18:19]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[22:23], s[4:5], v[26:27]
	v_fma_f64 v[28:29], v[24:25], s[4:5], v[28:29]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[26:27], s[2:3], s[0:1]
	v_fma_f64 v[32:33], v[28:29], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[14:15]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[14:15]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[18:19]|
	v_fma_f64 v[30:31], v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[28:29], v[32:33], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cndmask_b32_e64 v6, 0, v6, s0
	v_fma_f64 v[22:23], v[26:27], v[30:31], 1.0
	v_cvt_i32_f64_e32 v26, v[24:25]
	v_fma_f64 v[24:25], v[28:29], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[16:17], v[22:23], v34
	v_ldexp_f64 v[20:21], v[24:25], v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, 0x7ff00000, v17, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[2:3]|
	v_cndmask_b32_e64 v12, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v10, s2
	v_cndmask_b32_e32 v10, 0, v16, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v13, 0, v12, s4
	v_cndmask_b32_e32 v12, 0, v20, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[0:1]|
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[2:3]
	v_cmp_neq_f64_e64 s4, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v0, v4, v10
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v5, 0x7fffffff, v5
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[12:13]
	v_cmp_class_f64_e64 s0, v[12:13], 0x204
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v5, 0x7ff00000, v5, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, 0, v5, s2
	v_cndmask_b32_e64 v7, v7, v13, s0
	v_cndmask_b32_e64 v4, v6, v12, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v7, 0x7fffffff, v7
	v_cndmask_b32_e64 v2, 0x7ff00000, v7, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, 0, v2, s4
	v_cndmask_b32_e32 v2, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 8, v2
	v_ldexp_f64 v[0:1], v[0:1], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[4:5], v[0:1], v[2:3]
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_fma_f64 v[2:3], v[2:3], v[6:7], v[2:3]
	v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[2:3], v[4:5]
	v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[6:7], v[2:3], v[4:5]
	v_cndmask_b32_e64 v4, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x260
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v3, v1 :: v_dual_cndmask_b32 v0, v2, v0
	v_add_co_u32 v2, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v9, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 62
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .Lfunc_end0-_ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 18528
; NumSgprs: 26
; NumVgprs: 62
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 62
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii ; -- Begin function _ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.globl	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.p2align	8
	.type	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@function
_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii: ; @_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
; %bb.0:
	s_clause 0x1
	s_load_b256 s[20:27], s[0:1], 0x48
	s_load_b32 s4, s[0:1], 0x74
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s24, 31
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s3, s24, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_sub_i32 s4, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	v_xor_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s3
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_load_b32 s2, s[20:21], 0x0
	s_load_b32 s3, s[22:23], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v2
	v_mul_lo_u32 v2, v0, s24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, s3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v2
	v_add_nc_u32_e32 v2, s2, v1
	s_add_i32 s2, s26, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s2, s2, s25
	v_mad_u64_u32 v[3:4], null, v0, s25, v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, s2, v3
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_13
; %bb.1:
	s_add_i32 s2, s25, -1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, s2, s26, v[3:4]
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[12:13]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v5, vcc_lo
	global_load_b32 v1, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_13
; %bb.2:
	s_load_b256 s[16:23], s[0:1], 0x20
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v14, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	global_load_b32 v16, v[14:15], off offset:-4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s15, v1, vcc_lo
	global_load_b128 v[0:3], v[8:9], off offset:-8
	global_load_b128 v[4:7], v[10:11], off offset:-8
	s_waitcnt vmcnt(2)
	v_cmp_gt_i32_e32 vcc_lo, 1, v16
                                        ; implicit-def: $vgpr16_vgpr17
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s0
	s_cbranch_execz .LBB1_6
; %bb.3:
	global_load_b32 v18, v[14:15], off offset:4
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v18
	s_cbranch_execz .LBB1_5
; %bb.4:
	v_lshlrev_b64 v[16:17], 3, v[12:13]
	global_load_b64 v[8:9], v[8:9], off offset:8
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s12, 0x968915a9
	s_mov_b32 s14, 0x4222de17
	v_add_co_u32 v18, vcc_lo, s18, v16
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v17, vcc_lo
	v_add_co_u32 v16, vcc_lo, s20, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s21, v17, vcc_lo
	s_mov_b32 s13, 0x3fba6564
	global_load_b64 v[18:19], v[18:19], off offset:8
	global_load_b64 v[20:21], v[16:17], off offset:8
	s_mov_b32 s15, 0x3fbdee67
	s_waitcnt vmcnt(1)
	v_add_f64 v[16:17], v[18:19], -v[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[20:21], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[18:19], |v[16:17]|
	v_frexp_mant_f64_e64 v[20:21], |v[8:9]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[18:19]
	v_cmp_gt_f64_e64 s0, s[2:3], v[20:21]
	v_cndmask_b32_e64 v22, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, 0, 1, s0
	v_ldexp_f64 v[18:19], v[18:19], v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[20:21], v[20:21], v23
	v_add_f64 v[22:23], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[20:21], 1.0
	v_add_f64 v[34:35], v[18:19], -1.0
	v_rcp_f64_e32 v[26:27], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[28:29], v[24:25]
	v_add_f64 v[38:39], v[22:23], -1.0
	v_add_f64 v[42:43], v[24:25], -1.0
	v_add_f64 v[18:19], v[18:19], -v[38:39]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_add_f64 v[30:31], v[20:21], -1.0
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[32:33], v[34:35], v[26:27]
	v_mul_f64 v[36:37], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[22:23], v[32:33]
	v_mul_f64 v[44:45], v[24:25], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[32:33], v[22:23], -v[40:41]
	v_fma_f64 v[24:25], v[36:37], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[32:33], v[18:19], v[22:23]
	v_fma_f64 v[20:21], v[36:37], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[40:41], v[18:19]
	v_add_f64 v[24:25], v[44:45], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[34:35], -v[22:23]
	v_add_f64 v[40:41], v[22:23], -v[40:41]
	v_add_f64 v[42:43], v[30:31], -v[24:25]
	v_add_f64 v[44:45], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[38:39]
	v_add_f64 v[18:19], v[40:41], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_add_f64 v[20:21], v[44:45], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[34:35], -v[22:23]
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[38:39], v[18:19]
	v_add_f64 v[20:21], v[42:43], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	v_mul_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[32:33], v[18:19]
	v_add_f64 v[24:25], v[36:37], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[22:23], -v[32:33]
	v_mul_f64 v[30:31], v[22:23], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_mul_f64 v[26:27], v[24:25], v[24:25]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[18:19]
	v_fma_f64 v[34:35], v[24:25], v[24:25], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[20:21], v[20:21]
	v_fma_f64 v[28:29], v[22:23], v[32:33], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[24:25], v[36:37], v[34:35]
	v_add_f64 v[34:35], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[26:27], v[32:33]
	v_fma_f64 v[38:39], v[34:35], s[14:15], s[12:13]
	v_add_f64 v[30:31], v[34:35], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], s[14:15], s[12:13]
	s_mov_b32 s12, 0x3abe935a
	s_mov_b32 s13, 0x3fbe25e4
	v_add_f64 v[26:27], v[36:37], -v[26:27]
	v_mul_f64 v[48:49], v[22:23], v[34:35]
	v_mul_f64 v[52:53], v[24:25], v[36:37]
	s_mov_b32 s14, 0x652b82fe
	s_mov_b32 s15, 0x3ff71547
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	v_add_f64 v[28:29], v[28:29], -v[30:31]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x47e6c9c2
	s_mov_b32 s13, 0x3fc110ef
	v_add_f64 v[26:27], v[32:33], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0xcfa74449
	s_mov_b32 s13, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x71bf3c30
	s_mov_b32 s13, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x1c7792ce
	s_mov_b32 s13, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x924920da
	s_mov_b32 s13, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x9999999c
	s_mov_b32 s13, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x3b39803f
	s_mov_b32 s13, 0x3c7abc9e
	v_mul_f64 v[42:43], v[34:35], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[36:37], v[40:41]
	v_fma_f64 v[30:31], v[34:35], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[36:37], v[40:41], -v[44:45]
	v_fma_f64 v[30:31], v[28:29], v[38:39], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[26:27], v[40:41], v[32:33]
	v_add_f64 v[38:39], v[42:43], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[44:45], v[32:33]
	v_add_f64 v[46:47], v[38:39], s[2:3]
	v_add_f64 v[42:43], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[50:51], v[40:41], s[2:3]
	v_add_f64 v[44:45], v[40:41], -v[44:45]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[54:55], v[46:47], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_fma_f64 v[42:43], v[34:35], v[22:23], -v[48:49]
	v_add_f64 v[56:57], v[50:51], s[2:3]
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_fma_f64 v[44:45], v[36:37], v[24:25], -v[52:53]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[38:39], v[38:39], -v[54:55]
	v_add_f64 v[30:31], v[30:31], s[2:3]
	v_fma_f64 v[34:35], v[34:35], v[18:19], v[42:43]
	v_add_f64 v[40:41], v[40:41], -v[56:57]
	v_add_f64 v[32:33], v[32:33], s[2:3]
	v_fma_f64 v[36:37], v[36:37], v[20:21], v[44:45]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_add_f64 v[30:31], v[30:31], v[38:39]
	v_fma_f64 v[28:29], v[28:29], v[22:23], v[34:35]
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[32:33], v[40:41]
	v_fma_f64 v[26:27], v[26:27], v[24:25], v[36:37]
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[46:47], v[30:31]
	v_add_f64 v[36:37], v[48:49], v[28:29]
	v_add_f64 v[38:39], v[50:51], v[32:33]
	v_add_f64 v[40:41], v[52:53], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[46:47], -v[34:35]
	v_mul_f64 v[44:45], v[36:37], v[34:35]
	v_add_f64 v[48:49], v[36:37], -v[48:49]
	v_add_f64 v[46:47], v[50:51], -v[38:39]
	v_mul_f64 v[50:51], v[40:41], v[38:39]
	v_add_f64 v[52:53], v[40:41], -v[52:53]
	v_add_f64 v[30:31], v[30:31], v[42:43]
	v_fma_f64 v[42:43], v[36:37], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[48:49]
	v_add_f64 v[32:33], v[32:33], v[46:47]
	v_fma_f64 v[46:47], v[40:41], v[38:39], -v[50:51]
	v_add_f64 v[26:27], v[26:27], -v[52:53]
	v_fma_f64 v[30:31], v[36:37], v[30:31], v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[40:41], v[32:33], v[46:47]
	v_fma_f64 v[28:29], v[28:29], v[34:35], v[30:31]
	v_frexp_exp_i32_f64_e32 v34, v[16:17]
	v_frexp_exp_i32_f64_e32 v35, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[26:27], v[26:27], v[38:39], v[32:33]
	v_add_f64 v[30:31], v[44:45], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	v_add_f64 v[32:33], v[50:51], v[26:27]
	v_subrev_co_ci_u32_e64 v40, vcc_lo, 0, v35, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[34:35], v34
	v_cvt_f64_i32_e32 v[40:41], v40
	v_add_f64 v[36:37], v[22:23], v[30:31]
	v_add_f64 v[38:39], v[30:31], -v[44:45]
	v_add_f64 v[42:43], v[24:25], v[32:33]
	v_add_f64 v[44:45], v[32:33], -v[50:51]
	v_mul_f64 v[46:47], v[34:35], s[2:3]
	v_add_f64 v[22:23], v[36:37], -v[22:23]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_mul_f64 v[38:39], v[40:41], s[2:3]
	v_add_f64 v[24:25], v[42:43], -v[24:25]
	v_add_f64 v[26:27], v[26:27], -v[44:45]
	v_fma_f64 v[44:45], v[34:35], s[2:3], -v[46:47]
	v_add_f64 v[22:23], v[30:31], -v[22:23]
	v_add_f64 v[18:19], v[18:19], v[28:29]
	v_fma_f64 v[28:29], v[40:41], s[2:3], -v[38:39]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[26:27], v[34:35], s[12:13], v[44:45]
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_fma_f64 v[22:23], v[40:41], s[12:13], v[28:29]
	s_mov_b32 s13, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_add_f64 v[24:25], v[46:47], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[36:37], v[18:19]
	v_add_f64 v[30:31], v[38:39], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[42:43], v[20:21]
	v_add_f64 v[46:47], v[24:25], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[24:25], v[28:29]
	v_add_f64 v[36:37], v[28:29], -v[36:37]
	v_add_f64 v[38:39], v[30:31], -v[38:39]
	v_add_f64 v[40:41], v[30:31], v[32:33]
	v_add_f64 v[42:43], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[44:45], v[34:35], -v[24:25]
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[38:39]
	v_add_f64 v[48:49], v[40:41], -v[30:31]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	v_add_f64 v[50:51], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[44:45]
	v_add_f64 v[36:37], v[26:27], v[18:19]
	v_add_f64 v[52:53], v[40:41], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[48:49]
	v_add_f64 v[24:25], v[24:25], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], -v[52:53]
	v_add_f64 v[24:25], v[28:29], v[24:25]
	v_add_f64 v[28:29], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[32:33], v[30:31]
	v_add_f64 v[32:33], v[36:37], -v[26:27]
	v_add_f64 v[24:25], v[36:37], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[28:29], -v[22:23]
	v_add_f64 v[30:31], v[28:29], v[30:31]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[36:37], v[36:37], -v[32:33]
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	v_add_f64 v[42:43], v[34:35], v[24:25]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_add_f64 v[44:45], v[40:41], v[30:31]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_add_f64 v[32:33], v[42:43], -v[34:35]
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[44:45], -v[40:41]
	v_add_f64 v[18:19], v[18:19], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_add_f64 v[20:21], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[30:31], -v[28:29]
	v_add_f64 v[18:19], v[18:19], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[22:23]
	v_add_f64 v[22:23], v[42:43], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[44:45], v[20:21]
	v_add_f64 v[26:27], v[22:23], -v[42:43]
	v_add_f64 v[28:29], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[24:25], -v[44:45]
	v_add_f64 v[32:33], v[24:25], v[24:25]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[22:23], v[22:23], 2.0, -v[28:29]
	v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x204
	v_add_f64 v[20:21], v[20:21], -v[30:31]
	v_fma_f64 v[24:25], v[24:25], 2.0, -v[32:33]
	v_cmp_class_f64_e64 s0, v[32:33], 0x204
	v_fma_f64 v[18:19], v[18:19], 2.0, v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], 2.0, v[24:25]
	v_add_f64 v[22:23], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[32:33], v[20:21]
	v_dual_cndmask_b32 v27, v23, v29 :: v_dual_cndmask_b32 v26, v22, v28
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v31, v25, v33, s0
	v_cndmask_b32_e64 v30, v24, v32, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[34:35], v[26:27], s[14:15]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[26:27]|
	v_mul_f64 v[36:37], v[30:31], s[14:15]
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[30:31]
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	v_rndne_f64_e32 v[34:35], v[34:35]
	v_rndne_f64_e32 v[36:37], v[36:37]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v19, 0, v19 :: v_dual_cndmask_b32 v18, 0, v18
	v_fma_f64 v[38:39], v[34:35], s[2:3], v[26:27]
	v_cvt_i32_f64_e32 v46, v[34:35]
	v_fma_f64 v[40:41], v[36:37], s[2:3], v[30:31]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[12:13], v[38:39]
	v_fma_f64 v[40:41], v[36:37], s[12:13], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[2:3], s[0:1]
	v_fma_f64 v[44:45], v[40:41], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[26:27]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[26:27]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[30:31]|
	v_fma_f64 v[42:43], v[38:39], v[42:43], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, 0, v21, s0
	v_cndmask_b32_e64 v20, 0, v20, s0
	v_fma_f64 v[34:35], v[38:39], v[42:43], 1.0
	v_cvt_i32_f64_e32 v38, v[36:37]
	v_fma_f64 v[36:37], v[40:41], v[44:45], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[28:29], v[34:35], v46
	v_ldexp_f64 v[32:33], v[36:37], v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v22, 0x7ff00000, v29, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[16:17]|
	v_cndmask_b32_e64 v24, 0x7ff00000, v33, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, 0, v22, s2
	v_cndmask_b32_e32 v22, 0, v28, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v25, 0, v24, s4
	v_cndmask_b32_e32 v24, 0, v32, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[8:9]|
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[22:23]
	v_cmp_class_f64_e64 vcc_lo, v[22:23], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[16:17]
	v_cmp_neq_f64_e64 s4, 0, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v19, v19, v23 :: v_dual_cndmask_b32 v8, v18, v22
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v19, 0x7fffffff, v19
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[24:25]
	v_cmp_class_f64_e64 s0, v[24:25], 0x204
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v19, 0x7ff00000, v19, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, 0, v19, s2
	v_cndmask_b32_e64 v21, v21, v25, s0
	v_cndmask_b32_e64 v18, v20, v24, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v21, 0x7fffffff, v21
	v_cndmask_b32_e64 v16, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, 0, v16, s4
	v_cndmask_b32_e32 v16, 0, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], v[16:17]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[8:9]
	v_cndmask_b32_e64 v16, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v16, 8, v16
	v_ldexp_f64 v[8:9], v[8:9], v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[16:17], v[8:9]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[8:9], v[16:17]
	v_mul_f64 v[16:17], v[16:17], 0.5
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	v_fma_f64 v[20:21], -v[18:19], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[16:17], v[18:19]
	v_fma_f64 v[20:21], -v[18:19], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[18:19]
	v_cndmask_b32_e64 v18, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x260
	v_ldexp_f64 v[16:17], v[16:17], v18
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v9 :: v_dual_cndmask_b32 v16, v16, v8
.LBB1_5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_6:                                ; %Flow126
	s_or_saveexec_b32 s5, s5
	v_lshlrev_b64 v[8:9], 3, v[12:13]
	s_xor_b32 exec_lo, exec_lo, s5
	s_cbranch_execz .LBB1_8
; %bb.7:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s18, v8
	v_add_co_ci_u32_e32 v17, vcc_lo, s19, v9, vcc_lo
	v_add_co_u32 v18, vcc_lo, s20, v8
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v9, vcc_lo
	s_mov_b32 s2, 0x55555555
	global_load_b64 v[16:17], v[16:17], off offset:-8
	global_load_b64 v[20:21], v[18:19], off offset:-8
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s12, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s13, 0x3fbdee67
	s_waitcnt vmcnt(1)
	v_add_f64 v[18:19], v[16:17], -v[0:1]
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[20:21], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[20:21], |v[18:19]|
	v_frexp_mant_f64_e64 v[22:23], |v[16:17]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[20:21]
	v_cmp_gt_f64_e64 s0, s[2:3], v[22:23]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v24, 0, 1, s0
	v_ldexp_f64 v[20:21], v[20:21], v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[22:23], v[22:23], v24
	v_frexp_exp_i32_f64_e32 v13, v[18:19]
	v_add_f64 v[24:25], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[22:23], 1.0
	v_add_f64 v[36:37], v[20:21], -1.0
	v_subrev_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[28:29], v[24:25]
	v_rcp_f64_e32 v[30:31], v[26:27]
	v_add_f64 v[40:41], v[24:25], -1.0
	v_add_f64 v[44:45], v[26:27], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[40:41]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	v_add_f64 v[32:33], v[22:23], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_add_f64 v[22:23], v[22:23], -v[44:45]
	v_mul_f64 v[34:35], v[36:37], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[38:39], v[32:33], v[30:31]
	v_mul_f64 v[42:43], v[24:25], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[46:47], v[26:27], v[38:39]
	v_fma_f64 v[24:25], v[34:35], v[24:25], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[38:39], v[26:27], -v[46:47]
	v_fma_f64 v[20:21], v[34:35], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[38:39], v[22:23], v[26:27]
	v_add_f64 v[24:25], v[42:43], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[46:47], v[22:23]
	v_add_f64 v[40:41], v[36:37], -v[24:25]
	v_add_f64 v[42:43], v[24:25], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[32:33], -v[26:27]
	v_add_f64 v[46:47], v[26:27], -v[46:47]
	v_add_f64 v[36:37], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[42:43], -v[20:21]
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[46:47], -v[22:23]
	v_add_f64 v[24:25], v[36:37], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[32:33], -v[26:27]
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_add_f64 v[20:21], v[40:41], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[44:45], v[22:23]
	v_mul_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[22:23], v[30:31], v[22:23]
	v_add_f64 v[24:25], v[34:35], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[38:39], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[34:35]
	v_mul_f64 v[32:33], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[26:27], -v[38:39]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_mul_f64 v[28:29], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_fma_f64 v[30:31], v[24:25], v[24:25], -v[32:33]
	v_add_f64 v[34:35], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[36:37], v[26:27], v[26:27], -v[28:29]
	v_add_f64 v[38:39], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[24:25], v[34:35], v[30:31]
	v_fma_f64 v[34:35], v[26:27], v[38:39], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[32:33], v[30:31]
	v_add_f64 v[38:39], v[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], s[12:13], s[6:7]
	v_add_f64 v[32:33], v[36:37], -v[32:33]
	v_fma_f64 v[42:43], v[38:39], s[12:13], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[28:29], v[38:39], -v[28:29]
	v_mul_f64 v[50:51], v[24:25], v[36:37]
	v_mul_f64 v[54:55], v[26:27], v[38:39]
	s_mov_b32 s12, 0x652b82fe
	s_mov_b32 s13, 0x3ff71547
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_mul_f64 v[44:45], v[36:37], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[46:47], v[38:39], v[42:43]
	v_fma_f64 v[32:33], v[36:37], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[38:39], v[42:43], -v[46:47]
	v_fma_f64 v[32:33], v[30:31], v[40:41], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[28:29], v[42:43], v[34:35]
	v_add_f64 v[40:41], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[46:47], v[34:35]
	v_add_f64 v[48:49], v[40:41], s[2:3]
	v_add_f64 v[44:45], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[52:53], v[42:43], s[2:3]
	v_add_f64 v[46:47], v[42:43], -v[46:47]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[56:57], v[48:49], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_fma_f64 v[44:45], v[36:37], v[24:25], -v[50:51]
	v_add_f64 v[58:59], v[52:53], s[2:3]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_fma_f64 v[46:47], v[38:39], v[26:27], -v[54:55]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[40:41], v[40:41], -v[56:57]
	v_add_f64 v[32:33], v[32:33], s[2:3]
	v_fma_f64 v[36:37], v[36:37], v[20:21], v[44:45]
	v_add_f64 v[42:43], v[42:43], -v[58:59]
	v_add_f64 v[34:35], v[34:35], s[2:3]
	v_fma_f64 v[38:39], v[38:39], v[22:23], v[46:47]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[32:33], v[40:41]
	v_fma_f64 v[30:31], v[30:31], v[24:25], v[36:37]
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[34:35], v[42:43]
	v_fma_f64 v[28:29], v[28:29], v[26:27], v[38:39]
	v_ldexp_f64 v[26:27], v[26:27], 1
	v_add_f64 v[36:37], v[48:49], v[32:33]
	v_add_f64 v[38:39], v[50:51], v[30:31]
	v_add_f64 v[40:41], v[52:53], v[34:35]
	v_add_f64 v[42:43], v[54:55], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[48:49], -v[36:37]
	v_mul_f64 v[46:47], v[38:39], v[36:37]
	v_add_f64 v[50:51], v[38:39], -v[50:51]
	v_add_f64 v[48:49], v[52:53], -v[40:41]
	v_mul_f64 v[52:53], v[42:43], v[40:41]
	v_add_f64 v[54:55], v[42:43], -v[54:55]
	v_add_f64 v[32:33], v[32:33], v[44:45]
	v_fma_f64 v[44:45], v[38:39], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[50:51]
	v_add_f64 v[34:35], v[34:35], v[48:49]
	v_fma_f64 v[48:49], v[42:43], v[40:41], -v[52:53]
	v_add_f64 v[28:29], v[28:29], -v[54:55]
	v_fma_f64 v[32:33], v[38:39], v[32:33], v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[42:43], v[34:35], v[48:49]
	v_fma_f64 v[30:31], v[30:31], v[36:37], v[32:33]
	v_frexp_exp_i32_f64_e32 v36, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[28:29], v[28:29], v[40:41], v[34:35]
	v_add_f64 v[32:33], v[46:47], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v42, vcc_lo, 0, v36, s0
	v_add_f64 v[34:35], v[52:53], v[28:29]
	v_cvt_f64_i32_e32 v[36:37], v13
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[42:43], v42
	v_add_f64 v[38:39], v[24:25], v[32:33]
	v_add_f64 v[40:41], v[32:33], -v[46:47]
	v_add_f64 v[44:45], v[26:27], v[34:35]
	v_add_f64 v[46:47], v[34:35], -v[52:53]
	v_mul_f64 v[48:49], v[36:37], s[2:3]
	v_add_f64 v[24:25], v[38:39], -v[24:25]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_mul_f64 v[40:41], v[42:43], s[2:3]
	v_add_f64 v[26:27], v[44:45], -v[26:27]
	v_add_f64 v[28:29], v[28:29], -v[46:47]
	v_fma_f64 v[46:47], v[36:37], s[2:3], -v[48:49]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_add_f64 v[20:21], v[20:21], v[30:31]
	v_fma_f64 v[30:31], v[42:43], s[2:3], -v[40:41]
	v_add_f64 v[26:27], v[34:35], -v[26:27]
	v_add_f64 v[22:23], v[22:23], v[28:29]
	v_fma_f64 v[28:29], v[36:37], s[6:7], v[46:47]
	s_mov_b32 s3, 0xbfe62e42
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_fma_f64 v[24:25], v[42:43], s[6:7], v[30:31]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_add_f64 v[26:27], v[48:49], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[38:39], v[20:21]
	v_add_f64 v[32:33], v[40:41], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[44:45], v[22:23]
	v_add_f64 v[48:49], v[26:27], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[36:37], v[26:27], v[30:31]
	v_add_f64 v[38:39], v[30:31], -v[38:39]
	v_add_f64 v[40:41], v[32:33], -v[40:41]
	v_add_f64 v[42:43], v[32:33], v[34:35]
	v_add_f64 v[44:45], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[48:49]
	v_add_f64 v[46:47], v[36:37], -v[26:27]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_add_f64 v[24:25], v[24:25], -v[40:41]
	v_add_f64 v[50:51], v[42:43], -v[32:33]
	v_add_f64 v[22:23], v[22:23], -v[44:45]
	v_add_f64 v[52:53], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_add_f64 v[38:39], v[28:29], v[20:21]
	v_add_f64 v[54:55], v[42:43], -v[50:51]
	v_add_f64 v[34:35], v[34:35], -v[50:51]
	v_add_f64 v[26:27], v[26:27], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[32:33], -v[54:55]
	v_add_f64 v[26:27], v[30:31], v[26:27]
	v_add_f64 v[30:31], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[34:35], v[32:33]
	v_add_f64 v[34:35], v[38:39], -v[28:29]
	v_add_f64 v[26:27], v[38:39], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[30:31], -v[24:25]
	v_add_f64 v[32:33], v[30:31], v[32:33]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[38:39], v[38:39], -v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[34:35]
	v_add_f64 v[44:45], v[36:37], v[26:27]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_add_f64 v[46:47], v[42:43], v[32:33]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_add_f64 v[34:35], v[44:45], -v[36:37]
	v_add_f64 v[24:25], v[24:25], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[46:47], -v[42:43]
	v_add_f64 v[20:21], v[20:21], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[26:27], -v[34:35]
	v_add_f64 v[22:23], v[22:23], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[32:33], -v[30:31]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[24:25]
	v_add_f64 v[24:25], v[44:45], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[46:47], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[44:45]
	v_add_f64 v[30:31], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[26:27], -v[46:47]
	v_add_f64 v[34:35], v[26:27], v[26:27]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[24:25], v[24:25], 2.0, -v[30:31]
	v_cmp_class_f64_e64 vcc_lo, v[30:31], 0x204
	v_add_f64 v[22:23], v[22:23], -v[32:33]
	v_fma_f64 v[26:27], v[26:27], 2.0, -v[34:35]
	v_cmp_class_f64_e64 s0, v[34:35], 0x204
	v_fma_f64 v[20:21], v[20:21], 2.0, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[22:23], 2.0, v[26:27]
	v_add_f64 v[24:25], v[30:31], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[34:35], v[22:23]
	v_dual_cndmask_b32 v29, v25, v31 :: v_dual_cndmask_b32 v28, v24, v30
	v_add_f64 v[24:25], v[24:25], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v33, v27, v35, s0
	v_cndmask_b32_e64 v32, v26, v34, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[36:37], v[28:29], s[12:13]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[28:29]|
	v_mul_f64 v[38:39], v[32:33], s[12:13]
	v_add_f64 v[26:27], v[26:27], -v[34:35]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[32:33]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	v_rndne_f64_e32 v[36:37], v[36:37]
	v_rndne_f64_e32 v[38:39], v[38:39]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v21, 0, v21 :: v_dual_cndmask_b32 v20, 0, v20
	v_fma_f64 v[40:41], v[36:37], s[2:3], v[28:29]
	v_cvt_i32_f64_e32 v13, v[36:37]
	v_fma_f64 v[42:43], v[38:39], s[2:3], v[32:33]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], s[6:7], v[40:41]
	v_fma_f64 v[42:43], v[38:39], s[6:7], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], s[2:3], s[0:1]
	v_fma_f64 v[46:47], v[42:43], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[28:29]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[28:29]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[32:33]|
	v_fma_f64 v[44:45], v[40:41], v[44:45], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v23, 0, v23, s0
	v_cndmask_b32_e64 v22, 0, v22, s0
	v_fma_f64 v[36:37], v[40:41], v[44:45], 1.0
	v_cvt_i32_f64_e32 v40, v[38:39]
	v_fma_f64 v[38:39], v[42:43], v[46:47], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[30:31], v[36:37], v13
	v_ldexp_f64 v[34:35], v[38:39], v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v31, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[18:19]|
	v_cndmask_b32_e64 v26, 0x7ff00000, v35, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v25, 0, v13, s2
	v_cndmask_b32_e32 v24, 0, v30, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v27, 0, v26, s4
	v_cndmask_b32_e32 v26, 0, v34, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[16:17]|
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[24:25]
	v_cmp_class_f64_e64 vcc_lo, v[24:25], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[18:19]
	v_cmp_neq_f64_e64 s4, 0, v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v13, v21, v25 :: v_dual_cndmask_b32 v16, v20, v24
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v13, 0x7fffffff, v13
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[26:27]
	v_cmp_class_f64_e64 s0, v[26:27], 0x204
	v_cndmask_b32_e32 v16, 0, v16, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, 0, v13, s2
	v_cndmask_b32_e64 v21, v23, v27, s0
	v_cndmask_b32_e64 v20, v22, v26, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v21, 0x7fffffff, v21
	v_cndmask_b32_e64 v18, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, 0, v18, s4
	v_cndmask_b32_e32 v18, 0, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[16:17]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 8, v13
	v_ldexp_f64 v[16:17], v[16:17], v13
	v_cndmask_b32_e64 v13, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[18:19], v[16:17]
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_mul_f64 v[18:19], v[18:19], 0.5
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[18:19], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[20:21]
	v_ldexp_f64 v[18:19], v[18:19], v13
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v19, v17 :: v_dual_cndmask_b32 v16, v18, v16
.LBB1_8:
	s_or_b32 exec_lo, exec_lo, s5
	v_subrev_nc_u32_e32 v20, s25, v12
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[18:19], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s10, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v19, vcc_lo
	global_load_b32 v13, v[18:19], off
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v13
	s_cbranch_execz .LBB1_10
; %bb.9:
	v_lshlrev_b64 v[18:19], 3, v[20:21]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s10, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	v_add_co_u32 v20, vcc_lo, s18, v18
	v_add_co_ci_u32_e32 v21, vcc_lo, s19, v19, vcc_lo
	v_add_co_u32 v18, vcc_lo, s20, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v19, vcc_lo
	s_mov_b32 s11, 0x3fbdee67
	global_load_b64 v[20:21], v[20:21], off
	global_load_b64 v[18:19], v[18:19], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[20:21], v[20:21], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[18:19], v[18:19], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[22:23], |v[20:21]|
	v_frexp_mant_f64_e64 v[24:25], |v[18:19]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[22:23]
	v_cmp_gt_f64_e64 s0, s[2:3], v[24:25]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v26, 0, 1, s0
	v_ldexp_f64 v[22:23], v[22:23], v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[24:25], v[24:25], v26
	v_frexp_exp_i32_f64_e32 v13, v[20:21]
	v_add_f64 v[26:27], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[24:25], 1.0
	v_add_f64 v[38:39], v[22:23], -1.0
	v_subrev_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[30:31], v[26:27]
	v_rcp_f64_e32 v[32:33], v[28:29]
	v_add_f64 v[42:43], v[26:27], -1.0
	v_add_f64 v[46:47], v[28:29], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[42:43]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[36:37], -v[28:29], v[32:33], 1.0
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[32:33]
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], -v[28:29], v[32:33], 1.0
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_add_f64 v[34:35], v[24:25], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[32:33]
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	v_mul_f64 v[36:37], v[38:39], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[34:35], v[32:33]
	v_mul_f64 v[44:45], v[26:27], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[48:49], v[28:29], v[40:41]
	v_fma_f64 v[26:27], v[36:37], v[26:27], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[40:41], v[28:29], -v[48:49]
	v_fma_f64 v[22:23], v[36:37], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[40:41], v[24:25], v[28:29]
	v_add_f64 v[26:27], v[44:45], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[48:49], v[24:25]
	v_add_f64 v[42:43], v[38:39], -v[26:27]
	v_add_f64 v[44:45], v[26:27], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[34:35], -v[28:29]
	v_add_f64 v[48:49], v[28:29], -v[48:49]
	v_add_f64 v[38:39], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[44:45], -v[22:23]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[48:49], -v[24:25]
	v_add_f64 v[26:27], v[38:39], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	v_add_f64 v[22:23], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[28:29]
	v_add_f64 v[22:23], v[42:43], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[46:47], v[24:25]
	v_mul_f64 v[22:23], v[30:31], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[24:25], v[32:33], v[24:25]
	v_add_f64 v[26:27], v[36:37], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[40:41], v[24:25]
	v_add_f64 v[30:31], v[26:27], -v[36:37]
	v_mul_f64 v[34:35], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], v[28:29], -v[40:41]
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_mul_f64 v[30:31], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_fma_f64 v[32:33], v[26:27], v[26:27], -v[34:35]
	v_add_f64 v[36:37], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[38:39], v[28:29], v[28:29], -v[30:31]
	v_add_f64 v[40:41], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[26:27], v[36:37], v[32:33]
	v_fma_f64 v[36:37], v[28:29], v[40:41], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[34:35], v[32:33]
	v_add_f64 v[40:41], v[30:31], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], s[10:11], s[6:7]
	v_add_f64 v[34:35], v[38:39], -v[34:35]
	v_fma_f64 v[44:45], v[40:41], s[10:11], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[30:31], v[40:41], -v[30:31]
	v_mul_f64 v[52:53], v[26:27], v[38:39]
	v_mul_f64 v[56:57], v[28:29], v[40:41]
	s_mov_b32 s10, 0x652b82fe
	s_mov_b32 s11, 0x3ff71547
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[30:31], v[36:37], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_mul_f64 v[46:47], v[38:39], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[48:49], v[40:41], v[44:45]
	v_fma_f64 v[34:35], v[38:39], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[40:41], v[44:45], -v[48:49]
	v_fma_f64 v[34:35], v[32:33], v[42:43], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[30:31], v[44:45], v[36:37]
	v_add_f64 v[42:43], v[46:47], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[48:49], v[36:37]
	v_add_f64 v[50:51], v[42:43], s[2:3]
	v_add_f64 v[46:47], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[54:55], v[44:45], s[2:3]
	v_add_f64 v[48:49], v[44:45], -v[48:49]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[58:59], v[50:51], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_fma_f64 v[46:47], v[38:39], v[26:27], -v[52:53]
	v_add_f64 v[60:61], v[54:55], s[2:3]
	v_add_f64 v[36:37], v[36:37], -v[48:49]
	v_fma_f64 v[48:49], v[40:41], v[28:29], -v[56:57]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[42:43], v[42:43], -v[58:59]
	v_add_f64 v[34:35], v[34:35], s[2:3]
	v_fma_f64 v[38:39], v[38:39], v[22:23], v[46:47]
	v_add_f64 v[44:45], v[44:45], -v[60:61]
	v_add_f64 v[36:37], v[36:37], s[2:3]
	v_fma_f64 v[40:41], v[40:41], v[24:25], v[48:49]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[34:35], v[42:43]
	v_fma_f64 v[32:33], v[32:33], v[26:27], v[38:39]
	v_ldexp_f64 v[26:27], v[26:27], 1
	v_add_f64 v[36:37], v[36:37], v[44:45]
	v_fma_f64 v[30:31], v[30:31], v[28:29], v[40:41]
	v_ldexp_f64 v[28:29], v[28:29], 1
	v_add_f64 v[38:39], v[50:51], v[34:35]
	v_add_f64 v[40:41], v[52:53], v[32:33]
	v_add_f64 v[42:43], v[54:55], v[36:37]
	v_add_f64 v[44:45], v[56:57], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[50:51], -v[38:39]
	v_mul_f64 v[48:49], v[40:41], v[38:39]
	v_add_f64 v[52:53], v[40:41], -v[52:53]
	v_add_f64 v[50:51], v[54:55], -v[42:43]
	v_mul_f64 v[54:55], v[44:45], v[42:43]
	v_add_f64 v[56:57], v[44:45], -v[56:57]
	v_add_f64 v[34:35], v[34:35], v[46:47]
	v_fma_f64 v[46:47], v[40:41], v[38:39], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[52:53]
	v_add_f64 v[36:37], v[36:37], v[50:51]
	v_fma_f64 v[50:51], v[44:45], v[42:43], -v[54:55]
	v_add_f64 v[30:31], v[30:31], -v[56:57]
	v_fma_f64 v[34:35], v[40:41], v[34:35], v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[44:45], v[36:37], v[50:51]
	v_fma_f64 v[32:33], v[32:33], v[38:39], v[34:35]
	v_frexp_exp_i32_f64_e32 v38, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[30:31], v[42:43], v[36:37]
	v_add_f64 v[34:35], v[48:49], v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v44, vcc_lo, 0, v38, s0
	v_add_f64 v[36:37], v[54:55], v[30:31]
	v_cvt_f64_i32_e32 v[38:39], v13
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[44:45], v44
	v_add_f64 v[40:41], v[26:27], v[34:35]
	v_add_f64 v[42:43], v[34:35], -v[48:49]
	v_add_f64 v[46:47], v[28:29], v[36:37]
	v_add_f64 v[48:49], v[36:37], -v[54:55]
	v_mul_f64 v[50:51], v[38:39], s[2:3]
	v_add_f64 v[26:27], v[40:41], -v[26:27]
	v_add_f64 v[32:33], v[32:33], -v[42:43]
	v_mul_f64 v[42:43], v[44:45], s[2:3]
	v_add_f64 v[28:29], v[46:47], -v[28:29]
	v_add_f64 v[30:31], v[30:31], -v[48:49]
	v_fma_f64 v[48:49], v[38:39], s[2:3], -v[50:51]
	v_add_f64 v[26:27], v[34:35], -v[26:27]
	v_add_f64 v[22:23], v[22:23], v[32:33]
	v_fma_f64 v[32:33], v[44:45], s[2:3], -v[42:43]
	v_add_f64 v[28:29], v[36:37], -v[28:29]
	v_add_f64 v[24:25], v[24:25], v[30:31]
	v_fma_f64 v[30:31], v[38:39], s[6:7], v[48:49]
	s_mov_b32 s3, 0xbfe62e42
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_fma_f64 v[26:27], v[44:45], s[6:7], v[32:33]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], v[28:29]
	v_add_f64 v[28:29], v[50:51], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[40:41], v[22:23]
	v_add_f64 v[34:35], v[42:43], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[46:47], v[24:25]
	v_add_f64 v[50:51], v[28:29], -v[50:51]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[38:39], v[28:29], v[32:33]
	v_add_f64 v[40:41], v[32:33], -v[40:41]
	v_add_f64 v[42:43], v[34:35], -v[42:43]
	v_add_f64 v[44:45], v[34:35], v[36:37]
	v_add_f64 v[46:47], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[50:51]
	v_add_f64 v[48:49], v[38:39], -v[28:29]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[52:53], v[44:45], -v[34:35]
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	v_add_f64 v[54:55], v[38:39], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[48:49]
	v_add_f64 v[40:41], v[30:31], v[22:23]
	v_add_f64 v[56:57], v[44:45], -v[52:53]
	v_add_f64 v[36:37], v[36:37], -v[52:53]
	v_add_f64 v[28:29], v[28:29], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], -v[56:57]
	v_add_f64 v[28:29], v[32:33], v[28:29]
	v_add_f64 v[32:33], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[36:37], v[34:35]
	v_add_f64 v[36:37], v[40:41], -v[30:31]
	v_add_f64 v[28:29], v[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[32:33], -v[26:27]
	v_add_f64 v[34:35], v[32:33], v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[40:41], v[40:41], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[36:37]
	v_add_f64 v[46:47], v[38:39], v[28:29]
	v_add_f64 v[32:33], v[32:33], -v[42:43]
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_add_f64 v[48:49], v[44:45], v[34:35]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_add_f64 v[36:37], v[46:47], -v[38:39]
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[48:49], -v[44:45]
	v_add_f64 v[22:23], v[22:23], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[36:37]
	v_add_f64 v[24:25], v[24:25], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[34:35], -v[32:33]
	v_add_f64 v[22:23], v[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[26:27]
	v_add_f64 v[26:27], v[46:47], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[48:49], v[24:25]
	v_add_f64 v[30:31], v[26:27], -v[46:47]
	v_add_f64 v[32:33], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[28:29], -v[48:49]
	v_add_f64 v[36:37], v[28:29], v[28:29]
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[26:27], v[26:27], 2.0, -v[32:33]
	v_cmp_class_f64_e64 vcc_lo, v[32:33], 0x204
	v_add_f64 v[24:25], v[24:25], -v[34:35]
	v_fma_f64 v[28:29], v[28:29], 2.0, -v[36:37]
	v_cmp_class_f64_e64 s0, v[36:37], 0x204
	v_fma_f64 v[22:23], v[22:23], 2.0, v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[24:25], 2.0, v[28:29]
	v_add_f64 v[26:27], v[32:33], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[36:37], v[24:25]
	v_dual_cndmask_b32 v31, v27, v33 :: v_dual_cndmask_b32 v30, v26, v32
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v35, v29, v37, s0
	v_cndmask_b32_e64 v34, v28, v36, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[38:39], v[30:31], s[10:11]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[30:31]|
	v_mul_f64 v[40:41], v[34:35], s[10:11]
	v_add_f64 v[28:29], v[28:29], -v[36:37]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[34:35]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_rndne_f64_e32 v[38:39], v[38:39]
	v_rndne_f64_e32 v[40:41], v[40:41]
	v_add_f64 v[24:25], v[24:25], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v22, 0, v22
	v_fma_f64 v[42:43], v[38:39], s[2:3], v[30:31]
	v_cvt_i32_f64_e32 v13, v[38:39]
	v_fma_f64 v[44:45], v[40:41], s[2:3], v[34:35]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[6:7], v[42:43]
	v_fma_f64 v[44:45], v[40:41], s[6:7], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], s[2:3], s[0:1]
	v_fma_f64 v[48:49], v[44:45], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[30:31]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[30:31]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[34:35]|
	v_fma_f64 v[46:47], v[42:43], v[46:47], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], v[44:45], v[48:49], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, 0, v25, s0
	v_cndmask_b32_e64 v24, 0, v24, s0
	v_fma_f64 v[38:39], v[42:43], v[46:47], 1.0
	v_cvt_i32_f64_e32 v42, v[40:41]
	v_fma_f64 v[40:41], v[44:45], v[48:49], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[32:33], v[38:39], v13
	v_ldexp_f64 v[36:37], v[40:41], v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v33, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[20:21]|
	v_cndmask_b32_e64 v28, 0x7ff00000, v37, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v27, 0, v13, s2
	v_cndmask_b32_e32 v26, 0, v32, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v29, 0, v28, s4
	v_cndmask_b32_e32 v28, 0, v36, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[18:19]|
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[20:21]
	v_cmp_neq_f64_e64 s4, 0, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v13, v23, v27 :: v_dual_cndmask_b32 v18, v22, v26
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v13, 0x7fffffff, v13
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[28:29]
	v_cmp_class_f64_e64 s0, v[28:29], 0x204
	v_cndmask_b32_e32 v18, 0, v18, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, 0, v13, s2
	v_cndmask_b32_e64 v23, v25, v29, s0
	v_cndmask_b32_e64 v22, v24, v28, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v23, 0x7fffffff, v23
	v_cndmask_b32_e64 v20, 0x7ff00000, v23, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, 0, v20, s4
	v_cndmask_b32_e32 v20, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[18:19]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 8, v13
	v_ldexp_f64 v[18:19], v[18:19], v13
	v_cndmask_b32_e64 v13, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[20:21], v[18:19]
	v_cmp_class_f64_e64 vcc_lo, v[18:19], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[22:23], v[18:19], v[20:21]
	v_mul_f64 v[20:21], v[20:21], 0.5
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[24:25], v[20:21], v[22:23]
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[22:23]
	v_ldexp_f64 v[20:21], v[20:21], v13
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v21, v19 :: v_dual_cndmask_b32 v18, v20, v18
.LBB1_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_ashr_i32 s1, s25, 31
	s_mov_b32 s0, s25
	s_mov_b32 s5, exec_lo
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v13, vcc_lo, v14, s0
	v_add_co_ci_u32_e32 v14, vcc_lo, s1, v15, vcc_lo
	global_load_b32 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v13
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_add_nc_u32_e32 v12, s25, v12
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s10, 0x4222de17
	v_ashrrev_i32_e32 v13, 31, v12
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s11, 0x3fbdee67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v14, vcc_lo, s18, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s19, v13, vcc_lo
	v_add_co_u32 v12, vcc_lo, s20, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[10:11], v[10:11], off offset:8
	global_load_b64 v[18:19], v[12:13], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[12:13], v[14:15], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[14:15], |v[12:13]|
	v_frexp_mant_f64_e64 v[18:19], |v[10:11]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[14:15]
	v_cmp_gt_f64_e64 s0, s[2:3], v[18:19]
	v_cndmask_b32_e64 v20, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, 1, s0
	v_ldexp_f64 v[14:15], v[14:15], v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[18:19], v[18:19], v21
	v_add_f64 v[20:21], v[14:15], 1.0
	v_add_f64 v[32:33], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[18:19], 1.0
	v_rcp_f64_e32 v[24:25], v[20:21]
	v_add_f64 v[36:37], v[20:21], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[26:27], v[22:23]
	v_add_f64 v[40:41], v[22:23], -1.0
	v_add_f64 v[14:15], v[14:15], -v[36:37]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[28:29], -v[20:21], v[24:25], 1.0
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[24:25]
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], -v[20:21], v[24:25], 1.0
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[24:25]
	v_add_f64 v[28:29], v[18:19], -1.0
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[30:31], v[32:33], v[24:25]
	v_mul_f64 v[34:35], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[38:39], v[20:21], v[30:31]
	v_mul_f64 v[42:43], v[22:23], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[30:31], v[20:21], -v[38:39]
	v_fma_f64 v[22:23], v[34:35], v[22:23], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[30:31], v[14:15], v[20:21]
	v_fma_f64 v[18:19], v[34:35], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[38:39], v[14:15]
	v_add_f64 v[22:23], v[42:43], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[32:33], -v[20:21]
	v_add_f64 v[38:39], v[20:21], -v[38:39]
	v_add_f64 v[40:41], v[28:29], -v[22:23]
	v_add_f64 v[42:43], v[22:23], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], -v[36:37]
	v_add_f64 v[14:15], v[38:39], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	v_add_f64 v[18:19], v[42:43], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[32:33], -v[20:21]
	v_add_f64 v[22:23], v[28:29], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_add_f64 v[18:19], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[36:37], v[14:15]
	v_add_f64 v[18:19], v[40:41], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[24:25], v[14:15]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[30:31], v[14:15]
	v_add_f64 v[22:23], v[34:35], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[20:21], -v[30:31]
	v_mul_f64 v[28:29], v[20:21], v[20:21]
	v_add_f64 v[26:27], v[22:23], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_mul_f64 v[24:25], v[22:23], v[22:23]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_fma_f64 v[26:27], v[20:21], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[14:15], v[14:15]
	v_fma_f64 v[32:33], v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[18:19], v[18:19]
	v_fma_f64 v[26:27], v[20:21], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[22:23], v[34:35], v[32:33]
	v_add_f64 v[32:33], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[24:25], v[30:31]
	v_fma_f64 v[36:37], v[32:33], s[10:11], s[6:7]
	v_add_f64 v[28:29], v[32:33], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[38:39], v[34:35], s[10:11], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[24:25], v[34:35], -v[24:25]
	v_mul_f64 v[46:47], v[20:21], v[32:33]
	v_mul_f64 v[50:51], v[22:23], v[34:35]
	s_mov_b32 s10, 0x652b82fe
	s_mov_b32 s11, 0x3ff71547
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	v_add_f64 v[26:27], v[26:27], -v[28:29]
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_mul_f64 v[40:41], v[32:33], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[42:43], v[34:35], v[38:39]
	v_fma_f64 v[28:29], v[32:33], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[34:35], v[38:39], -v[42:43]
	v_fma_f64 v[28:29], v[26:27], v[36:37], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[24:25], v[38:39], v[30:31]
	v_add_f64 v[36:37], v[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[42:43], v[30:31]
	v_add_f64 v[44:45], v[36:37], s[2:3]
	v_add_f64 v[40:41], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[38:39], s[2:3]
	s_mov_b32 s3, 0xbfe55555
	v_add_f64 v[42:43], v[38:39], -v[42:43]
	v_add_f64 v[52:53], v[44:45], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	v_fma_f64 v[40:41], v[32:33], v[20:21], -v[46:47]
	v_add_f64 v[54:55], v[48:49], s[2:3]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_fma_f64 v[42:43], v[34:35], v[22:23], -v[50:51]
	v_add_f64 v[36:37], v[36:37], -v[52:53]
	v_add_f64 v[28:29], v[28:29], s[2:3]
	v_fma_f64 v[32:33], v[32:33], v[14:15], v[40:41]
	v_add_f64 v[38:39], v[38:39], -v[54:55]
	v_ldexp_f64 v[14:15], v[14:15], 1
	v_add_f64 v[30:31], v[30:31], s[2:3]
	v_fma_f64 v[34:35], v[34:35], v[18:19], v[42:43]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_add_f64 v[28:29], v[28:29], v[36:37]
	v_fma_f64 v[26:27], v[26:27], v[20:21], v[32:33]
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_add_f64 v[30:31], v[30:31], v[38:39]
	v_fma_f64 v[24:25], v[24:25], v[22:23], v[34:35]
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[44:45], v[28:29]
	v_add_f64 v[34:35], v[46:47], v[26:27]
	v_add_f64 v[36:37], v[48:49], v[30:31]
	v_add_f64 v[38:39], v[50:51], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[44:45], -v[32:33]
	v_mul_f64 v[42:43], v[34:35], v[32:33]
	v_add_f64 v[46:47], v[34:35], -v[46:47]
	v_add_f64 v[44:45], v[48:49], -v[36:37]
	v_mul_f64 v[48:49], v[38:39], v[36:37]
	v_add_f64 v[50:51], v[38:39], -v[50:51]
	v_add_f64 v[28:29], v[28:29], v[40:41]
	v_fma_f64 v[40:41], v[34:35], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[30:31], v[30:31], v[44:45]
	v_fma_f64 v[44:45], v[38:39], v[36:37], -v[48:49]
	v_add_f64 v[24:25], v[24:25], -v[50:51]
	v_fma_f64 v[28:29], v[34:35], v[28:29], v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[38:39], v[30:31], v[44:45]
	v_fma_f64 v[26:27], v[26:27], v[32:33], v[28:29]
	v_frexp_exp_i32_f64_e32 v32, v[12:13]
	v_frexp_exp_i32_f64_e32 v33, v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[24:25], v[36:37], v[30:31]
	v_add_f64 v[28:29], v[42:43], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v32, vcc_lo, 0, v32, vcc_lo
	v_subrev_co_ci_u32_e64 v38, vcc_lo, 0, v33, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[48:49], v[24:25]
	v_cvt_f64_i32_e32 v[32:33], v32
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[38:39], v38
	v_add_f64 v[34:35], v[20:21], v[28:29]
	v_add_f64 v[36:37], v[28:29], -v[42:43]
	v_add_f64 v[40:41], v[22:23], v[30:31]
	v_add_f64 v[42:43], v[30:31], -v[48:49]
	v_mul_f64 v[44:45], v[32:33], s[2:3]
	v_add_f64 v[20:21], v[34:35], -v[20:21]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_mul_f64 v[36:37], v[38:39], s[2:3]
	v_add_f64 v[22:23], v[40:41], -v[22:23]
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_fma_f64 v[42:43], v[32:33], s[2:3], -v[44:45]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_add_f64 v[14:15], v[14:15], v[26:27]
	v_fma_f64 v[26:27], v[38:39], s[2:3], -v[36:37]
	s_mov_b32 s3, 0xbfe62e42
	v_add_f64 v[22:23], v[30:31], -v[22:23]
	v_add_f64 v[18:19], v[18:19], v[24:25]
	v_fma_f64 v[24:25], v[32:33], s[6:7], v[42:43]
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_fma_f64 v[20:21], v[38:39], s[6:7], v[26:27]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[22:23], v[44:45], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[34:35], v[14:15]
	v_add_f64 v[28:29], v[36:37], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[40:41], v[18:19]
	v_add_f64 v[44:45], v[22:23], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[32:33], v[22:23], v[26:27]
	v_add_f64 v[34:35], v[26:27], -v[34:35]
	v_add_f64 v[36:37], v[28:29], -v[36:37]
	v_add_f64 v[38:39], v[28:29], v[30:31]
	v_add_f64 v[40:41], v[30:31], -v[40:41]
	v_add_f64 v[24:25], v[24:25], -v[44:45]
	v_add_f64 v[42:43], v[32:33], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[36:37]
	v_add_f64 v[46:47], v[38:39], -v[28:29]
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	v_add_f64 v[48:49], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[34:35], v[24:25], v[14:15]
	v_add_f64 v[50:51], v[38:39], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_add_f64 v[22:23], v[22:23], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[50:51]
	v_add_f64 v[22:23], v[26:27], v[22:23]
	v_add_f64 v[26:27], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[30:31], v[28:29]
	v_add_f64 v[30:31], v[34:35], -v[24:25]
	v_add_f64 v[22:23], v[34:35], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[26:27], -v[20:21]
	v_add_f64 v[28:29], v[26:27], v[28:29]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[30:31]
	v_add_f64 v[14:15], v[14:15], -v[30:31]
	v_add_f64 v[40:41], v[32:33], v[22:23]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[42:43], v[38:39], v[28:29]
	v_add_f64 v[24:25], v[24:25], -v[34:35]
	v_add_f64 v[30:31], v[40:41], -v[32:33]
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[42:43], -v[38:39]
	v_add_f64 v[14:15], v[14:15], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[18:19], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[28:29], -v[26:27]
	v_add_f64 v[14:15], v[14:15], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_add_f64 v[20:21], v[40:41], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[42:43], v[18:19]
	v_add_f64 v[24:25], v[20:21], -v[40:41]
	v_add_f64 v[26:27], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[22:23], -v[42:43]
	v_add_f64 v[30:31], v[22:23], v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[20:21], v[20:21], 2.0, -v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x204
	v_add_f64 v[18:19], v[18:19], -v[28:29]
	v_fma_f64 v[22:23], v[22:23], 2.0, -v[30:31]
	v_cmp_class_f64_e64 s0, v[30:31], 0x204
	v_fma_f64 v[14:15], v[14:15], 2.0, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[18:19], 2.0, v[22:23]
	v_add_f64 v[20:21], v[26:27], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[30:31], v[18:19]
	v_dual_cndmask_b32 v25, v21, v27 :: v_dual_cndmask_b32 v24, v20, v26
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v29, v23, v31, s0
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[24:25]|
	v_cndmask_b32_e64 v28, v22, v30, s0
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[34:35], v[28:29], s[10:11]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[28:29]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[34:35], v[34:35]
	v_cndmask_b32_e32 v15, 0, v15, vcc_lo
	v_mul_f64 v[32:33], v[24:25], s[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[2:3], v[28:29]
	v_rndne_f64_e32 v[32:33], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[6:7], v[38:39]
	v_fma_f64 v[36:37], v[32:33], s[2:3], v[24:25]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	v_cvt_i32_f64_e32 v44, v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], s[2:3], s[0:1]
	v_fma_f64 v[36:37], v[32:33], s[6:7], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[36:37], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[28:29]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[24:25]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[28:29]|
	v_fma_f64 v[42:43], v[38:39], v[42:43], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], v[40:41], 1.0
	v_cndmask_b32_e64 v19, 0, v19, s0
	v_cndmask_b32_e64 v18, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[36:37], v[40:41], 1.0
	v_cvt_i32_f64_e32 v36, v[34:35]
	v_fma_f64 v[34:35], v[38:39], v[42:43], 1.0
	v_ldexp_f64 v[26:27], v[32:33], v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[30:31], v[34:35], v36
	v_cndmask_b32_e64 v20, 0x7ff00000, v27, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v22, 0x7ff00000, v31, s3
	v_cndmask_b32_e64 v21, 0, v20, s2
	v_cndmask_b32_e32 v14, 0, v14, vcc_lo
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v23, 0, v22, s4
	v_cndmask_b32_e32 v20, 0, v26, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[12:13]|
	v_cndmask_b32_e32 v22, 0, v30, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[10:11]|
	v_fma_f64 v[14:15], v[20:21], v[14:15], v[20:21]
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[12:13]
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[22:23]
	v_cmp_class_f64_e64 s0, v[22:23], 0x204
	v_cmp_neq_f64_e64 s4, 0, v[10:11]
	v_cndmask_b32_e32 v15, v15, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v19, v19, v23, s0
	v_dual_cndmask_b32 v10, v14, v20 :: v_dual_and_b32 v15, 0x7fffffff, v15
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_and_b32_e32 v19, 0x7fffffff, v19
	v_cndmask_b32_e64 v14, v18, v22, s0
	v_cndmask_b32_e64 v15, 0x7ff00000, v15, s1
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v12, 0x7ff00000, v19, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, v15, s2
	v_cndmask_b32_e64 v13, 0, v12, s4
	v_cndmask_b32_e32 v12, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[10:11]
	v_cndmask_b32_e64 v12, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v12, 8, v12
	v_ldexp_f64 v[10:11], v[10:11], v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[14:15], v[10:11], v[12:13]
	v_mul_f64 v[12:13], v[12:13], 0.5
	v_fma_f64 v[18:19], -v[12:13], v[14:15], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_fma_f64 v[18:19], -v[14:15], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[18:19], v[12:13], v[14:15]
	v_fma_f64 v[18:19], -v[14:15], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[14:15]
	v_cndmask_b32_e64 v14, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x260
	v_ldexp_f64 v[12:13], v[12:13], v14
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v13, v11 :: v_dual_cndmask_b32 v18, v12, v10
.LBB1_12:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_f64 v[0:1], v[2:3], -v[0:1]
	v_add_f64 v[4:5], v[6:7], -v[4:5]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s5, 0x3fba6564
	s_mov_b32 s7, 0x3fbdee67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], v[16:17]
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[18:19]
	v_div_scale_f64 v[22:23], vcc_lo, v[16:17], v[0:1], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[10:11], v[2:3]
	v_rcp_f64_e32 v[12:13], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[2:3], v[10:11], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], -v[2:3], v[10:11], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_div_scale_f64 v[14:15], s0, v[18:19], v[4:5], v[18:19]
	v_fma_f64 v[12:13], v[12:13], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[10:11]
	v_mul_f64 v[24:25], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], -v[2:3], v[20:21], v[22:23]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[10:11], v[20:21]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[2:3], v[2:3], v[0:1], v[16:17]
	v_div_fixup_f64 v[0:1], v[6:7], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[4:5], |v[2:3]|
	v_frexp_mant_f64_e64 v[6:7], |v[0:1]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	v_cmp_gt_f64_e64 s0, s[2:3], v[6:7]
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, 1, s0
	v_ldexp_f64 v[4:5], v[4:5], v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[6:7], v[6:7], v11
	v_add_f64 v[10:11], v[4:5], 1.0
	v_add_f64 v[22:23], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[6:7], 1.0
	v_rcp_f64_e32 v[14:15], v[10:11]
	v_add_f64 v[26:27], v[10:11], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[16:17], v[12:13]
	v_add_f64 v[30:31], v[12:13], -1.0
	v_add_f64 v[4:5], v[4:5], -v[26:27]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[14:15]
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[14:15]
	v_add_f64 v[18:19], v[6:7], -1.0
	v_add_f64 v[6:7], v[6:7], -v[30:31]
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[14:15]
	v_mul_f64 v[24:25], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[28:29], v[10:11], v[20:21]
	v_mul_f64 v[32:33], v[12:13], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[20:21], v[10:11], -v[28:29]
	v_fma_f64 v[12:13], v[24:25], v[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[4:5], v[10:11]
	v_fma_f64 v[6:7], v[24:25], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[28:29], v[4:5]
	v_add_f64 v[12:13], v[32:33], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[22:23], -v[10:11]
	v_add_f64 v[28:29], v[10:11], -v[28:29]
	v_add_f64 v[30:31], v[18:19], -v[12:13]
	v_add_f64 v[32:33], v[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_add_f64 v[4:5], v[28:29], -v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_add_f64 v[6:7], v[32:33], -v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[22:23], -v[10:11]
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[26:27], v[4:5]
	v_add_f64 v[6:7], v[30:31], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[6:7], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[20:21], v[4:5]
	v_add_f64 v[12:13], v[24:25], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[10:11], -v[20:21]
	v_mul_f64 v[18:19], v[10:11], v[10:11]
	v_add_f64 v[16:17], v[12:13], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	v_mul_f64 v[14:15], v[12:13], v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_fma_f64 v[16:17], v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[4:5], v[4:5]
	v_fma_f64 v[22:23], v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[6:7], v[6:7]
	v_fma_f64 v[16:17], v[10:11], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[12:13], v[24:25], v[22:23]
	v_add_f64 v[22:23], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[14:15], v[20:21]
	v_fma_f64 v[26:27], v[22:23], s[6:7], s[4:5]
	v_add_f64 v[18:19], v[22:23], -v[18:19]
	v_mul_f64 v[36:37], v[10:11], v[22:23]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[28:29], v[24:25], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[14:15], v[24:25], -v[14:15]
	v_mul_f64 v[40:41], v[12:13], v[24:25]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x3b39803f
	s_mov_b32 s5, 0x3c7abc9e
	v_mul_f64 v[30:31], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[32:33], v[24:25], v[28:29]
	v_fma_f64 v[18:19], v[22:23], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[24:25], v[28:29], -v[32:33]
	v_fma_f64 v[18:19], v[16:17], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[14:15], v[28:29], v[20:21]
	v_add_f64 v[26:27], v[30:31], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[32:33], v[20:21]
	v_add_f64 v[34:35], v[26:27], s[2:3]
	v_add_f64 v[30:31], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[38:39], v[28:29], s[2:3]
	v_add_f64 v[32:33], v[28:29], -v[32:33]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[42:43], v[34:35], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_fma_f64 v[30:31], v[22:23], v[10:11], -v[36:37]
	v_add_f64 v[44:45], v[38:39], s[2:3]
	v_add_f64 v[20:21], v[20:21], -v[32:33]
	v_fma_f64 v[32:33], v[24:25], v[12:13], -v[40:41]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[18:19], v[18:19], s[2:3]
	v_fma_f64 v[22:23], v[22:23], v[4:5], v[30:31]
	v_add_f64 v[28:29], v[28:29], -v[44:45]
	v_add_f64 v[20:21], v[20:21], s[2:3]
	v_fma_f64 v[24:25], v[24:25], v[6:7], v[32:33]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[4:5], v[4:5], 1
	v_ldexp_f64 v[6:7], v[6:7], 1
	v_add_f64 v[18:19], v[18:19], v[26:27]
	v_fma_f64 v[16:17], v[16:17], v[10:11], v[22:23]
	v_ldexp_f64 v[10:11], v[10:11], 1
	v_add_f64 v[20:21], v[20:21], v[28:29]
	v_fma_f64 v[14:15], v[14:15], v[12:13], v[24:25]
	v_ldexp_f64 v[12:13], v[12:13], 1
	v_add_f64 v[22:23], v[34:35], v[18:19]
	v_add_f64 v[24:25], v[36:37], v[16:17]
	v_add_f64 v[26:27], v[38:39], v[20:21]
	v_add_f64 v[28:29], v[40:41], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[34:35], -v[22:23]
	v_mul_f64 v[32:33], v[24:25], v[22:23]
	v_add_f64 v[36:37], v[24:25], -v[36:37]
	v_add_f64 v[34:35], v[38:39], -v[26:27]
	v_mul_f64 v[38:39], v[28:29], v[26:27]
	v_add_f64 v[40:41], v[28:29], -v[40:41]
	v_add_f64 v[18:19], v[18:19], v[30:31]
	v_fma_f64 v[30:31], v[24:25], v[22:23], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[36:37]
	v_add_f64 v[20:21], v[20:21], v[34:35]
	v_fma_f64 v[34:35], v[28:29], v[26:27], -v[38:39]
	v_add_f64 v[14:15], v[14:15], -v[40:41]
	v_fma_f64 v[18:19], v[24:25], v[18:19], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[28:29], v[20:21], v[34:35]
	v_fma_f64 v[16:17], v[16:17], v[22:23], v[18:19]
	v_frexp_exp_i32_f64_e32 v22, v[2:3]
	v_frexp_exp_i32_f64_e32 v23, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[14:15], v[26:27], v[20:21]
	v_add_f64 v[18:19], v[32:33], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v22, vcc_lo, 0, v22, vcc_lo
	v_add_f64 v[20:21], v[38:39], v[14:15]
	v_subrev_co_ci_u32_e64 v28, vcc_lo, 0, v23, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[22:23], v22
	v_cvt_f64_i32_e32 v[28:29], v28
	v_add_f64 v[24:25], v[10:11], v[18:19]
	v_add_f64 v[26:27], v[18:19], -v[32:33]
	v_add_f64 v[30:31], v[12:13], v[20:21]
	v_add_f64 v[32:33], v[20:21], -v[38:39]
	v_mul_f64 v[34:35], v[22:23], s[2:3]
	v_add_f64 v[10:11], v[24:25], -v[10:11]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_mul_f64 v[26:27], v[28:29], s[2:3]
	v_add_f64 v[12:13], v[30:31], -v[12:13]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_fma_f64 v[32:33], v[22:23], s[2:3], -v[34:35]
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	v_add_f64 v[4:5], v[4:5], v[16:17]
	v_fma_f64 v[16:17], v[28:29], s[2:3], -v[26:27]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_add_f64 v[6:7], v[6:7], v[14:15]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[14:15], v[22:23], s[4:5], v[32:33]
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_fma_f64 v[10:11], v[28:29], s[4:5], v[16:17]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_add_f64 v[12:13], v[34:35], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[24:25], v[4:5]
	v_add_f64 v[18:19], v[26:27], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[30:31], v[6:7]
	v_add_f64 v[34:35], v[12:13], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[22:23], v[12:13], v[16:17]
	v_add_f64 v[24:25], v[16:17], -v[24:25]
	v_add_f64 v[26:27], v[18:19], -v[26:27]
	v_add_f64 v[28:29], v[18:19], v[20:21]
	v_add_f64 v[30:31], v[20:21], -v[30:31]
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	v_add_f64 v[32:33], v[22:23], -v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[24:25]
	v_add_f64 v[10:11], v[10:11], -v[26:27]
	v_add_f64 v[36:37], v[28:29], -v[18:19]
	v_add_f64 v[6:7], v[6:7], -v[30:31]
	v_add_f64 v[38:39], v[22:23], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_add_f64 v[24:25], v[14:15], v[4:5]
	v_add_f64 v[40:41], v[28:29], -v[36:37]
	v_add_f64 v[20:21], v[20:21], -v[36:37]
	v_add_f64 v[12:13], v[12:13], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	v_add_f64 v[12:13], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[20:21], v[24:25], -v[14:15]
	v_add_f64 v[12:13], v[24:25], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[16:17], -v[10:11]
	v_add_f64 v[18:19], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[20:21]
	v_add_f64 v[4:5], v[4:5], -v[20:21]
	v_add_f64 v[30:31], v[22:23], v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_add_f64 v[6:7], v[6:7], -v[26:27]
	v_add_f64 v[32:33], v[28:29], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_add_f64 v[20:21], v[30:31], -v[22:23]
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[32:33], -v[28:29]
	v_add_f64 v[4:5], v[4:5], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[18:19], -v[16:17]
	v_add_f64 v[4:5], v[4:5], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[10:11], v[30:31], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[32:33], v[6:7]
	v_add_f64 v[14:15], v[10:11], -v[30:31]
	v_add_f64 v[16:17], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[12:13], -v[32:33]
	v_add_f64 v[20:21], v[12:13], v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], 2.0, -v[16:17]
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x204
	v_add_f64 v[6:7], v[6:7], -v[18:19]
	v_fma_f64 v[12:13], v[12:13], 2.0, -v[20:21]
	v_cmp_class_f64_e64 s0, v[20:21], 0x204
	v_fma_f64 v[4:5], v[4:5], 2.0, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], 2.0, v[12:13]
	v_add_f64 v[10:11], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[20:21], v[6:7]
	v_dual_cndmask_b32 v15, v11, v17 :: v_dual_cndmask_b32 v14, v10, v16
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, v13, v21, s0
	v_cndmask_b32_e64 v18, v12, v20, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[22:23], v[14:15], s[6:7]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[14:15]|
	v_mul_f64 v[24:25], v[18:19], s[6:7]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_rndne_f64_e32 v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_rndne_f64_e32 v[24:25], v[24:25]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v5, 0, v5 :: v_dual_cndmask_b32 v4, 0, v4
	v_fma_f64 v[26:27], v[22:23], s[2:3], v[14:15]
	v_cvt_i32_f64_e32 v34, v[22:23]
	v_fma_f64 v[28:29], v[24:25], s[2:3], v[18:19]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[22:23], s[4:5], v[26:27]
	v_fma_f64 v[28:29], v[24:25], s[4:5], v[28:29]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[26:27], s[2:3], s[0:1]
	v_fma_f64 v[32:33], v[28:29], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[14:15]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[14:15]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[18:19]|
	v_fma_f64 v[30:31], v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[28:29], v[32:33], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cndmask_b32_e64 v6, 0, v6, s0
	v_fma_f64 v[22:23], v[26:27], v[30:31], 1.0
	v_cvt_i32_f64_e32 v26, v[24:25]
	v_fma_f64 v[24:25], v[28:29], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[16:17], v[22:23], v34
	v_ldexp_f64 v[20:21], v[24:25], v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, 0x7ff00000, v17, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[2:3]|
	v_cndmask_b32_e64 v12, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v10, s2
	v_cndmask_b32_e32 v10, 0, v16, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v13, 0, v12, s4
	v_cndmask_b32_e32 v12, 0, v20, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[0:1]|
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[2:3]
	v_cmp_neq_f64_e64 s4, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v0, v4, v10
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v5, 0x7fffffff, v5
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[12:13]
	v_cmp_class_f64_e64 s0, v[12:13], 0x204
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v5, 0x7ff00000, v5, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, 0, v5, s2
	v_cndmask_b32_e64 v7, v7, v13, s0
	v_cndmask_b32_e64 v4, v6, v12, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v7, 0x7fffffff, v7
	v_cndmask_b32_e64 v2, 0x7ff00000, v7, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, 0, v2, s4
	v_cndmask_b32_e32 v2, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 8, v2
	v_ldexp_f64 v[0:1], v[0:1], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[4:5], v[0:1], v[2:3]
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_fma_f64 v[2:3], v[2:3], v[6:7], v[2:3]
	v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[2:3], v[4:5]
	v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[6:7], v[2:3], v[4:5]
	v_cndmask_b32_e64 v4, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x260
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v3, v1 :: v_dual_cndmask_b32 v0, v2, v0
	v_add_co_u32 v2, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v9, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB1_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 62
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .Lfunc_end1-_ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 18560
; NumSgprs: 30
; NumVgprs: 62
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 62
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii ; -- Begin function _ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.globl	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
	.p2align	8
	.type	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii,@function
_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii: ; @_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
; %bb.0:
	s_clause 0x1
	s_load_b256 s[20:27], s[0:1], 0x48
	s_load_b32 s4, s[0:1], 0x74
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s24, 31
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s3, s24, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_sub_i32 s4, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	v_xor_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s3
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_load_b32 s2, s[20:21], 0x0
	s_load_b32 s3, s[22:23], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v2
	v_mul_lo_u32 v2, v0, s24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, s3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v2
	v_add_nc_u32_e32 v2, s2, v1
	s_mul_i32 s2, s26, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, v0, s25, v[2:3]
	v_cmp_ge_i32_e32 vcc_lo, s2, v12
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_13
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[12:13]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v5, vcc_lo
	global_load_b32 v1, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_13
; %bb.2:
	s_load_b256 s[16:23], s[0:1], 0x20
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v14, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	global_load_b32 v16, v[14:15], off offset:-4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s15, v1, vcc_lo
	global_load_b128 v[0:3], v[8:9], off offset:-8
	global_load_b128 v[4:7], v[10:11], off offset:-8
	s_waitcnt vmcnt(2)
	v_cmp_gt_i32_e32 vcc_lo, 1, v16
                                        ; implicit-def: $vgpr16_vgpr17
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s0
	s_cbranch_execz .LBB2_6
; %bb.3:
	global_load_b32 v18, v[14:15], off offset:4
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v18
	s_cbranch_execz .LBB2_5
; %bb.4:
	v_lshlrev_b64 v[16:17], 3, v[12:13]
	global_load_b64 v[8:9], v[8:9], off offset:8
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s12, 0x968915a9
	s_mov_b32 s14, 0x4222de17
	v_add_co_u32 v18, vcc_lo, s18, v16
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v17, vcc_lo
	v_add_co_u32 v16, vcc_lo, s20, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s21, v17, vcc_lo
	s_mov_b32 s13, 0x3fba6564
	global_load_b64 v[18:19], v[18:19], off offset:8
	global_load_b64 v[20:21], v[16:17], off offset:8
	s_mov_b32 s15, 0x3fbdee67
	s_waitcnt vmcnt(1)
	v_add_f64 v[16:17], v[18:19], -v[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[20:21], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[18:19], |v[16:17]|
	v_frexp_mant_f64_e64 v[20:21], |v[8:9]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[18:19]
	v_cmp_gt_f64_e64 s0, s[2:3], v[20:21]
	v_cndmask_b32_e64 v22, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, 0, 1, s0
	v_ldexp_f64 v[18:19], v[18:19], v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[20:21], v[20:21], v23
	v_add_f64 v[22:23], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[20:21], 1.0
	v_add_f64 v[34:35], v[18:19], -1.0
	v_rcp_f64_e32 v[26:27], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[28:29], v[24:25]
	v_add_f64 v[38:39], v[22:23], -1.0
	v_add_f64 v[42:43], v[24:25], -1.0
	v_add_f64 v[18:19], v[18:19], -v[38:39]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_add_f64 v[30:31], v[20:21], -1.0
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[32:33], v[34:35], v[26:27]
	v_mul_f64 v[36:37], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[22:23], v[32:33]
	v_mul_f64 v[44:45], v[24:25], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[32:33], v[22:23], -v[40:41]
	v_fma_f64 v[24:25], v[36:37], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[32:33], v[18:19], v[22:23]
	v_fma_f64 v[20:21], v[36:37], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[40:41], v[18:19]
	v_add_f64 v[24:25], v[44:45], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[34:35], -v[22:23]
	v_add_f64 v[40:41], v[22:23], -v[40:41]
	v_add_f64 v[42:43], v[30:31], -v[24:25]
	v_add_f64 v[44:45], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[38:39]
	v_add_f64 v[18:19], v[40:41], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_add_f64 v[20:21], v[44:45], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[34:35], -v[22:23]
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[38:39], v[18:19]
	v_add_f64 v[20:21], v[42:43], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	v_mul_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[32:33], v[18:19]
	v_add_f64 v[24:25], v[36:37], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[22:23], -v[32:33]
	v_mul_f64 v[30:31], v[22:23], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_mul_f64 v[26:27], v[24:25], v[24:25]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[18:19]
	v_fma_f64 v[34:35], v[24:25], v[24:25], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[20:21], v[20:21]
	v_fma_f64 v[28:29], v[22:23], v[32:33], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[24:25], v[36:37], v[34:35]
	v_add_f64 v[34:35], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[26:27], v[32:33]
	v_fma_f64 v[38:39], v[34:35], s[14:15], s[12:13]
	v_add_f64 v[30:31], v[34:35], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], s[14:15], s[12:13]
	s_mov_b32 s12, 0x3abe935a
	s_mov_b32 s13, 0x3fbe25e4
	v_add_f64 v[26:27], v[36:37], -v[26:27]
	v_mul_f64 v[48:49], v[22:23], v[34:35]
	v_mul_f64 v[52:53], v[24:25], v[36:37]
	s_mov_b32 s14, 0x652b82fe
	s_mov_b32 s15, 0x3ff71547
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	v_add_f64 v[28:29], v[28:29], -v[30:31]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x47e6c9c2
	s_mov_b32 s13, 0x3fc110ef
	v_add_f64 v[26:27], v[32:33], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0xcfa74449
	s_mov_b32 s13, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x71bf3c30
	s_mov_b32 s13, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x1c7792ce
	s_mov_b32 s13, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x924920da
	s_mov_b32 s13, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x9999999c
	s_mov_b32 s13, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[12:13]
	s_mov_b32 s12, 0x3b39803f
	s_mov_b32 s13, 0x3c7abc9e
	v_mul_f64 v[42:43], v[34:35], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[36:37], v[40:41]
	v_fma_f64 v[30:31], v[34:35], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[36:37], v[40:41], -v[44:45]
	v_fma_f64 v[30:31], v[28:29], v[38:39], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[26:27], v[40:41], v[32:33]
	v_add_f64 v[38:39], v[42:43], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[44:45], v[32:33]
	v_add_f64 v[46:47], v[38:39], s[2:3]
	v_add_f64 v[42:43], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[50:51], v[40:41], s[2:3]
	v_add_f64 v[44:45], v[40:41], -v[44:45]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[54:55], v[46:47], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_fma_f64 v[42:43], v[34:35], v[22:23], -v[48:49]
	v_add_f64 v[56:57], v[50:51], s[2:3]
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_fma_f64 v[44:45], v[36:37], v[24:25], -v[52:53]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[38:39], v[38:39], -v[54:55]
	v_add_f64 v[30:31], v[30:31], s[2:3]
	v_fma_f64 v[34:35], v[34:35], v[18:19], v[42:43]
	v_add_f64 v[40:41], v[40:41], -v[56:57]
	v_add_f64 v[32:33], v[32:33], s[2:3]
	v_fma_f64 v[36:37], v[36:37], v[20:21], v[44:45]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_add_f64 v[30:31], v[30:31], v[38:39]
	v_fma_f64 v[28:29], v[28:29], v[22:23], v[34:35]
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[32:33], v[40:41]
	v_fma_f64 v[26:27], v[26:27], v[24:25], v[36:37]
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[46:47], v[30:31]
	v_add_f64 v[36:37], v[48:49], v[28:29]
	v_add_f64 v[38:39], v[50:51], v[32:33]
	v_add_f64 v[40:41], v[52:53], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[46:47], -v[34:35]
	v_mul_f64 v[44:45], v[36:37], v[34:35]
	v_add_f64 v[48:49], v[36:37], -v[48:49]
	v_add_f64 v[46:47], v[50:51], -v[38:39]
	v_mul_f64 v[50:51], v[40:41], v[38:39]
	v_add_f64 v[52:53], v[40:41], -v[52:53]
	v_add_f64 v[30:31], v[30:31], v[42:43]
	v_fma_f64 v[42:43], v[36:37], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[48:49]
	v_add_f64 v[32:33], v[32:33], v[46:47]
	v_fma_f64 v[46:47], v[40:41], v[38:39], -v[50:51]
	v_add_f64 v[26:27], v[26:27], -v[52:53]
	v_fma_f64 v[30:31], v[36:37], v[30:31], v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[40:41], v[32:33], v[46:47]
	v_fma_f64 v[28:29], v[28:29], v[34:35], v[30:31]
	v_frexp_exp_i32_f64_e32 v34, v[16:17]
	v_frexp_exp_i32_f64_e32 v35, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[26:27], v[26:27], v[38:39], v[32:33]
	v_add_f64 v[30:31], v[44:45], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	v_add_f64 v[32:33], v[50:51], v[26:27]
	v_subrev_co_ci_u32_e64 v40, vcc_lo, 0, v35, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[34:35], v34
	v_cvt_f64_i32_e32 v[40:41], v40
	v_add_f64 v[36:37], v[22:23], v[30:31]
	v_add_f64 v[38:39], v[30:31], -v[44:45]
	v_add_f64 v[42:43], v[24:25], v[32:33]
	v_add_f64 v[44:45], v[32:33], -v[50:51]
	v_mul_f64 v[46:47], v[34:35], s[2:3]
	v_add_f64 v[22:23], v[36:37], -v[22:23]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_mul_f64 v[38:39], v[40:41], s[2:3]
	v_add_f64 v[24:25], v[42:43], -v[24:25]
	v_add_f64 v[26:27], v[26:27], -v[44:45]
	v_fma_f64 v[44:45], v[34:35], s[2:3], -v[46:47]
	v_add_f64 v[22:23], v[30:31], -v[22:23]
	v_add_f64 v[18:19], v[18:19], v[28:29]
	v_fma_f64 v[28:29], v[40:41], s[2:3], -v[38:39]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[26:27], v[34:35], s[12:13], v[44:45]
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_fma_f64 v[22:23], v[40:41], s[12:13], v[28:29]
	s_mov_b32 s13, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_add_f64 v[24:25], v[46:47], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[36:37], v[18:19]
	v_add_f64 v[30:31], v[38:39], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[42:43], v[20:21]
	v_add_f64 v[46:47], v[24:25], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[24:25], v[28:29]
	v_add_f64 v[36:37], v[28:29], -v[36:37]
	v_add_f64 v[38:39], v[30:31], -v[38:39]
	v_add_f64 v[40:41], v[30:31], v[32:33]
	v_add_f64 v[42:43], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[44:45], v[34:35], -v[24:25]
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[38:39]
	v_add_f64 v[48:49], v[40:41], -v[30:31]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	v_add_f64 v[50:51], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[44:45]
	v_add_f64 v[36:37], v[26:27], v[18:19]
	v_add_f64 v[52:53], v[40:41], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[48:49]
	v_add_f64 v[24:25], v[24:25], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], -v[52:53]
	v_add_f64 v[24:25], v[28:29], v[24:25]
	v_add_f64 v[28:29], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[32:33], v[30:31]
	v_add_f64 v[32:33], v[36:37], -v[26:27]
	v_add_f64 v[24:25], v[36:37], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[28:29], -v[22:23]
	v_add_f64 v[30:31], v[28:29], v[30:31]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[36:37], v[36:37], -v[32:33]
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	v_add_f64 v[42:43], v[34:35], v[24:25]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_add_f64 v[44:45], v[40:41], v[30:31]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_add_f64 v[32:33], v[42:43], -v[34:35]
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[44:45], -v[40:41]
	v_add_f64 v[18:19], v[18:19], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_add_f64 v[20:21], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[30:31], -v[28:29]
	v_add_f64 v[18:19], v[18:19], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[22:23]
	v_add_f64 v[22:23], v[42:43], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[44:45], v[20:21]
	v_add_f64 v[26:27], v[22:23], -v[42:43]
	v_add_f64 v[28:29], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[24:25], -v[44:45]
	v_add_f64 v[32:33], v[24:25], v[24:25]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[22:23], v[22:23], 2.0, -v[28:29]
	v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x204
	v_add_f64 v[20:21], v[20:21], -v[30:31]
	v_fma_f64 v[24:25], v[24:25], 2.0, -v[32:33]
	v_cmp_class_f64_e64 s0, v[32:33], 0x204
	v_fma_f64 v[18:19], v[18:19], 2.0, v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], 2.0, v[24:25]
	v_add_f64 v[22:23], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[32:33], v[20:21]
	v_dual_cndmask_b32 v27, v23, v29 :: v_dual_cndmask_b32 v26, v22, v28
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v31, v25, v33, s0
	v_cndmask_b32_e64 v30, v24, v32, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[34:35], v[26:27], s[14:15]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[26:27]|
	v_mul_f64 v[36:37], v[30:31], s[14:15]
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[30:31]
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	v_rndne_f64_e32 v[34:35], v[34:35]
	v_rndne_f64_e32 v[36:37], v[36:37]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v19, 0, v19 :: v_dual_cndmask_b32 v18, 0, v18
	v_fma_f64 v[38:39], v[34:35], s[2:3], v[26:27]
	v_cvt_i32_f64_e32 v46, v[34:35]
	v_fma_f64 v[40:41], v[36:37], s[2:3], v[30:31]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[12:13], v[38:39]
	v_fma_f64 v[40:41], v[36:37], s[12:13], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[2:3], s[0:1]
	v_fma_f64 v[44:45], v[40:41], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[26:27]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[26:27]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[30:31]|
	v_fma_f64 v[42:43], v[38:39], v[42:43], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, 0, v21, s0
	v_cndmask_b32_e64 v20, 0, v20, s0
	v_fma_f64 v[34:35], v[38:39], v[42:43], 1.0
	v_cvt_i32_f64_e32 v38, v[36:37]
	v_fma_f64 v[36:37], v[40:41], v[44:45], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[28:29], v[34:35], v46
	v_ldexp_f64 v[32:33], v[36:37], v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v22, 0x7ff00000, v29, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[16:17]|
	v_cndmask_b32_e64 v24, 0x7ff00000, v33, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, 0, v22, s2
	v_cndmask_b32_e32 v22, 0, v28, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v25, 0, v24, s4
	v_cndmask_b32_e32 v24, 0, v32, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[8:9]|
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[22:23]
	v_cmp_class_f64_e64 vcc_lo, v[22:23], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[16:17]
	v_cmp_neq_f64_e64 s4, 0, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v19, v19, v23 :: v_dual_cndmask_b32 v8, v18, v22
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v19, 0x7fffffff, v19
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[24:25]
	v_cmp_class_f64_e64 s0, v[24:25], 0x204
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v19, 0x7ff00000, v19, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, 0, v19, s2
	v_cndmask_b32_e64 v21, v21, v25, s0
	v_cndmask_b32_e64 v18, v20, v24, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v21, 0x7fffffff, v21
	v_cndmask_b32_e64 v16, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, 0, v16, s4
	v_cndmask_b32_e32 v16, 0, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], v[16:17]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[8:9]
	v_cndmask_b32_e64 v16, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v16, 8, v16
	v_ldexp_f64 v[8:9], v[8:9], v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[16:17], v[8:9]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[8:9], v[16:17]
	v_mul_f64 v[16:17], v[16:17], 0.5
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	v_fma_f64 v[20:21], -v[18:19], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[16:17], v[18:19]
	v_fma_f64 v[20:21], -v[18:19], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[18:19]
	v_cndmask_b32_e64 v18, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x260
	v_ldexp_f64 v[16:17], v[16:17], v18
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v9 :: v_dual_cndmask_b32 v16, v16, v8
.LBB2_5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_6:                                ; %Flow125
	s_or_saveexec_b32 s5, s5
	v_lshlrev_b64 v[8:9], 3, v[12:13]
	s_xor_b32 exec_lo, exec_lo, s5
	s_cbranch_execz .LBB2_8
; %bb.7:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s18, v8
	v_add_co_ci_u32_e32 v17, vcc_lo, s19, v9, vcc_lo
	v_add_co_u32 v18, vcc_lo, s20, v8
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v9, vcc_lo
	s_mov_b32 s2, 0x55555555
	global_load_b64 v[16:17], v[16:17], off offset:-8
	global_load_b64 v[20:21], v[18:19], off offset:-8
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s12, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s13, 0x3fbdee67
	s_waitcnt vmcnt(1)
	v_add_f64 v[18:19], v[16:17], -v[0:1]
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[20:21], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[20:21], |v[18:19]|
	v_frexp_mant_f64_e64 v[22:23], |v[16:17]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[20:21]
	v_cmp_gt_f64_e64 s0, s[2:3], v[22:23]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v24, 0, 1, s0
	v_ldexp_f64 v[20:21], v[20:21], v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[22:23], v[22:23], v24
	v_frexp_exp_i32_f64_e32 v13, v[18:19]
	v_add_f64 v[24:25], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[22:23], 1.0
	v_add_f64 v[36:37], v[20:21], -1.0
	v_subrev_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[28:29], v[24:25]
	v_rcp_f64_e32 v[30:31], v[26:27]
	v_add_f64 v[40:41], v[24:25], -1.0
	v_add_f64 v[44:45], v[26:27], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[40:41]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_fma_f64 v[32:33], -v[24:25], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[28:29]
	v_add_f64 v[32:33], v[22:23], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_add_f64 v[22:23], v[22:23], -v[44:45]
	v_mul_f64 v[34:35], v[36:37], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[38:39], v[32:33], v[30:31]
	v_mul_f64 v[42:43], v[24:25], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[46:47], v[26:27], v[38:39]
	v_fma_f64 v[24:25], v[34:35], v[24:25], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[38:39], v[26:27], -v[46:47]
	v_fma_f64 v[20:21], v[34:35], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[38:39], v[22:23], v[26:27]
	v_add_f64 v[24:25], v[42:43], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[46:47], v[22:23]
	v_add_f64 v[40:41], v[36:37], -v[24:25]
	v_add_f64 v[42:43], v[24:25], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[32:33], -v[26:27]
	v_add_f64 v[46:47], v[26:27], -v[46:47]
	v_add_f64 v[36:37], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[42:43], -v[20:21]
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[46:47], -v[22:23]
	v_add_f64 v[24:25], v[36:37], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[32:33], -v[26:27]
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_add_f64 v[20:21], v[40:41], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[44:45], v[22:23]
	v_mul_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[22:23], v[30:31], v[22:23]
	v_add_f64 v[24:25], v[34:35], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[38:39], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[34:35]
	v_mul_f64 v[32:33], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[26:27], -v[38:39]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_mul_f64 v[28:29], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_fma_f64 v[30:31], v[24:25], v[24:25], -v[32:33]
	v_add_f64 v[34:35], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[36:37], v[26:27], v[26:27], -v[28:29]
	v_add_f64 v[38:39], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[24:25], v[34:35], v[30:31]
	v_fma_f64 v[34:35], v[26:27], v[38:39], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[32:33], v[30:31]
	v_add_f64 v[38:39], v[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], s[12:13], s[6:7]
	v_add_f64 v[32:33], v[36:37], -v[32:33]
	v_fma_f64 v[42:43], v[38:39], s[12:13], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[28:29], v[38:39], -v[28:29]
	v_mul_f64 v[50:51], v[24:25], v[36:37]
	v_mul_f64 v[54:55], v[26:27], v[38:39]
	s_mov_b32 s12, 0x652b82fe
	s_mov_b32 s13, 0x3ff71547
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_mul_f64 v[44:45], v[36:37], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[46:47], v[38:39], v[42:43]
	v_fma_f64 v[32:33], v[36:37], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[38:39], v[42:43], -v[46:47]
	v_fma_f64 v[32:33], v[30:31], v[40:41], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[28:29], v[42:43], v[34:35]
	v_add_f64 v[40:41], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[46:47], v[34:35]
	v_add_f64 v[48:49], v[40:41], s[2:3]
	v_add_f64 v[44:45], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[52:53], v[42:43], s[2:3]
	v_add_f64 v[46:47], v[42:43], -v[46:47]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[56:57], v[48:49], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_fma_f64 v[44:45], v[36:37], v[24:25], -v[50:51]
	v_add_f64 v[58:59], v[52:53], s[2:3]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_fma_f64 v[46:47], v[38:39], v[26:27], -v[54:55]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[40:41], v[40:41], -v[56:57]
	v_add_f64 v[32:33], v[32:33], s[2:3]
	v_fma_f64 v[36:37], v[36:37], v[20:21], v[44:45]
	v_add_f64 v[42:43], v[42:43], -v[58:59]
	v_add_f64 v[34:35], v[34:35], s[2:3]
	v_fma_f64 v[38:39], v[38:39], v[22:23], v[46:47]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[32:33], v[40:41]
	v_fma_f64 v[30:31], v[30:31], v[24:25], v[36:37]
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[34:35], v[42:43]
	v_fma_f64 v[28:29], v[28:29], v[26:27], v[38:39]
	v_ldexp_f64 v[26:27], v[26:27], 1
	v_add_f64 v[36:37], v[48:49], v[32:33]
	v_add_f64 v[38:39], v[50:51], v[30:31]
	v_add_f64 v[40:41], v[52:53], v[34:35]
	v_add_f64 v[42:43], v[54:55], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[48:49], -v[36:37]
	v_mul_f64 v[46:47], v[38:39], v[36:37]
	v_add_f64 v[50:51], v[38:39], -v[50:51]
	v_add_f64 v[48:49], v[52:53], -v[40:41]
	v_mul_f64 v[52:53], v[42:43], v[40:41]
	v_add_f64 v[54:55], v[42:43], -v[54:55]
	v_add_f64 v[32:33], v[32:33], v[44:45]
	v_fma_f64 v[44:45], v[38:39], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[50:51]
	v_add_f64 v[34:35], v[34:35], v[48:49]
	v_fma_f64 v[48:49], v[42:43], v[40:41], -v[52:53]
	v_add_f64 v[28:29], v[28:29], -v[54:55]
	v_fma_f64 v[32:33], v[38:39], v[32:33], v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[42:43], v[34:35], v[48:49]
	v_fma_f64 v[30:31], v[30:31], v[36:37], v[32:33]
	v_frexp_exp_i32_f64_e32 v36, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[28:29], v[28:29], v[40:41], v[34:35]
	v_add_f64 v[32:33], v[46:47], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v42, vcc_lo, 0, v36, s0
	v_add_f64 v[34:35], v[52:53], v[28:29]
	v_cvt_f64_i32_e32 v[36:37], v13
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[42:43], v42
	v_add_f64 v[38:39], v[24:25], v[32:33]
	v_add_f64 v[40:41], v[32:33], -v[46:47]
	v_add_f64 v[44:45], v[26:27], v[34:35]
	v_add_f64 v[46:47], v[34:35], -v[52:53]
	v_mul_f64 v[48:49], v[36:37], s[2:3]
	v_add_f64 v[24:25], v[38:39], -v[24:25]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_mul_f64 v[40:41], v[42:43], s[2:3]
	v_add_f64 v[26:27], v[44:45], -v[26:27]
	v_add_f64 v[28:29], v[28:29], -v[46:47]
	v_fma_f64 v[46:47], v[36:37], s[2:3], -v[48:49]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_add_f64 v[20:21], v[20:21], v[30:31]
	v_fma_f64 v[30:31], v[42:43], s[2:3], -v[40:41]
	v_add_f64 v[26:27], v[34:35], -v[26:27]
	v_add_f64 v[22:23], v[22:23], v[28:29]
	v_fma_f64 v[28:29], v[36:37], s[6:7], v[46:47]
	s_mov_b32 s3, 0xbfe62e42
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_fma_f64 v[24:25], v[42:43], s[6:7], v[30:31]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_add_f64 v[26:27], v[48:49], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[38:39], v[20:21]
	v_add_f64 v[32:33], v[40:41], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[44:45], v[22:23]
	v_add_f64 v[48:49], v[26:27], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[36:37], v[26:27], v[30:31]
	v_add_f64 v[38:39], v[30:31], -v[38:39]
	v_add_f64 v[40:41], v[32:33], -v[40:41]
	v_add_f64 v[42:43], v[32:33], v[34:35]
	v_add_f64 v[44:45], v[34:35], -v[44:45]
	v_add_f64 v[28:29], v[28:29], -v[48:49]
	v_add_f64 v[46:47], v[36:37], -v[26:27]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_add_f64 v[24:25], v[24:25], -v[40:41]
	v_add_f64 v[50:51], v[42:43], -v[32:33]
	v_add_f64 v[22:23], v[22:23], -v[44:45]
	v_add_f64 v[52:53], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_add_f64 v[38:39], v[28:29], v[20:21]
	v_add_f64 v[54:55], v[42:43], -v[50:51]
	v_add_f64 v[34:35], v[34:35], -v[50:51]
	v_add_f64 v[26:27], v[26:27], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[32:33], -v[54:55]
	v_add_f64 v[26:27], v[30:31], v[26:27]
	v_add_f64 v[30:31], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[34:35], v[32:33]
	v_add_f64 v[34:35], v[38:39], -v[28:29]
	v_add_f64 v[26:27], v[38:39], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[30:31], -v[24:25]
	v_add_f64 v[32:33], v[30:31], v[32:33]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[38:39], v[38:39], -v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[34:35]
	v_add_f64 v[44:45], v[36:37], v[26:27]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_add_f64 v[46:47], v[42:43], v[32:33]
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_add_f64 v[34:35], v[44:45], -v[36:37]
	v_add_f64 v[24:25], v[24:25], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[46:47], -v[42:43]
	v_add_f64 v[20:21], v[20:21], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[26:27], -v[34:35]
	v_add_f64 v[22:23], v[22:23], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[32:33], -v[30:31]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[24:25]
	v_add_f64 v[24:25], v[44:45], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[46:47], v[22:23]
	v_add_f64 v[28:29], v[24:25], -v[44:45]
	v_add_f64 v[30:31], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[26:27], -v[46:47]
	v_add_f64 v[34:35], v[26:27], v[26:27]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[24:25], v[24:25], 2.0, -v[30:31]
	v_cmp_class_f64_e64 vcc_lo, v[30:31], 0x204
	v_add_f64 v[22:23], v[22:23], -v[32:33]
	v_fma_f64 v[26:27], v[26:27], 2.0, -v[34:35]
	v_cmp_class_f64_e64 s0, v[34:35], 0x204
	v_fma_f64 v[20:21], v[20:21], 2.0, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[22:23], 2.0, v[26:27]
	v_add_f64 v[24:25], v[30:31], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[34:35], v[22:23]
	v_dual_cndmask_b32 v29, v25, v31 :: v_dual_cndmask_b32 v28, v24, v30
	v_add_f64 v[24:25], v[24:25], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v33, v27, v35, s0
	v_cndmask_b32_e64 v32, v26, v34, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[36:37], v[28:29], s[12:13]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[28:29]|
	v_mul_f64 v[38:39], v[32:33], s[12:13]
	v_add_f64 v[26:27], v[26:27], -v[34:35]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[32:33]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	v_rndne_f64_e32 v[36:37], v[36:37]
	v_rndne_f64_e32 v[38:39], v[38:39]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v21, 0, v21 :: v_dual_cndmask_b32 v20, 0, v20
	v_fma_f64 v[40:41], v[36:37], s[2:3], v[28:29]
	v_cvt_i32_f64_e32 v13, v[36:37]
	v_fma_f64 v[42:43], v[38:39], s[2:3], v[32:33]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], s[6:7], v[40:41]
	v_fma_f64 v[42:43], v[38:39], s[6:7], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], s[2:3], s[0:1]
	v_fma_f64 v[46:47], v[42:43], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[28:29]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[28:29]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[32:33]|
	v_fma_f64 v[44:45], v[40:41], v[44:45], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v23, 0, v23, s0
	v_cndmask_b32_e64 v22, 0, v22, s0
	v_fma_f64 v[36:37], v[40:41], v[44:45], 1.0
	v_cvt_i32_f64_e32 v40, v[38:39]
	v_fma_f64 v[38:39], v[42:43], v[46:47], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[30:31], v[36:37], v13
	v_ldexp_f64 v[34:35], v[38:39], v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v31, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[18:19]|
	v_cndmask_b32_e64 v26, 0x7ff00000, v35, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v25, 0, v13, s2
	v_cndmask_b32_e32 v24, 0, v30, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v27, 0, v26, s4
	v_cndmask_b32_e32 v26, 0, v34, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[16:17]|
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[24:25]
	v_cmp_class_f64_e64 vcc_lo, v[24:25], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[18:19]
	v_cmp_neq_f64_e64 s4, 0, v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v13, v21, v25 :: v_dual_cndmask_b32 v16, v20, v24
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v13, 0x7fffffff, v13
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[26:27]
	v_cmp_class_f64_e64 s0, v[26:27], 0x204
	v_cndmask_b32_e32 v16, 0, v16, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, 0, v13, s2
	v_cndmask_b32_e64 v21, v23, v27, s0
	v_cndmask_b32_e64 v20, v22, v26, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v21, 0x7fffffff, v21
	v_cndmask_b32_e64 v18, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, 0, v18, s4
	v_cndmask_b32_e32 v18, 0, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[16:17]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 8, v13
	v_ldexp_f64 v[16:17], v[16:17], v13
	v_cndmask_b32_e64 v13, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[18:19], v[16:17]
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_mul_f64 v[18:19], v[18:19], 0.5
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[18:19], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[20:21]
	v_ldexp_f64 v[18:19], v[18:19], v13
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v19, v17 :: v_dual_cndmask_b32 v16, v18, v16
.LBB2_8:
	s_or_b32 exec_lo, exec_lo, s5
	v_subrev_nc_u32_e32 v20, s25, v12
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[18:19], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s10, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v19, vcc_lo
	global_load_b32 v13, v[18:19], off
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v13
	s_cbranch_execz .LBB2_10
; %bb.9:
	v_lshlrev_b64 v[18:19], 3, v[20:21]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s10, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	v_add_co_u32 v20, vcc_lo, s18, v18
	v_add_co_ci_u32_e32 v21, vcc_lo, s19, v19, vcc_lo
	v_add_co_u32 v18, vcc_lo, s20, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v19, vcc_lo
	s_mov_b32 s11, 0x3fbdee67
	global_load_b64 v[20:21], v[20:21], off
	global_load_b64 v[18:19], v[18:19], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[20:21], v[20:21], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[18:19], v[18:19], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[22:23], |v[20:21]|
	v_frexp_mant_f64_e64 v[24:25], |v[18:19]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[22:23]
	v_cmp_gt_f64_e64 s0, s[2:3], v[24:25]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v26, 0, 1, s0
	v_ldexp_f64 v[22:23], v[22:23], v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[24:25], v[24:25], v26
	v_frexp_exp_i32_f64_e32 v13, v[20:21]
	v_add_f64 v[26:27], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[24:25], 1.0
	v_add_f64 v[38:39], v[22:23], -1.0
	v_subrev_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[30:31], v[26:27]
	v_rcp_f64_e32 v[32:33], v[28:29]
	v_add_f64 v[42:43], v[26:27], -1.0
	v_add_f64 v[46:47], v[28:29], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[42:43]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	v_fma_f64 v[36:37], -v[28:29], v[32:33], 1.0
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[32:33]
	v_fma_f64 v[34:35], -v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], -v[28:29], v[32:33], 1.0
	v_fma_f64 v[30:31], v[34:35], v[30:31], v[30:31]
	v_add_f64 v[34:35], v[24:25], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[32:33]
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	v_mul_f64 v[36:37], v[38:39], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[34:35], v[32:33]
	v_mul_f64 v[44:45], v[26:27], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[48:49], v[28:29], v[40:41]
	v_fma_f64 v[26:27], v[36:37], v[26:27], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[40:41], v[28:29], -v[48:49]
	v_fma_f64 v[22:23], v[36:37], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[40:41], v[24:25], v[28:29]
	v_add_f64 v[26:27], v[44:45], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[48:49], v[24:25]
	v_add_f64 v[42:43], v[38:39], -v[26:27]
	v_add_f64 v[44:45], v[26:27], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[34:35], -v[28:29]
	v_add_f64 v[48:49], v[28:29], -v[48:49]
	v_add_f64 v[38:39], v[38:39], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[44:45], -v[22:23]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[48:49], -v[24:25]
	v_add_f64 v[26:27], v[38:39], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	v_add_f64 v[22:23], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[28:29]
	v_add_f64 v[22:23], v[42:43], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[46:47], v[24:25]
	v_mul_f64 v[22:23], v[30:31], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[24:25], v[32:33], v[24:25]
	v_add_f64 v[26:27], v[36:37], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[40:41], v[24:25]
	v_add_f64 v[30:31], v[26:27], -v[36:37]
	v_mul_f64 v[34:35], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], v[28:29], -v[40:41]
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_mul_f64 v[30:31], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_fma_f64 v[32:33], v[26:27], v[26:27], -v[34:35]
	v_add_f64 v[36:37], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[38:39], v[28:29], v[28:29], -v[30:31]
	v_add_f64 v[40:41], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[26:27], v[36:37], v[32:33]
	v_fma_f64 v[36:37], v[28:29], v[40:41], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[34:35], v[32:33]
	v_add_f64 v[40:41], v[30:31], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], s[10:11], s[6:7]
	v_add_f64 v[34:35], v[38:39], -v[34:35]
	v_fma_f64 v[44:45], v[40:41], s[10:11], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[30:31], v[40:41], -v[30:31]
	v_mul_f64 v[52:53], v[26:27], v[38:39]
	v_mul_f64 v[56:57], v[28:29], v[40:41]
	s_mov_b32 s10, 0x652b82fe
	s_mov_b32 s11, 0x3ff71547
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[30:31], v[36:37], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[6:7]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_mul_f64 v[46:47], v[38:39], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[48:49], v[40:41], v[44:45]
	v_fma_f64 v[34:35], v[38:39], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[40:41], v[44:45], -v[48:49]
	v_fma_f64 v[34:35], v[32:33], v[42:43], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[30:31], v[44:45], v[36:37]
	v_add_f64 v[42:43], v[46:47], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[48:49], v[36:37]
	v_add_f64 v[50:51], v[42:43], s[2:3]
	v_add_f64 v[46:47], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[54:55], v[44:45], s[2:3]
	v_add_f64 v[48:49], v[44:45], -v[48:49]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[58:59], v[50:51], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_fma_f64 v[46:47], v[38:39], v[26:27], -v[52:53]
	v_add_f64 v[60:61], v[54:55], s[2:3]
	v_add_f64 v[36:37], v[36:37], -v[48:49]
	v_fma_f64 v[48:49], v[40:41], v[28:29], -v[56:57]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[42:43], v[42:43], -v[58:59]
	v_add_f64 v[34:35], v[34:35], s[2:3]
	v_fma_f64 v[38:39], v[38:39], v[22:23], v[46:47]
	v_add_f64 v[44:45], v[44:45], -v[60:61]
	v_add_f64 v[36:37], v[36:37], s[2:3]
	v_fma_f64 v[40:41], v[40:41], v[24:25], v[48:49]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_ldexp_f64 v[24:25], v[24:25], 1
	v_add_f64 v[34:35], v[34:35], v[42:43]
	v_fma_f64 v[32:33], v[32:33], v[26:27], v[38:39]
	v_ldexp_f64 v[26:27], v[26:27], 1
	v_add_f64 v[36:37], v[36:37], v[44:45]
	v_fma_f64 v[30:31], v[30:31], v[28:29], v[40:41]
	v_ldexp_f64 v[28:29], v[28:29], 1
	v_add_f64 v[38:39], v[50:51], v[34:35]
	v_add_f64 v[40:41], v[52:53], v[32:33]
	v_add_f64 v[42:43], v[54:55], v[36:37]
	v_add_f64 v[44:45], v[56:57], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[50:51], -v[38:39]
	v_mul_f64 v[48:49], v[40:41], v[38:39]
	v_add_f64 v[52:53], v[40:41], -v[52:53]
	v_add_f64 v[50:51], v[54:55], -v[42:43]
	v_mul_f64 v[54:55], v[44:45], v[42:43]
	v_add_f64 v[56:57], v[44:45], -v[56:57]
	v_add_f64 v[34:35], v[34:35], v[46:47]
	v_fma_f64 v[46:47], v[40:41], v[38:39], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[52:53]
	v_add_f64 v[36:37], v[36:37], v[50:51]
	v_fma_f64 v[50:51], v[44:45], v[42:43], -v[54:55]
	v_add_f64 v[30:31], v[30:31], -v[56:57]
	v_fma_f64 v[34:35], v[40:41], v[34:35], v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[44:45], v[36:37], v[50:51]
	v_fma_f64 v[32:33], v[32:33], v[38:39], v[34:35]
	v_frexp_exp_i32_f64_e32 v38, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[30:31], v[42:43], v[36:37]
	v_add_f64 v[34:35], v[48:49], v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v44, vcc_lo, 0, v38, s0
	v_add_f64 v[36:37], v[54:55], v[30:31]
	v_cvt_f64_i32_e32 v[38:39], v13
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[44:45], v44
	v_add_f64 v[40:41], v[26:27], v[34:35]
	v_add_f64 v[42:43], v[34:35], -v[48:49]
	v_add_f64 v[46:47], v[28:29], v[36:37]
	v_add_f64 v[48:49], v[36:37], -v[54:55]
	v_mul_f64 v[50:51], v[38:39], s[2:3]
	v_add_f64 v[26:27], v[40:41], -v[26:27]
	v_add_f64 v[32:33], v[32:33], -v[42:43]
	v_mul_f64 v[42:43], v[44:45], s[2:3]
	v_add_f64 v[28:29], v[46:47], -v[28:29]
	v_add_f64 v[30:31], v[30:31], -v[48:49]
	v_fma_f64 v[48:49], v[38:39], s[2:3], -v[50:51]
	v_add_f64 v[26:27], v[34:35], -v[26:27]
	v_add_f64 v[22:23], v[22:23], v[32:33]
	v_fma_f64 v[32:33], v[44:45], s[2:3], -v[42:43]
	v_add_f64 v[28:29], v[36:37], -v[28:29]
	v_add_f64 v[24:25], v[24:25], v[30:31]
	v_fma_f64 v[30:31], v[38:39], s[6:7], v[48:49]
	s_mov_b32 s3, 0xbfe62e42
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_fma_f64 v[26:27], v[44:45], s[6:7], v[32:33]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], v[28:29]
	v_add_f64 v[28:29], v[50:51], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[40:41], v[22:23]
	v_add_f64 v[34:35], v[42:43], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[46:47], v[24:25]
	v_add_f64 v[50:51], v[28:29], -v[50:51]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[38:39], v[28:29], v[32:33]
	v_add_f64 v[40:41], v[32:33], -v[40:41]
	v_add_f64 v[42:43], v[34:35], -v[42:43]
	v_add_f64 v[44:45], v[34:35], v[36:37]
	v_add_f64 v[46:47], v[36:37], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[50:51]
	v_add_f64 v[48:49], v[38:39], -v[28:29]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[52:53], v[44:45], -v[34:35]
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	v_add_f64 v[54:55], v[38:39], -v[48:49]
	v_add_f64 v[32:33], v[32:33], -v[48:49]
	v_add_f64 v[40:41], v[30:31], v[22:23]
	v_add_f64 v[56:57], v[44:45], -v[52:53]
	v_add_f64 v[36:37], v[36:37], -v[52:53]
	v_add_f64 v[28:29], v[28:29], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], -v[56:57]
	v_add_f64 v[28:29], v[32:33], v[28:29]
	v_add_f64 v[32:33], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[36:37], v[34:35]
	v_add_f64 v[36:37], v[40:41], -v[30:31]
	v_add_f64 v[28:29], v[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[32:33], -v[26:27]
	v_add_f64 v[34:35], v[32:33], v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[40:41], v[40:41], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[36:37]
	v_add_f64 v[46:47], v[38:39], v[28:29]
	v_add_f64 v[32:33], v[32:33], -v[42:43]
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_add_f64 v[48:49], v[44:45], v[34:35]
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	v_add_f64 v[36:37], v[46:47], -v[38:39]
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[48:49], -v[44:45]
	v_add_f64 v[22:23], v[22:23], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[36:37]
	v_add_f64 v[24:25], v[24:25], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[34:35], -v[32:33]
	v_add_f64 v[22:23], v[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[26:27]
	v_add_f64 v[26:27], v[46:47], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[48:49], v[24:25]
	v_add_f64 v[30:31], v[26:27], -v[46:47]
	v_add_f64 v[32:33], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[34:35], v[28:29], -v[48:49]
	v_add_f64 v[36:37], v[28:29], v[28:29]
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[26:27], v[26:27], 2.0, -v[32:33]
	v_cmp_class_f64_e64 vcc_lo, v[32:33], 0x204
	v_add_f64 v[24:25], v[24:25], -v[34:35]
	v_fma_f64 v[28:29], v[28:29], 2.0, -v[36:37]
	v_cmp_class_f64_e64 s0, v[36:37], 0x204
	v_fma_f64 v[22:23], v[22:23], 2.0, v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[24:25], 2.0, v[28:29]
	v_add_f64 v[26:27], v[32:33], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[36:37], v[24:25]
	v_dual_cndmask_b32 v31, v27, v33 :: v_dual_cndmask_b32 v30, v26, v32
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v35, v29, v37, s0
	v_cndmask_b32_e64 v34, v28, v36, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[38:39], v[30:31], s[10:11]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[30:31]|
	v_mul_f64 v[40:41], v[34:35], s[10:11]
	v_add_f64 v[28:29], v[28:29], -v[36:37]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[34:35]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_rndne_f64_e32 v[38:39], v[38:39]
	v_rndne_f64_e32 v[40:41], v[40:41]
	v_add_f64 v[24:25], v[24:25], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v22, 0, v22
	v_fma_f64 v[42:43], v[38:39], s[2:3], v[30:31]
	v_cvt_i32_f64_e32 v13, v[38:39]
	v_fma_f64 v[44:45], v[40:41], s[2:3], v[34:35]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[6:7], v[42:43]
	v_fma_f64 v[44:45], v[40:41], s[6:7], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], v[42:43], s[2:3], s[0:1]
	v_fma_f64 v[48:49], v[44:45], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[30:31]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[46:47], v[42:43], v[46:47], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[30:31]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[34:35]|
	v_fma_f64 v[46:47], v[42:43], v[46:47], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], v[44:45], v[48:49], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, 0, v25, s0
	v_cndmask_b32_e64 v24, 0, v24, s0
	v_fma_f64 v[38:39], v[42:43], v[46:47], 1.0
	v_cvt_i32_f64_e32 v42, v[40:41]
	v_fma_f64 v[40:41], v[44:45], v[48:49], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[32:33], v[38:39], v13
	v_ldexp_f64 v[36:37], v[40:41], v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v33, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[20:21]|
	v_cndmask_b32_e64 v28, 0x7ff00000, v37, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v27, 0, v13, s2
	v_cndmask_b32_e32 v26, 0, v32, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v29, 0, v28, s4
	v_cndmask_b32_e32 v28, 0, v36, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[18:19]|
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[20:21]
	v_cmp_neq_f64_e64 s4, 0, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v13, v23, v27 :: v_dual_cndmask_b32 v18, v22, v26
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v13, 0x7fffffff, v13
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[28:29]
	v_cmp_class_f64_e64 s0, v[28:29], 0x204
	v_cndmask_b32_e32 v18, 0, v18, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, 0, v13, s2
	v_cndmask_b32_e64 v23, v25, v29, s0
	v_cndmask_b32_e64 v22, v24, v28, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v23, 0x7fffffff, v23
	v_cndmask_b32_e64 v20, 0x7ff00000, v23, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, 0, v20, s4
	v_cndmask_b32_e32 v20, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[18:19]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 8, v13
	v_ldexp_f64 v[18:19], v[18:19], v13
	v_cndmask_b32_e64 v13, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[20:21], v[18:19]
	v_cmp_class_f64_e64 vcc_lo, v[18:19], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[22:23], v[18:19], v[20:21]
	v_mul_f64 v[20:21], v[20:21], 0.5
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[24:25], v[20:21], v[22:23]
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[22:23]
	v_ldexp_f64 v[20:21], v[20:21], v13
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v21, v19 :: v_dual_cndmask_b32 v18, v20, v18
.LBB2_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_ashr_i32 s1, s25, 31
	s_mov_b32 s0, s25
	s_mov_b32 s5, exec_lo
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v13, vcc_lo, v14, s0
	v_add_co_ci_u32_e32 v14, vcc_lo, s1, v15, vcc_lo
	global_load_b32 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v13
	s_cbranch_execz .LBB2_12
; %bb.11:
	v_add_nc_u32_e32 v12, s25, v12
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s10, 0x4222de17
	v_ashrrev_i32_e32 v13, 31, v12
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s11, 0x3fbdee67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v14, vcc_lo, s18, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s19, v13, vcc_lo
	v_add_co_u32 v12, vcc_lo, s20, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[10:11], v[10:11], off offset:8
	global_load_b64 v[18:19], v[12:13], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[12:13], v[14:15], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[14:15], |v[12:13]|
	v_frexp_mant_f64_e64 v[18:19], |v[10:11]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[14:15]
	v_cmp_gt_f64_e64 s0, s[2:3], v[18:19]
	v_cndmask_b32_e64 v20, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, 1, s0
	v_ldexp_f64 v[14:15], v[14:15], v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[18:19], v[18:19], v21
	v_add_f64 v[20:21], v[14:15], 1.0
	v_add_f64 v[32:33], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[18:19], 1.0
	v_rcp_f64_e32 v[24:25], v[20:21]
	v_add_f64 v[36:37], v[20:21], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[26:27], v[22:23]
	v_add_f64 v[40:41], v[22:23], -1.0
	v_add_f64 v[14:15], v[14:15], -v[36:37]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[28:29], -v[20:21], v[24:25], 1.0
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[24:25]
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], -v[20:21], v[24:25], 1.0
	v_fma_f64 v[30:31], -v[22:23], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[24:25]
	v_add_f64 v[28:29], v[18:19], -1.0
	v_fma_f64 v[26:27], v[30:31], v[26:27], v[26:27]
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[30:31], v[32:33], v[24:25]
	v_mul_f64 v[34:35], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[38:39], v[20:21], v[30:31]
	v_mul_f64 v[42:43], v[22:23], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[30:31], v[20:21], -v[38:39]
	v_fma_f64 v[22:23], v[34:35], v[22:23], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[30:31], v[14:15], v[20:21]
	v_fma_f64 v[18:19], v[34:35], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[38:39], v[14:15]
	v_add_f64 v[22:23], v[42:43], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[32:33], -v[20:21]
	v_add_f64 v[38:39], v[20:21], -v[38:39]
	v_add_f64 v[40:41], v[28:29], -v[22:23]
	v_add_f64 v[42:43], v[22:23], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], -v[36:37]
	v_add_f64 v[14:15], v[38:39], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	v_add_f64 v[18:19], v[42:43], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[32:33], -v[20:21]
	v_add_f64 v[22:23], v[28:29], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_add_f64 v[18:19], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[36:37], v[14:15]
	v_add_f64 v[18:19], v[40:41], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[24:25], v[14:15]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[30:31], v[14:15]
	v_add_f64 v[22:23], v[34:35], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[20:21], -v[30:31]
	v_mul_f64 v[28:29], v[20:21], v[20:21]
	v_add_f64 v[26:27], v[22:23], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_mul_f64 v[24:25], v[22:23], v[22:23]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_fma_f64 v[26:27], v[20:21], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[14:15], v[14:15]
	v_fma_f64 v[32:33], v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[18:19], v[18:19]
	v_fma_f64 v[26:27], v[20:21], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[22:23], v[34:35], v[32:33]
	v_add_f64 v[32:33], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[24:25], v[30:31]
	v_fma_f64 v[36:37], v[32:33], s[10:11], s[6:7]
	v_add_f64 v[28:29], v[32:33], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[38:39], v[34:35], s[10:11], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[24:25], v[34:35], -v[24:25]
	v_mul_f64 v[46:47], v[20:21], v[32:33]
	v_mul_f64 v[50:51], v[22:23], v[34:35]
	s_mov_b32 s10, 0x652b82fe
	s_mov_b32 s11, 0x3ff71547
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	v_add_f64 v[26:27], v[26:27], -v[28:29]
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], v[38:39], s[6:7]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_mul_f64 v[40:41], v[32:33], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[42:43], v[34:35], v[38:39]
	v_fma_f64 v[28:29], v[32:33], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[34:35], v[38:39], -v[42:43]
	v_fma_f64 v[28:29], v[26:27], v[36:37], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[24:25], v[38:39], v[30:31]
	v_add_f64 v[36:37], v[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[42:43], v[30:31]
	v_add_f64 v[44:45], v[36:37], s[2:3]
	v_add_f64 v[40:41], v[36:37], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[38:39], s[2:3]
	s_mov_b32 s3, 0xbfe55555
	v_add_f64 v[42:43], v[38:39], -v[42:43]
	v_add_f64 v[52:53], v[44:45], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	v_fma_f64 v[40:41], v[32:33], v[20:21], -v[46:47]
	v_add_f64 v[54:55], v[48:49], s[2:3]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_fma_f64 v[42:43], v[34:35], v[22:23], -v[50:51]
	v_add_f64 v[36:37], v[36:37], -v[52:53]
	v_add_f64 v[28:29], v[28:29], s[2:3]
	v_fma_f64 v[32:33], v[32:33], v[14:15], v[40:41]
	v_add_f64 v[38:39], v[38:39], -v[54:55]
	v_ldexp_f64 v[14:15], v[14:15], 1
	v_add_f64 v[30:31], v[30:31], s[2:3]
	v_fma_f64 v[34:35], v[34:35], v[18:19], v[42:43]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_add_f64 v[28:29], v[28:29], v[36:37]
	v_fma_f64 v[26:27], v[26:27], v[20:21], v[32:33]
	v_ldexp_f64 v[20:21], v[20:21], 1
	v_add_f64 v[30:31], v[30:31], v[38:39]
	v_fma_f64 v[24:25], v[24:25], v[22:23], v[34:35]
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[32:33], v[44:45], v[28:29]
	v_add_f64 v[34:35], v[46:47], v[26:27]
	v_add_f64 v[36:37], v[48:49], v[30:31]
	v_add_f64 v[38:39], v[50:51], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[44:45], -v[32:33]
	v_mul_f64 v[42:43], v[34:35], v[32:33]
	v_add_f64 v[46:47], v[34:35], -v[46:47]
	v_add_f64 v[44:45], v[48:49], -v[36:37]
	v_mul_f64 v[48:49], v[38:39], v[36:37]
	v_add_f64 v[50:51], v[38:39], -v[50:51]
	v_add_f64 v[28:29], v[28:29], v[40:41]
	v_fma_f64 v[40:41], v[34:35], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[30:31], v[30:31], v[44:45]
	v_fma_f64 v[44:45], v[38:39], v[36:37], -v[48:49]
	v_add_f64 v[24:25], v[24:25], -v[50:51]
	v_fma_f64 v[28:29], v[34:35], v[28:29], v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[38:39], v[30:31], v[44:45]
	v_fma_f64 v[26:27], v[26:27], v[32:33], v[28:29]
	v_frexp_exp_i32_f64_e32 v32, v[12:13]
	v_frexp_exp_i32_f64_e32 v33, v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[24:25], v[36:37], v[30:31]
	v_add_f64 v[28:29], v[42:43], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v32, vcc_lo, 0, v32, vcc_lo
	v_subrev_co_ci_u32_e64 v38, vcc_lo, 0, v33, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[48:49], v[24:25]
	v_cvt_f64_i32_e32 v[32:33], v32
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[38:39], v38
	v_add_f64 v[34:35], v[20:21], v[28:29]
	v_add_f64 v[36:37], v[28:29], -v[42:43]
	v_add_f64 v[40:41], v[22:23], v[30:31]
	v_add_f64 v[42:43], v[30:31], -v[48:49]
	v_mul_f64 v[44:45], v[32:33], s[2:3]
	v_add_f64 v[20:21], v[34:35], -v[20:21]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_mul_f64 v[36:37], v[38:39], s[2:3]
	v_add_f64 v[22:23], v[40:41], -v[22:23]
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_fma_f64 v[42:43], v[32:33], s[2:3], -v[44:45]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_add_f64 v[14:15], v[14:15], v[26:27]
	v_fma_f64 v[26:27], v[38:39], s[2:3], -v[36:37]
	s_mov_b32 s3, 0xbfe62e42
	v_add_f64 v[22:23], v[30:31], -v[22:23]
	v_add_f64 v[18:19], v[18:19], v[24:25]
	v_fma_f64 v[24:25], v[32:33], s[6:7], v[42:43]
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_fma_f64 v[20:21], v[38:39], s[6:7], v[26:27]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[22:23], v[44:45], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[34:35], v[14:15]
	v_add_f64 v[28:29], v[36:37], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[40:41], v[18:19]
	v_add_f64 v[44:45], v[22:23], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[32:33], v[22:23], v[26:27]
	v_add_f64 v[34:35], v[26:27], -v[34:35]
	v_add_f64 v[36:37], v[28:29], -v[36:37]
	v_add_f64 v[38:39], v[28:29], v[30:31]
	v_add_f64 v[40:41], v[30:31], -v[40:41]
	v_add_f64 v[24:25], v[24:25], -v[44:45]
	v_add_f64 v[42:43], v[32:33], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[36:37]
	v_add_f64 v[46:47], v[38:39], -v[28:29]
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	v_add_f64 v[48:49], v[32:33], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[34:35], v[24:25], v[14:15]
	v_add_f64 v[50:51], v[38:39], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_add_f64 v[22:23], v[22:23], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[50:51]
	v_add_f64 v[22:23], v[26:27], v[22:23]
	v_add_f64 v[26:27], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[30:31], v[28:29]
	v_add_f64 v[30:31], v[34:35], -v[24:25]
	v_add_f64 v[22:23], v[34:35], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[26:27], -v[20:21]
	v_add_f64 v[28:29], v[26:27], v[28:29]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[34:35], v[34:35], -v[30:31]
	v_add_f64 v[14:15], v[14:15], -v[30:31]
	v_add_f64 v[40:41], v[32:33], v[22:23]
	v_add_f64 v[26:27], v[26:27], -v[36:37]
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[42:43], v[38:39], v[28:29]
	v_add_f64 v[24:25], v[24:25], -v[34:35]
	v_add_f64 v[30:31], v[40:41], -v[32:33]
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[42:43], -v[38:39]
	v_add_f64 v[14:15], v[14:15], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[18:19], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[28:29], -v[26:27]
	v_add_f64 v[14:15], v[14:15], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_add_f64 v[20:21], v[40:41], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[42:43], v[18:19]
	v_add_f64 v[24:25], v[20:21], -v[40:41]
	v_add_f64 v[26:27], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[22:23], -v[42:43]
	v_add_f64 v[30:31], v[22:23], v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[20:21], v[20:21], 2.0, -v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x204
	v_add_f64 v[18:19], v[18:19], -v[28:29]
	v_fma_f64 v[22:23], v[22:23], 2.0, -v[30:31]
	v_cmp_class_f64_e64 s0, v[30:31], 0x204
	v_fma_f64 v[14:15], v[14:15], 2.0, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[18:19], 2.0, v[22:23]
	v_add_f64 v[20:21], v[26:27], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[30:31], v[18:19]
	v_dual_cndmask_b32 v25, v21, v27 :: v_dual_cndmask_b32 v24, v20, v26
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v29, v23, v31, s0
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[24:25]|
	v_cndmask_b32_e64 v28, v22, v30, s0
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[34:35], v[28:29], s[10:11]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[28:29]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[34:35], v[34:35]
	v_cndmask_b32_e32 v15, 0, v15, vcc_lo
	v_mul_f64 v[32:33], v[24:25], s[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[2:3], v[28:29]
	v_rndne_f64_e32 v[32:33], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[34:35], s[6:7], v[38:39]
	v_fma_f64 v[36:37], v[32:33], s[2:3], v[24:25]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	v_cvt_i32_f64_e32 v44, v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], s[2:3], s[0:1]
	v_fma_f64 v[36:37], v[32:33], s[6:7], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[36:37], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[28:29]
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[24:25]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[28:29]|
	v_fma_f64 v[42:43], v[38:39], v[42:43], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[36:37], v[40:41], 1.0
	v_cndmask_b32_e64 v19, 0, v19, s0
	v_cndmask_b32_e64 v18, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[36:37], v[40:41], 1.0
	v_cvt_i32_f64_e32 v36, v[34:35]
	v_fma_f64 v[34:35], v[38:39], v[42:43], 1.0
	v_ldexp_f64 v[26:27], v[32:33], v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[30:31], v[34:35], v36
	v_cndmask_b32_e64 v20, 0x7ff00000, v27, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v22, 0x7ff00000, v31, s3
	v_cndmask_b32_e64 v21, 0, v20, s2
	v_cndmask_b32_e32 v14, 0, v14, vcc_lo
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v23, 0, v22, s4
	v_cndmask_b32_e32 v20, 0, v26, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[12:13]|
	v_cndmask_b32_e32 v22, 0, v30, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[10:11]|
	v_fma_f64 v[14:15], v[20:21], v[14:15], v[20:21]
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[12:13]
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[22:23]
	v_cmp_class_f64_e64 s0, v[22:23], 0x204
	v_cmp_neq_f64_e64 s4, 0, v[10:11]
	v_cndmask_b32_e32 v15, v15, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v19, v19, v23, s0
	v_dual_cndmask_b32 v10, v14, v20 :: v_dual_and_b32 v15, 0x7fffffff, v15
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_and_b32_e32 v19, 0x7fffffff, v19
	v_cndmask_b32_e64 v14, v18, v22, s0
	v_cndmask_b32_e64 v15, 0x7ff00000, v15, s1
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v12, 0x7ff00000, v19, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, v15, s2
	v_cndmask_b32_e64 v13, 0, v12, s4
	v_cndmask_b32_e32 v12, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[10:11]
	v_cndmask_b32_e64 v12, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v12, 8, v12
	v_ldexp_f64 v[10:11], v[10:11], v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[14:15], v[10:11], v[12:13]
	v_mul_f64 v[12:13], v[12:13], 0.5
	v_fma_f64 v[18:19], -v[12:13], v[14:15], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_fma_f64 v[18:19], -v[14:15], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[18:19], v[12:13], v[14:15]
	v_fma_f64 v[18:19], -v[14:15], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[14:15]
	v_cndmask_b32_e64 v14, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x260
	v_ldexp_f64 v[12:13], v[12:13], v14
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v13, v11 :: v_dual_cndmask_b32 v18, v12, v10
.LBB2_12:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_f64 v[0:1], v[2:3], -v[0:1]
	v_add_f64 v[4:5], v[6:7], -v[4:5]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s5, 0x3fba6564
	s_mov_b32 s7, 0x3fbdee67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], v[16:17]
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[18:19]
	v_div_scale_f64 v[22:23], vcc_lo, v[16:17], v[0:1], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[10:11], v[2:3]
	v_rcp_f64_e32 v[12:13], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[2:3], v[10:11], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], -v[2:3], v[10:11], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_div_scale_f64 v[14:15], s0, v[18:19], v[4:5], v[18:19]
	v_fma_f64 v[12:13], v[12:13], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[10:11]
	v_mul_f64 v[24:25], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], -v[2:3], v[20:21], v[22:23]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[10:11], v[20:21]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[2:3], v[2:3], v[0:1], v[16:17]
	v_div_fixup_f64 v[0:1], v[6:7], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[4:5], |v[2:3]|
	v_frexp_mant_f64_e64 v[6:7], |v[0:1]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	v_cmp_gt_f64_e64 s0, s[2:3], v[6:7]
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, 1, s0
	v_ldexp_f64 v[4:5], v[4:5], v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[6:7], v[6:7], v11
	v_add_f64 v[10:11], v[4:5], 1.0
	v_add_f64 v[22:23], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[6:7], 1.0
	v_rcp_f64_e32 v[14:15], v[10:11]
	v_add_f64 v[26:27], v[10:11], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[16:17], v[12:13]
	v_add_f64 v[30:31], v[12:13], -1.0
	v_add_f64 v[4:5], v[4:5], -v[26:27]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[14:15]
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[14:15]
	v_add_f64 v[18:19], v[6:7], -1.0
	v_add_f64 v[6:7], v[6:7], -v[30:31]
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[14:15]
	v_mul_f64 v[24:25], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[28:29], v[10:11], v[20:21]
	v_mul_f64 v[32:33], v[12:13], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[20:21], v[10:11], -v[28:29]
	v_fma_f64 v[12:13], v[24:25], v[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[4:5], v[10:11]
	v_fma_f64 v[6:7], v[24:25], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[28:29], v[4:5]
	v_add_f64 v[12:13], v[32:33], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[22:23], -v[10:11]
	v_add_f64 v[28:29], v[10:11], -v[28:29]
	v_add_f64 v[30:31], v[18:19], -v[12:13]
	v_add_f64 v[32:33], v[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_add_f64 v[4:5], v[28:29], -v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_add_f64 v[6:7], v[32:33], -v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[22:23], -v[10:11]
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[26:27], v[4:5]
	v_add_f64 v[6:7], v[30:31], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[6:7], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[20:21], v[4:5]
	v_add_f64 v[12:13], v[24:25], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[10:11], -v[20:21]
	v_mul_f64 v[18:19], v[10:11], v[10:11]
	v_add_f64 v[16:17], v[12:13], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	v_mul_f64 v[14:15], v[12:13], v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_fma_f64 v[16:17], v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[4:5], v[4:5]
	v_fma_f64 v[22:23], v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[6:7], v[6:7]
	v_fma_f64 v[16:17], v[10:11], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[12:13], v[24:25], v[22:23]
	v_add_f64 v[22:23], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[14:15], v[20:21]
	v_fma_f64 v[26:27], v[22:23], s[6:7], s[4:5]
	v_add_f64 v[18:19], v[22:23], -v[18:19]
	v_mul_f64 v[36:37], v[10:11], v[22:23]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[28:29], v[24:25], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[14:15], v[24:25], -v[14:15]
	v_mul_f64 v[40:41], v[12:13], v[24:25]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[24:25], v[28:29], s[4:5]
	s_mov_b32 s4, 0x3b39803f
	s_mov_b32 s5, 0x3c7abc9e
	v_mul_f64 v[30:31], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[32:33], v[24:25], v[28:29]
	v_fma_f64 v[18:19], v[22:23], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[24:25], v[28:29], -v[32:33]
	v_fma_f64 v[18:19], v[16:17], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[14:15], v[28:29], v[20:21]
	v_add_f64 v[26:27], v[30:31], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[32:33], v[20:21]
	v_add_f64 v[34:35], v[26:27], s[2:3]
	v_add_f64 v[30:31], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[38:39], v[28:29], s[2:3]
	v_add_f64 v[32:33], v[28:29], -v[32:33]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_add_f64 v[42:43], v[34:35], s[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_fma_f64 v[30:31], v[22:23], v[10:11], -v[36:37]
	v_add_f64 v[44:45], v[38:39], s[2:3]
	v_add_f64 v[20:21], v[20:21], -v[32:33]
	v_fma_f64 v[32:33], v[24:25], v[12:13], -v[40:41]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[18:19], v[18:19], s[2:3]
	v_fma_f64 v[22:23], v[22:23], v[4:5], v[30:31]
	v_add_f64 v[28:29], v[28:29], -v[44:45]
	v_add_f64 v[20:21], v[20:21], s[2:3]
	v_fma_f64 v[24:25], v[24:25], v[6:7], v[32:33]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[4:5], v[4:5], 1
	v_ldexp_f64 v[6:7], v[6:7], 1
	v_add_f64 v[18:19], v[18:19], v[26:27]
	v_fma_f64 v[16:17], v[16:17], v[10:11], v[22:23]
	v_ldexp_f64 v[10:11], v[10:11], 1
	v_add_f64 v[20:21], v[20:21], v[28:29]
	v_fma_f64 v[14:15], v[14:15], v[12:13], v[24:25]
	v_ldexp_f64 v[12:13], v[12:13], 1
	v_add_f64 v[22:23], v[34:35], v[18:19]
	v_add_f64 v[24:25], v[36:37], v[16:17]
	v_add_f64 v[26:27], v[38:39], v[20:21]
	v_add_f64 v[28:29], v[40:41], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[34:35], -v[22:23]
	v_mul_f64 v[32:33], v[24:25], v[22:23]
	v_add_f64 v[36:37], v[24:25], -v[36:37]
	v_add_f64 v[34:35], v[38:39], -v[26:27]
	v_mul_f64 v[38:39], v[28:29], v[26:27]
	v_add_f64 v[40:41], v[28:29], -v[40:41]
	v_add_f64 v[18:19], v[18:19], v[30:31]
	v_fma_f64 v[30:31], v[24:25], v[22:23], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[36:37]
	v_add_f64 v[20:21], v[20:21], v[34:35]
	v_fma_f64 v[34:35], v[28:29], v[26:27], -v[38:39]
	v_add_f64 v[14:15], v[14:15], -v[40:41]
	v_fma_f64 v[18:19], v[24:25], v[18:19], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[28:29], v[20:21], v[34:35]
	v_fma_f64 v[16:17], v[16:17], v[22:23], v[18:19]
	v_frexp_exp_i32_f64_e32 v22, v[2:3]
	v_frexp_exp_i32_f64_e32 v23, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[14:15], v[26:27], v[20:21]
	v_add_f64 v[18:19], v[32:33], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v22, vcc_lo, 0, v22, vcc_lo
	v_add_f64 v[20:21], v[38:39], v[14:15]
	v_subrev_co_ci_u32_e64 v28, vcc_lo, 0, v23, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[22:23], v22
	v_cvt_f64_i32_e32 v[28:29], v28
	v_add_f64 v[24:25], v[10:11], v[18:19]
	v_add_f64 v[26:27], v[18:19], -v[32:33]
	v_add_f64 v[30:31], v[12:13], v[20:21]
	v_add_f64 v[32:33], v[20:21], -v[38:39]
	v_mul_f64 v[34:35], v[22:23], s[2:3]
	v_add_f64 v[10:11], v[24:25], -v[10:11]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_mul_f64 v[26:27], v[28:29], s[2:3]
	v_add_f64 v[12:13], v[30:31], -v[12:13]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_fma_f64 v[32:33], v[22:23], s[2:3], -v[34:35]
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	v_add_f64 v[4:5], v[4:5], v[16:17]
	v_fma_f64 v[16:17], v[28:29], s[2:3], -v[26:27]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_add_f64 v[6:7], v[6:7], v[14:15]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[14:15], v[22:23], s[4:5], v[32:33]
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_fma_f64 v[10:11], v[28:29], s[4:5], v[16:17]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_add_f64 v[12:13], v[34:35], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[24:25], v[4:5]
	v_add_f64 v[18:19], v[26:27], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[30:31], v[6:7]
	v_add_f64 v[34:35], v[12:13], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[22:23], v[12:13], v[16:17]
	v_add_f64 v[24:25], v[16:17], -v[24:25]
	v_add_f64 v[26:27], v[18:19], -v[26:27]
	v_add_f64 v[28:29], v[18:19], v[20:21]
	v_add_f64 v[30:31], v[20:21], -v[30:31]
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	v_add_f64 v[32:33], v[22:23], -v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[24:25]
	v_add_f64 v[10:11], v[10:11], -v[26:27]
	v_add_f64 v[36:37], v[28:29], -v[18:19]
	v_add_f64 v[6:7], v[6:7], -v[30:31]
	v_add_f64 v[38:39], v[22:23], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_add_f64 v[24:25], v[14:15], v[4:5]
	v_add_f64 v[40:41], v[28:29], -v[36:37]
	v_add_f64 v[20:21], v[20:21], -v[36:37]
	v_add_f64 v[12:13], v[12:13], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	v_add_f64 v[12:13], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[20:21], v[24:25], -v[14:15]
	v_add_f64 v[12:13], v[24:25], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[16:17], -v[10:11]
	v_add_f64 v[18:19], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[24:25], v[24:25], -v[20:21]
	v_add_f64 v[4:5], v[4:5], -v[20:21]
	v_add_f64 v[30:31], v[22:23], v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_add_f64 v[6:7], v[6:7], -v[26:27]
	v_add_f64 v[32:33], v[28:29], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_add_f64 v[20:21], v[30:31], -v[22:23]
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[32:33], -v[28:29]
	v_add_f64 v[4:5], v[4:5], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[18:19], -v[16:17]
	v_add_f64 v[4:5], v[4:5], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[10:11], v[30:31], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[32:33], v[6:7]
	v_add_f64 v[14:15], v[10:11], -v[30:31]
	v_add_f64 v[16:17], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[12:13], -v[32:33]
	v_add_f64 v[20:21], v[12:13], v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], 2.0, -v[16:17]
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x204
	v_add_f64 v[6:7], v[6:7], -v[18:19]
	v_fma_f64 v[12:13], v[12:13], 2.0, -v[20:21]
	v_cmp_class_f64_e64 s0, v[20:21], 0x204
	v_fma_f64 v[4:5], v[4:5], 2.0, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], 2.0, v[12:13]
	v_add_f64 v[10:11], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[20:21], v[6:7]
	v_dual_cndmask_b32 v15, v11, v17 :: v_dual_cndmask_b32 v14, v10, v16
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, v13, v21, s0
	v_cndmask_b32_e64 v18, v12, v20, s0
	s_mov_b32 s0, 0xfca7ab0c
	v_mul_f64 v[22:23], v[14:15], s[6:7]
	s_mov_b32 s1, 0x3e928af3
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[14:15]|
	v_mul_f64 v[24:25], v[18:19], s[6:7]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_rndne_f64_e32 v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_rndne_f64_e32 v[24:25], v[24:25]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v5, 0, v5 :: v_dual_cndmask_b32 v4, 0, v4
	v_fma_f64 v[26:27], v[22:23], s[2:3], v[14:15]
	v_cvt_i32_f64_e32 v34, v[22:23]
	v_fma_f64 v[28:29], v[24:25], s[2:3], v[18:19]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[22:23], s[4:5], v[26:27]
	v_fma_f64 v[28:29], v[24:25], s[4:5], v[28:29]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[26:27], s[2:3], s[0:1]
	v_fma_f64 v[32:33], v[28:29], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[14:15]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[26:27], v[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[14:15]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[18:19]|
	v_fma_f64 v[30:31], v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[28:29], v[32:33], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cndmask_b32_e64 v6, 0, v6, s0
	v_fma_f64 v[22:23], v[26:27], v[30:31], 1.0
	v_cvt_i32_f64_e32 v26, v[24:25]
	v_fma_f64 v[24:25], v[28:29], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[16:17], v[22:23], v34
	v_ldexp_f64 v[20:21], v[24:25], v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, 0x7ff00000, v17, s1
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[2:3]|
	v_cndmask_b32_e64 v12, 0x7ff00000, v21, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v10, s2
	v_cndmask_b32_e32 v10, 0, v16, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v13, 0, v12, s4
	v_cndmask_b32_e32 v12, 0, v20, vcc_lo
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[0:1]|
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
	v_cmp_neq_f64_e64 s2, 0, v[2:3]
	v_cmp_neq_f64_e64 s4, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v0, v4, v10
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v5, 0x7fffffff, v5
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[12:13]
	v_cmp_class_f64_e64 s0, v[12:13], 0x204
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	v_cndmask_b32_e64 v5, 0x7ff00000, v5, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, 0, v5, s2
	v_cndmask_b32_e64 v7, v7, v13, s0
	v_cndmask_b32_e64 v4, v6, v12, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v7, 0x7fffffff, v7
	v_cndmask_b32_e64 v2, 0x7ff00000, v7, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, 0, v2, s4
	v_cndmask_b32_e32 v2, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 8, v2
	v_ldexp_f64 v[0:1], v[0:1], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[4:5], v[0:1], v[2:3]
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_fma_f64 v[2:3], v[2:3], v[6:7], v[2:3]
	v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[2:3], v[4:5]
	v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[6:7], v[2:3], v[4:5]
	v_cndmask_b32_e64 v4, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x260
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v3, v1 :: v_dual_cndmask_b32 v0, v2, v0
	v_add_co_u32 v2, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v9, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB2_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 62
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii, .Lfunc_end2-_ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 18536
; NumSgprs: 30
; NumVgprs: 62
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 62
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         92
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         108
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         116
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         118
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         120
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         122
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         124
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         126
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         168
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 360
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _ZN7kernels7alpha_uEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     62
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         92
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         108
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         116
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         118
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         120
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         122
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         124
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         126
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         168
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 360
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _ZN7kernels7alpha_vEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     62
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         92
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         108
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         116
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         118
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         120
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         122
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         124
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         126
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         168
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 360
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _ZN7kernels7alpha_pEPdPiS1_S0_S0_S0_S0_S0_S0_S1_S1_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     62
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
