#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#define MAX_NUM_BLOCKS_FLOAT	70
//#include "global_sync.cu"

#define WARP_SIZE_FLOAT 	32
#define NUM_THREADS_FLOAT	512
#define NUM_WARPS_FLOAT (NUM_THREADS_FLOAT / WARP_SIZE_FLOAT)
#define LOG_NUM_THREADS_FLOAT 9
#define LOG_NUM_WARPS_FLOAT (LOG_NUM_THREADS_FLOAT - 5)

#define SCAN_STRIDE_FLOAT (WARP_SIZE_FLOAT + WARP_SIZE_FLOAT / 2 + 1)

__device__ volatile int inQueueSizeFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int *inQueuePtr1Float[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int inQueueHeadFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int outQueueMaxSizeFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int outQueueHeadFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int *outQueuePtr2Float[MAX_NUM_BLOCKS_FLOAT];

__device__ volatile int *curInQueueFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int *curOutQueueFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int execution_code_float;


// This variables are used for debugging purposes only
__device__ volatile int totalInserts_float[MAX_NUM_BLOCKS_FLOAT];


// Utils...
// http://www.moderngpu.com/intro/scan.html
__device__ void scan_float(const int* values, int* exclusive) {

	// Reserve a half warp of extra space plus one per warp in the block.
	// This is exactly enough space to avoid comparisons in the multiscan
	// and to avoid bank conflicts.
	__shared__ volatile int scan[NUM_WARPS_FLOAT * SCAN_STRIDE_FLOAT];
	int tid = threadIdx.x;
	int warp = tid / WARP_SIZE_FLOAT;
	int lane = (WARP_SIZE_FLOAT - 1) & tid;

	volatile int* s = scan + SCAN_STRIDE_FLOAT * warp + lane + WARP_SIZE_FLOAT / 2;
	s[-16] = 0;

	// Read from global memory.
	int x = values[tid];
	s[0] = x;

	// Run inclusive scan on each warp's data.
	int sum = x;    

#pragma unroll
	for(int i = 0; i < 5; ++i) {
		int offset = 1<< i;
		sum += s[-offset];
		s[0] = sum;
	}

	// Synchronize to make all the totals available to the reduction code.
	__syncthreads();
	__shared__ volatile int totals[NUM_WARPS_FLOAT + NUM_WARPS_FLOAT / 2];
	if(tid < NUM_WARPS_FLOAT) {
		// Grab the block total for the tid'th block. This is the last element
		// in the block's scanned sequence. This operation avoids bank 
		// conflicts.
		int total = scan[SCAN_STRIDE_FLOAT * tid + WARP_SIZE_FLOAT / 2 + WARP_SIZE_FLOAT - 1];

		totals[tid] = 0;
		volatile int* s2 = totals + NUM_WARPS_FLOAT / 2 + tid;
		int totalsSum = total;
		s2[0] = total;

#pragma unroll
		for(int i = 0; i < LOG_NUM_WARPS_FLOAT; ++i) {
			int offset = 1<< i;
			totalsSum += s2[-offset];
			s2[0] = totalsSum;  
		}

		// Subtract total from totalsSum for an exclusive scan.
		totals[tid] = totalsSum - total;
	}

	// Synchronize to make the block scan available to all warps.
	__syncthreads();

	// Add the block scan to the inclusive sum for the block.
	sum += totals[warp];

	// Write the inclusive and exclusive scans to global memory.
//	inclusive[tid] = sum;
	exclusive[tid] = sum - x;
}

__device__ int queueElementFloat(int *outQueueCurPtr, int *elements){
	int queue_index = atomicAdd((int*)&outQueueHeadFloat[blockIdx.x], 1);
	if(queue_index < outQueueMaxSizeFloat[blockIdx.x]){
		curOutQueueFloat[blockIdx.x][queue_index] = elements[0];
	}else{
		queue_index = -1;
	}
	return queue_index;
}


// Assuming that all threads in a block are calling this function
__device__ int queueElementFloat(int *elements){
	int queue_index = -1;
#ifdef	PREFIX_SUM
	__shared__ int writeAddr[NUM_THREADS_FLOAT];
	__shared__ int exclusiveScan[NUM_THREADS_FLOAT];
	__shared__ int global_queue_index;

	if(threadIdx.x == 0){
		global_queue_index = outQueueHeadFloat[blockIdx.x];
	}

	// set to the number of values this threard is writing
	writeAddr[threadIdx.x] = elements[0];

	// run a prefix-sum on threads inserting data to the queue
	scan_float(writeAddr, exclusiveScan);

	// calculate index into the queue where given thread is writing
	queue_index = global_queue_index+exclusiveScan[threadIdx.x];

	// write elemets sequentially to shared memory
//	int localIndex = exclusiveScan[threadIdx.x];
//	for(int i = 0; i < elements[0]; i++){
//		localElements[localIndex+i] = elements[i+1];
//	}

//	__syncthreads();
//	for(int i = threadIdx.x; i < exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1]; i+=blockDim.x){
//		curOutQueueFloat[blockIdx.x][global_queue_index+i] = localElements[i];
//	}

	for(int i = 0; i < elements[0]; i++){
		// If the queue storage has been exceed, than set the execution code to 1. 
		// This will force a second round in the morphological reconstructio.	
		if(queue_index+i >= outQueueMaxSizeFloat[blockIdx.x]){
//			printf("List out of bounds\n");
			execution_code_float=1;
		}else{
			curOutQueueFloat[blockIdx.x][queue_index+i] = elements[i+1];
		}
	}

	// thread 0 updates head of the queue
	if(threadIdx.x == 0){
		outQueueHeadFloat[blockIdx.x]+=exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1];
		if(outQueueHeadFloat[blockIdx.x] >= outQueueMaxSizeFloat[blockIdx.x]){
			outQueueHeadFloat[blockIdx.x] = outQueueMaxSizeFloat[blockIdx.x];
		}
//		printf("Inserting = %d - outQueueHeadFloat = %d\n", exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1], outQueueHeadFloat[blockIdx.x]);
	}
#else
	if(elements[0] != 0){
		queue_index = atomicAdd((int*)&outQueueHeadFloat[blockIdx.x], elements[0]);
		if(queue_index < outQueueMaxSizeFloat[blockIdx.x]){
			for(int i = 0; i < elements[0];i++){
				curOutQueueFloat[blockIdx.x][queue_index+i] = elements[i+1];
			}
		}else{
			queue_index = -1;
		}
	}
#endif
	return queue_index;
}


// Assuming that all threads in a block are calling this function
__device__ int queueElementFloat(int element){
	int queue_index = -1;
#ifdef	PREFIX_SUM
	__shared__ int writeAddr[NUM_THREADS_FLOAT];
	__shared__ int exclusiveScan[NUM_THREADS_FLOAT];
	__shared__ int global_queue_index;

	if(threadIdx.x == 0){
		global_queue_index = outQueueHeadFloat[blockIdx.x];
	}

	// set to 1 threards that are writing
	writeAddr[threadIdx.x] = ((element) != (-1) ? (1):(0));

	// run a prefix-sum on threads inserting data to the queue
	scan_float(writeAddr, exclusiveScan);

	// calculate index into the queue where give thread is writing
	queue_index = global_queue_index+exclusiveScan[threadIdx.x];

	// If there is data to be queued, do it
	if(element != -1){
		curOutQueueFloat[blockIdx.x][queue_index] = element;
	}

	// thread 0 updates head of the queue
	if(threadIdx.x == 0){
		outQueueHeadFloat[blockIdx.x]+=exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1];
	}
#else
	if(element != -1){
		queue_index = atomicAdd((int*)&outQueueHeadFloat[blockIdx.x], 1);
		if(queue_index < outQueueMaxSizeFloat[blockIdx.x]){
			curOutQueueFloat[blockIdx.x][queue_index] = element;
		}else{
			queue_index = -1;
		}
	}
#endif
	return queue_index;
}

// Makes queue 1 point to queue 2, and vice-versa
__device__ void swapQueusFloat(int loopIt){
	__syncthreads();

	if(loopIt %2 == 0){
		curInQueueFloat[blockIdx.x] = outQueuePtr2Float[blockIdx.x];
		curOutQueueFloat[blockIdx.x] = inQueuePtr1Float[blockIdx.x];
		if(threadIdx.x == 0){
			inQueueSizeFloat[blockIdx.x] = outQueueHeadFloat[blockIdx.x];
			outQueueHeadFloat[blockIdx.x] = 0;
			inQueueHeadFloat[blockIdx.x] = 0;
			// This is used for profiling only
			totalInserts_float[blockIdx.x]+=inQueueSizeFloat[blockIdx.x];
		}
	}else{
		curInQueueFloat[blockIdx.x] = inQueuePtr1Float[blockIdx.x];
		curOutQueueFloat[blockIdx.x] = outQueuePtr2Float[blockIdx.x];

		if(threadIdx.x == 0){
			inQueueSizeFloat[blockIdx.x] = outQueueHeadFloat[blockIdx.x];
			outQueueHeadFloat[blockIdx.x] = 0;
			inQueueHeadFloat[blockIdx.x] = 0;
			// This is used for profiling only
			totalInserts_float[blockIdx.x]+=inQueueSizeFloat[blockIdx.x];
		}
	}
	__syncthreads();
}



// -2, nothing else to be done at all
__device__ int dequeueElementFloat(int *loopIt){
	// did this block got something to do?
	__shared__ volatile int gotWork;

getWork:
	gotWork = 0;


	// Try to get some work.
//	int queue_index = atomicAdd((int*)&inQueueHeadFloat, 1);
	int queue_index = inQueueHeadFloat[blockIdx.x] + threadIdx.x;
	// I must guarantee that idle threads are set to 0, and no other thread 
	// will come later and set it to 0 again
	__syncthreads();

	if(threadIdx.x == 0){
		inQueueHeadFloat[blockIdx.x]+=blockDim.x;
//		if(loopIt[0] < 1){
//			printf("inQueueSizeFloat = %d loopIt[0] = %d queue_index = %d outQueueHeadFloat = %d\n", inQueueSizeFloat[blockIdx.x], loopIt[0], queue_index, outQueueHeadFloat[blockIdx.x]);
//		}
	}

	// Nothing to do by default
	int element = -1;
	if(queue_index < inQueueSizeFloat[blockIdx.x]){
		element = curInQueueFloat[blockIdx.x][queue_index];
		gotWork = 1;
	}
	__syncthreads();


	// This block does not have anything to process
	if(!gotWork){
//		if(loopIt[0] < 20 && threadIdx.x == 0)
//			printf("inQueueSizeFloat = %d loopIt[0] = %d\n", inQueueSizeFloat[blockIdx.x], loopIt[0]);
		element = -2;
		if(outQueueHeadFloat[blockIdx.x] != 0){
			swapQueusFloat(loopIt[0]);
			loopIt[0]++;
			goto getWork;
		}
	}
	return element;
}

__global__ void initQueueIdFloat(int *inQueueData, int dataElements, int *outQueueData, int outMaxSize, int qId){
	if(threadIdx.x < 1){
		// Simply assign input data pointers/number of elements to the queue
		inQueuePtr1Float[qId] = inQueueData;

//		printf("initQueueVector: tid - %d dataElements = %d pointer = %p\n", threadIdx.x, dataElements, inQueueData);
		inQueueSizeFloat[qId] = dataElements;

		totalInserts_float[qId] = 0;
		
		// alloc second vector used to queue output elements
		outQueuePtr2Float[qId] = outQueueData;

		// Maximum number of elements that fit into the queue
		outQueueMaxSizeFloat[qId] = outMaxSize;

		// Head of the out queue
		outQueueHeadFloat[qId] = 0;

		// Head of the in queue
		inQueueHeadFloat[qId] = 0;

		execution_code_float=0;
	}
}



// Returns what should be queued
__device__ int propagateFloat(int *seeds, int *image, int x, int y, int ncols, int pval){
	int returnValue = -1;
	int index = y*ncols + x;
	int seedXYval = seeds[index];
	int imageXYval = image[index];

	if((seedXYval < pval) && (imageXYval != seedXYval)){
//		printf("propagation pval=%d", pval);
		int newValue = min(pval, imageXYval);
		//  this should be a max atomic...
		atomicMax(&(seeds[index]), newValue);
		returnValue = index;
	}
	return returnValue;
}


__global__ void morphReconKernelSpeedupFloat(int* d_Result, int *d_Seeds, int*d_Image, int ncols, int nrows, int connectivity=4){
	curInQueueFloat[blockIdx.x] = inQueuePtr1Float[blockIdx.x];
	curOutQueueFloat[blockIdx.x] = outQueuePtr2Float[blockIdx.x];
	int *seeds = d_Seeds;
	int *image = d_Image;

	int loopIt = 0;
	int workUnit = -1;
	int tid = threadIdx.x;
	__shared__ int localQueue[NUM_THREADS_FLOAT][9];

	__syncthreads();
	do{
		int x, y;

		localQueue[tid][0] = 0;
		
		// Try to get some work.
		workUnit = dequeueElementFloat(&loopIt);
		y = workUnit/ncols;
		x = workUnit%ncols;	

		int pval = 0;
		if(workUnit >= 0){
			pval = seeds[workUnit];

		}

		int retWork = -1;
		if(workUnit >= 0 && y > 0){
			retWork = propagateFloat((int*)seeds, image, x, y-1, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
//		queueElementFloat(retWork);
		if(workUnit >= 0 && y < nrows-1){
			retWork = propagateFloat((int*)seeds, image, x, y+1, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
//		queueElementFloat(retWork);

		if(workUnit >= 0 && x > 0){
			retWork = propagateFloat((int*)seeds, image, x-1, y, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
//		queueElementFloat(retWork);

		if(workUnit >= 0 && x < ncols-1){
			retWork = propagateFloat((int*)seeds, image, x+1, y, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
		// if connectivity is 8, four other neighbors have to be verified
		if(connectivity == 8){
			if(workUnit >= 0 && y > 0 && x >0){
				retWork = propagateFloat((int*)seeds, image, x-1, y-1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}
			if(workUnit >= 0 && y > 0 && x < ncols-1){
				retWork = propagateFloat((int*)seeds, image, x+1, y-1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}
			if(workUnit >= 0 && y < (nrows-1) && x >0){
				retWork = propagateFloat((int*)seeds, image, x-1, y+1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}
			if(workUnit >= 0 && y < (nrows-1) && x <(ncols-1)){
				retWork = propagateFloat((int*)seeds, image, x+1, y+1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}

		}
//		queueElementFloat(retWork);
		queueElementFloat(localQueue[tid]);

	}while(workUnit != -2);

	d_Result[blockIdx.x]=totalInserts_float[blockIdx.x];
	if(execution_code_float!=0){
		d_Result[gridDim.x]=1;
	}

}



extern "C" int morphReconSpeedupFloat( int *g_InputListPtr, int h_ListSize, int *g_Seed, int *g_Image, int h_ncols, int h_nrows, int connectivity, int nBlocks, float queue_increase_factor){
	int *d_Result;

	// alloc space to save output elements in the queue for each block
	int **h_OutQueuePtr = (int **)malloc(sizeof(int*) * nBlocks);

	// at this moment I should partition the INPUT queue
	int tempNblocks = nBlocks;

	int subListsInit[tempNblocks];
	int subListsSize[tempNblocks];

	for(int i = 0; i < tempNblocks; i++){
		int curSubListInit = (h_ListSize/tempNblocks)*i;
		int curSubListEnd = ((i+1<tempNblocks)?((i+1)*(h_ListSize/tempNblocks)-1):(h_ListSize-1));
	//	printf("BlockId = %d - init = %d end = %d size=%d\n", i, curSubListInit, curSubListEnd, curSubListEnd-curSubListInit+1);
		subListsInit[i] = curSubListInit;
//		subListsEnd[i] = curSubListEnd;
		subListsSize[i]	= curSubListEnd-curSubListInit+1;
	}

// Adding code
	// TODO: free data
	int *blockSubLists[tempNblocks];
	for(int i = 0; i < tempNblocks; i++){
		cudaMalloc((void **)&blockSubLists[i], sizeof(int)*(subListsSize[i]) * queue_increase_factor);
		cudaMemcpy(blockSubLists[i], &g_InputListPtr[subListsInit[i]], subListsSize[i] * sizeof(int), cudaMemcpyDeviceToDevice);
	}


// End adding code

//	printf("h_listSize = %d subListsSize[0]=%d\n", h_ListSize, subListsSize[0]);
//	cout << "h_listSize = "<< h_ListSize<< " subListsSize[0]="<< subListsSize[0] <<endl;
	
	for(int i = 0; i < tempNblocks;i++){
		cudaMalloc((void **)&h_OutQueuePtr[i], sizeof(int) * (subListsSize[i]) * queue_increase_factor);
	}
	
	// Init queue for each image. yes, this may not be the most efficient way, but the code is far easier to read. 
	// Another version, where all pointer are copied at once to the GPU was also built, buit it was only about 1ms 
	// faster. Thus, we decide to go with this version 
	for(int i = 0; i < nBlocks;i++)
		initQueueIdFloat<<<1, 1>>>(blockSubLists[i], subListsSize[i], h_OutQueuePtr[i], (subListsSize[i]) *queue_increase_factor, i);

	// This is used by each block to store the number of queue operations performed
	cudaMalloc((void **)&d_Result, sizeof(int)*(nBlocks+1)) ;
	cudaMemset((void *)d_Result, 0, sizeof(int)*(nBlocks+1));


//	printf("Run computation kernel!\n");
	morphReconKernelSpeedupFloat<<<nBlocks, NUM_THREADS_FLOAT>>>(d_Result, g_Seed, g_Image, h_ncols, h_nrows, connectivity);

	if(cudaGetLastError() != cudaSuccess){
		cudaError_t errorCode = cudaGetLastError();
		const char *error = cudaGetErrorString(errorCode);
		printf("Error after morphRecon = %s\n", error);
	}

	int *h_Result = (int *) malloc(sizeof(int) * (nBlocks+1));
	cudaMemcpy(h_Result, d_Result, sizeof(int) * (nBlocks+1), cudaMemcpyDeviceToHost);

	int resutRet = h_Result[nBlocks];
	free(h_Result);

	cudaFree(d_Result);
	for(int i = 0; i < nBlocks; i++){
		cudaFree(h_OutQueuePtr[i]);
	}
	free(h_OutQueuePtr);
	cudaFree(g_InputListPtr);

	return resutRet;
}




	.file	"tmpxft_00268856_00000000-6_global_queue_float.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10scan_floatPKiPi
	.type	_Z10scan_floatPKiPi, @function
_Z10scan_floatPKiPi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10scan_floatPKiPi, .-_Z10scan_floatPKiPi
	.globl	_Z17queueElementFloatPiS_
	.type	_Z17queueElementFloatPiS_, @function
_Z17queueElementFloatPiS_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z17queueElementFloatPiS_, .-_Z17queueElementFloatPiS_
	.globl	_Z17queueElementFloatPi
	.type	_Z17queueElementFloatPi, @function
_Z17queueElementFloatPi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z17queueElementFloatPi, .-_Z17queueElementFloatPi
	.globl	_Z17queueElementFloati
	.type	_Z17queueElementFloati, @function
_Z17queueElementFloati:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z17queueElementFloati, .-_Z17queueElementFloati
	.globl	_Z14swapQueusFloati
	.type	_Z14swapQueusFloati, @function
_Z14swapQueusFloati:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z14swapQueusFloati, .-_Z14swapQueusFloati
	.globl	_Z19dequeueElementFloatPi
	.type	_Z19dequeueElementFloatPi, @function
_Z19dequeueElementFloatPi:
.LFB2181:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z17queueElementFloatPi
	.cfi_endproc
.LFE2181:
	.size	_Z19dequeueElementFloatPi, .-_Z19dequeueElementFloatPi
	.globl	_Z14propagateFloatPiS_iiii
	.type	_Z14propagateFloatPiS_iiii, @function
_Z14propagateFloatPiS_iiii:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2033:
	.size	_Z14propagateFloatPiS_iiii, .-_Z14propagateFloatPiS_iiii
	.globl	_Z41__device_stub__Z16initQueueIdFloatPiiS_iiPiiS_ii
	.type	_Z41__device_stub__Z16initQueueIdFloatPiiS_iiPiiS_ii, @function
_Z41__device_stub__Z16initQueueIdFloatPiiS_iiPiiS_ii:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16initQueueIdFloatPiiS_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z41__device_stub__Z16initQueueIdFloatPiiS_iiPiiS_ii, .-_Z41__device_stub__Z16initQueueIdFloatPiiS_iiPiiS_ii
	.globl	_Z16initQueueIdFloatPiiS_ii
	.type	_Z16initQueueIdFloatPiiS_ii, @function
_Z16initQueueIdFloatPiiS_ii:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16initQueueIdFloatPiiS_iiPiiS_ii
	.cfi_endproc
.LFE2060:
	.size	_Z16initQueueIdFloatPiiS_ii, .-_Z16initQueueIdFloatPiiS_ii
	.globl	_Z55__device_stub__Z28morphReconKernelSpeedupFloatPiS_S_iiiPiS_S_iii
	.type	_Z55__device_stub__Z28morphReconKernelSpeedupFloatPiS_S_iiiPiS_S_iii, @function
_Z55__device_stub__Z28morphReconKernelSpeedupFloatPiS_S_iiiPiS_S_iii:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z28morphReconKernelSpeedupFloatPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L22:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z55__device_stub__Z28morphReconKernelSpeedupFloatPiS_S_iiiPiS_S_iii, .-_Z55__device_stub__Z28morphReconKernelSpeedupFloatPiS_S_iiiPiS_S_iii
	.globl	_Z28morphReconKernelSpeedupFloatPiS_S_iii
	.type	_Z28morphReconKernelSpeedupFloatPiS_S_iii, @function
_Z28morphReconKernelSpeedupFloatPiS_S_iii:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z28morphReconKernelSpeedupFloatPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2062:
	.size	_Z28morphReconKernelSpeedupFloatPiS_S_iii, .-_Z28morphReconKernelSpeedupFloatPiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Error after morphRecon = %s\n"
	.text
	.globl	morphReconSpeedupFloat
	.type	morphReconSpeedupFloat, @function
morphReconSpeedupFloat:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$136, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movslq	24(%rbp), %r15
	movq	%rdi, -120(%rbp)
	movl	%esi, -104(%rbp)
	movl	%r8d, -112(%rbp)
	leaq	0(,%r15,8), %r14
	movq	%r15, %rbx
	movq	%rdx, -152(%rbp)
	movq	%r14, %rdi
	movq	%rcx, -160(%rbp)
	movl	%r9d, -164(%rbp)
	movss	%xmm0, -108(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%rsp, %rcx
	movl	-104(%rbp), %esi
	movq	%rax, %r12
	leaq	0(,%r15,4), %rax
	movq	%rax, -144(%rbp)
	addq	$15, %rax
	movq	%rax, %rdi
	movq	%rax, %rdx
	andq	$-4096, %rdi
	andq	$-16, %rdx
	subq	%rdi, %rcx
.L28:
	cmpq	%rcx, %rsp
	je	.L29
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L28
.L29:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L30
	orq	$0, -8(%rsp,%rdx)
.L30:
	movq	%rsp, -128(%rbp)
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rax
	andq	$-16, %rdx
	subq	%rax, %rcx
.L31:
	cmpq	%rcx, %rsp
	je	.L32
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L31
.L32:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L33
	orq	$0, -8(%rsp,%rax)
.L33:
	movq	%rsp, %r13
	xorl	%ecx, %ecx
	leal	-1(%rsi), %edi
.L34:
	cmpl	%ecx, %ebx
	jle	.L74
	movl	%esi, %eax
	leal	1(%rcx), %r9d
	cltd
	idivl	%ebx
	movl	%edi, %edx
	movl	%eax, %r8d
	imull	%ecx, %r8d
	cmpl	%ebx, %r9d
	jge	.L36
	imull	%r9d, %eax
	leal	-1(%rax), %edx
.L36:
	movq	-128(%rbp), %rax
	subl	%r8d, %edx
	incl	%edx
	movl	%r8d, (%rax,%rcx,4)
	movl	%edx, 0(%r13,%rcx,4)
	incq	%rcx
	jmp	.L34
.L74:
	addq	$15, %r14
	movq	%rsp, %rdx
	movq	%r14, %rax
	andq	$-4096, %r14
	andq	$-16, %rax
	subq	%r14, %rdx
.L38:
	cmpq	%rdx, %rsp
	je	.L39
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L38
.L39:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L40
	orq	$0, -8(%rsp,%rax)
.L40:
	movq	%rsp, %rax
	movq	%rsp, -136(%rbp)
	xorl	%r14d, %r14d
	movq	%rax, -104(%rbp)
.L41:
	cmpl	%r14d, %ebx
	jle	.L75
	movslq	0(%r13,%r14,4), %rdx
	salq	$2, %rdx
	js	.L42
	cvtsi2ssq	%rdx, %xmm0
	jmp	.L43
.L42:
	movq	%rdx, %rax
	shrq	%rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L43:
	mulss	-108(%rbp), %xmm0
	comiss	.LC0(%rip), %xmm0
	jnb	.L44
	cvttss2siq	%xmm0, %rsi
	jmp	.L45
.L44:
	subss	.LC0(%rip), %xmm0
	cvttss2siq	%xmm0, %rsi
	btcq	$63, %rsi
.L45:
	movq	-104(%rbp), %rdi
	movq	%rdx, -176(%rbp)
	call	cudaMalloc@PLT
	movq	-128(%rbp), %rax
	movq	-120(%rbp), %rcx
	movq	-176(%rbp), %rdx
	movslq	(%rax,%r14,4), %rax
	incq	%r14
	leaq	(%rcx,%rax,4), %rsi
	movq	-104(%rbp), %rax
	movl	$3, %ecx
	movq	(%rax), %rdi
	call	cudaMemcpy@PLT
	addq	$8, -104(%rbp)
	jmp	.L41
.L75:
	movq	%r12, %rdx
	xorl	%r14d, %r14d
.L47:
	cmpl	%r14d, %ebx
	jle	.L76
	movslq	0(%r13,%r14,4), %rax
	salq	$2, %rax
	js	.L48
	cvtsi2ssq	%rax, %xmm0
	jmp	.L49
.L48:
	shrq	%rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L49:
	mulss	-108(%rbp), %xmm0
	comiss	.LC0(%rip), %xmm0
	jnb	.L50
	cvttss2siq	%xmm0, %rsi
	jmp	.L51
.L50:
	subss	.LC0(%rip), %xmm0
	cvttss2siq	%xmm0, %rsi
	btcq	$63, %rsi
.L51:
	movq	%rdx, %rdi
	movq	%rdx, -104(%rbp)
	incq	%r14
	call	cudaMalloc@PLT
	movq	-104(%rbp), %rdx
	addq	$8, %rdx
	jmp	.L47
.L76:
	xorl	%r14d, %r14d
.L53:
	cmpl	%r14d, %ebx
	jle	.L77
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rax
	movl	$1, -60(%rbp)
	movq	%rax, %rdx
	movq	%rax, %rdi
	movq	%rax, -68(%rbp)
	movq	%rax, -80(%rbp)
	movl	$1, -72(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movl	0(%r13,%r14,4), %esi
	movq	-136(%rbp), %rax
	movl	%r14d, %r8d
	movq	(%r12,%r14,8), %rdx
	cvtsi2ssl	%esi, %xmm0
	mulss	-108(%rbp), %xmm0
	movq	(%rax,%r14,8), %rdi
	cvttss2sil	%xmm0, %ecx
	call	_Z41__device_stub__Z16initQueueIdFloatPiiS_iiPiiS_ii
.L54:
	incq	%r14
	jmp	.L53
.L77:
	movq	-144(%rbp), %r13
	leaq	-88(%rbp), %rdi
	addq	$4, %r13
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	-88(%rbp), %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	call	cudaMemset@PLT
	movl	%ebx, -80(%rbp)
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	salq	$9, %rdx
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, -76(%rbp)
	movq	-80(%rbp), %rdi
	movl	-72(%rbp), %esi
	movq	%rdx, -68(%rbp)
	movl	$1, -60(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movl	16(%rbp), %r9d
	movl	-164(%rbp), %r8d
	movl	-112(%rbp), %ecx
	movq	-160(%rbp), %rdx
	movq	-152(%rbp), %rsi
	movq	-88(%rbp), %rdi
	call	_Z55__device_stub__Z28morphReconKernelSpeedupFloatPiS_S_iiiPiS_S_iii
.L56:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L57
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L57:
	movq	%r13, %rdi
	call	malloc@PLT
	movq	-88(%rbp), %rsi
	movq	%r13, %rdx
	movl	$2, %ecx
	movq	%rax, %r14
	movq	%rax, %rdi
	call	cudaMemcpy@PLT
	movq	%r14, %rdi
	movl	(%r14,%r15,4), %r13d
	xorl	%r14d, %r14d
	call	free@PLT
	movq	-88(%rbp), %rdi
	call	cudaFree@PLT
.L58:
	cmpl	%r14d, %ebx
	jle	.L78
	movq	(%r12,%r14,8), %rdi
	incq	%r14
	call	cudaFree@PLT
	jmp	.L58
.L78:
	movq	%r12, %rdi
	call	free@PLT
	movq	-120(%rbp), %rdi
	call	cudaFree@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L60
	call	__stack_chk_fail@PLT
.L60:
	leaq	-40(%rbp), %rsp
	movl	%r13d, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2034:
	.size	morphReconSpeedupFloat, .-morphReconSpeedupFloat
	.section	.rodata.str1.1
.LC2:
	.string	"_Z28morphReconKernelSpeedupFloatPiS_S_iii"
.LC3:
	.string	"_Z16initQueueIdFloatPiiS_ii"
.LC4:
	.string	"inQueueSizeFloat"
.LC5:
	.string	"inQueuePtr1Float"
.LC6:
	.string	"inQueueHeadFloat"
.LC7:
	.string	"outQueueMaxSizeFloat"
.LC8:
	.string	"outQueueHeadFloat"
.LC9:
	.string	"outQueuePtr2Float"
.LC10:
	.string	"curInQueueFloat"
.LC11:
	.string	"curOutQueueFloat"
.LC12:
	.string	"execution_code_float"
.LC13:
	.string	"totalInserts_float"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z28morphReconKernelSpeedupFloatPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16initQueueIdFloatPiiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movl	$280, %r9d
	leaq	_ZL16inQueueSizeFloat(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$560, %r9d
	leaq	_ZL16inQueuePtr1Float(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$280, %r9d
	leaq	_ZL16inQueueHeadFloat(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$280, %r9d
	leaq	_ZL20outQueueMaxSizeFloat(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$280, %r9d
	leaq	_ZL17outQueueHeadFloat(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$560, %r9d
	leaq	_ZL17outQueuePtr2Float(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$560, %r9d
	leaq	_ZL15curInQueueFloat(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$560, %r9d
	leaq	_ZL16curOutQueueFloat(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL20execution_code_float(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$280, %r9d
	movq	%rdx, %rcx
	leaq	_ZL18totalInserts_float(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL18totalInserts_float
	.comm	_ZL18totalInserts_float,280,32
	.local	_ZL20execution_code_float
	.comm	_ZL20execution_code_float,4,4
	.local	_ZL16curOutQueueFloat
	.comm	_ZL16curOutQueueFloat,560,32
	.local	_ZL15curInQueueFloat
	.comm	_ZL15curInQueueFloat,560,32
	.local	_ZL17outQueuePtr2Float
	.comm	_ZL17outQueuePtr2Float,560,32
	.local	_ZL17outQueueHeadFloat
	.comm	_ZL17outQueueHeadFloat,280,32
	.local	_ZL20outQueueMaxSizeFloat
	.comm	_ZL20outQueueMaxSizeFloat,280,32
	.local	_ZL16inQueueHeadFloat
	.comm	_ZL16inQueueHeadFloat,280,32
	.local	_ZL16inQueuePtr1Float
	.comm	_ZL16inQueuePtr1Float,560,32
	.local	_ZL16inQueueSizeFloat
	.comm	_ZL16inQueueSizeFloat,280,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1593835520
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#define MAX_NUM_BLOCKS_FLOAT	70
//#include "global_sync.cu"

#define WARP_SIZE_FLOAT 	32
#define NUM_THREADS_FLOAT	512
#define NUM_WARPS_FLOAT (NUM_THREADS_FLOAT / WARP_SIZE_FLOAT)
#define LOG_NUM_THREADS_FLOAT 9
#define LOG_NUM_WARPS_FLOAT (LOG_NUM_THREADS_FLOAT - 5)

#define SCAN_STRIDE_FLOAT (WARP_SIZE_FLOAT + WARP_SIZE_FLOAT / 2 + 1)

__device__ volatile int inQueueSizeFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int *inQueuePtr1Float[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int inQueueHeadFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int outQueueMaxSizeFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int outQueueHeadFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int *outQueuePtr2Float[MAX_NUM_BLOCKS_FLOAT];

__device__ volatile int *curInQueueFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int *curOutQueueFloat[MAX_NUM_BLOCKS_FLOAT];
__device__ volatile int execution_code_float;


// This variables are used for debugging purposes only
__device__ volatile int totalInserts_float[MAX_NUM_BLOCKS_FLOAT];


// Utils...
// http://www.moderngpu.com/intro/scan.html
__device__ void scan_float(const int* values, int* exclusive) {

	// Reserve a half warp of extra space plus one per warp in the block.
	// This is exactly enough space to avoid comparisons in the multiscan
	// and to avoid bank conflicts.
	__shared__ volatile int scan[NUM_WARPS_FLOAT * SCAN_STRIDE_FLOAT];
	int tid = threadIdx.x;
	int warp = tid / WARP_SIZE_FLOAT;
	int lane = (WARP_SIZE_FLOAT - 1) & tid;

	volatile int* s = scan + SCAN_STRIDE_FLOAT * warp + lane + WARP_SIZE_FLOAT / 2;
	s[-16] = 0;

	// Read from global memory.
	int x = values[tid];
	s[0] = x;

	// Run inclusive scan on each warp's data.
	int sum = x;    

#pragma unroll
	for(int i = 0; i < 5; ++i) {
		int offset = 1<< i;
		sum += s[-offset];
		s[0] = sum;
	}

	// Synchronize to make all the totals available to the reduction code.
	__syncthreads();
	__shared__ volatile int totals[NUM_WARPS_FLOAT + NUM_WARPS_FLOAT / 2];
	if(tid < NUM_WARPS_FLOAT) {
		// Grab the block total for the tid'th block. This is the last element
		// in the block's scanned sequence. This operation avoids bank 
		// conflicts.
		int total = scan[SCAN_STRIDE_FLOAT * tid + WARP_SIZE_FLOAT / 2 + WARP_SIZE_FLOAT - 1];

		totals[tid] = 0;
		volatile int* s2 = totals + NUM_WARPS_FLOAT / 2 + tid;
		int totalsSum = total;
		s2[0] = total;

#pragma unroll
		for(int i = 0; i < LOG_NUM_WARPS_FLOAT; ++i) {
			int offset = 1<< i;
			totalsSum += s2[-offset];
			s2[0] = totalsSum;  
		}

		// Subtract total from totalsSum for an exclusive scan.
		totals[tid] = totalsSum - total;
	}

	// Synchronize to make the block scan available to all warps.
	__syncthreads();

	// Add the block scan to the inclusive sum for the block.
	sum += totals[warp];

	// Write the inclusive and exclusive scans to global memory.
//	inclusive[tid] = sum;
	exclusive[tid] = sum - x;
}

__device__ int queueElementFloat(int *outQueueCurPtr, int *elements){
	int queue_index = atomicAdd((int*)&outQueueHeadFloat[blockIdx.x], 1);
	if(queue_index < outQueueMaxSizeFloat[blockIdx.x]){
		curOutQueueFloat[blockIdx.x][queue_index] = elements[0];
	}else{
		queue_index = -1;
	}
	return queue_index;
}


// Assuming that all threads in a block are calling this function
__device__ int queueElementFloat(int *elements){
	int queue_index = -1;
#ifdef	PREFIX_SUM
	__shared__ int writeAddr[NUM_THREADS_FLOAT];
	__shared__ int exclusiveScan[NUM_THREADS_FLOAT];
	__shared__ int global_queue_index;

	if(threadIdx.x == 0){
		global_queue_index = outQueueHeadFloat[blockIdx.x];
	}

	// set to the number of values this threard is writing
	writeAddr[threadIdx.x] = elements[0];

	// run a prefix-sum on threads inserting data to the queue
	scan_float(writeAddr, exclusiveScan);

	// calculate index into the queue where given thread is writing
	queue_index = global_queue_index+exclusiveScan[threadIdx.x];

	// write elemets sequentially to shared memory
//	int localIndex = exclusiveScan[threadIdx.x];
//	for(int i = 0; i < elements[0]; i++){
//		localElements[localIndex+i] = elements[i+1];
//	}

//	__syncthreads();
//	for(int i = threadIdx.x; i < exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1]; i+=blockDim.x){
//		curOutQueueFloat[blockIdx.x][global_queue_index+i] = localElements[i];
//	}

	for(int i = 0; i < elements[0]; i++){
		// If the queue storage has been exceed, than set the execution code to 1. 
		// This will force a second round in the morphological reconstructio.	
		if(queue_index+i >= outQueueMaxSizeFloat[blockIdx.x]){
//			printf("List out of bounds\n");
			execution_code_float=1;
		}else{
			curOutQueueFloat[blockIdx.x][queue_index+i] = elements[i+1];
		}
	}

	// thread 0 updates head of the queue
	if(threadIdx.x == 0){
		outQueueHeadFloat[blockIdx.x]+=exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1];
		if(outQueueHeadFloat[blockIdx.x] >= outQueueMaxSizeFloat[blockIdx.x]){
			outQueueHeadFloat[blockIdx.x] = outQueueMaxSizeFloat[blockIdx.x];
		}
//		printf("Inserting = %d - outQueueHeadFloat = %d\n", exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1], outQueueHeadFloat[blockIdx.x]);
	}
#else
	if(elements[0] != 0){
		queue_index = atomicAdd((int*)&outQueueHeadFloat[blockIdx.x], elements[0]);
		if(queue_index < outQueueMaxSizeFloat[blockIdx.x]){
			for(int i = 0; i < elements[0];i++){
				curOutQueueFloat[blockIdx.x][queue_index+i] = elements[i+1];
			}
		}else{
			queue_index = -1;
		}
	}
#endif
	return queue_index;
}


// Assuming that all threads in a block are calling this function
__device__ int queueElementFloat(int element){
	int queue_index = -1;
#ifdef	PREFIX_SUM
	__shared__ int writeAddr[NUM_THREADS_FLOAT];
	__shared__ int exclusiveScan[NUM_THREADS_FLOAT];
	__shared__ int global_queue_index;

	if(threadIdx.x == 0){
		global_queue_index = outQueueHeadFloat[blockIdx.x];
	}

	// set to 1 threards that are writing
	writeAddr[threadIdx.x] = ((element) != (-1) ? (1):(0));

	// run a prefix-sum on threads inserting data to the queue
	scan_float(writeAddr, exclusiveScan);

	// calculate index into the queue where give thread is writing
	queue_index = global_queue_index+exclusiveScan[threadIdx.x];

	// If there is data to be queued, do it
	if(element != -1){
		curOutQueueFloat[blockIdx.x][queue_index] = element;
	}

	// thread 0 updates head of the queue
	if(threadIdx.x == 0){
		outQueueHeadFloat[blockIdx.x]+=exclusiveScan[NUM_THREADS_FLOAT-1]+writeAddr[NUM_THREADS_FLOAT-1];
	}
#else
	if(element != -1){
		queue_index = atomicAdd((int*)&outQueueHeadFloat[blockIdx.x], 1);
		if(queue_index < outQueueMaxSizeFloat[blockIdx.x]){
			curOutQueueFloat[blockIdx.x][queue_index] = element;
		}else{
			queue_index = -1;
		}
	}
#endif
	return queue_index;
}

// Makes queue 1 point to queue 2, and vice-versa
__device__ void swapQueusFloat(int loopIt){
	__syncthreads();

	if(loopIt %2 == 0){
		curInQueueFloat[blockIdx.x] = outQueuePtr2Float[blockIdx.x];
		curOutQueueFloat[blockIdx.x] = inQueuePtr1Float[blockIdx.x];
		if(threadIdx.x == 0){
			inQueueSizeFloat[blockIdx.x] = outQueueHeadFloat[blockIdx.x];
			outQueueHeadFloat[blockIdx.x] = 0;
			inQueueHeadFloat[blockIdx.x] = 0;
			// This is used for profiling only
			totalInserts_float[blockIdx.x]+=inQueueSizeFloat[blockIdx.x];
		}
	}else{
		curInQueueFloat[blockIdx.x] = inQueuePtr1Float[blockIdx.x];
		curOutQueueFloat[blockIdx.x] = outQueuePtr2Float[blockIdx.x];

		if(threadIdx.x == 0){
			inQueueSizeFloat[blockIdx.x] = outQueueHeadFloat[blockIdx.x];
			outQueueHeadFloat[blockIdx.x] = 0;
			inQueueHeadFloat[blockIdx.x] = 0;
			// This is used for profiling only
			totalInserts_float[blockIdx.x]+=inQueueSizeFloat[blockIdx.x];
		}
	}
	__syncthreads();
}



// -2, nothing else to be done at all
__device__ int dequeueElementFloat(int *loopIt){
	// did this block got something to do?
	__shared__ volatile int gotWork;

getWork:
	gotWork = 0;


	// Try to get some work.
//	int queue_index = atomicAdd((int*)&inQueueHeadFloat, 1);
	int queue_index = inQueueHeadFloat[blockIdx.x] + threadIdx.x;
	// I must guarantee that idle threads are set to 0, and no other thread 
	// will come later and set it to 0 again
	__syncthreads();

	if(threadIdx.x == 0){
		inQueueHeadFloat[blockIdx.x]+=blockDim.x;
//		if(loopIt[0] < 1){
//			printf("inQueueSizeFloat = %d loopIt[0] = %d queue_index = %d outQueueHeadFloat = %d\n", inQueueSizeFloat[blockIdx.x], loopIt[0], queue_index, outQueueHeadFloat[blockIdx.x]);
//		}
	}

	// Nothing to do by default
	int element = -1;
	if(queue_index < inQueueSizeFloat[blockIdx.x]){
		element = curInQueueFloat[blockIdx.x][queue_index];
		gotWork = 1;
	}
	__syncthreads();


	// This block does not have anything to process
	if(!gotWork){
//		if(loopIt[0] < 20 && threadIdx.x == 0)
//			printf("inQueueSizeFloat = %d loopIt[0] = %d\n", inQueueSizeFloat[blockIdx.x], loopIt[0]);
		element = -2;
		if(outQueueHeadFloat[blockIdx.x] != 0){
			swapQueusFloat(loopIt[0]);
			loopIt[0]++;
			goto getWork;
		}
	}
	return element;
}

__global__ void initQueueIdFloat(int *inQueueData, int dataElements, int *outQueueData, int outMaxSize, int qId){
	if(threadIdx.x < 1){
		// Simply assign input data pointers/number of elements to the queue
		inQueuePtr1Float[qId] = inQueueData;

//		printf("initQueueVector: tid - %d dataElements = %d pointer = %p\n", threadIdx.x, dataElements, inQueueData);
		inQueueSizeFloat[qId] = dataElements;

		totalInserts_float[qId] = 0;
		
		// alloc second vector used to queue output elements
		outQueuePtr2Float[qId] = outQueueData;

		// Maximum number of elements that fit into the queue
		outQueueMaxSizeFloat[qId] = outMaxSize;

		// Head of the out queue
		outQueueHeadFloat[qId] = 0;

		// Head of the in queue
		inQueueHeadFloat[qId] = 0;

		execution_code_float=0;
	}
}



// Returns what should be queued
__device__ int propagateFloat(int *seeds, int *image, int x, int y, int ncols, int pval){
	int returnValue = -1;
	int index = y*ncols + x;
	int seedXYval = seeds[index];
	int imageXYval = image[index];

	if((seedXYval < pval) && (imageXYval != seedXYval)){
//		printf("propagation pval=%d", pval);
		int newValue = min(pval, imageXYval);
		//  this should be a max atomic...
		atomicMax(&(seeds[index]), newValue);
		returnValue = index;
	}
	return returnValue;
}


__global__ void morphReconKernelSpeedupFloat(int* d_Result, int *d_Seeds, int*d_Image, int ncols, int nrows, int connectivity=4){
	curInQueueFloat[blockIdx.x] = inQueuePtr1Float[blockIdx.x];
	curOutQueueFloat[blockIdx.x] = outQueuePtr2Float[blockIdx.x];
	int *seeds = d_Seeds;
	int *image = d_Image;

	int loopIt = 0;
	int workUnit = -1;
	int tid = threadIdx.x;
	__shared__ int localQueue[NUM_THREADS_FLOAT][9];

	__syncthreads();
	do{
		int x, y;

		localQueue[tid][0] = 0;
		
		// Try to get some work.
		workUnit = dequeueElementFloat(&loopIt);
		y = workUnit/ncols;
		x = workUnit%ncols;	

		int pval = 0;
		if(workUnit >= 0){
			pval = seeds[workUnit];

		}

		int retWork = -1;
		if(workUnit >= 0 && y > 0){
			retWork = propagateFloat((int*)seeds, image, x, y-1, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
//		queueElementFloat(retWork);
		if(workUnit >= 0 && y < nrows-1){
			retWork = propagateFloat((int*)seeds, image, x, y+1, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
//		queueElementFloat(retWork);

		if(workUnit >= 0 && x > 0){
			retWork = propagateFloat((int*)seeds, image, x-1, y, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
//		queueElementFloat(retWork);

		if(workUnit >= 0 && x < ncols-1){
			retWork = propagateFloat((int*)seeds, image, x+1, y, ncols, pval);
			if(retWork > 0){
				localQueue[tid][0]++;
				localQueue[tid][localQueue[tid][0]] = retWork;
			}
		}
		// if connectivity is 8, four other neighbors have to be verified
		if(connectivity == 8){
			if(workUnit >= 0 && y > 0 && x >0){
				retWork = propagateFloat((int*)seeds, image, x-1, y-1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}
			if(workUnit >= 0 && y > 0 && x < ncols-1){
				retWork = propagateFloat((int*)seeds, image, x+1, y-1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}
			if(workUnit >= 0 && y < (nrows-1) && x >0){
				retWork = propagateFloat((int*)seeds, image, x-1, y+1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}
			if(workUnit >= 0 && y < (nrows-1) && x <(ncols-1)){
				retWork = propagateFloat((int*)seeds, image, x+1, y+1, ncols, pval);
				if(retWork > 0){
					localQueue[tid][0]++;
					localQueue[tid][localQueue[tid][0]] = retWork;
				}
			}

		}
//		queueElementFloat(retWork);
		queueElementFloat(localQueue[tid]);

	}while(workUnit != -2);

	d_Result[blockIdx.x]=totalInserts_float[blockIdx.x];
	if(execution_code_float!=0){
		d_Result[gridDim.x]=1;
	}

}



extern "C" int morphReconSpeedupFloat( int *g_InputListPtr, int h_ListSize, int *g_Seed, int *g_Image, int h_ncols, int h_nrows, int connectivity, int nBlocks, float queue_increase_factor){
	int *d_Result;

	// alloc space to save output elements in the queue for each block
	int **h_OutQueuePtr = (int **)malloc(sizeof(int*) * nBlocks);

	// at this moment I should partition the INPUT queue
	int tempNblocks = nBlocks;

	int subListsInit[tempNblocks];
	int subListsSize[tempNblocks];

	for(int i = 0; i < tempNblocks; i++){
		int curSubListInit = (h_ListSize/tempNblocks)*i;
		int curSubListEnd = ((i+1<tempNblocks)?((i+1)*(h_ListSize/tempNblocks)-1):(h_ListSize-1));
	//	printf("BlockId = %d - init = %d end = %d size=%d\n", i, curSubListInit, curSubListEnd, curSubListEnd-curSubListInit+1);
		subListsInit[i] = curSubListInit;
//		subListsEnd[i] = curSubListEnd;
		subListsSize[i]	= curSubListEnd-curSubListInit+1;
	}

// Adding code
	// TODO: free data
	int *blockSubLists[tempNblocks];
	for(int i = 0; i < tempNblocks; i++){
		hipMalloc((void **)&blockSubLists[i], sizeof(int)*(subListsSize[i]) * queue_increase_factor);
		hipMemcpy(blockSubLists[i], &g_InputListPtr[subListsInit[i]], subListsSize[i] * sizeof(int), hipMemcpyDeviceToDevice);
	}


// End adding code

//	printf("h_listSize = %d subListsSize[0]=%d\n", h_ListSize, subListsSize[0]);
//	cout << "h_listSize = "<< h_ListSize<< " subListsSize[0]="<< subListsSize[0] <<endl;
	
	for(int i = 0; i < tempNblocks;i++){
		hipMalloc((void **)&h_OutQueuePtr[i], sizeof(int) * (subListsSize[i]) * queue_increase_factor);
	}
	
	// Init queue for each image. yes, this may not be the most efficient way, but the code is far easier to read. 
	// Another version, where all pointer are copied at once to the GPU was also built, buit it was only about 1ms 
	// faster. Thus, we decide to go with this version 
	for(int i = 0; i < nBlocks;i++)
		initQueueIdFloat<<<1, 1>>>(blockSubLists[i], subListsSize[i], h_OutQueuePtr[i], (subListsSize[i]) *queue_increase_factor, i);

	// This is used by each block to store the number of queue operations performed
	hipMalloc((void **)&d_Result, sizeof(int)*(nBlocks+1)) ;
	hipMemset((void *)d_Result, 0, sizeof(int)*(nBlocks+1));


//	printf("Run computation kernel!\n");
	morphReconKernelSpeedupFloat<<<nBlocks, NUM_THREADS_FLOAT>>>(d_Result, g_Seed, g_Image, h_ncols, h_nrows, connectivity);

	if(hipGetLastError() != hipSuccess){
		hipError_t errorCode = hipGetLastError();
		const char *error = hipGetErrorString(errorCode);
		printf("Error after morphRecon = %s\n", error);
	}

	int *h_Result = (int *) malloc(sizeof(int) * (nBlocks+1));
	hipMemcpy(h_Result, d_Result, sizeof(int) * (nBlocks+1), hipMemcpyDeviceToHost);

	int resutRet = h_Result[nBlocks];
	free(h_Result);

	hipFree(d_Result);
	for(int i = 0; i < nBlocks; i++){
		hipFree(h_OutQueuePtr[i]);
	}
	free(h_OutQueuePtr);
	hipFree(g_InputListPtr);

	return resutRet;
}




	.text
	.file	"global_queue_float.hip"
	.globl	_Z31__device_stub__initQueueIdFloatPiiS_ii # -- Begin function _Z31__device_stub__initQueueIdFloatPiiS_ii
	.type	_Z31__device_stub__initQueueIdFloatPiiS_ii,@function
_Z31__device_stub__initQueueIdFloatPiiS_ii: # @_Z31__device_stub__initQueueIdFloatPiiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16initQueueIdFloatPiiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__initQueueIdFloatPiiS_ii, .Lfunc_end0-_Z31__device_stub__initQueueIdFloatPiiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii # -- Begin function _Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii
	.type	_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii,@function
_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii: # @_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z28morphReconKernelSpeedupFloatPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii, .Lfunc_end1-_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function morphReconSpeedupFloat
.LCPI2_0:
	.long	0x5f000000                      # float 9.22337203E+18
	.text
	.globl	morphReconSpeedupFloat
	.type	morphReconSpeedupFloat,@function
morphReconSpeedupFloat:                 # @morphReconSpeedupFloat
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movss	%xmm0, -44(%rbp)                # 4-byte Spill
	movl	%r9d, -72(%rbp)                 # 4-byte Spill
	movl	%r8d, -68(%rbp)                 # 4-byte Spill
	movq	%rcx, -128(%rbp)                # 8-byte Spill
	movq	%rdx, -120(%rbp)                # 8-byte Spill
	movl	%esi, %r13d
	movq	%rdi, -112(%rbp)                # 8-byte Spill
	movslq	24(%rbp), %rbx
	leaq	(,%rbx,8), %rdi
	callq	malloc
	movq	%rax, -96(%rbp)                 # 8-byte Spill
	movq	%rsp, -136(%rbp)                # 8-byte Spill
	movl	%ebx, %r12d
	movq	%rsp, %r14
	leaq	15(,%r12,4), %rax
	andq	$-16, %rax
	subq	%rax, %r14
	movq	%r14, %rsp
	movq	%rsp, %rcx
	subq	%rax, %rcx
	movq	%rcx, -56(%rbp)                 # 8-byte Spill
	movq	%rcx, %rsp
	movabsq	$4294967297, %r15               # imm = 0x100000001
	testq	%rbx, %rbx
	movq	%r12, -88(%rbp)                 # 8-byte Spill
	jle	.LBB2_18
# %bb.1:                                # %.lr.ph
	movl	%r13d, %eax
	cltd
	idivl	%ebx
                                        # kill: def $eax killed $eax def $rax
	movq	%r12, %rcx
	negq	%rcx
	xorl	%edx, %edx
	movl	$1, %esi
	xorl	%edi, %edi
	movq	-56(%rbp), %r10                 # 8-byte Reload
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	leal	(%rax,%rdi), %r8d
	cmpq	%rbx, %rsi
	movl	%r13d, %r9d
	cmovll	%r8d, %r9d
	movl	%edi, -4(%r14,%rsi,4)
	addl	%edx, %r9d
	movl	%r9d, -4(%r10,%rsi,4)
	subl	%eax, %edx
	leaq	(%rcx,%rsi), %r9
	incq	%r9
	incq	%rsi
	movl	%r8d, %edi
	cmpq	$1, %r9
	jne	.LBB2_2
# %bb.3:                                # %._crit_edge
	movq	%rsp, %rcx
	leaq	15(,%r12,8), %rax
	andq	$-16, %rax
	subq	%rax, %rcx
	movq	%rcx, -104(%rbp)                # 8-byte Spill
	movq	%rcx, %rsp
	testl	%ebx, %ebx
	jle	.LBB2_18
# %bb.4:
	movq	%rbx, -80(%rbp)                 # 8-byte Spill
	movq	%r12, %rbx
	movq	-104(%rbp), %r13                # 8-byte Reload
	movq	-56(%rbp), %r12                 # 8-byte Reload
.LBB2_5:                                # %.lr.ph100
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%r12), %r15
	shlq	$2, %r15
	testq	%r15, %r15
	js	.LBB2_6
# %bb.11:                               # %.lr.ph100
                                        #   in Loop: Header=BB2_5 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r15, %xmm0
	jmp	.LBB2_12
.LBB2_6:                                #   in Loop: Header=BB2_5 Depth=1
	movq	%r15, %rax
	shrq	%rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB2_12:                               # %.lr.ph100
                                        #   in Loop: Header=BB2_5 Depth=1
	mulss	-44(%rbp), %xmm0                # 4-byte Folded Reload
	cvttss2si	%xmm0, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subss	.LCPI2_0(%rip), %xmm0
	cvttss2si	%xmm0, %rsi
	andq	%rcx, %rsi
	orq	%rax, %rsi
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movslq	(%r14), %rax
	movq	-112(%rbp), %rcx                # 8-byte Reload
	leaq	(%rcx,%rax,4), %rsi
	movq	%r15, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	addq	$4, %r14
	addq	$4, %r12
	addq	$8, %r13
	decq	%rbx
	jne	.LBB2_5
# %bb.7:                                # %.preheader96
	movq	-80(%rbp), %rbx                 # 8-byte Reload
	testl	%ebx, %ebx
	movq	-96(%rbp), %r14                 # 8-byte Reload
	movq	-88(%rbp), %r12                 # 8-byte Reload
	movabsq	$4294967297, %r15               # imm = 0x100000001
	jle	.LBB2_18
# %bb.8:                                # %.lr.ph102.preheader
	xorl	%ebx, %ebx
	movq	%r14, %r13
.LBB2_9:                                # %.lr.ph102
                                        # =>This Inner Loop Header: Depth=1
	movq	-56(%rbp), %rax                 # 8-byte Reload
	movslq	(%rax,%rbx,4), %rax
	shlq	$2, %rax
	testq	%rax, %rax
	js	.LBB2_10
# %bb.26:                               # %.lr.ph102
                                        #   in Loop: Header=BB2_9 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	jmp	.LBB2_27
.LBB2_10:                               #   in Loop: Header=BB2_9 Depth=1
	shrq	%rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB2_27:                               # %.lr.ph102
                                        #   in Loop: Header=BB2_9 Depth=1
	mulss	-44(%rbp), %xmm0                # 4-byte Folded Reload
	cvttss2si	%xmm0, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subss	.LCPI2_0(%rip), %xmm0
	cvttss2si	%xmm0, %rsi
	andq	%rcx, %rsi
	orq	%rax, %rsi
	movq	%r13, %rdi
	callq	hipMalloc
	incq	%rbx
	addq	$8, %r13
	cmpq	%rbx, %r12
	jne	.LBB2_9
# %bb.13:                               # %.preheader
	movq	-80(%rbp), %rbx                 # 8-byte Reload
	testl	%ebx, %ebx
	jle	.LBB2_18
# %bb.14:                               # %.lr.ph104.preheader
	xorl	%r13d, %r13d
.LBB2_15:                               # %.lr.ph104
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_17
# %bb.16:                               #   in Loop: Header=BB2_15 Depth=1
	movq	-104(%rbp), %rax                # 8-byte Reload
	movq	(%rax,%r13,8), %rdi
	movq	-56(%rbp), %rax                 # 8-byte Reload
	movl	(%rax,%r13,4), %esi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movq	(%r14,%r13,8), %rdx
	mulss	-44(%rbp), %xmm0                # 4-byte Folded Reload
	cvttss2si	%xmm0, %ecx
	movl	%r13d, %r8d
	callq	_Z31__device_stub__initQueueIdFloatPiiS_ii
.LBB2_17:                               #   in Loop: Header=BB2_15 Depth=1
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB2_15
.LBB2_18:                               # %._crit_edge105
	movslq	%ebx, %rax
	leaq	4(,%rax,4), %r13
	movq	%r15, %r14
	leaq	-64(%rbp), %r15
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	hipMemset
	leaq	(%r14,%r12), %rdi
	decq	%rdi
	addq	$511, %r14                      # imm = 0x1FF
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.19:
	movl	16(%rbp), %r9d
	movq	-64(%rbp), %rdi
	movq	-120(%rbp), %rsi                # 8-byte Reload
	movq	-128(%rbp), %rdx                # 8-byte Reload
	movl	-68(%rbp), %ecx                 # 4-byte Reload
	movl	-72(%rbp), %r8d                 # 4-byte Reload
	callq	_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii
.LBB2_20:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_22
# %bb.21:
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_22:
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	-64(%rbp), %rsi
	movq	%rax, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%r12,%rbx,4), %r15d
	movq	%r12, %rdi
	callq	free
	movq	-64(%rbp), %rdi
	callq	hipFree
	testl	%ebx, %ebx
	movq	-96(%rbp), %r14                 # 8-byte Reload
	movq	-88(%rbp), %r12                 # 8-byte Reload
	jle	.LBB2_25
# %bb.23:                               # %.lr.ph108.preheader
	xorl	%ebx, %ebx
.LBB2_24:                               # %.lr.ph108
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r14,%rbx,8), %rdi
	callq	hipFree
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB2_24
.LBB2_25:                               # %._crit_edge109
	movq	%r14, %rdi
	callq	free
	movq	-112(%rbp), %rdi                # 8-byte Reload
	callq	hipFree
	movq	-136(%rbp), %rsp                # 8-byte Reload
	movl	%r15d, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end2:
	.size	morphReconSpeedupFloat, .Lfunc_end2-morphReconSpeedupFloat
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16initQueueIdFloatPiiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z28morphReconKernelSpeedupFloatPiS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$inQueueSizeFloat, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$inQueuePtr1Float, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$560, %r9d                      # imm = 0x230
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$inQueueHeadFloat, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$outQueueMaxSizeFloat, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$outQueueHeadFloat, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$outQueuePtr2Float, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$560, %r9d                      # imm = 0x230
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$curInQueueFloat, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$560, %r9d                      # imm = 0x230
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$curOutQueueFloat, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movl	$560, %r9d                      # imm = 0x230
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$execution_code_float, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$totalInserts_float, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	inQueueSizeFloat,@object        # @inQueueSizeFloat
	.local	inQueueSizeFloat
	.comm	inQueueSizeFloat,280,16
	.type	inQueuePtr1Float,@object        # @inQueuePtr1Float
	.local	inQueuePtr1Float
	.comm	inQueuePtr1Float,560,16
	.type	inQueueHeadFloat,@object        # @inQueueHeadFloat
	.local	inQueueHeadFloat
	.comm	inQueueHeadFloat,280,16
	.type	outQueueMaxSizeFloat,@object    # @outQueueMaxSizeFloat
	.local	outQueueMaxSizeFloat
	.comm	outQueueMaxSizeFloat,280,16
	.type	outQueueHeadFloat,@object       # @outQueueHeadFloat
	.local	outQueueHeadFloat
	.comm	outQueueHeadFloat,280,16
	.type	outQueuePtr2Float,@object       # @outQueuePtr2Float
	.local	outQueuePtr2Float
	.comm	outQueuePtr2Float,560,16
	.type	curInQueueFloat,@object         # @curInQueueFloat
	.local	curInQueueFloat
	.comm	curInQueueFloat,560,16
	.type	curOutQueueFloat,@object        # @curOutQueueFloat
	.local	curOutQueueFloat
	.comm	curOutQueueFloat,560,16
	.type	execution_code_float,@object    # @execution_code_float
	.local	execution_code_float
	.comm	execution_code_float,4,4
	.type	totalInserts_float,@object      # @totalInserts_float
	.local	totalInserts_float
	.comm	totalInserts_float,280,16
	.type	_Z16initQueueIdFloatPiiS_ii,@object # @_Z16initQueueIdFloatPiiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z16initQueueIdFloatPiiS_ii
	.p2align	3, 0x0
_Z16initQueueIdFloatPiiS_ii:
	.quad	_Z31__device_stub__initQueueIdFloatPiiS_ii
	.size	_Z16initQueueIdFloatPiiS_ii, 8

	.type	_Z28morphReconKernelSpeedupFloatPiS_S_iii,@object # @_Z28morphReconKernelSpeedupFloatPiS_S_iii
	.globl	_Z28morphReconKernelSpeedupFloatPiS_S_iii
	.p2align	3, 0x0
_Z28morphReconKernelSpeedupFloatPiS_S_iii:
	.quad	_Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii
	.size	_Z28morphReconKernelSpeedupFloatPiS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error after morphRecon = %s\n"
	.size	.L.str, 29

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16initQueueIdFloatPiiS_ii"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z28morphReconKernelSpeedupFloatPiS_S_iii"
	.size	.L__unnamed_2, 42

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"inQueueSizeFloat"
	.size	.L__unnamed_3, 17

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"inQueuePtr1Float"
	.size	.L__unnamed_4, 17

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"inQueueHeadFloat"
	.size	.L__unnamed_5, 17

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"outQueueMaxSizeFloat"
	.size	.L__unnamed_6, 21

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"outQueueHeadFloat"
	.size	.L__unnamed_7, 18

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"outQueuePtr2Float"
	.size	.L__unnamed_8, 18

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"curInQueueFloat"
	.size	.L__unnamed_9, 16

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"curOutQueueFloat"
	.size	.L__unnamed_10, 17

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"execution_code_float"
	.size	.L__unnamed_11, 21

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"totalInserts_float"
	.size	.L__unnamed_12, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__initQueueIdFloatPiiS_ii
	.addrsig_sym _Z43__device_stub__morphReconKernelSpeedupFloatPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym inQueueSizeFloat
	.addrsig_sym inQueuePtr1Float
	.addrsig_sym inQueueHeadFloat
	.addrsig_sym outQueueMaxSizeFloat
	.addrsig_sym outQueueHeadFloat
	.addrsig_sym outQueuePtr2Float
	.addrsig_sym curInQueueFloat
	.addrsig_sym curOutQueueFloat
	.addrsig_sym execution_code_float
	.addrsig_sym totalInserts_float
	.addrsig_sym _Z16initQueueIdFloatPiiS_ii
	.addrsig_sym _Z28morphReconKernelSpeedupFloatPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16initQueueIdFloatPiiS_ii ; -- Begin function _Z16initQueueIdFloatPiiS_ii
	.globl	_Z16initQueueIdFloatPiiS_ii
	.p2align	8
	.type	_Z16initQueueIdFloatPiiS_ii,@function
_Z16initQueueIdFloatPiiS_ii:            ; @_Z16initQueueIdFloatPiiS_ii
; %bb.0:
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x10
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, inQueuePtr1Float@rel32@lo+4
	s_addc_u32 s3, s3, inQueuePtr1Float@rel32@hi+12
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s9, s7, 31
	s_mov_b32 s8, s7
	s_clause 0x1
	s_load_b64 s[16:17], s[0:1], 0x0
	s_load_b32 s7, s[0:1], 0x8
	s_lshl_b64 s[10:11], s[8:9], 3
	v_mov_b32_e32 v10, 0
	s_add_u32 s2, s10, s2
	s_addc_u32 s3, s11, s3
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, inQueueSizeFloat@rel32@lo+4
	s_addc_u32 s13, s13, inQueueSizeFloat@rel32@hi+12
	s_lshl_b64 s[8:9], s[8:9], 2
	v_mov_b32_e32 v7, s5
	s_add_u32 s12, s8, s12
	s_addc_u32 s13, s9, s13
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, totalInserts_float@rel32@lo+4
	s_addc_u32 s15, s15, totalInserts_float@rel32@hi+12
	s_add_u32 s0, s8, s14
	s_addc_u32 s1, s9, s15
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, outQueuePtr2Float@rel32@lo+4
	s_addc_u32 s15, s15, outQueuePtr2Float@rel32@hi+12
	s_add_u32 s10, s10, s14
	s_addc_u32 s11, s11, s15
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, outQueueMaxSizeFloat@rel32@lo+4
	s_addc_u32 s15, s15, outQueueMaxSizeFloat@rel32@hi+12
	s_add_u32 s14, s8, s14
	s_addc_u32 s15, s9, s15
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, s16 :: v_dual_mov_b32 v1, s17
	v_mov_b32_e32 v2, s12
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, outQueueHeadFloat@rel32@lo+4
	s_addc_u32 s19, s19, outQueueHeadFloat@rel32@hi+12
	v_dual_mov_b32 v8, s7 :: v_dual_mov_b32 v5, s1
	v_dual_mov_b32 v3, s13 :: v_dual_mov_b32 v4, s0
	s_add_u32 s0, s8, s18
	s_addc_u32 s1, s9, s19
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, inQueueHeadFloat@rel32@lo+4
	s_addc_u32 s13, s13, inQueueHeadFloat@rel32@hi+12
	global_store_b64 v10, v[0:1], s[2:3]
	flat_store_b32 v[2:3], v8 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[4:5], v10 dlc
	s_waitcnt_vscnt null, 0x0
	s_add_u32 s2, s8, s12
	v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v11, s6
	s_addc_u32 s3, s9, s13
	v_dual_mov_b32 v0, s14 :: v_dual_mov_b32 v3, s1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, execution_code_float@rel32@lo+4
	s_addc_u32 s5, s5, execution_code_float@rel32@hi+12
	v_dual_mov_b32 v1, s15 :: v_dual_mov_b32 v2, s0
	v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v4, s2
	v_dual_mov_b32 v9, s5 :: v_dual_mov_b32 v8, s4
	global_store_b64 v10, v[6:7], s[10:11]
	flat_store_b32 v[0:1], v11 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[2:3], v10 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[4:5], v10 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[8:9], v10 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_2:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16initQueueIdFloatPiiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 20
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16initQueueIdFloatPiiS_ii, .Lfunc_end0-_Z16initQueueIdFloatPiiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 448
; NumSgprs: 20
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z28morphReconKernelSpeedupFloatPiS_S_iii ; -- Begin function _Z28morphReconKernelSpeedupFloatPiS_S_iii
	.globl	_Z28morphReconKernelSpeedupFloatPiS_S_iii
	.p2align	8
	.type	_Z28morphReconKernelSpeedupFloatPiS_S_iii,@function
_Z28morphReconKernelSpeedupFloatPiS_S_iii: ; @_Z28morphReconKernelSpeedupFloatPiS_S_iii
; %bb.0:
	s_mov_b32 s6, s15
	s_mov_b32 s7, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, inQueuePtr1Float@rel32@lo+4
	s_addc_u32 s3, s3, inQueuePtr1Float@rel32@hi+12
	s_lshl_b64 s[4:5], s[6:7], 3
	s_load_b128 s[8:11], s[0:1], 0x18
	s_add_u32 s16, s4, s2
	s_addc_u32 s17, s5, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, curInQueueFloat@rel32@lo+4
	s_addc_u32 s3, s3, curInQueueFloat@rel32@hi+12
	s_add_u32 s18, s4, s2
	s_addc_u32 s19, s5, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, outQueuePtr2Float@rel32@lo+4
	s_addc_u32 s3, s3, outQueuePtr2Float@rel32@hi+12
	s_add_u32 s22, s4, s2
	s_addc_u32 s23, s5, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, curOutQueueFloat@rel32@lo+4
	s_addc_u32 s3, s3, curOutQueueFloat@rel32@hi+12
	s_add_u32 s24, s4, s2
	s_addc_u32 s25, s5, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, inQueueHeadFloat@rel32@lo+4
	s_addc_u32 s3, s3, inQueueHeadFloat@rel32@hi+12
	s_lshl_b64 s[26:27], s[6:7], 2
	s_load_b64 s[38:39], s[16:17], 0x0
	s_load_b64 s[40:41], s[22:23], 0x0
	s_add_u32 s2, s26, s2
	s_addc_u32 s3, s27, s3
	s_add_u32 s20, s0, 40
	s_addc_u32 s21, s1, 0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, inQueueSizeFloat@rel32@lo+4
	s_addc_u32 s5, s5, inQueueSizeFloat@rel32@hi+12
	s_add_u32 s4, s26, s4
	s_addc_u32 s5, s27, s5
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, outQueueHeadFloat@rel32@lo+4
	s_addc_u32 s13, s13, outQueueHeadFloat@rel32@hi+12
	s_add_u32 s30, s26, s12
	s_addc_u32 s31, s27, s13
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, totalInserts_float@rel32@lo+4
	s_addc_u32 s13, s13, totalInserts_float@rel32@hi+12
	s_add_u32 s28, s26, s12
	s_addc_u32 s29, s27, s13
	s_waitcnt lgkmcnt(0)
	s_add_i32 s6, s9, -1
	s_add_i32 s9, s8, -1
	s_cmp_eq_u32 s10, 8
	s_mov_b64 s[42:43], src_shared_base
	s_cselect_b32 s33, -1, 0
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, outQueueMaxSizeFloat@rel32@lo+4
	s_addc_u32 s11, s11, outQueueMaxSizeFloat@rel32@hi+12
	s_add_u32 s10, s26, s10
	s_addc_u32 s11, s27, s11
	s_ashr_i32 s36, s8, 31
	s_load_b64 s[34:35], s[0:1], 0x10
	s_add_i32 s12, s8, s36
	v_dual_mov_b32 v4, s43 :: v_dual_mov_b32 v9, s38
	s_xor_b32 s37, s12, s36
	s_load_b128 s[12:15], s[0:1], 0x0
	v_cvt_f32_u32_e32 v1, s37
	s_sub_i32 s1, 0, s37
	v_dual_mov_b32 v10, s39 :: v_dual_mov_b32 v15, s40
	v_mov_b32_e32 v16, s41
	s_delay_alu instid0(VALU_DEP_3)
	v_rcp_iflag_f32_e32 v1, v1
	v_mov_b32_e32 v2, 0
	v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v5, s2
	v_dual_mov_b32 v3, 0x4800 :: v_dual_mov_b32 v12, 1
	v_mul_u32_u24_e32 v13, 36, v0
	v_cmp_eq_u32_e64 s0, 0, v0
	v_mad_u32_u24 v14, v0, 36, 4
	s_delay_alu instid0(TRANS32_DEP_1)
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_clause 0x1
	global_store_b64 v2, v[9:10], s[18:19]
	global_store_b64 v2, v[15:16], s[24:25]
	v_mov_b32_e32 v16, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_add_u32 s38, s14, -4
	v_cvt_u32_f32_e32 v1, v1
	s_addc_u32 s39, s15, -1
	s_add_u32 s40, s34, -4
	s_addc_u32 s41, s35, -1
	s_add_u32 s42, s14, 4
	v_mul_lo_u32 v11, s1, v1
	s_addc_u32 s43, s15, 0
	s_add_u32 s44, s34, 4
	s_addc_u32 s45, s35, 0
	s_barrier
	buffer_gl0_inv
	v_mul_hi_u32 v9, v1, v11
	v_dual_mov_b32 v8, s5 :: v_dual_mov_b32 v7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v15, v1, v9
.LBB1_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_2 Depth 2
                                        ;     Child Loop BB1_64 Depth 2
                                        ;     Child Loop BB1_69 Depth 2
	s_mov_b32 s1, 0
	ds_store_b32 v13, v2
                                        ; implicit-def: $vgpr11
.LBB1_2:                                ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_store_b32 v[3:4], v2 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[5:6] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=2
	s_load_b32 s3, s[20:21], 0xc
	flat_load_b32 v9, v[5:6] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v9, s3, v9
	flat_store_b32 v[5:6], v9 dlc
	s_waitcnt_vscnt null, 0x0
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b32 v10, v[7:8] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, v1, v0
	v_mov_b32_e32 v1, -1
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e64 v9, v10
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=2
	global_load_b64 v[17:18], v2, s[18:19]
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v17, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v18, v10, vcc_lo
	flat_load_b32 v1, v[9:10] glc dlc
	s_waitcnt vmcnt(0)
	flat_store_b32 v[3:4], v12 dlc
	s_waitcnt_vscnt null, 0x0
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v9, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	s_mov_b32 s3, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v9
	s_cbranch_execz .LBB1_16
; %bb.7:                                ;   in Loop: Header=BB1_2 Depth=2
	v_dual_mov_b32 v9, s30 :: v_dual_mov_b32 v10, s31
	s_mov_b32 s4, 0
	flat_load_b32 v1, v[9:10] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v1
	v_mov_b32_e32 v1, -2
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_15
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=2
	v_and_b32_e32 v1, 1, v16
	s_mov_b32 s5, exec_lo
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 1, v1
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_2 Depth=2
	s_clause 0x1
	global_load_b64 v[9:10], v2, s[16:17]
	global_load_b64 v[17:18], v2, s[22:23]
	s_and_b32 s4, s0, exec_lo
	s_waitcnt vmcnt(1)
	global_store_b64 v2, v[9:10], s[18:19]
	s_waitcnt vmcnt(0)
	global_store_b64 v2, v[17:18], s[24:25]
.LBB1_10:                               ; %Flow272
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_2 Depth=2
	s_clause 0x1
	global_load_b64 v[9:10], v2, s[22:23]
	global_load_b64 v[17:18], v2, s[16:17]
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s46, s0, exec_lo
	s_waitcnt vmcnt(1)
	global_store_b64 v2, v[9:10], s[18:19]
	s_waitcnt vmcnt(0)
	global_store_b64 v2, v[17:18], s[24:25]
	s_or_b32 s4, s4, s46
.LBB1_12:                               ; %Flow273
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB1_14
; %bb.13:                               ; %.sink.split.i.i
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_dual_mov_b32 v9, s30 :: v_dual_mov_b32 v10, s31
	v_dual_mov_b32 v17, s28 :: v_dual_mov_b32 v18, s29
	flat_load_b32 v1, v[9:10] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[7:8], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[9:10], v2 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[5:6], v2 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[7:8] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v9, v[17:18] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v9, v1
	flat_store_b32 v[17:18], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB1_14:                               ; %_Z14swapQueusFloati.exit.i
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v1, v11 :: v_dual_add_nc_u32 v16, 1, v16
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB1_15:                               ; %Flow274
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s4, exec_lo
.LBB1_16:                               ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_xor_b32 s2, s3, -1
	v_mov_b32_e32 v11, v1
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s2, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_2
; %bb.17:                               ; %_Z19dequeueElementFloatPi.exit
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_i32_e64 s1, -1, v1
	v_mov_b32_e32 v17, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_19
; %bb.18:                               ;   in Loop: Header=BB1_1 Depth=1
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s14, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s15, v10, vcc_lo
	global_load_b32 v17, v[9:10], off
.LBB1_19:                               ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_ashrrev_i32_e32 v9, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, v1, v9
	v_xor_b32_e32 v10, v10, v9
	v_xor_b32_e32 v9, s36, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v10, v15
	v_mul_lo_u32 v18, v11, s37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v10, v10, v18
	v_add_nc_u32_e32 v18, 1, v11
	v_subrev_nc_u32_e32 v19, s37, v10
	v_cmp_le_u32_e32 vcc_lo, s37, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v11, v11, v18 :: v_dual_cndmask_b32 v10, v10, v19
	v_add_nc_u32_e32 v18, 1, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s37, v10
	v_cndmask_b32_e32 v10, v11, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v10, v10, v9
	v_sub_nc_u32_e32 v19, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v21, v19, s8
	v_cmp_lt_i32_e32 vcc_lo, 0, v19
	s_and_b32 s46, s1, vcc_lo
	v_sub_nc_u32_e32 v18, v1, v21
	s_and_saveexec_b32 s3, s46
	s_cbranch_execz .LBB1_24
; %bb.20:                               ;   in Loop: Header=BB1_1 Depth=1
	v_subrev_nc_u32_e32 v9, s8, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v9, v18
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[9:10]
	v_add_co_u32 v10, vcc_lo, s14, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s15, v23, vcc_lo
	v_add_co_u32 v22, vcc_lo, s34, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s35, v23, vcc_lo
	global_load_b32 v20, v[10:11], off
	global_load_b32 v22, v[22:23], off
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v20, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s2, v22, v20
	v_mov_b32_e32 v20, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, vcc_lo, s2
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB1_22
; %bb.21:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v20, v17, v22
	global_atomic_max_i32 v[10:11], v20, off
	v_mov_b32_e32 v20, v9
.LBB1_22:                               ; %_Z14propagateFloatPiS_iiii.exit
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v20
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_24
; %bb.23:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v20 offset:4
.LBB1_24:                               ; %Flow271
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_i32_e64 s2, s6, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s1, s2
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB1_29
; %bb.25:                               ;   in Loop: Header=BB1_1 Depth=1
	v_add3_u32 v9, v21, s8, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[22:23], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s14, v22
	v_add_co_ci_u32_e32 v11, vcc_lo, s15, v23, vcc_lo
	v_add_co_u32 v22, vcc_lo, s34, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s35, v23, vcc_lo
	global_load_b32 v20, v[10:11], off
	global_load_b32 v22, v[22:23], off
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v20, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s3, v22, v20
	v_mov_b32_e32 v20, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, vcc_lo, s3
	s_and_saveexec_b32 s3, s5
	s_cbranch_execz .LBB1_27
; %bb.26:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v20, v17, v22
	global_atomic_max_i32 v[10:11], v20, off
	v_mov_b32_e32 v20, v9
.LBB1_27:                               ; %_Z14propagateFloatPiS_iiii.exit173
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v20
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_29
; %bb.28:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v20 offset:4
.LBB1_29:                               ; %Flow269
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_cmp_lt_i32_e64 s3, 0, v18
	v_ashrrev_i32_e32 v11, 31, v21
	v_ashrrev_i32_e32 v20, 31, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s1, s3
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB1_34
; %bb.30:                               ;   in Loop: Header=BB1_1 Depth=1
	v_add_co_u32 v9, vcc_lo, v18, v21
	v_add_co_ci_u32_e32 v10, vcc_lo, v20, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s38, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s39, v23, vcc_lo
	v_add_co_u32 v22, vcc_lo, s40, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s41, v23, vcc_lo
	global_load_b32 v24, v[9:10], off
	global_load_b32 v23, v[22:23], off
	v_mov_b32_e32 v22, -1
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v24, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s4, v23, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s47, vcc_lo, s4
	s_and_saveexec_b32 s4, s47
	s_cbranch_execz .LBB1_32
; %bb.31:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v22, v17, v23
	global_atomic_max_i32 v[9:10], v22, off
	v_add3_u32 v22, v18, v21, -1
.LBB1_32:                               ; %_Z14propagateFloatPiS_iiii.exit177
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v22
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_34
; %bb.33:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v22 offset:4
.LBB1_34:                               ; %Flow267
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_cmp_gt_i32_e64 s4, s9, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s1, s4
	s_and_saveexec_b32 s47, s5
	s_cbranch_execz .LBB1_39
; %bb.35:                               ;   in Loop: Header=BB1_1 Depth=1
	v_add_co_u32 v9, vcc_lo, v18, v21
	v_add_co_ci_u32_e32 v10, vcc_lo, v20, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s42, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s43, v23, vcc_lo
	v_add_co_u32 v22, vcc_lo, s44, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s45, v23, vcc_lo
	global_load_b32 v11, v[9:10], off
	global_load_b32 v22, v[22:23], off
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v11, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s5, v22, v11
	v_mov_b32_e32 v11, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s48, vcc_lo, s5
	s_and_saveexec_b32 s5, s48
	s_cbranch_execz .LBB1_37
; %bb.36:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v11, v17, v22
	global_atomic_max_i32 v[9:10], v11, off
	v_add3_u32 v11, v18, v21, 1
.LBB1_37:                               ; %_Z14propagateFloatPiS_iiii.exit181
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v11
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_39
; %bb.38:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v11 offset:4
.LBB1_39:                               ; %Flow265
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s47
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s33
	s_cbranch_vccnz .LBB1_62
; %bb.40:                               ;   in Loop: Header=BB1_1 Depth=1
	v_add_nc_u32_e32 v11, -1, v19
	s_and_b32 s5, s46, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s47, s5
	s_cbranch_execz .LBB1_45
; %bb.41:                               ;   in Loop: Header=BB1_1 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v21, v11, s8
	v_ashrrev_i32_e32 v10, 31, v21
	v_add_co_u32 v9, vcc_lo, v18, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, v20, v10, vcc_lo
	v_lshlrev_b64 v[22:23], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s38, v22
	v_add_co_ci_u32_e32 v10, vcc_lo, s39, v23, vcc_lo
	v_add_co_u32 v22, vcc_lo, s40, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s41, v23, vcc_lo
	global_load_b32 v24, v[9:10], off
	global_load_b32 v23, v[22:23], off
	v_mov_b32_e32 v22, -1
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v24, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s5, v23, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s48, vcc_lo, s5
	s_and_saveexec_b32 s5, s48
	s_cbranch_execz .LBB1_43
; %bb.42:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v22, v17, v23
	global_atomic_max_i32 v[9:10], v22, off
	v_add3_u32 v22, v18, v21, -1
.LBB1_43:                               ; %_Z14propagateFloatPiS_iiii.exit185
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v22
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_45
; %bb.44:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v22 offset:4
.LBB1_45:                               ; %Flow262
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s47
	s_and_b32 s5, s46, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s46, s5
	s_cbranch_execz .LBB1_50
; %bb.46:                               ;   in Loop: Header=BB1_1 Depth=1
	v_mul_lo_u32 v11, v11, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v10, 31, v11
	v_add_co_u32 v9, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, v20, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[21:22], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s42, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s43, v22, vcc_lo
	v_add_co_u32 v21, vcc_lo, s44, v21
	v_add_co_ci_u32_e32 v22, vcc_lo, s45, v22, vcc_lo
	global_load_b32 v23, v[9:10], off
	global_load_b32 v22, v[21:22], off
	v_mov_b32_e32 v21, -1
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v23, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s5, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s47, vcc_lo, s5
	s_and_saveexec_b32 s5, s47
	s_cbranch_execz .LBB1_48
; %bb.47:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v21, v17, v22
	global_atomic_max_i32 v[9:10], v21, off
	v_add3_u32 v21, v18, v11, 1
.LBB1_48:                               ; %_Z14propagateFloatPiS_iiii.exit189
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v21
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_50
; %bb.49:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v21 offset:4
.LBB1_50:                               ; %Flow260
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s46
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_61
; %bb.51:                               ;   in Loop: Header=BB1_1 Depth=1
	s_and_b32 s1, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_56
; %bb.52:                               ;   in Loop: Header=BB1_1 Depth=1
	v_mad_u64_u32 v[9:10], null, s8, v19, s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v11, 31, v9
	v_add_co_u32 v10, vcc_lo, v18, v9
	v_add_co_ci_u32_e32 v11, vcc_lo, v20, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[21:22], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s38, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s39, v22, vcc_lo
	v_add_co_u32 v21, vcc_lo, s40, v21
	v_add_co_ci_u32_e32 v22, vcc_lo, s41, v22, vcc_lo
	global_load_b32 v23, v[10:11], off
	global_load_b32 v22, v[21:22], off
	v_mov_b32_e32 v21, -1
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v23, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s1, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s46, vcc_lo, s1
	s_and_saveexec_b32 s1, s46
	s_cbranch_execz .LBB1_54
; %bb.53:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v21, v17, v22
	global_atomic_max_i32 v[10:11], v21, off
	v_add3_u32 v21, v18, v9, -1
.LBB1_54:                               ; %_Z14propagateFloatPiS_iiii.exit193
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v21
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_56
; %bb.55:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v21 offset:4
.LBB1_56:                               ; %Flow257
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_b32 s1, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB1_61
; %bb.57:                               ;   in Loop: Header=BB1_1 Depth=1
	v_mad_u64_u32 v[9:10], null, s8, v19, s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v11, 31, v9
	v_add_co_u32 v10, vcc_lo, v18, v9
	v_add_co_ci_u32_e32 v11, vcc_lo, v20, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s42, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s43, v20, vcc_lo
	v_add_co_u32 v19, vcc_lo, s44, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s45, v20, vcc_lo
	global_load_b32 v21, v[10:11], off
	global_load_b32 v20, v[19:20], off
	v_mov_b32_e32 v19, -1
	s_waitcnt vmcnt(1)
	v_cmp_lt_i32_e32 vcc_lo, v21, v17
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s1, v20, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s1
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB1_59
; %bb.58:                               ;   in Loop: Header=BB1_1 Depth=1
	v_min_i32_e32 v17, v17, v20
	v_add3_u32 v19, v18, v9, 1
	global_atomic_max_i32 v[10:11], v17, off
.LBB1_59:                               ; %_Z14propagateFloatPiS_iiii.exit197
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_i32_e32 vcc_lo, 0, v19
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_61
; %bb.60:                               ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v10, 2, v9
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v10, v0, 36, v10
	ds_store_b32 v13, v9
	ds_store_b32 v10, v19 offset:4
.LBB1_61:                               ; %Flow258
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_62:                               ; %.critedge
                                        ;   in Loop: Header=BB1_1 Depth=1
	ds_load_b32 v9, v13
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v9
	s_cbranch_execz .LBB1_70
; %bb.63:                               ;   in Loop: Header=BB1_1 Depth=1
	s_mov_b32 s3, exec_lo
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr10
.LBB1_64:                               ; %ComputeLoop
                                        ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_readlane_b32 s5, v9, s4
	s_lshl_b32 s46, 1, s4
	v_writelane_b32 v10, s1, s4
	s_and_not1_b32 s3, s3, s46
	s_add_i32 s1, s1, s5
	s_cmp_lg_u32 s3, 0
	s_cbranch_scc1 .LBB1_64
; %bb.65:                               ; %ComputeEnd
                                        ;   in Loop: Header=BB1_1 Depth=1
	v_mbcnt_lo_u32_b32 v11, exec_lo, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v11
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s3, vcc_lo
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB1_67
; %bb.66:                               ;   in Loop: Header=BB1_1 Depth=1
	v_mov_b32_e32 v11, s1
	global_atomic_add_u32 v11, v2, v11, s[30:31] glc
.LBB1_67:                               ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v18, s11 :: v_dual_mov_b32 v17, s10
	v_readfirstlane_b32 s1, v11
	flat_load_b32 v17, v[17:18] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, s1, v10
	v_cmp_lt_i32_e64 s1, 0, v9
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, v11, v17
	s_and_b32 s1, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB1_70
; %bb.68:                               ; %.lr.ph.i
                                        ;   in Loop: Header=BB1_1 Depth=1
	global_load_b64 v[9:10], v2, s[24:25]
	v_mov_b32_e32 v17, v14
	s_mov_b32 s1, 0
	s_mov_b32 s3, 0
.LBB1_69:                               ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v18, s3, v11
	ds_load_b32 v20, v17
	s_add_i32 s3, s3, 1
	v_add_nc_u32_e32 v17, 4, v17
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v9, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, v10, v19, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[18:19], v20 dlc
	s_waitcnt_vscnt null, 0x0
	ds_load_b32 v18, v13
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s3, v18
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_69
.LBB1_70:                               ; %Flow253
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, -2, v1
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_1
; %bb.71:
	s_or_b32 exec_lo, exec_lo, s7
	v_dual_mov_b32 v0, s28 :: v_dual_mov_b32 v1, s29
	s_add_u32 s0, s12, s26
	s_addc_u32 s1, s13, s27
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, execution_code_float@rel32@lo+4
	s_addc_u32 s3, s3, execution_code_float@rel32@hi+12
	flat_load_b32 v3, v[0:1] glc dlc
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
	v_mov_b32_e32 v2, s3
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v3, s[0:1]
	flat_load_b32 v1, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v1
	s_cbranch_execz .LBB1_73
; %bb.72:
	s_load_b32 s0, s[20:21], 0x0
	v_mov_b32_e32 v1, 1
	s_waitcnt lgkmcnt(0)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s12, s0
	s_addc_u32 s1, s13, s1
	global_store_b32 v0, v1, s[0:1]
.LBB1_73:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z28morphReconKernelSpeedupFloatPiS_S_iii
		.amdhsa_group_segment_fixed_size 18436
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 49
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z28morphReconKernelSpeedupFloatPiS_S_iii, .Lfunc_end1-_Z28morphReconKernelSpeedupFloatPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3728
; NumSgprs: 51
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 18436 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 51
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	inQueueSizeFloat        ; @inQueueSizeFloat
	.type	inQueueSizeFloat,@object
	.section	.bss,"aw",@nobits
	.globl	inQueueSizeFloat
	.p2align	4, 0x0
inQueueSizeFloat:
	.zero	280
	.size	inQueueSizeFloat, 280

	.protected	inQueuePtr1Float        ; @inQueuePtr1Float
	.type	inQueuePtr1Float,@object
	.globl	inQueuePtr1Float
	.p2align	4, 0x0
inQueuePtr1Float:
	.zero	560
	.size	inQueuePtr1Float, 560

	.protected	inQueueHeadFloat        ; @inQueueHeadFloat
	.type	inQueueHeadFloat,@object
	.globl	inQueueHeadFloat
	.p2align	4, 0x0
inQueueHeadFloat:
	.zero	280
	.size	inQueueHeadFloat, 280

	.protected	outQueueMaxSizeFloat    ; @outQueueMaxSizeFloat
	.type	outQueueMaxSizeFloat,@object
	.globl	outQueueMaxSizeFloat
	.p2align	4, 0x0
outQueueMaxSizeFloat:
	.zero	280
	.size	outQueueMaxSizeFloat, 280

	.protected	outQueueHeadFloat       ; @outQueueHeadFloat
	.type	outQueueHeadFloat,@object
	.globl	outQueueHeadFloat
	.p2align	4, 0x0
outQueueHeadFloat:
	.zero	280
	.size	outQueueHeadFloat, 280

	.protected	outQueuePtr2Float       ; @outQueuePtr2Float
	.type	outQueuePtr2Float,@object
	.globl	outQueuePtr2Float
	.p2align	4, 0x0
outQueuePtr2Float:
	.zero	560
	.size	outQueuePtr2Float, 560

	.protected	curInQueueFloat         ; @curInQueueFloat
	.type	curInQueueFloat,@object
	.globl	curInQueueFloat
	.p2align	4, 0x0
curInQueueFloat:
	.zero	560
	.size	curInQueueFloat, 560

	.protected	curOutQueueFloat        ; @curOutQueueFloat
	.type	curOutQueueFloat,@object
	.globl	curOutQueueFloat
	.p2align	4, 0x0
curOutQueueFloat:
	.zero	560
	.size	curOutQueueFloat, 560

	.protected	execution_code_float    ; @execution_code_float
	.type	execution_code_float,@object
	.globl	execution_code_float
	.p2align	2, 0x0
execution_code_float:
	.long	0                               ; 0x0
	.size	execution_code_float, 4

	.protected	totalInserts_float      ; @totalInserts_float
	.type	totalInserts_float,@object
	.globl	totalInserts_float
	.p2align	4, 0x0
totalInserts_float:
	.zero	280
	.size	totalInserts_float, 280

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym inQueueSizeFloat
	.addrsig_sym inQueuePtr1Float
	.addrsig_sym inQueueHeadFloat
	.addrsig_sym outQueueMaxSizeFloat
	.addrsig_sym outQueueHeadFloat
	.addrsig_sym outQueuePtr2Float
	.addrsig_sym curInQueueFloat
	.addrsig_sym curOutQueueFloat
	.addrsig_sym execution_code_float
	.addrsig_sym totalInserts_float
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16initQueueIdFloatPiiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z16initQueueIdFloatPiiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 18436
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z28morphReconKernelSpeedupFloatPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     51
    .sgpr_spill_count: 0
    .symbol:         _Z28morphReconKernelSpeedupFloatPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
