
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <time.h>

#define TIMER_CREATE(t)               \
  cudaEvent_t t##_start, t##_end;     \
  cudaEventCreate(&t##_start);        \
  cudaEventCreate(&t##_end);               
 
 
#define TIMER_START(t)                \
  cudaEventRecord(t##_start);         \
  cudaEventSynchronize(t##_start);    \
 
 
#define TIMER_END(t)                             \
  cudaEventRecord(t##_end);                      \
  cudaEventSynchronize(t##_end);                 \
  cudaEventElapsedTime(&t, t##_start, t##_end);  \
  cudaEventDestroy(t##_start);                   \
  cudaEventDestroy(t##_end);     
  
#define TILE_SIZE 16
#define CUDA_TIMING

unsigned char *input_gpu;
unsigned char *output_gpu;

double CLOCK() {
	struct timespec t;
	clock_gettime(CLOCK_MONOTONIC,  &t);
	return (t.tv_sec * 1000)+(t.tv_nsec*1e-6);
}

/*******************************************************/
/*                 Cuda Error Function                 */
/*******************************************************/
inline cudaError_t checkCuda(cudaError_t result) {
	#if defined(DEBUG) || defined(_DEBUG)
		if (result != cudaSuccess) {
			fprintf(stderr, "CUDA Runtime Error: %s\n", cudaGetErrorString(result));
			exit(-1);
		}
	#endif
		return result;
}
                
// Add GPU kernel and functions
__global__ void kernel(unsigned char *input, 
                       unsigned char *output){
        
  	int x = blockIdx.x*TILE_SIZE+threadIdx.x;
	int y = blockIdx.y*TILE_SIZE+threadIdx.y;
                
        int location = 	y*TILE_SIZE*gridDim.x+x;
	
        output[location] = x%255;

}

void histogram_gpu(unsigned char *data, 
                   unsigned int height, 
                   unsigned int width){
                         
	int gridXSize = 1 + (( width - 1) / TILE_SIZE);
	int gridYSize = 1 + ((height - 1) / TILE_SIZE);
	
	int XSize = gridXSize*TILE_SIZE;
	int YSize = gridYSize*TILE_SIZE;
	
	// Both are the same size (CPU/GPU).
	int size = XSize*YSize;
	
	// Allocate arrays in GPU memory
	checkCuda(cudaMalloc((void**)&input_gpu   , size*sizeof(unsigned char)));
	checkCuda(cudaMalloc((void**)&output_gpu  , size*sizeof(unsigned char)));
	
        checkCuda(cudaMemset(output_gpu , 0 , size*sizeof(unsigned char)));
				
        // Copy data to GPU
        checkCuda(cudaMemcpy(input_gpu, 
			data, 
			size*sizeof(char), 
			cudaMemcpyHostToDevice));

	checkCuda(cudaDeviceSynchronize());
        
        // Execute algorithm
        
	dim3 dimGrid(gridXSize, gridYSize);
        dim3 dimBlock(TILE_SIZE, TILE_SIZE);

        // Kernel Call
	#if defined(CUDA_TIMING)
		float Ktime;
		TIMER_CREATE(Ktime);
		TIMER_START(Ktime);
	#endif
        
        kernel<<<dimGrid, dimBlock>>>(input_gpu, 
                                      output_gpu);
                                             
        checkCuda(cudaDeviceSynchronize());
	
	#if defined(CUDA_TIMING)
		TIMER_END(Ktime);
		printf("Kernel Execution Time: %f ms\n", Ktime);
	#endif
        
	// Retrieve results from the GPU
	checkCuda(cudaMemcpy(data, 
			output_gpu, 
			size*sizeof(unsigned char), 
			cudaMemcpyDeviceToHost));
                        
        // Free resources and end the program
	checkCuda(cudaFree(output_gpu));
	checkCuda(cudaFree(input_gpu));

}

void histogram_gpu_warmup(unsigned char *data, 
                   unsigned int height, 
                   unsigned int width){
                         
	int gridXSize = 1 + (( width - 1) / TILE_SIZE);
	int gridYSize = 1 + ((height - 1) / TILE_SIZE);
	
	int XSize = gridXSize*TILE_SIZE;
	int YSize = gridYSize*TILE_SIZE;
	
	// Both are the same size (CPU/GPU).
	int size = XSize*YSize;
	
	// Allocate arrays in GPU memory
	checkCuda(cudaMalloc((void**)&input_gpu   , size*sizeof(unsigned char)));
	checkCuda(cudaMalloc((void**)&output_gpu  , size*sizeof(unsigned char)));
	
        checkCuda(cudaMemset(output_gpu , 0 , size*sizeof(unsigned char)));
				
        // Copy data to GPU
        checkCuda(cudaMemcpy(input_gpu, 
			data, 
			size*sizeof(char), 
			cudaMemcpyHostToDevice));

	checkCuda(cudaDeviceSynchronize());
        
        // Execute algorithm
        
	dim3 dimGrid(gridXSize, gridYSize);
        dim3 dimBlock(TILE_SIZE, TILE_SIZE);
        
        kernel<<<dimGrid, dimBlock>>>(input_gpu, 
                                      output_gpu);
                                             
        checkCuda(cudaDeviceSynchronize());
        
	// Retrieve results from the GPU
	checkCuda(cudaMemcpy(data, 
			output_gpu, 
			size*sizeof(unsigned char), 
			cudaMemcpyDeviceToHost));
                        
        // Free resources and end the program
	checkCuda(cudaFree(output_gpu));
	checkCuda(cudaFree(input_gpu));

}


	.file	"tmpxft_00371355_00000000-6_heq.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z5CLOCKv
	.type	_Z5CLOCKv, @function
_Z5CLOCKv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, %edi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	call	clock_gettime@PLT
	cvtsi2sdq	16(%rsp), %xmm1
	mulsd	.LC0(%rip), %xmm1
	imulq	$1000, 8(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z5CLOCKv, .-_Z5CLOCKv
	.globl	_Z27__device_stub__Z6kernelPhS_PhS_
	.type	_Z27__device_stub__Z6kernelPhS_PhS_, @function
_Z27__device_stub__Z6kernelPhS_PhS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6kernelPhS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L6:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z27__device_stub__Z6kernelPhS_PhS_, .-_Z27__device_stub__Z6kernelPhS_PhS_
	.globl	_Z6kernelPhS_
	.type	_Z6kernelPhS_, @function
_Z6kernelPhS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6kernelPhS_PhS_
	.cfi_endproc
.LFE2056:
	.size	_Z6kernelPhS_, .-_Z6kernelPhS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Kernel Execution Time: %f ms\n"
	.text
	.globl	_Z13histogram_gpuPhjj
	.type	_Z13histogram_gpuPhjj, @function
_Z13histogram_gpuPhjj:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leal	-1(%rdx), %r13d
	decl	%esi
	shrl	$4, %r13d
	shrl	$4, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	incl	%r13d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leal	1(%rsi), %ebp
	leaq	input_gpu(%rip), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%r13d, %ebx
	imull	%ebp, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	sall	$8, %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	output_gpu(%rip), %rdi
	call	cudaMalloc@PLT
	movq	output_gpu(%rip), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	call	cudaMemset@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	input_gpu(%rip), %rdi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	leaq	16(%rsp), %rdi
	movabsq	$68719476752, %rax
	movl	%r13d, 32(%rsp)
	movl	%ebp, 36(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	output_gpu(%rip), %rsi
	movq	input_gpu(%rip), %rdi
	call	_Z27__device_stub__Z6kernelPhS_PhS_
.L12:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %ecx
	movq	output_gpu(%rip), %rsi
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	output_gpu(%rip), %rdi
	call	cudaFree@PLT
	movq	input_gpu(%rip), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z13histogram_gpuPhjj, .-_Z13histogram_gpuPhjj
	.globl	_Z20histogram_gpu_warmupPhjj
	.type	_Z20histogram_gpu_warmupPhjj, @function
_Z20histogram_gpu_warmupPhjj:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leal	-1(%rdx), %r13d
	decl	%esi
	shrl	$4, %r13d
	shrl	$4, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	incl	%r13d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leal	1(%rsi), %ebp
	leaq	input_gpu(%rip), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%r13d, %ebx
	imull	%ebp, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	sall	$8, %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	output_gpu(%rip), %rdi
	call	cudaMalloc@PLT
	movq	output_gpu(%rip), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	call	cudaMemset@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	input_gpu(%rip), %rdi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	movl	%r13d, 8(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	output_gpu(%rip), %rsi
	movq	input_gpu(%rip), %rdi
	call	_Z27__device_stub__Z6kernelPhS_PhS_
.L16:
	call	cudaDeviceSynchronize@PLT
	movq	%rbx, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	movq	output_gpu(%rip), %rsi
	call	cudaMemcpy@PLT
	movq	output_gpu(%rip), %rdi
	call	cudaFree@PLT
	movq	input_gpu(%rip), %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z20histogram_gpu_warmupPhjj, .-_Z20histogram_gpu_warmupPhjj
	.section	.rodata.str1.1
.LC2:
	.string	"_Z6kernelPhS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPhS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	output_gpu
	.bss
	.align 8
	.type	output_gpu, @object
	.size	output_gpu, 8
output_gpu:
	.zero	8
	.globl	input_gpu
	.align 8
	.type	input_gpu, @object
	.size	input_gpu, 8
input_gpu:
	.zero	8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>

#define TIMER_CREATE(t)               \
  hipEvent_t t##_start, t##_end;     \
  hipEventCreate(&t##_start);        \
  hipEventCreate(&t##_end);               
 
 
#define TIMER_START(t)                \
  hipEventRecord(t##_start);         \
  hipEventSynchronize(t##_start);    \
 
 
#define TIMER_END(t)                             \
  hipEventRecord(t##_end);                      \
  hipEventSynchronize(t##_end);                 \
  hipEventElapsedTime(&t, t##_start, t##_end);  \
  hipEventDestroy(t##_start);                   \
  hipEventDestroy(t##_end);     
  
#define TILE_SIZE 16
#define CUDA_TIMING

unsigned char *input_gpu;
unsigned char *output_gpu;

double CLOCK() {
	struct timespec t;
	clock_gettime(CLOCK_MONOTONIC,  &t);
	return (t.tv_sec * 1000)+(t.tv_nsec*1e-6);
}

/*******************************************************/
/*                 Cuda Error Function                 */
/*******************************************************/
inline hipError_t checkCuda(hipError_t result) {
	#if defined(DEBUG) || defined(_DEBUG)
		if (result != hipSuccess) {
			fprintf(stderr, "CUDA Runtime Error: %s\n", hipGetErrorString(result));
			exit(-1);
		}
	#endif
		return result;
}
                
// Add GPU kernel and functions
__global__ void kernel(unsigned char *input, 
                       unsigned char *output){
        
  	int x = blockIdx.x*TILE_SIZE+threadIdx.x;
	int y = blockIdx.y*TILE_SIZE+threadIdx.y;
                
        int location = 	y*TILE_SIZE*gridDim.x+x;
	
        output[location] = x%255;

}

void histogram_gpu(unsigned char *data, 
                   unsigned int height, 
                   unsigned int width){
                         
	int gridXSize = 1 + (( width - 1) / TILE_SIZE);
	int gridYSize = 1 + ((height - 1) / TILE_SIZE);
	
	int XSize = gridXSize*TILE_SIZE;
	int YSize = gridYSize*TILE_SIZE;
	
	// Both are the same size (CPU/GPU).
	int size = XSize*YSize;
	
	// Allocate arrays in GPU memory
	checkCuda(hipMalloc((void**)&input_gpu   , size*sizeof(unsigned char)));
	checkCuda(hipMalloc((void**)&output_gpu  , size*sizeof(unsigned char)));
	
        checkCuda(hipMemset(output_gpu , 0 , size*sizeof(unsigned char)));
				
        // Copy data to GPU
        checkCuda(hipMemcpy(input_gpu, 
			data, 
			size*sizeof(char), 
			hipMemcpyHostToDevice));

	checkCuda(hipDeviceSynchronize());
        
        // Execute algorithm
        
	dim3 dimGrid(gridXSize, gridYSize);
        dim3 dimBlock(TILE_SIZE, TILE_SIZE);

        // Kernel Call
	#if defined(CUDA_TIMING)
		float Ktime;
		TIMER_CREATE(Ktime);
		TIMER_START(Ktime);
	#endif
        
        kernel<<<dimGrid, dimBlock>>>(input_gpu, 
                                      output_gpu);
                                             
        checkCuda(hipDeviceSynchronize());
	
	#if defined(CUDA_TIMING)
		TIMER_END(Ktime);
		printf("Kernel Execution Time: %f ms\n", Ktime);
	#endif
        
	// Retrieve results from the GPU
	checkCuda(hipMemcpy(data, 
			output_gpu, 
			size*sizeof(unsigned char), 
			hipMemcpyDeviceToHost));
                        
        // Free resources and end the program
	checkCuda(hipFree(output_gpu));
	checkCuda(hipFree(input_gpu));

}

void histogram_gpu_warmup(unsigned char *data, 
                   unsigned int height, 
                   unsigned int width){
                         
	int gridXSize = 1 + (( width - 1) / TILE_SIZE);
	int gridYSize = 1 + ((height - 1) / TILE_SIZE);
	
	int XSize = gridXSize*TILE_SIZE;
	int YSize = gridYSize*TILE_SIZE;
	
	// Both are the same size (CPU/GPU).
	int size = XSize*YSize;
	
	// Allocate arrays in GPU memory
	checkCuda(hipMalloc((void**)&input_gpu   , size*sizeof(unsigned char)));
	checkCuda(hipMalloc((void**)&output_gpu  , size*sizeof(unsigned char)));
	
        checkCuda(hipMemset(output_gpu , 0 , size*sizeof(unsigned char)));
				
        // Copy data to GPU
        checkCuda(hipMemcpy(input_gpu, 
			data, 
			size*sizeof(char), 
			hipMemcpyHostToDevice));

	checkCuda(hipDeviceSynchronize());
        
        // Execute algorithm
        
	dim3 dimGrid(gridXSize, gridYSize);
        dim3 dimBlock(TILE_SIZE, TILE_SIZE);
        
        kernel<<<dimGrid, dimBlock>>>(input_gpu, 
                                      output_gpu);
                                             
        checkCuda(hipDeviceSynchronize());
        
	// Retrieve results from the GPU
	checkCuda(hipMemcpy(data, 
			output_gpu, 
			size*sizeof(unsigned char), 
			hipMemcpyDeviceToHost));
                        
        // Free resources and end the program
	checkCuda(hipFree(output_gpu));
	checkCuda(hipFree(input_gpu));

}


	.text
	.file	"heq.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z5CLOCKv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z5CLOCKv
	.type	_Z5CLOCKv,@function
_Z5CLOCKv:                              # @_Z5CLOCKv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movl	$1, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	imulq	$1000, (%rbx), %rax             # imm = 0x3E8
	cvtsi2sd	%rax, %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z5CLOCKv, .Lfunc_end0-_Z5CLOCKv
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__kernelPhS_   # -- Begin function _Z21__device_stub__kernelPhS_
	.type	_Z21__device_stub__kernelPhS_,@function
_Z21__device_stub__kernelPhS_:          # @_Z21__device_stub__kernelPhS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPhS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__kernelPhS_, .Lfunc_end1-_Z21__device_stub__kernelPhS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13histogram_gpuPhjj           # -- Begin function _Z13histogram_gpuPhjj
	.type	_Z13histogram_gpuPhjj,@function
_Z13histogram_gpuPhjj:                  # @_Z13histogram_gpuPhjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
                                        # kill: def $edx killed $edx def $rdx
	movl	%esi, %r15d
	movq	%rdi, %rbx
	leal	-1(%rdx), %r12d
	shrl	$4, %r12d
	incl	%r12d
	decl	%r15d
	shrl	$4, %r15d
	incl	%r15d
	movl	%r15d, %r14d
	imull	%r12d, %r14d
	shll	$8, %r14d
	movl	$input_gpu, %edi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$output_gpu, %edi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	output_gpu(%rip), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	movq	input_gpu(%rip), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	shlq	$32, %r15
	orq	%r12, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r12), %rdi
	callq	hipEventSynchronize
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	input_gpu(%rip), %rdi
	movq	output_gpu(%rip), %rsi
	callq	_Z21__device_stub__kernelPhS_
.LBB2_2:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	20(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	output_gpu(%rip), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	output_gpu(%rip), %rdi
	callq	hipFree
	movq	input_gpu(%rip), %rdi
	callq	hipFree
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z13histogram_gpuPhjj, .Lfunc_end2-_Z13histogram_gpuPhjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z20histogram_gpu_warmupPhjj    # -- Begin function _Z20histogram_gpu_warmupPhjj
	.type	_Z20histogram_gpu_warmupPhjj,@function
_Z20histogram_gpu_warmupPhjj:           # @_Z20histogram_gpu_warmupPhjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
                                        # kill: def $edx killed $edx def $rdx
	movl	%esi, %r15d
	movq	%rdi, %rbx
	leal	-1(%rdx), %r12d
	shrl	$4, %r12d
	incl	%r12d
	decl	%r15d
	shrl	$4, %r15d
	incl	%r15d
	movl	%r15d, %r14d
	imull	%r12d, %r14d
	shll	$8, %r14d
	movl	$input_gpu, %edi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$output_gpu, %edi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	output_gpu(%rip), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	movq	input_gpu(%rip), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	shlq	$32, %r15
	orq	%r12, %r15
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	input_gpu(%rip), %rdi
	movq	output_gpu(%rip), %rsi
	callq	_Z21__device_stub__kernelPhS_
.LBB3_2:
	callq	hipDeviceSynchronize
	movq	output_gpu(%rip), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	output_gpu(%rip), %rdi
	callq	hipFree
	movq	input_gpu(%rip), %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end3:
	.size	_Z20histogram_gpu_warmupPhjj, .Lfunc_end3-_Z20histogram_gpu_warmupPhjj
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPhS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	input_gpu,@object               # @input_gpu
	.bss
	.globl	input_gpu
	.p2align	3, 0x0
input_gpu:
	.quad	0
	.size	input_gpu, 8

	.type	output_gpu,@object              # @output_gpu
	.globl	output_gpu
	.p2align	3, 0x0
output_gpu:
	.quad	0
	.size	output_gpu, 8

	.type	_Z6kernelPhS_,@object           # @_Z6kernelPhS_
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPhS_
	.p2align	3, 0x0
_Z6kernelPhS_:
	.quad	_Z21__device_stub__kernelPhS_
	.size	_Z6kernelPhS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Kernel Execution Time: %f ms\n"
	.size	.L.str, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPhS_"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPhS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym input_gpu
	.addrsig_sym output_gpu
	.addrsig_sym _Z6kernelPhS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPhS_           ; -- Begin function _Z6kernelPhS_
	.globl	_Z6kernelPhS_
	.p2align	8
	.type	_Z6kernelPhS_,@function
_Z6kernelPhS_:                          ; @_Z6kernelPhS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_lshrrev_b32_e32 v2, 6, v0
	s_load_b64 s[0:1], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v0, s14, 4, v1
	v_and_b32_e32 v1, 0x3ff0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_i32 v2, 0x80808081, v0
	v_lshl_add_u32 v3, s15, 8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v2, v0
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, s2, v3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 31, v4
	v_lshrrev_b32_e32 v3, 7, v4
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add3_u32 v2, v3, v2, v0
	v_add_co_u32 v0, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
	global_store_b8 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPhS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPhS_, .Lfunc_end0-_Z6kernelPhS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPhS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPhS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
