#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define I(ix,iz) (ix)+nx*(iz)
# define PI 3.141592653589793


__global__ void propagator_U(float *Ux, float *Uz, float *Txx, float *Txz, float *Tzz, float *P, int nx, int nz, float dt, float dh)
{
	int ix = threadIdx.x + blockDim.x * blockIdx.x;
	int iz = threadIdx.y + blockDim.y * blockIdx.y;

	if (ix > 0 && ix < (nx-1) && iz > 0 && iz < (nz-1))
	{
			Ux[I(ix,iz)] = Ux[I(ix,iz)] + (1/P[I(ix,iz)])*(dt/dh)*(Txx[I(ix,iz)]-Txx[I(ix-1,iz)]+Txz[I(ix,iz)]-Txz[I(ix,iz-1)]);
			Uz[I(ix,iz)] = Uz[I(ix,iz)] + (1/P[I(ix,iz)])*(dt/dh)*(Txz[I(ix+1,iz)]-Txz[I(ix,iz)]+Tzz[I(ix,iz+1)]-Tzz[I(ix,iz)]);   
	}
}


__global__ void propagator_T(float *Ux, float *Uz, float *Txx, float *Txz, float *Tzz, float *Vp, float *Vs,float *P, float *source, int nx, int nz, float dt, float dh, int sx, int sz, int it)
{       
	int ix = threadIdx.x+blockDim.x*blockIdx.x;
	int iz = threadIdx.y+blockDim.y*blockIdx.y;

    if(ix < nx && iz<nz){
	   if(ix > 0 && ix < (nx-1) && iz > 0 && iz < (nz-1))
	   {  
	   	  Txx[I(ix,iz)]=Txx[I(ix,iz)]  +  ((pow(Vp[I(ix,iz)],2)*P[I(ix,iz)])*(dt/dh)*(Ux[I(ix+1,iz)]-Ux[I(ix,iz)]))   +    ((P[I(ix,iz)]*(pow(Vp[I(ix,iz)],2)-2*pow(Vs[I(ix,iz)],2)))*(dt/dh)*(Uz[I(ix,iz)]-Uz[I(ix,iz-1)]));
		  Tzz[I(ix,iz)]=Tzz[I(ix,iz)]  +  ((pow(Vp[I(ix,iz)],2)*P[I(ix,iz)])*(dt/dh)*(Uz[I(ix,iz)]-Uz[I(ix,iz-1)]))   +    ((P[I(iz,iz)]*(pow(Vp[I(ix,iz)],2)-2*pow(Vs[I(ix,iz)],2)))*(dt/dh)*(Ux[I(ix+2,iz)]-Ux[I(ix,iz)]));
		  Txz[I(ix,iz)]=Txz[I(ix,iz)]  +  (pow(Vs[I(ix,iz)],2)*P[I(ix,iz)])*(dt/dh)*(Ux[I(ix,iz+1)]-Ux[I(ix,iz)]+Uz[I(ix,iz)]-Uz[I(ix-1,iz)]);
	   }

        if (ix == (sx-1) && iz == (sz-1)) 
        {
            //Txx[I(ix,iz)] += source[it];
            Tzz[I(ix,iz)] += source[it];
        }
    }
}

int main()
{

	int nx = 100;
	int nz = 100;
	float dh = 20;
	float dt = 0.002;
	float tend=1;
	int nt = ceil(tend/dt);
    int sx = 50, sz = 50    ;
    float f = 4;

    float *P_h = (float*)calloc(nx*nz,sizeof(float));
    float *Vs_h = (float*)calloc(nx*nz,sizeof(float));
    float *Vp_h = (float*)calloc(nx*nz,sizeof(float));
    float *source_h = (float*)calloc(nt,sizeof(float));
    
    float *U =(float*)calloc(nx*nz*nt ,sizeof(float));


    FILE *ro = fopen("density.bin","rb");
    fread(P_h,nx*nz,sizeof(float),ro);
    fclose(ro);

    FILE *v_p = fopen("VelocityP.bin","rb");
    fread(Vp_h,nx*nz,sizeof(float),v_p);
    fclose(v_p);

    FILE *v_s = fopen("VelocityS.bin","rb");
    fread(Vs_h,nx*nz,sizeof(float),v_s);
    fclose(v_s);


    /******* SOURCE *****/
    int it  = 0;
    float t = 0;
    for (it=0;it<nt;it++)
    {
    source_h[it] = -(1.0-2.0*pow(PI*f*(t-(1.0/f)),2))*exp(-pow(PI*f*(t-(1.0/f)),2));
    t += dt;
    }

    /******* CUDA *******/
    float *Ux, *Uz, *Txx, *Txz, *Tzz, *P, *Vs, *Vp;
    float *source;

    cudaMalloc((void **) &Ux, nx*nz*sizeof(float));
    cudaMalloc((void **) &Uz, nx*nz*sizeof(float));
    cudaMalloc((void **) &Txx, nx*nz*sizeof(float));
    cudaMalloc((void **) &Txz, nx*nz*sizeof(float));
    cudaMalloc((void **) &Tzz, nx*nz*sizeof(float));

    cudaMalloc((void **) &P, nx*nz*sizeof(float));
    cudaMalloc((void **) &Vp, nx*nz*sizeof(float));
    cudaMalloc((void **) &Vs, nx*nz*sizeof(float));

    cudaMalloc((void **) &source, nt*sizeof(float));


    cudaMemcpy(P, P_h, nx*nz*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(Vs, Vs_h, nx*nz*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(Vp, Vp_h, nx*nz*sizeof(float), cudaMemcpyHostToDevice);

    cudaMemcpy(source, source_h, nt*sizeof(float), cudaMemcpyHostToDevice);


    cudaMemset(Ux, 0, nx*nz*sizeof(float));
    cudaMemset(Uz, 0, nx*nz*sizeof(float));
    cudaMemset(Txx, 0, nx*nz*sizeof(float));
    cudaMemset(Txz, 0, nx*nz*sizeof(float));
    cudaMemset(Tzz, 0, nx*nz*sizeof(float));


    dim3 Grid(((nx-1)/32)+1,((nz-1)/32)+1);
    dim3 Block(32,32);

    for(it=0;it<nt;it++)
    {
        propagator_U <<<Grid,Block>>>(Ux, Uz, Txx, Txz, Tzz, P, nx, nz, dt, dh);
    	propagator_T <<<Grid,Block>>>(Ux, Uz, Txx, Txz, Tzz, Vp, Vs, P, source, nx, nz, dt, dh, sx, sz, it);

        cudaMemcpy(U+(nx*nz*it), Ux , nx*nz*sizeof(float), cudaMemcpyDeviceToHost);
    }

    FILE *field_f;
    field_f=fopen("field.bin", "wb");
    fwrite(U,sizeof(float),nx*nz*nt, field_f);
    fclose(field_f);

    FILE *source_f;
    source_f=fopen("source.bin", "wb");
    fwrite(source_h,sizeof(float),nt, source_f);
    fclose(source_f);

    cudaFree(Ux);
    cudaFree(Uz);
    cudaFree(Txx);
    cudaFree(Txz);
    cudaFree(Tzz);
    cudaFree(P);
    cudaFree(Vs);
    cudaFree(Vp);
    cudaFree(source);


    free(P_h);
    free(Vs_h);
    free(Vp_h);
    free(source_h);
    free(U);

    return 0;  
}
	.file	"tmpxft_00259c1a_00000000-6_elastic.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z46__device_stub__Z12propagator_UPfS_S_S_S_S_iiffPfS_S_S_S_S_iiff
	.type	_Z46__device_stub__Z12propagator_UPfS_S_S_S_S_iiffPfS_S_S_S_S_iiff, @function
_Z46__device_stub__Z12propagator_UPfS_S_S_S_S_iiffPfS_S_S_S_S_iiff:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z12propagator_UPfS_S_S_S_S_iiff(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L2:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z46__device_stub__Z12propagator_UPfS_S_S_S_S_iiffPfS_S_S_S_S_iiff, .-_Z46__device_stub__Z12propagator_UPfS_S_S_S_S_iiffPfS_S_S_S_S_iiff
	.globl	_Z12propagator_UPfS_S_S_S_S_iiff
	.type	_Z12propagator_UPfS_S_S_S_S_iiff, @function
_Z12propagator_UPfS_S_S_S_S_iiff:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z12propagator_UPfS_S_S_S_S_iiffPfS_S_S_S_S_iiff
	.cfi_endproc
.LFE2053:
	.size	_Z12propagator_UPfS_S_S_S_S_iiff, .-_Z12propagator_UPfS_S_S_S_S_iiff
	.globl	_Z55__device_stub__Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiiiPfS_S_S_S_S_S_S_S_iiffiii
	.type	_Z55__device_stub__Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiiiPfS_S_S_S_S_S_S_S_iiffiii, @function
_Z55__device_stub__Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiiiPfS_S_S_S_S_S_S_S_iiffiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$296, %rsp
	.cfi_def_cfa_offset 304
	movq	304(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	312(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	320(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	96(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movss	%xmm0, 4(%rsp)
	movss	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	336(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	%rsp, %rax
	movq	%rax, 248(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 272(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	96(%rsp)
	.cfi_def_cfa_offset 312
	leaq	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 320
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 312
	popq	%rdx
	.cfi_def_cfa_offset 304
.L8:
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$296, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z55__device_stub__Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiiiPfS_S_S_S_S_S_S_S_iiffiii, .-_Z55__device_stub__Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiiiPfS_S_S_S_S_S_S_S_iiffiii
	.globl	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.type	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii, @function
_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiiiPfS_S_S_S_S_S_S_S_iiffiii
	.cfi_endproc
.LFE2055:
	.size	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii, .-_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"rb"
.LC2:
	.string	"density.bin"
.LC3:
	.string	"VelocityP.bin"
.LC4:
	.string	"VelocityS.bin"
.LC11:
	.string	"wb"
.LC12:
	.string	"field.bin"
.LC13:
	.string	"source.bin"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4, %esi
	movl	$10000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	call	calloc@PLT
	movl	$4, %esi
	movl	$10000, %edi
	movq	%rax, %r13
	call	calloc@PLT
	movl	$4, %esi
	movl	$10000, %edi
	movq	%rax, %r12
	call	calloc@PLT
	movl	$4, %esi
	movl	$500, %edi
	movq	%rax, 8(%rsp)
	call	calloc@PLT
	movl	$4, %esi
	movl	$5000000, %edi
	movq	%rax, %rbx
	call	calloc@PLT
	movq	%r14, %rsi
	leaq	.LC2(%rip), %rdi
	movq	%rax, %rbp
	call	fopen@PLT
	movl	$4, %ecx
	movl	$10000, %edx
	movq	%r13, %rdi
	movq	%rax, %r8
	movq	%rax, %r15
	movl	$40000, %esi
	call	__fread_chk@PLT
	movq	%r15, %rdi
	call	fclose@PLT
	movq	%r14, %rsi
	leaq	.LC3(%rip), %rdi
	call	fopen@PLT
	movq	8(%rsp), %rdi
	movl	$4, %ecx
	movl	$10000, %edx
	movq	%rax, %r8
	movl	$40000, %esi
	movq	%rax, %r15
	call	__fread_chk@PLT
	movq	%r15, %rdi
	call	fclose@PLT
	movq	%r14, %rsi
	leaq	.LC4(%rip), %rdi
	call	fopen@PLT
	movl	$4, %ecx
	movl	$10000, %edx
	movq	%r12, %rdi
	movq	%rax, %r14
	movq	%rax, %r8
	movl	$40000, %esi
	call	__fread_chk@PLT
	movq	%r14, %rdi
	xorl	%r14d, %r14d
	call	fclose@PLT
	movq	.LC7(%rip), %xmm3
	xorps	%xmm2, %xmm2
.L14:
	cvtss2sd	%xmm2, %xmm1
	subsd	.LC5(%rip), %xmm1
	movss	%xmm2, 28(%rsp)
	mulsd	.LC6(%rip), %xmm1
	mulsd	%xmm1, %xmm1
	movaps	%xmm1, %xmm0
	movsd	%xmm1, 16(%rsp)
	xorps	%xmm3, %xmm0
	call	exp@PLT
	movsd	16(%rsp), %xmm1
	movq	.LC7(%rip), %xmm3
	movaps	%xmm0, %xmm4
	movsd	.LC8(%rip), %xmm0
	movss	28(%rsp), %xmm2
	addsd	%xmm1, %xmm1
	addss	.LC9(%rip), %xmm2
	subsd	%xmm1, %xmm0
	xorps	%xmm3, %xmm0
	mulsd	%xmm4, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$500, %r14
	jne	.L14
	leaq	40(%rsp), %rdi
	movl	$40000, %esi
	movq	%rbp, %r15
	xorl	%r14d, %r14d
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	80(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	96(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	88(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	104(%rsp), %rdi
	movl	$2000, %esi
	call	cudaMalloc@PLT
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$40000, %edx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$40000, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	$1, %ecx
	movl	$40000, %edx
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$2000, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$40000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	48(%rsp), %rdi
	movl	$40000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	56(%rsp), %rdi
	movl	$40000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	64(%rsp), %rdi
	movl	$40000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	72(%rsp), %rdi
	movl	$40000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$1, 120(%rsp)
	movabsq	$17179869188, %rax
	movq	%rax, 112(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
.L17:
	movq	124(%rsp), %rdx
	movq	112(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	132(%rsp), %ecx
	movl	120(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	$100
	.cfi_def_cfa_offset 216
	movss	.LC10(%rip), %xmm1
	pushq	$100
	.cfi_def_cfa_offset 224
	movss	.LC9(%rip), %xmm0
	movq	96(%rsp), %r9
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z46__device_stub__Z12propagator_UPfS_S_S_S_S_iiffPfS_S_S_S_S_iiff
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L15:
	movq	124(%rsp), %rdx
	movq	112(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	132(%rsp), %ecx
	movl	120(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	%r14
	.cfi_def_cfa_offset 216
	movss	.LC10(%rip), %xmm1
	pushq	$50
	.cfi_def_cfa_offset 224
	movss	.LC9(%rip), %xmm0
	pushq	$50
	.cfi_def_cfa_offset 232
	pushq	$100
	.cfi_def_cfa_offset 240
	pushq	$100
	.cfi_def_cfa_offset 248
	pushq	144(%rsp)
	.cfi_def_cfa_offset 256
	pushq	128(%rsp)
	.cfi_def_cfa_offset 264
	pushq	144(%rsp)
	.cfi_def_cfa_offset 272
	movq	160(%rsp), %r9
	movq	136(%rsp), %r8
	movq	128(%rsp), %rcx
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z55__device_stub__Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiiiPfS_S_S_S_S_S_S_S_iiffiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 208
.L16:
	movq	40(%rsp), %rsi
	movq	%r15, %rdi
	movl	$2, %ecx
	incl	%r14d
	movl	$40000, %edx
	addq	$40000, %r15
	call	cudaMemcpy@PLT
	cmpl	$500, %r14d
	jne	.L17
	leaq	.LC11(%rip), %r15
	leaq	.LC12(%rip), %rdi
	movq	%r15, %rsi
	call	fopen@PLT
	movl	$5000000, %edx
	movl	$4, %esi
	movq	%rbp, %rdi
	movq	%rax, %rcx
	movq	%rax, %r14
	call	fwrite@PLT
	movq	%r14, %rdi
	call	fclose@PLT
	movq	%r15, %rsi
	leaq	.LC13(%rip), %rdi
	call	fopen@PLT
	movl	$500, %edx
	movl	$4, %esi
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movq	%rax, %r14
	call	fwrite@PLT
	movq	%r14, %rdi
	call	fclose@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii"
.LC15:
	.string	"_Z12propagator_UPfS_S_S_S_S_iiff"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12propagator_UPfS_S_S_S_S_iiff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1070596096
	.align 8
.LC6:
	.long	1413754136
	.long	1076437499
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC7:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC8:
	.long	0
	.long	1072693248
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC9:
	.long	990057071
	.align 4
.LC10:
	.long	1101004800
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define I(ix,iz) (ix)+nx*(iz)
# define PI 3.141592653589793


__global__ void propagator_U(float *Ux, float *Uz, float *Txx, float *Txz, float *Tzz, float *P, int nx, int nz, float dt, float dh)
{
	int ix = threadIdx.x + blockDim.x * blockIdx.x;
	int iz = threadIdx.y + blockDim.y * blockIdx.y;

	if (ix > 0 && ix < (nx-1) && iz > 0 && iz < (nz-1))
	{
			Ux[I(ix,iz)] = Ux[I(ix,iz)] + (1/P[I(ix,iz)])*(dt/dh)*(Txx[I(ix,iz)]-Txx[I(ix-1,iz)]+Txz[I(ix,iz)]-Txz[I(ix,iz-1)]);
			Uz[I(ix,iz)] = Uz[I(ix,iz)] + (1/P[I(ix,iz)])*(dt/dh)*(Txz[I(ix+1,iz)]-Txz[I(ix,iz)]+Tzz[I(ix,iz+1)]-Tzz[I(ix,iz)]);   
	}
}


__global__ void propagator_T(float *Ux, float *Uz, float *Txx, float *Txz, float *Tzz, float *Vp, float *Vs,float *P, float *source, int nx, int nz, float dt, float dh, int sx, int sz, int it)
{       
	int ix = threadIdx.x+blockDim.x*blockIdx.x;
	int iz = threadIdx.y+blockDim.y*blockIdx.y;

    if(ix < nx && iz<nz){
	   if(ix > 0 && ix < (nx-1) && iz > 0 && iz < (nz-1))
	   {  
	   	  Txx[I(ix,iz)]=Txx[I(ix,iz)]  +  ((pow(Vp[I(ix,iz)],2)*P[I(ix,iz)])*(dt/dh)*(Ux[I(ix+1,iz)]-Ux[I(ix,iz)]))   +    ((P[I(ix,iz)]*(pow(Vp[I(ix,iz)],2)-2*pow(Vs[I(ix,iz)],2)))*(dt/dh)*(Uz[I(ix,iz)]-Uz[I(ix,iz-1)]));
		  Tzz[I(ix,iz)]=Tzz[I(ix,iz)]  +  ((pow(Vp[I(ix,iz)],2)*P[I(ix,iz)])*(dt/dh)*(Uz[I(ix,iz)]-Uz[I(ix,iz-1)]))   +    ((P[I(iz,iz)]*(pow(Vp[I(ix,iz)],2)-2*pow(Vs[I(ix,iz)],2)))*(dt/dh)*(Ux[I(ix+2,iz)]-Ux[I(ix,iz)]));
		  Txz[I(ix,iz)]=Txz[I(ix,iz)]  +  (pow(Vs[I(ix,iz)],2)*P[I(ix,iz)])*(dt/dh)*(Ux[I(ix,iz+1)]-Ux[I(ix,iz)]+Uz[I(ix,iz)]-Uz[I(ix-1,iz)]);
	   }

        if (ix == (sx-1) && iz == (sz-1)) 
        {
            //Txx[I(ix,iz)] += source[it];
            Tzz[I(ix,iz)] += source[it];
        }
    }
}

int main()
{

	int nx = 100;
	int nz = 100;
	float dh = 20;
	float dt = 0.002;
	float tend=1;
	int nt = ceil(tend/dt);
    int sx = 50, sz = 50    ;
    float f = 4;

    float *P_h = (float*)calloc(nx*nz,sizeof(float));
    float *Vs_h = (float*)calloc(nx*nz,sizeof(float));
    float *Vp_h = (float*)calloc(nx*nz,sizeof(float));
    float *source_h = (float*)calloc(nt,sizeof(float));
    
    float *U =(float*)calloc(nx*nz*nt ,sizeof(float));


    FILE *ro = fopen("density.bin","rb");
    fread(P_h,nx*nz,sizeof(float),ro);
    fclose(ro);

    FILE *v_p = fopen("VelocityP.bin","rb");
    fread(Vp_h,nx*nz,sizeof(float),v_p);
    fclose(v_p);

    FILE *v_s = fopen("VelocityS.bin","rb");
    fread(Vs_h,nx*nz,sizeof(float),v_s);
    fclose(v_s);


    /******* SOURCE *****/
    int it  = 0;
    float t = 0;
    for (it=0;it<nt;it++)
    {
    source_h[it] = -(1.0-2.0*pow(PI*f*(t-(1.0/f)),2))*exp(-pow(PI*f*(t-(1.0/f)),2));
    t += dt;
    }

    /******* CUDA *******/
    float *Ux, *Uz, *Txx, *Txz, *Tzz, *P, *Vs, *Vp;
    float *source;

    hipMalloc((void **) &Ux, nx*nz*sizeof(float));
    hipMalloc((void **) &Uz, nx*nz*sizeof(float));
    hipMalloc((void **) &Txx, nx*nz*sizeof(float));
    hipMalloc((void **) &Txz, nx*nz*sizeof(float));
    hipMalloc((void **) &Tzz, nx*nz*sizeof(float));

    hipMalloc((void **) &P, nx*nz*sizeof(float));
    hipMalloc((void **) &Vp, nx*nz*sizeof(float));
    hipMalloc((void **) &Vs, nx*nz*sizeof(float));

    hipMalloc((void **) &source, nt*sizeof(float));


    hipMemcpy(P, P_h, nx*nz*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(Vs, Vs_h, nx*nz*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(Vp, Vp_h, nx*nz*sizeof(float), hipMemcpyHostToDevice);

    hipMemcpy(source, source_h, nt*sizeof(float), hipMemcpyHostToDevice);


    hipMemset(Ux, 0, nx*nz*sizeof(float));
    hipMemset(Uz, 0, nx*nz*sizeof(float));
    hipMemset(Txx, 0, nx*nz*sizeof(float));
    hipMemset(Txz, 0, nx*nz*sizeof(float));
    hipMemset(Tzz, 0, nx*nz*sizeof(float));


    dim3 Grid(((nx-1)/32)+1,((nz-1)/32)+1);
    dim3 Block(32,32);

    for(it=0;it<nt;it++)
    {
        propagator_U <<<Grid,Block>>>(Ux, Uz, Txx, Txz, Tzz, P, nx, nz, dt, dh);
    	propagator_T <<<Grid,Block>>>(Ux, Uz, Txx, Txz, Tzz, Vp, Vs, P, source, nx, nz, dt, dh, sx, sz, it);

        hipMemcpy(U+(nx*nz*it), Ux , nx*nz*sizeof(float), hipMemcpyDeviceToHost);
    }

    FILE *field_f;
    field_f=fopen("field.bin", "wb");
    fwrite(U,sizeof(float),nx*nz*nt, field_f);
    fclose(field_f);

    FILE *source_f;
    source_f=fopen("source.bin", "wb");
    fwrite(source_h,sizeof(float),nt, source_f);
    fclose(source_f);

    hipFree(Ux);
    hipFree(Uz);
    hipFree(Txx);
    hipFree(Txz);
    hipFree(Tzz);
    hipFree(P);
    hipFree(Vs);
    hipFree(Vp);
    hipFree(source);


    free(P_h);
    free(Vs_h);
    free(Vp_h);
    free(source_h);
    free(U);

    return 0;  
}
	.text
	.file	"elastic.hip"
	.globl	_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff # -- Begin function _Z27__device_stub__propagator_UPfS_S_S_S_S_iiff
	.type	_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff,@function
_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff: # @_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	8(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	movq	%r9, 64(%rbx)
	movq	%r10, 72(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12propagator_UPfS_S_S_S_S_iiff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff, .Lfunc_end0-_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii # -- Begin function _Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.type	_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii,@function
_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii: # @_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	8(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	movq	%r9, 88(%rbx)
	movq	%r10, 96(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii, .Lfunc_end1-_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0xbfd0000000000000              # double -0.25
.LCPI2_1:
	.quad	0x402921fb54442d18              # double 12.566370614359172
.LCPI2_2:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_3:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_4:
	.long	0x3b03126f                      # float 0.00200000009
.LCPI2_5:
	.long	0x41a00000                      # float 20
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$10000, %edi                    # imm = 0x2710
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r12
	movl	$10000, %edi                    # imm = 0x2710
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r14
	movl	$10000, %edi                    # imm = 0x2710
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r15
	movl	$500, %edi                      # imm = 0x1F4
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r13
	movl	$5000000, %edi                  # imm = 0x4C4B40
	movl	$4, %esi
	callq	calloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$10000, %esi                    # imm = 0x2710
	movl	$4, %edx
	movq	%r12, 88(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movq	%rax, %rcx
	callq	fread
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.2, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$10000, %esi                    # imm = 0x2710
	movl	$4, %edx
	movq	%r15, 72(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	movq	%rax, %rcx
	callq	fread
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.3, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$10000, %esi                    # imm = 0x2710
	movl	$4, %edx
	movq	%r14, 80(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	movq	%rax, %rcx
	callq	fread
	movq	%rbx, %rdi
	callq	fclose
	xorps	%xmm0, %xmm0
	xorl	%ebx, %ebx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 40(%rsp)                 # 4-byte Spill
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm0, %xmm1
	addsd	.LCPI2_0(%rip), %xmm1
	mulsd	.LCPI2_1(%rip), %xmm1
	movapd	%xmm1, %xmm0
	movapd	.LCPI2_3(%rip), %xmm3           # xmm3 = [-0.0E+0,-0.0E+0]
	xorpd	%xmm3, %xmm0
	mulsd	%xmm1, %xmm0
	mulsd	%xmm1, %xmm1
	addsd	%xmm1, %xmm1
	movsd	.LCPI2_2(%rip), %xmm2           # xmm2 = mem[0],zero
	subsd	%xmm1, %xmm2
	xorpd	%xmm3, %xmm2
	movapd	%xmm2, 112(%rsp)                # 16-byte Spill
	callq	exp
	mulsd	112(%rsp), %xmm0                # 16-byte Folded Reload
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r13,%rbx,4)
	movss	40(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	.LCPI2_4(%rip), %xmm0
	incq	%rbx
	cmpq	$500, %rbx                      # imm = 0x1F4
	jne	.LBB2_1
# %bb.2:
	movabsq	$137438953504, %rbp             # imm = 0x2000000020
	movabsq	$17179869188, %rbx              # imm = 0x400000004
	movq	%rsp, %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	56(%rsp), %r15
	movl	$40000, %esi                    # imm = 0x9C40
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	104(%rsp), %r14
	movl	$40000, %esi                    # imm = 0x9C40
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	96(%rsp), %r12
	movl	$2000, %esi                     # imm = 0x7D0
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	88(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$2000, %edx                     # imm = 0x7D0
	movq	%r13, 40(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	xorl	%r14d, %r14d
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	hipMemset
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	hipMemset
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	hipMemset
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	hipMemset
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	hipMemset
	movl	$100, %r15d
	movl	$50, %r12d
	movq	64(%rsp), %r13                  # 8-byte Reload
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	movq	(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	56(%rsp), %r9
	movss	.LCPI2_4(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI2_5(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_5:                                #   in Loop: Header=BB2_3 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_3 Depth=1
	movq	(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	48(%rsp), %r9
	movss	.LCPI2_4(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI2_5(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	136(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB2_7:                                #   in Loop: Header=BB2_3 Depth=1
	movq	(%rsp), %rsi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	incq	%r14
	addq	$40000, %r13                    # imm = 0x9C40
	cmpq	$500, %r14                      # imm = 0x1F4
	jne	.LBB2_3
# %bb.8:
	movl	$.L.str.4, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$4, %esi
	movl	$5000000, %edx                  # imm = 0x4C4B40
	movq	64(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%rax, %rcx
	callq	fwrite
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.6, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$4, %esi
	movl	$500, %edx                      # imm = 0x1F4
	movq	40(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movq	%rax, %rcx
	callq	fwrite
	movq	%rbx, %rdi
	callq	fclose
	movq	(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12propagator_UPfS_S_S_S_S_iiff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12propagator_UPfS_S_S_S_S_iiff,@object # @_Z12propagator_UPfS_S_S_S_S_iiff
	.section	.rodata,"a",@progbits
	.globl	_Z12propagator_UPfS_S_S_S_S_iiff
	.p2align	3, 0x0
_Z12propagator_UPfS_S_S_S_S_iiff:
	.quad	_Z27__device_stub__propagator_UPfS_S_S_S_S_iiff
	.size	_Z12propagator_UPfS_S_S_S_S_iiff, 8

	.type	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii,@object # @_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.globl	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.p2align	3, 0x0
_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii:
	.quad	_Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.size	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"density.bin"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"rb"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"VelocityP.bin"
	.size	.L.str.2, 14

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"VelocityS.bin"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"field.bin"
	.size	.L.str.4, 10

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"wb"
	.size	.L.str.5, 3

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"source.bin"
	.size	.L.str.6, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12propagator_UPfS_S_S_S_S_iiff"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii"
	.size	.L__unnamed_2, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__propagator_UPfS_S_S_S_S_iiff
	.addrsig_sym _Z27__device_stub__propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12propagator_UPfS_S_S_S_S_iiff
	.addrsig_sym _Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12propagator_UPfS_S_S_S_S_iiff ; -- Begin function _Z12propagator_UPfS_S_S_S_S_iiff
	.globl	_Z12propagator_UPfS_S_S_S_S_iiff
	.p2align	8
	.type	_Z12propagator_UPfS_S_S_S_S_iiff,@function
_Z12propagator_UPfS_S_S_S_S_iiff:       ; @_Z12propagator_UPfS_S_S_S_S_iiff
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b128 s[8:11], s[0:1], 0x30
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s8, -1
	s_add_i32 s3, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_lt_i32_e64 s4, 0, v0
	v_cmp_gt_i32_e64 s2, s3, v1
	v_cmp_lt_i32_e64 s3, 0, v1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mul_lo_u32 v5, v1, s8
	s_load_b128 s[12:15], s[0:1], 0x20
	v_div_scale_f32 v15, null, s11, s11, s10
	s_load_b256 s[0:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v17, v15
	v_add_nc_u32_e32 v1, v5, v0
	v_subrev_nc_u32_e32 v5, s8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v19, -v15, v17, 1.0
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_fmac_f32_e32 v17, v19, v17
	v_add_nc_u32_e32 v5, v5, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s14, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s15, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v7, vcc_lo, s4, v1
	global_load_b32 v13, v[3:4], off
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v2, vcc_lo
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_add_co_u32 v11, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v2, vcc_lo
	global_load_b64 v[6:7], v[7:8], off offset:-4
	v_add_co_u32 v8, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[11:12], off
	global_load_b32 v10, v[8:9], off
	v_add_co_u32 v8, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v2, vcc_lo
	v_div_scale_f32 v21, s0, s10, s11, s10
	global_load_b32 v14, v[8:9], off
	s_waitcnt vmcnt(4)
	v_div_scale_f32 v16, null, v13, v13, 1.0
	v_div_scale_f32 v22, vcc_lo, 1.0, v13, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v18, v16
	s_waitcnt vmcnt(3)
	v_sub_f32_e32 v6, v7, v6
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v6, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v16, v18, 1.0
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v0, v0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v18, v20, v18
	v_dual_mul_f32 v20, v21, v17 :: v_dual_mul_f32 v19, v22, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v24, -v15, v20, v21
	v_fma_f32 v23, -v16, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v20, v24, v17 :: v_dual_fmac_f32 v19, v23, v18
	v_fma_f32 v15, -v15, v20, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v16, v19, v22
	v_div_fmas_f32 v7, v16, v18, v19
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v15, v15, v17, v20
	v_div_fixup_f32 v6, v7, v13, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v13, v15, s11, s10
	v_mul_f32_e32 v6, v13, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v14, v6, v0
	global_store_b32 v[8:9], v14, off
	global_load_b32 v9, v[3:4], off
	v_lshl_add_u32 v3, s8, 1, v5
	global_load_b64 v[5:6], v[11:12], off
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s12, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s13, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s12, v1
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v2, v[7:8], off
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(4)
	v_div_scale_f32 v7, null, v9, v9, 1.0
	v_div_scale_f32 v11, vcc_lo, 1.0, v9, 1.0
	s_waitcnt vmcnt(3)
	v_sub_f32_e32 v5, v6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v7, v8, 1.0
	s_waitcnt vmcnt(2)
	v_dual_fmac_f32 v8, v10, v8 :: v_dual_add_f32 v3, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, v11, v8
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v7, v10, v11
	v_fmac_f32_e32 v10, v12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v10, v11
	v_div_fmas_f32 v7, v7, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v6, v7, v9, 1.0
	v_mul_f32_e32 v5, v13, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v2
	global_store_b32 v[0:1], v4, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12propagator_UPfS_S_S_S_S_iiff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12propagator_UPfS_S_S_S_S_iiff, .Lfunc_end0-_Z12propagator_UPfS_S_S_S_S_iiff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 828
; NumSgprs: 18
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii ; -- Begin function _Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.globl	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
	.p2align	8
	.type	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii,@function
_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii: ; @_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x74
	s_load_b128 s[24:27], s[0:1], 0x48
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s24, v0
	v_cmp_gt_i32_e64 s2, s25, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_5
; %bb.1:
	s_clause 0x1
	s_load_b128 s[28:31], s[0:1], 0x58
	s_load_b512 s[8:23], s[0:1], 0x0
	s_add_i32 s2, s24, -1
	s_add_i32 s3, s25, -1
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s2, s3, v1
	v_cmp_lt_i32_e64 s3, 0, v1
	v_cmp_lt_i32_e64 s4, 0, v0
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_mul_lo_u32 v18, v1, s24
	s_mov_b32 s5, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v18, v0
	v_subrev_nc_u32_e32 v16, s24, v18
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v13, vcc_lo, s18, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s19, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s20, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v3, vcc_lo
	global_load_b32 v17, v[13:14], off
	global_load_b32 v19, v[4:5], off
	s_waitcnt vmcnt(1)
	v_frexp_mant_f32_e64 v6, |v17|
	s_waitcnt vmcnt(0)
	v_frexp_mant_f32_e64 v7, |v19|
	v_frexp_exp_i32_f32_e32 v43, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e64 s2, 0x3f2aaaab, v6
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, 0, 1, s2
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_ldexp_f32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v7, v7, v9
	v_dual_add_f32 v8, 1.0, v6 :: v_dual_add_f32 v11, -1.0, v7
	v_add_f32_e32 v9, 1.0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v24, v8
	v_rcp_f32_e32 v25, v9
	v_dual_add_f32 v10, -1.0, v6 :: v_dual_add_f32 v15, -1.0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v15
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v27, v11, v25 :: v_dual_mul_f32 v26, v10, v24
	v_dual_add_f32 v12, -1.0, v8 :: v_dual_mul_f32 v21, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v20, v8, v26
	v_fma_f32 v22, v27, v9, -v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, v27, v7
	v_add_f32_e32 v28, v21, v22
	v_sub_f32_e32 v6, v6, v12
	v_fma_f32 v12, v26, v8, -v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v21, v28, v21 :: v_dual_fmac_f32 v12, v26, v6
	v_add_co_u32 v6, s3, s22, v2
	v_add_co_ci_u32_e64 v7, s3, s23, v3, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v23, v20, v12
	v_add_nc_u32_e32 v8, v16, v0
	v_dual_sub_f32 v22, v21, v22 :: v_dual_sub_f32 v29, v10, v23
	v_sub_f32_e32 v20, v23, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v9, 31, v8
	v_sub_f32_e32 v31, v10, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[15:16], 2, v[8:9]
	v_add_co_u32 v9, s3, s8, v2
	v_dual_sub_f32 v23, v31, v23 :: v_dual_sub_f32 v32, v20, v12
	v_sub_f32_e32 v30, v11, v28
	v_add_co_ci_u32_e64 v10, s3, s9, v3, s3
	global_load_b32 v31, v[6:7], off
	global_load_b64 v[20:21], v[9:10], off
	v_add_f32_e32 v23, v32, v23
	v_sub_f32_e32 v11, v11, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v28, v11, v28
	v_add_co_u32 v11, s3, s10, v2
	v_add_co_ci_u32_e64 v12, s3, s11, v3, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f32_e32 v22, v22, v28
	v_add_f32_e32 v28, v29, v23
	v_add_co_u32 v15, s3, s10, v15
	v_add_co_ci_u32_e64 v16, s3, s11, v16, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v29, v30, v22
	v_add_co_u32 v22, s3, s12, v2
	v_add_co_ci_u32_e64 v23, s3, s13, v3, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v25, v25, v29
	v_add_f32_e32 v33, v27, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_sub_f32 v27, v33, v27 :: v_dual_mul_f32 v24, v24, v28
	s_clause 0x1
	global_load_b32 v28, v[11:12], off
	global_load_b32 v29, v[15:16], off
	global_load_b32 v30, v[22:23], off
	v_dual_sub_f32 v25, v25, v27 :: v_dual_add_f32 v32, v26, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v37, v25, v25 :: v_dual_mul_f32 v34, v32, v32
	v_sub_f32_e32 v26, v32, v26
	v_sub_f32_e32 v24, v24, v26
	v_mul_f32_e32 v26, v33, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v36, v33, v33, -v26
	v_fmac_f32_e32 v36, v33, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v37, v26, v36
	v_add_f32_e32 v35, v24, v24
	v_fmaak_f32 v39, s5, v37, 0x3e91f4c4
	v_fma_f32 v27, v32, v32, -v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v27, v32, v35
	v_add_f32_e32 v35, v34, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmaak_f32 v39, v37, v39, 0x3ecccdef
	v_sub_f32_e32 v26, v37, v26
	v_sub_f32_e32 v34, v35, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v38, s5, v35, 0x3e91f4c4 :: v_dual_sub_f32 v27, v27, v34
	v_dual_mul_f32 v41, v37, v39 :: v_dual_sub_f32 v26, v36, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v36, v37, v39, -v41
	v_dual_fmac_f32 v36, v26, v39 :: v_dual_mul_f32 v39, v33, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v44, v41, v36
	v_fmaak_f32 v38, v35, v38, 0x3ecccdef
	v_fma_f32 v46, v37, v33, -v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v41, v44, v41 :: v_dual_mul_f32 v40, v35, v38
	v_fmac_f32_e32 v46, v37, v25
	v_ldexp_f32 v25, v25, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v34, v35, v38, -v40
	v_fmac_f32_e32 v34, v27, v38
	v_mul_f32_e32 v38, v32, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v45, v35, v32, -v38
	v_fmac_f32_e32 v45, v35, v24
	v_ldexp_f32 v24, v24, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v45, v27, v32 :: v_dual_add_f32 v42, v40, v34
	v_fmac_f32_e32 v46, v26, v33
	v_ldexp_f32 v33, v33, 1
	v_ldexp_f32 v32, v32, 1
	v_dual_add_f32 v47, 0x3f2aaaaa, v42 :: v_dual_add_f32 v48, 0x3f2aaaaa, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v36, v36, v41 :: v_dual_add_f32 v35, 0xbf2aaaaa, v47
	v_sub_f32_e32 v40, v42, v40
	v_dual_add_f32 v36, 0x31739010, v36 :: v_dual_sub_f32 v35, v42, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v34, v34, v40
	v_add_f32_e32 v34, 0x31739010, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v26, v34, v35
	v_add_f32_e32 v35, v38, v45
	v_subrev_co_ci_u32_e64 v34, s2, 0, v43, s2
	v_dual_add_f32 v41, v47, v26 :: v_dual_add_f32 v40, 0xbf2aaaaa, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v38, v35, v38
	v_cvt_f32_i32_e32 v34, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v37, v44, v40
	v_frexp_exp_i32_f32_e32 v40, v19
	v_sub_f32_e32 v44, v47, v41
	v_mul_f32_e32 v47, v35, v41
	v_dual_add_f32 v27, v36, v37 :: v_dual_add_f32 v36, v39, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v40, vcc_lo, 0, v40, vcc_lo
	v_dual_add_f32 v26, v26, v44 :: v_dual_add_f32 v37, v48, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v44, v35, v41, -v47
	v_sub_f32_e32 v39, v36, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v43, v36, v37 :: v_dual_fmac_f32 v44, v35, v26
	v_cvt_f32_i32_e32 v26, v40
	v_dual_sub_f32 v42, v48, v37 :: v_dual_mul_f32 v35, 0x3f317218, v34
	v_add_f32_e32 v27, v27, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v42, v36, v37, -v43
	v_dual_fmac_f32 v42, v36, v27 :: v_dual_sub_f32 v27, v45, v38
	v_sub_f32_e32 v39, v46, v39
	v_fma_f32 v38, 0x3f317218, v34, -v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v42, v39, v37
	v_add_f32_e32 v36, v43, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v39, v33, v36 :: v_dual_sub_f32 v40, v36, v43
	v_sub_f32_e32 v33, v39, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v33, v36, v33
	v_dual_fmac_f32 v44, v27, v41 :: v_dual_mul_f32 v27, 0x3f317218, v26
	v_sub_f32_e32 v40, v42, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v37, v47, v44
	v_sub_f32_e32 v43, v37, v47
	v_add_f32_e32 v41, v32, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v42, v44, v43
	v_fma_f32 v43, 0x3f317218, v26, -v27
	v_add_f32_e32 v24, v24, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v43, 0xb102e308, v26
	v_fmac_f32_e32 v38, 0xb102e308, v34
	v_add_f32_e32 v26, v35, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v32, v41, v32 :: v_dual_sub_f32 v35, v26, v35
	v_dual_sub_f32 v32, v37, v32 :: v_dual_sub_f32 v35, v38, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v24, v24, v32
	v_add_f32_e32 v32, v27, v43
	v_sub_f32_e32 v27, v32, v27
	v_add_f32_e32 v25, v25, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v27, v43, v27
	v_add_f32_e32 v25, v25, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v33, v39, v25
	v_dual_sub_f32 v39, v33, v39 :: v_dual_add_f32 v36, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v25, v25, v39
	v_dual_add_f32 v34, v41, v24 :: v_dual_add_f32 v39, v27, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v37, v26, v34
	v_dual_sub_f32 v40, v34, v41 :: v_dual_sub_f32 v41, v37, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v24, v24, v40
	v_sub_f32_e32 v40, v37, v41
	v_sub_f32_e32 v34, v34, v41
	s_waitcnt vmcnt(3)
	v_sub_f32_e32 v20, v21, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v26, v26, v40
	v_add_f32_e32 v26, v34, v26
	v_sub_f32_e32 v34, v39, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v38, v36, v32 :: v_dual_sub_f32 v25, v25, v34
	v_sub_f32_e32 v42, v36, v38
	v_dual_sub_f32 v33, v33, v38 :: v_dual_add_f32 v38, v35, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v32, v32, v42
	v_add_f32_e32 v26, v38, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v32, v33, v32 :: v_dual_sub_f32 v33, v38, v35
	v_add_f32_e32 v32, v39, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v38, v38, v33 :: v_dual_sub_f32 v39, v39, v34
	v_dual_sub_f32 v24, v24, v33 :: v_dual_add_f32 v33, v37, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v40, v36, v32 :: v_dual_sub_f32 v35, v35, v38
	v_sub_f32_e32 v27, v27, v39
	v_div_scale_f32 v39, null, s27, s27, s26
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v34, v40, v36
	v_sub_f32_e32 v36, v33, v37
	v_add_f32_e32 v25, v25, v27
	v_add_f32_e32 v24, v24, v35
	v_rcp_f32_e32 v42, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v27, v32, v34 :: v_dual_sub_f32 v26, v26, v36
	v_dual_add_f32 v25, v25, v27 :: v_dual_add_f32 v24, v24, v26
	s_waitcnt_depctr 0xfff
	v_fma_f32 v48, -v39, v42, 1.0
	v_dual_add_f32 v26, v40, v25 :: v_dual_add_f32 v27, v33, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v42, v48, v42
	v_dual_sub_f32 v32, v26, v40 :: v_dual_sub_f32 v33, v27, v33
	v_dual_mul_f32 v35, 0, v26 :: v_dual_mul_f32 v36, 0, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v25, v25, v32 :: v_dual_add_f32 v32, v27, v27
	v_sub_f32_e32 v24, v24, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v35, 2.0, v25
	v_fma_f32 v25, v27, 2.0, -v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v36, 2.0, v24
	v_add_f32_e32 v25, v25, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v27, v32, v25 :: v_dual_add_f32 v34, v26, v26
	v_fma_f32 v26, v26, 2.0, -v34
	v_cmp_class_f32_e64 vcc_lo, v34, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v24, v26, v35
	v_add_f32_e32 v26, v34, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v33, v26, v34, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v32, 0x204
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v33|
	v_cndmask_b32_e32 v35, v27, v32, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v33
	v_dual_sub_f32 v27, v27, v32 :: v_dual_sub_f32 v26, v26, v34
	v_cndmask_b32_e64 v36, 0, 0x37000000, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v35
	v_dual_sub_f32 v24, v24, v26 :: v_dual_sub_f32 v25, v25, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v38, v33, v36
	v_cndmask_b32_e64 v37, 0, 0x37000000, vcc_lo
	v_cndmask_b32_e64 v24, 0, v24, s2
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v35|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v41, 0x3fb8aa3b, v38 :: v_dual_sub_f32 v40, v35, v37
	v_add_f32_e32 v24, v36, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, 0, v25, s2
	v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v38
	v_fma_f32 v44, 0x3fb8aa3b, v38, -v41
	v_mul_f32_e32 v43, 0x3fb8aa3b, v40
	v_rndne_f32_e32 v45, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v25, v37, v25 :: v_dual_fmac_f32 v44, 0x32a5705f, v38
	v_fma_f32 v46, 0x3fb8aa3b, v40, -v43
	v_rndne_f32_e32 v47, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v41, v41, v45
	v_cvt_i32_f32_e32 v26, v45
	v_dual_fmac_f32 v46, 0x32a5705f, v40 :: v_dual_sub_f32 v43, v43, v47
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f32_e32 v41, v41, v44
	v_cvt_i32_f32_e32 v27, v47
	v_div_scale_f32 v44, vcc_lo, s26, s27, s26
	v_add_f32_e32 v43, v43, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v34, v41
	v_mul_f32_e32 v32, v44, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v41, v43
	v_fma_f32 v33, -v39, v32, v44
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v26, v34, v26
	v_fmac_f32_e32 v32, v33, v42
	v_ldexp_f32 v27, v41, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v26, 0, v26, s2
	v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v40
	v_cndmask_b32_e64 v27, 0, v27, s2
	v_cmp_nlt_f32_e64 s2, 0x42b17218, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v26, 0x7f800000, v26, s2
	v_cmp_nlt_f32_e64 s2, 0x42b17218, v40
	v_fma_f32 v24, v26, v24, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v27, 0x7f800000, v27, s2
	v_cmp_eq_f32_e64 s2, 0x7f800000, v26
	v_fma_f32 v25, v27, v25, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v24, v24, v26, s2
	v_cmp_eq_f32_e64 s2, 0x7f800000, v27
	v_fma_f32 v26, -v39, v32, v44
	v_add_f32_e64 v24, |v24|, |v24|
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, v25, v27, s2
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v17|
	v_div_fmas_f32 v26, v26, v42, v32
	v_cmp_neq_f32_e32 vcc_lo, 0, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, 0x7f800000, |v25|, s2
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v19|
	v_div_fixup_f32 v17, v26, s27, s26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v25, 0, v25, vcc_lo
	v_cndmask_b32_e64 v24, 0x7f800000, v24, s2
	v_cmp_neq_f32_e32 vcc_lo, 0, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v19, 0, v24 :: v_dual_mul_f32 v24, v31, v25
	v_sub_f32_e32 v19, v25, v19
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v21, v17, v24 :: v_dual_sub_f32 v24, v28, v29
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v19, v31, v19 :: v_dual_fmac_f32 v30, v20, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, v17, v19
	v_fmac_f32_e32 v30, v24, v19
	global_store_b32 v[22:23], v30, off
	global_load_b32 v19, v[13:14], off
	global_load_b32 v20, v[4:5], off
	s_waitcnt vmcnt(1)
	v_frexp_mant_f32_e64 v13, |v19|
	s_waitcnt vmcnt(0)
	v_frexp_mant_f32_e64 v14, |v20|
	v_frexp_exp_i32_f32_e32 v40, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e64 s2, 0x3f2aaaab, v13
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, 1, s2
	v_cndmask_b32_e64 v22, 0, 1, vcc_lo
	v_ldexp_f32 v13, v13, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v14, v14, v22
	v_dual_add_f32 v21, 1.0, v13 :: v_dual_add_f32 v22, 1.0, v14
	v_dual_add_f32 v25, -1.0, v13 :: v_dual_add_f32 v26, -1.0, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v23, v21
	v_rcp_f32_e32 v24, v22
	v_dual_add_f32 v29, -1.0, v21 :: v_dual_add_f32 v30, -1.0, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v13, v13, v29 :: v_dual_sub_f32 v14, v14, v30
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v27, v25, v23 :: v_dual_mul_f32 v28, v26, v24
	v_dual_mul_f32 v31, v21, v27 :: v_dual_mul_f32 v32, v22, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v29, v27, v21, -v31
	v_fma_f32 v30, v28, v22, -v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v29, v27, v13 :: v_dual_fmac_f32 v30, v28, v14
	v_add_nc_u32_e32 v13, v18, v1
	v_dual_add_f32 v18, v31, v29 :: v_dual_add_f32 v33, v32, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v14, 31, v13
	v_dual_sub_f32 v34, v25, v18 :: v_dual_sub_f32 v35, v26, v33
	v_dual_sub_f32 v31, v18, v31 :: v_dual_sub_f32 v32, v33, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[21:22], 2, v[13:14]
	v_dual_sub_f32 v25, v25, v34 :: v_dual_sub_f32 v26, v26, v35
	v_add_co_u32 v13, s3, s16, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v29, v31, v29 :: v_dual_sub_f32 v30, v32, v30
	v_dual_sub_f32 v18, v25, v18 :: v_dual_sub_f32 v25, v26, v33
	v_add_co_ci_u32_e64 v14, s3, s17, v3, s3
	v_add_co_u32 v21, s3, s22, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v22, s3, s23, v22, s3
	v_dual_add_f32 v18, v29, v18 :: v_dual_add_f32 v25, v30, v25
	global_load_b32 v26, v[6:7], off
	s_clause 0x1
	global_load_b32 v29, v[11:12], off
	global_load_b32 v15, v[15:16], off
	v_add_f32_e32 v16, v34, v18
	global_load_b32 v18, v[21:22], off
	v_add_f32_e32 v21, v35, v25
	s_clause 0x1
	global_load_b32 v22, v[9:10], off offset:8
	global_load_b32 v25, v[9:10], off
	v_mul_f32_e32 v16, v23, v16
	global_load_b32 v23, v[13:14], off
	v_dual_mul_f32 v21, v24, v21 :: v_dual_add_f32 v24, v27, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v30, v28, v21
	v_sub_f32_e32 v27, v24, v27
	v_mul_f32_e32 v31, v24, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v28, v30, v28
	v_dual_sub_f32 v16, v16, v27 :: v_dual_mul_f32 v27, v30, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v21, v21, v28
	v_fma_f32 v28, v24, v24, -v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v33, v30, v30, -v27
	v_add_f32_e32 v34, v21, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v33, v30, v34
	v_add_f32_e32 v34, v27, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v36, s5, v34, 0x3e91f4c4 :: v_dual_sub_f32 v27, v34, v27
	v_dual_sub_f32 v27, v33, v27 :: v_dual_fmaak_f32 v36, v34, v36, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v38, v34, v36
	v_fma_f32 v33, v34, v36, -v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v33, v27, v36
	v_dual_add_f32 v41, v38, v33 :: v_dual_add_f32 v32, v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v45, 0x3f2aaaaa, v41 :: v_dual_fmac_f32 v28, v24, v32
	v_sub_f32_e32 v38, v41, v38
	v_dual_add_f32 v32, v31, v28 :: v_dual_sub_f32 v33, v33, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmaak_f32 v35, s5, v32, 0x3e91f4c4
	v_sub_f32_e32 v31, v32, v31
	v_add_f32_e32 v33, 0x31739010, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmaak_f32 v35, v32, v35, 0x3ecccdef
	v_sub_f32_e32 v28, v28, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v37, v32, v35
	v_fma_f32 v31, v32, v35, -v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v31, v28, v35
	v_add_f32_e32 v39, v37, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v37, v39, v37 :: v_dual_add_f32 v44, 0x3f2aaaaa, v39
	v_sub_f32_e32 v31, v31, v37
	v_add_f32_e32 v37, 0xbf2aaaaa, v45
	v_mul_f32_e32 v35, v24, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v31, 0x31739010, v31 :: v_dual_mul_f32 v36, v30, v34
	v_fma_f32 v42, v32, v24, -v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v43, v34, v30, -v36
	v_fmac_f32_e32 v42, v32, v16
	v_add_f32_e32 v32, 0xbf2aaaaa, v44
	v_ldexp_f32 v16, v16, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v43, v34, v21
	v_ldexp_f32 v21, v21, 1
	v_sub_f32_e32 v32, v39, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v43, v27, v30
	v_ldexp_f32 v30, v30, 1
	v_add_f32_e32 v27, v31, v32
	v_fmac_f32_e32 v42, v28, v24
	v_subrev_co_ci_u32_e64 v31, s2, 0, v40, s2
	v_ldexp_f32 v24, v24, 1
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v19|
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f32_e32 v32, v35, v42
	v_sub_f32_e32 v34, v41, v37
	v_cvt_f32_i32_e32 v31, v31
	v_frexp_exp_i32_f32_e32 v37, v20
	v_dual_sub_f32 v35, v32, v35 :: v_dual_add_f32 v28, v33, v34
	v_add_f32_e32 v33, v36, v43
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v37, vcc_lo, 0, v37, vcc_lo
	v_add_f32_e32 v34, v45, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v36, v33, v36
	v_sub_f32_e32 v39, v45, v34
	v_mul_f32_e32 v40, v33, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v36, v43, v36
	v_add_f32_e32 v28, v28, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v39, v33, v34, -v40
	v_fmac_f32_e32 v39, v33, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v39, v36, v34
	v_add_f32_e32 v33, v40, v39
	v_add_f32_e32 v38, v44, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v36, v30, v33 :: v_dual_sub_f32 v41, v44, v38
	v_mul_f32_e32 v44, v32, v38
	v_dual_sub_f32 v30, v36, v30 :: v_dual_add_f32 v27, v27, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v41, v32, v38, -v44
	v_dual_sub_f32 v30, v33, v30 :: v_dual_fmac_f32 v41, v32, v27
	v_cvt_f32_i32_e32 v27, v37
	v_sub_f32_e32 v37, v33, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v37, v39, v37 :: v_dual_sub_f32 v28, v42, v35
	v_add_f32_e32 v21, v21, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v41, v28, v38
	v_dual_add_f32 v21, v21, v30 :: v_dual_add_f32 v34, v44, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v30, v36, v21
	v_add_f32_e32 v38, v24, v34
	v_sub_f32_e32 v40, v34, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v24, v38, v24
	v_sub_f32_e32 v39, v41, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v24, v34, v24
	v_add_f32_e32 v16, v16, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v16, v16, v24
	v_mul_f32_e32 v28, 0x3f317218, v27
	v_fma_f32 v40, 0x3f317218, v27, -v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v40, 0xb102e308, v27
	v_dual_mul_f32 v32, 0x3f317218, v31 :: v_dual_add_f32 v27, v28, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v35, 0x3f317218, v31, -v32
	v_add_f32_e32 v33, v27, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v35, 0xb102e308, v31
	v_add_f32_e32 v24, v32, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v32, v24, v32
	v_dual_sub_f32 v32, v35, v32 :: v_dual_sub_f32 v35, v33, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v39, v33, v35 :: v_dual_sub_f32 v36, v30, v36
	v_dual_sub_f32 v30, v30, v35 :: v_dual_sub_f32 v21, v21, v36
	v_add_f32_e32 v31, v38, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v34, v24, v31
	v_sub_f32_e32 v28, v27, v28
	v_sub_f32_e32 v27, v27, v39
	v_dual_sub_f32 v37, v31, v38 :: v_dual_sub_f32 v28, v40, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v27, v30, v27 :: v_dual_sub_f32 v16, v16, v37
	v_add_f32_e32 v36, v28, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_add_f32 v27, v36, v27 :: v_dual_sub_f32 v38, v34, v24
	s_waitcnt vmcnt(4)
	v_sub_f32_e32 v15, v29, v15
	v_sub_f32_e32 v37, v34, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v31, v31, v38 :: v_dual_sub_f32 v24, v24, v37
	v_dual_add_f32 v37, v33, v27 :: v_dual_add_f32 v24, v31, v24
	v_sub_f32_e32 v31, v36, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v36, v36, v31
	v_sub_f32_e32 v21, v21, v31
	v_dual_sub_f32 v31, v37, v33 :: v_dual_sub_f32 v28, v28, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v27, v27, v31
	v_add_f32_e32 v21, v21, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v21, v21, v27
	v_add_f32_e32 v35, v32, v16
	v_sub_f32_e32 v30, v35, v32
	v_add_f32_e32 v24, v35, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v35, v35, v30
	v_sub_f32_e32 v16, v16, v30
	v_add_f32_e32 v30, v34, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v32, v32, v35 :: v_dual_sub_f32 v33, v30, v34
	v_add_f32_e32 v16, v16, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v24, v24, v33
	v_add_f32_e32 v16, v16, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v24, v37, v21 :: v_dual_add_f32 v27, v30, v16
	v_sub_f32_e32 v28, v24, v37
	v_add_f32_e32 v31, v24, v24
	v_mul_f32_e32 v32, 0, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v30, v27, v30 :: v_dual_sub_f32 v21, v21, v28
	v_add_f32_e32 v28, v27, v27
	v_mul_f32_e32 v33, 0, v27
	v_fma_f32 v24, v24, 2.0, -v31
	v_sub_f32_e32 v16, v16, v30
	v_fmac_f32_e32 v32, 2.0, v21
	v_fma_f32 v21, v27, 2.0, -v28
	v_cmp_class_f32_e64 vcc_lo, v31, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v33, 2.0, v16
	v_dual_add_f32 v16, v24, v32 :: v_dual_add_f32 v21, v21, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v24, v31, v16 :: v_dual_add_f32 v27, v28, v21
	v_cndmask_b32_e32 v30, v24, v31, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v28, 0x204
	v_sub_f32_e32 v24, v24, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v32, v27, v28, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v30
	v_sub_f32_e32 v27, v27, v28
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v16, v16, v24
	v_cndmask_b32_e64 v33, 0, 0x37000000, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v32
	v_sub_f32_e32 v21, v21, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v35, v30, v33
	v_cndmask_b32_e64 v34, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v30|
	v_dual_mul_f32 v37, 0x3fb8aa3b, v35 :: v_dual_sub_f32 v36, v32, v34
	v_cndmask_b32_e32 v16, 0, v16, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v32|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v39, 0x3fb8aa3b, v35, -v37
	v_mul_f32_e32 v38, 0x3fb8aa3b, v36
	v_rndne_f32_e32 v40, v37
	v_cndmask_b32_e32 v21, 0, v21, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v35
	v_fmac_f32_e32 v39, 0x32a5705f, v35
	v_fma_f32 v41, 0x3fb8aa3b, v36, -v38
	v_rndne_f32_e32 v42, v38
	v_sub_f32_e32 v37, v37, v40
	v_cvt_i32_f32_e32 v24, v40
	v_add_f32_e32 v16, v33, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v41, 0x32a5705f, v36 :: v_dual_sub_f32 v38, v38, v42
	v_add_f32_e32 v37, v37, v39
	v_cvt_i32_f32_e32 v27, v42
	v_add_f32_e32 v21, v34, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v38, v38, v41
	v_exp_f32_e32 v31, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v28, v38
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v24, v31, v24
	v_ldexp_f32 v27, v28, v27
	v_cndmask_b32_e32 v24, 0, v24, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v27, 0, v27, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v35
	v_cndmask_b32_e32 v24, 0x7f800000, v24, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f32 v16, v24, v16, v24
	v_cndmask_b32_e32 v27, 0x7f800000, v27, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v24
	v_fma_f32 v21, v27, v21, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v16, v24, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v27
	v_add_f32_e64 v16, |v16|, |v16|
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v21, v21, v27, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v20|
	v_cndmask_b32_e64 v21, 0x7f800000, |v21|, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v16, 0x7f800000, v16, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v19
	v_cndmask_b32_e32 v19, 0, v21, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v20, v26, v19
	v_cndmask_b32_e32 v16, 0, v16, vcc_lo
	v_sub_f32_e32 v16, v19, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v19, v17, v20
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v16, v18, v16
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v18, v22, v25 :: v_dual_fmac_f32 v23, v15, v19
	v_mul_f32_e32 v15, v17, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v18, v15
	global_store_b32 v[13:14], v23, off
	global_load_b32 v13, v[4:5], off
	s_waitcnt vmcnt(0)
	v_frexp_mant_f32_e64 v4, |v13|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v4, v4, v5
	v_add_f32_e32 v5, 1.0, v4
	v_add_f32_e32 v15, -1.0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v14, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, v15, v14
	v_dual_add_f32 v18, -1.0, v5 :: v_dual_mul_f32 v19, v5, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v18, v4, v18
	v_lshl_add_u32 v4, s24, 1, v8
	v_fma_f32 v20, v16, v5, -v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_fmac_f32_e32 v20, v16, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_f32_e32 v8, v19, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s2, s8, v4
	v_add_co_ci_u32_e64 v5, s2, s9, v5, s2
	s_clause 0x1
	global_load_b32 v21, v[4:5], off
	global_load_b32 v9, v[9:10], off
	global_load_b32 v6, v[6:7], off
	global_load_b64 v[4:5], v[11:12], off offset:-4
	v_dual_sub_f32 v18, v15, v8 :: v_dual_sub_f32 v19, v8, v19
	v_add_co_u32 v2, s2, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s2, s15, v3, s2
	v_sub_f32_e32 v15, v15, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v10, v19, v20
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v13|
	v_sub_f32_e32 v8, v15, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v10, v8
	global_load_b32 v8, v[2:3], off
	v_add_f32_e32 v7, v18, v7
	v_mul_f32_e32 v7, v14, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v16, v7
	v_sub_f32_e32 v11, v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v12, v10, v10 :: v_dual_sub_f32 v7, v7, v11
	v_fma_f32 v11, v10, v10, -v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v7, v7
	v_fmac_f32_e32 v11, v10, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v12, v11
	v_dual_fmaak_f32 v15, s5, v14, 0x3e91f4c4 :: v_dual_sub_f32 v12, v14, v12
	v_mul_f32_e32 v19, v10, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmaak_f32 v15, v14, v15, 0x3ecccdef
	v_sub_f32_e32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v20, v14, v10, -v19
	v_mul_f32_e32 v16, v14, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v20, v14, v7
	v_ldexp_f32 v7, v7, 1
	v_fma_f32 v12, v14, v15, -v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v20, v11, v10
	v_fmac_f32_e32 v12, v11, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v14, v19, v20
	v_add_f32_e32 v15, v16, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v16, v15, v16
	v_add_f32_e32 v18, 0x3f2aaaaa, v15
	v_sub_f32_e32 v12, v12, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v16, 0xbf2aaaaa, v18
	v_add_f32_e32 v12, 0x31739010, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v15, v15, v16
	v_add_f32_e32 v12, v12, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v18, v12
	v_sub_f32_e32 v15, v18, v11
	v_mul_f32_e32 v16, v14, v11
	s_waitcnt vmcnt(3)
	v_dual_sub_f32 v18, v14, v19 :: v_dual_sub_f32 v9, v21, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v12, v12, v15
	v_fma_f32 v15, v14, v11, -v16
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v18, v20, v18 :: v_dual_add_f32 v5, v9, v5
	v_fmac_f32_e32 v15, v14, v12
	v_frexp_exp_i32_f32_e32 v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v4, v5, v4 :: v_dual_fmac_f32 v15, v18, v11
	v_subrev_co_ci_u32_e32 v11, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v12, v16, v15
	v_cvt_f32_i32_e32 v11, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v12, v16
	v_dual_mul_f32 v18, 0x3f317218, v11 :: v_dual_sub_f32 v15, v15, v16
	v_ldexp_f32 v10, v10, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, 0x3f317218, v11, -v18
	v_dual_add_f32 v7, v7, v15 :: v_dual_add_f32 v14, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v16, 0xb102e308, v11
	v_sub_f32_e32 v10, v14, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v12, v10
	v_dual_add_f32 v7, v7, v10 :: v_dual_add_f32 v10, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v11, v14, v7
	v_sub_f32_e32 v18, v10, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v12, v10, v11
	v_sub_f32_e32 v14, v11, v14
	v_sub_f32_e32 v16, v16, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v15, v12, v10
	v_sub_f32_e32 v7, v7, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v19, v12, v15
	v_sub_f32_e32 v11, v11, v15
	v_add_f32_e32 v14, v16, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v19
	v_dual_add_f32 v10, v11, v10 :: v_dual_sub_f32 v11, v14, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, v14, v10
	v_sub_f32_e32 v14, v14, v11
	v_sub_f32_e32 v7, v7, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v15, v12, v10
	v_dual_sub_f32 v11, v16, v14 :: v_dual_sub_f32 v12, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v7, v7, v11 :: v_dual_sub_f32 v10, v10, v12
	v_add_f32_e32 v7, v7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v15, v7
	v_sub_f32_e32 v11, v10, v15
	v_add_f32_e32 v12, v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v14, 0, v10 :: v_dual_sub_f32 v7, v7, v11
	v_fma_f32 v10, v10, 2.0, -v12
	v_cmp_class_f32_e64 vcc_lo, v12, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, 2.0, v7
	v_add_f32_e32 v7, v10, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v12, v7
	v_cndmask_b32_e32 v11, v10, v12, vcc_lo
	v_sub_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v11
	v_sub_f32_e32 v7, v7, v10
	v_cndmask_b32_e64 v14, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v11|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v15, v11, v14
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, 0x3fb8aa3b, v15
	v_add_f32_e32 v7, v14, v7
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v18, 0x3fb8aa3b, v15, -v16
	v_rndne_f32_e32 v19, v16
	v_fmac_f32_e32 v18, 0x32a5705f, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v16, v16, v19
	v_cvt_i32_f32_e32 v12, v19
	v_add_f32_e32 v16, v16, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v16, v12
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, 0x7f800000, v10, vcc_lo
	v_fma_f32 v7, v10, v7, v10
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v7, v10, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v13
	v_cndmask_b32_e64 v7, 0x7f800000, |v7|, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_mul_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v17, v6
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v4, v6
	global_store_b32 v[2:3], v8, off
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s28, -1
	s_add_i32 s3, s29, -1
	v_cmp_eq_u32_e32 vcc_lo, s2, v0
	v_cmp_eq_u32_e64 s2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB1_5
; %bb.4:
	v_mad_u64_u32 v[2:3], null, v1, s24, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x40
	s_ashr_i32 s31, s30, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[2:3], s[30:31], 2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_mov_b32_e32 v2, 0
	v_add_co_u32 v0, vcc_lo, s16, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB1_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 49
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii, .Lfunc_end1-_Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5616
; NumSgprs: 34
; NumVgprs: 49
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 49
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12propagator_UPfS_S_S_S_S_iiff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12propagator_UPfS_S_S_S_S_iiff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         76
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .offset:         84
        .size:           4
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         92
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         108
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         116
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         118
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         120
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         122
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         124
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         126
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         168
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 360
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z12propagator_TPfS_S_S_S_S_S_S_S_iiffiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     49
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
