#include <math.h>
#include <stdio.h>
#include <stdlib.h>


__global__ void Babis_Kernel(double const *A, double  *B, double const *G, int n, int m, int patchSize_x, int patchSize_y, double filtSigma)
{
  int x,y,area_x,area_y;
  double norm,w_temp,diff=0,W=0,Products=0;
 

  // Set pixel coordinates

  int i = blockIdx.x*blockDim.x + threadIdx.x;
  int j = blockIdx.y*blockDim.y + threadIdx.y;
  
  // For every pixel we check every other pixel neighbor, if we are inside the table limits

  if( ( i>=patchSize_x ) && ( j>=patchSize_y ) && ( i<=(n-patchSize_x) -1 ) && ( j<=(m-patchSize_x) -1 ) )
  { 
    for(x=patchSize_x; x< (n-patchSize_x) ; x++)
    {
	   for(y=patchSize_y; y< (m-patchSize_y) ; y++)
        {
		   norm=0; 
		   w_temp=0;
		   
		// i,j indicate the coordinates of the current thread, while x,y indicate the coordinates of every other pixel-neighbor in the table/image and x_area,y_area indicate 
		// the area around the neighbor, for example 3x3, 5x5, 7x7.

		   for(area_x=-patchSize_x; area_x<=patchSize_x; area_x++)
             {
		      for(area_y=-patchSize_y; area_y<=patchSize_y; area_y++)
                {

				  diff=abs(A[(i+area_x)*m+(j+area_y)]-A[(x+area_x)*m+(y+area_y)]);

				  diff=diff*G[(area_x+patchSize_x)*((patchSize_y*2)+1)+(area_y+patchSize_y)];

				  diff=diff*diff;

				  norm+=diff;  
			 }
		    }

		    w_temp=exp(-norm/filtSigma);
		    W+=w_temp;
		    Products+=w_temp*A[x*m+y];
	    }
	}
  
     B[(i-patchSize_x)*(m-(2*patchSize_y)) + (j-patchSize_y)] = Products/W;
  }
}


	.file	"tmpxft_0033a7bd_00000000-6_Babis_Kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2029:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z12Babis_KernelPKdPdS0_iiiidPKdPdS0_iiiid
	.type	_Z43__device_stub__Z12Babis_KernelPKdPdS0_iiiidPKdPdS0_iiiid, @function
_Z43__device_stub__Z12Babis_KernelPKdPdS0_iiiidPKdPdS0_iiiid:
.LFB2051:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z12Babis_KernelPKdPdS0_iiiid(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2051:
	.size	_Z43__device_stub__Z12Babis_KernelPKdPdS0_iiiidPKdPdS0_iiiid, .-_Z43__device_stub__Z12Babis_KernelPKdPdS0_iiiidPKdPdS0_iiiid
	.globl	_Z12Babis_KernelPKdPdS0_iiiid
	.type	_Z12Babis_KernelPKdPdS0_iiiid, @function
_Z12Babis_KernelPKdPdS0_iiiid:
.LFB2052:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z12Babis_KernelPKdPdS0_iiiidPKdPdS0_iiiid
	.cfi_endproc
.LFE2052:
	.size	_Z12Babis_KernelPKdPdS0_iiiid, .-_Z12Babis_KernelPKdPdS0_iiiid
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12Babis_KernelPKdPdS0_iiiid"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12Babis_KernelPKdPdS0_iiiid(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2054:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>


__global__ void Babis_Kernel(double const *A, double  *B, double const *G, int n, int m, int patchSize_x, int patchSize_y, double filtSigma)
{
  int x,y,area_x,area_y;
  double norm,w_temp,diff=0,W=0,Products=0;
 

  // Set pixel coordinates

  int i = blockIdx.x*blockDim.x + threadIdx.x;
  int j = blockIdx.y*blockDim.y + threadIdx.y;
  
  // For every pixel we check every other pixel neighbor, if we are inside the table limits

  if( ( i>=patchSize_x ) && ( j>=patchSize_y ) && ( i<=(n-patchSize_x) -1 ) && ( j<=(m-patchSize_x) -1 ) )
  { 
    for(x=patchSize_x; x< (n-patchSize_x) ; x++)
    {
	   for(y=patchSize_y; y< (m-patchSize_y) ; y++)
        {
		   norm=0; 
		   w_temp=0;
		   
		// i,j indicate the coordinates of the current thread, while x,y indicate the coordinates of every other pixel-neighbor in the table/image and x_area,y_area indicate 
		// the area around the neighbor, for example 3x3, 5x5, 7x7.

		   for(area_x=-patchSize_x; area_x<=patchSize_x; area_x++)
             {
		      for(area_y=-patchSize_y; area_y<=patchSize_y; area_y++)
                {

				  diff=abs(A[(i+area_x)*m+(j+area_y)]-A[(x+area_x)*m+(y+area_y)]);

				  diff=diff*G[(area_x+patchSize_x)*((patchSize_y*2)+1)+(area_y+patchSize_y)];

				  diff=diff*diff;

				  norm+=diff;  
			 }
		    }

		    w_temp=exp(-norm/filtSigma);
		    W+=w_temp;
		    Products+=w_temp*A[x*m+y];
	    }
	}
  
     B[(i-patchSize_x)*(m-(2*patchSize_y)) + (j-patchSize_y)] = Products/W;
  }
}


	.text
	.file	"Babis_Kernel.hip"
	.globl	_Z27__device_stub__Babis_KernelPKdPdS0_iiiid # -- Begin function _Z27__device_stub__Babis_KernelPKdPdS0_iiiid
	.type	_Z27__device_stub__Babis_KernelPKdPdS0_iiiid,@function
_Z27__device_stub__Babis_KernelPKdPdS0_iiiid: # @_Z27__device_stub__Babis_KernelPKdPdS0_iiiid
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	32(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Babis_KernelPKdPdS0_iiiid, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__Babis_KernelPKdPdS0_iiiid, .Lfunc_end0-_Z27__device_stub__Babis_KernelPKdPdS0_iiiid
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Babis_KernelPKdPdS0_iiiid, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12Babis_KernelPKdPdS0_iiiid,@object # @_Z12Babis_KernelPKdPdS0_iiiid
	.section	.rodata,"a",@progbits
	.globl	_Z12Babis_KernelPKdPdS0_iiiid
	.p2align	3, 0x0
_Z12Babis_KernelPKdPdS0_iiiid:
	.quad	_Z27__device_stub__Babis_KernelPKdPdS0_iiiid
	.size	_Z12Babis_KernelPKdPdS0_iiiid, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12Babis_KernelPKdPdS0_iiiid"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__Babis_KernelPKdPdS0_iiiid
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12Babis_KernelPKdPdS0_iiiid
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12Babis_KernelPKdPdS0_iiiid ; -- Begin function _Z12Babis_KernelPKdPdS0_iiiid
	.globl	_Z12Babis_KernelPKdPdS0_iiiid
	.p2align	8
	.type	_Z12Babis_KernelPKdPdS0_iiiid,@function
_Z12Babis_KernelPKdPdS0_iiiid:          ; @_Z12Babis_KernelPKdPdS0_iiiid
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s15, s15, s3
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_add_nc_u32_e32 v8, s15, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s2, s7, v8
	v_cmp_le_i32_e32 vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_20
; %bb.1:
	s_sub_i32 s4, s4, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_20
; %bb.2:
	s_not_b32 s2, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s5
	v_cmp_ge_i32_e32 vcc_lo, s2, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_20
; %bb.3:                                ; %.preheader90
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_cmp_gt_i32 s4, s6
	s_cbranch_scc1 .LBB0_5
; %bb.4:                                ; %.preheader90.._crit_edge111_crit_edge
	s_mov_b32 s12, 0
	s_mov_b32 s13, 0x7ff80000
	s_lshl_b32 s33, s7, 1
	s_mov_b32 s14, 0
	s_branch .LBB0_6
.LBB0_5:
	s_mov_b32 s14, -1
                                        ; implicit-def: $sgpr12_sgpr13
                                        ; implicit-def: $sgpr33
.LBB0_6:                                ; %Flow172
	v_dual_mov_b32 v1, s12 :: v_dual_mov_b32 v2, s13
	v_subrev_nc_u32_e32 v9, s6, v0
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_19
; %bb.7:                                ; %.preheader.lr.ph
	s_sub_i32 s44, s5, s7
	s_sub_i32 s12, 0, s7
	s_cmp_gt_i32 s44, s7
	v_mul_lo_u32 v0, s5, v9
	s_cselect_b32 s45, -1, 0
	s_sub_i32 s46, 0, s6
	s_cmp_gt_i32 s6, -1
	s_mov_b32 s16, 0xfefa39ef
	s_cselect_b32 s47, -1, 0
	s_cmp_le_i32 s12, s7
	s_load_b64 s[12:13], s[0:1], 0x28
	v_add3_u32 v0, v3, v0, s15
	s_cselect_b32 s48, -1, 0
	s_lshl_b32 s33, s7, 1
	s_mov_b32 s14, 0x652b82fe
	s_mov_b32 s18, 0x3b39803f
	v_subrev_nc_u32_e32 v10, s7, v0
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s20, 0xfca7ab0c
	s_mov_b32 s22, 0x6a5dcb37
	s_mov_b32 s24, 0x623fde64
	s_mov_b32 s26, 0x7c89e6b0
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_mov_b32 s28, 0x14761f6e
	s_mov_b32 s30, 0x1852b7b0
	s_mov_b32 s34, 0x11122322
	s_mov_b32 s36, 0x555502a1
	s_mov_b32 s38, 0x55555511
	s_mov_b32 s40, 11
	s_mov_b32 s15, 0x3ff71547
	s_mov_b32 s17, 0xbfe62e42
	s_mov_b32 s19, 0xbc7abc9e
	s_mov_b32 s21, 0x3e928af3
	s_mov_b32 s23, 0x3e5ade15
	s_mov_b32 s25, 0x3ec71dee
	s_mov_b32 s27, 0x3efa0199
	s_mov_b32 s29, 0x3f2a01a0
	s_mov_b32 s31, 0x3f56c16c
	s_mov_b32 s35, 0x3f811111
	s_mov_b32 s37, 0x3fa55555
	s_mov_b32 s39, 0x3fc55555
	s_mov_b32 s41, 0x3fe00000
	s_mov_b32 s49, 0
	s_or_b32 s50, s33, 1
	s_mov_b32 s51, s6
.LBB0_8:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_10 Depth 2
                                        ;       Child Loop BB0_12 Depth 3
                                        ;         Child Loop BB0_13 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s45
	s_cbranch_vccnz .LBB0_17
; %bb.9:                                ; %.lr.ph104
                                        ;   in Loop: Header=BB0_8 Depth=1
	s_mul_i32 s52, s51, s5
	s_mov_b32 s53, s49
	s_mov_b32 s54, s7
.LBB0_10:                               ;   Parent Loop BB0_8 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_12 Depth 3
                                        ;         Child Loop BB0_13 Depth 4
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_and_not1_b32 vcc_lo, exec_lo, s47
	s_cbranch_vccnz .LBB0_16
; %bb.11:                               ; %.lr.ph98.preheader
                                        ;   in Loop: Header=BB0_10 Depth=2
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v11, v10
	v_mov_b32_e32 v5, 0
	s_mov_b32 s55, 0
	s_mov_b32 s56, s53
	s_mov_b32 s57, s46
.LBB0_12:                               ; %.lr.ph98
                                        ;   Parent Loop BB0_8 Depth=1
                                        ;     Parent Loop BB0_10 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_13 Depth 4
	v_mov_b32_e32 v6, v11
	s_mov_b32 s0, s55
	s_and_not1_b32 vcc_lo, exec_lo, s48
	s_mov_b32 s42, s56
	s_mov_b32 s58, s50
	s_cbranch_vccnz .LBB0_14
.LBB0_13:                               ;   Parent Loop BB0_8 Depth=1
                                        ;     Parent Loop BB0_10 Depth=2
                                        ;       Parent Loop BB0_12 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_ashrrev_i32_e32 v7, 31, v6
	s_ashr_i32 s43, s42, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[60:61], s[42:43], 3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s60, s8, s60
	v_lshlrev_b64 v[12:13], 3, v[6:7]
	s_addc_u32 s61, s9, s61
	s_ashr_i32 s1, s0, 31
	v_add_nc_u32_e32 v6, 1, v6
	s_load_b64 s[60:61], s[60:61], 0x0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s8, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[12:13], v[12:13], -s[60:61]
	s_lshl_b64 s[60:61], s[0:1], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s60, s2, s60
	s_addc_u32 s61, s3, s61
	s_add_i32 s58, s58, -1
	s_load_b64 s[60:61], s[60:61], 0x0
	s_add_i32 s42, s42, 1
	s_add_i32 s0, s0, 1
	s_cmp_lg_u32 s58, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], s[60:61], |v[12:13]|
	v_fma_f64 v[4:5], v[12:13], v[12:13], v[4:5]
	s_cbranch_scc1 .LBB0_13
.LBB0_14:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_12 Depth=3
	v_add_nc_u32_e32 v11, s5, v11
	s_add_i32 s0, s57, 1
	s_add_i32 s56, s56, s5
	s_add_i32 s55, s55, s50
	s_cmp_lg_u32 s57, s6
	s_cbranch_scc0 .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_12 Depth=3
	s_mov_b32 s57, s0
	s_branch .LBB0_12
.LBB0_16:                               ; %._crit_edge99
                                        ;   in Loop: Header=BB0_10 Depth=2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_div_scale_f64 v[6:7], null, s[12:13], s[12:13], -v[4:5]
	v_div_scale_f64 v[15:16], vcc_lo, -v[4:5], s[12:13], -v[4:5]
	s_add_i32 s42, s54, s52
	s_ashr_i32 s43, s42, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[42:43], s[42:43], 3
	v_rcp_f64_e32 v[11:12], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[6:7], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_fma_f64 v[13:14], -v[6:7], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_mul_f64 v[13:14], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[13:14], v[15:16]
	v_div_fmas_f64 v[6:7], v[6:7], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[4:5], v[6:7], s[12:13], -v[4:5]
	v_mul_f64 v[6:7], v[4:5], s[14:15]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[4:5]
	v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[6:7], v[6:7]
	v_fma_f64 v[11:12], v[6:7], s[16:17], v[4:5]
	v_cvt_i32_f64_e32 v15, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[6:7], s[18:19], v[11:12]
	v_fma_f64 v[13:14], v[11:12], s[22:23], s[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[24:25]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[28:29]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[34:35]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[38:39]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], 1.0
	v_fma_f64 v[6:7], v[11:12], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[6:7], v[6:7], v15
	v_cndmask_b32_e32 v7, 0x7ff00000, v7, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	v_cndmask_b32_e64 v5, 0, v7, s0
	s_add_u32 s0, s8, s42
	s_addc_u32 s1, s9, s43
	s_add_i32 s54, s54, 1
	s_load_b64 s[0:1], s[0:1], 0x0
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_add_i32 s53, s53, 1
	s_cmp_lt_i32 s54, s44
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[0:1], v[4:5], s[0:1], v[0:1]
	s_cbranch_scc1 .LBB0_10
.LBB0_17:                               ; %._crit_edge105
                                        ;   in Loop: Header=BB0_8 Depth=1
	s_add_i32 s51, s51, 1
	s_add_i32 s49, s49, s5
	s_cmp_lt_i32 s51, s4
	s_cbranch_scc1 .LBB0_8
; %bb.18:                               ; %._crit_edge111.loopexit
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], v[0:1]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_fma_f64 v[10:11], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[2:3], v[0:1]
	v_mul_f64 v[12:13], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[12:13], v[10:11]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[1:2], v[4:5], v[2:3], v[0:1]
.LBB0_19:                               ; %._crit_edge111
	v_subrev_nc_u32_e32 v0, s7, v8
	s_sub_i32 s0, s5, s33
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, v9, s0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	global_store_b64 v[3:4], v[1:2], off
.LBB0_20:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Babis_KernelPKdPdS0_iiiid
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 62
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12Babis_KernelPKdPdS0_iiiid, .Lfunc_end0-_Z12Babis_KernelPKdPdS0_iiiid
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1380
; NumSgprs: 64
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 64
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Babis_KernelPKdPdS0_iiiid
    .private_segment_fixed_size: 0
    .sgpr_count:     64
    .sgpr_spill_count: 0
    .symbol:         _Z12Babis_KernelPKdPdS0_iiiid.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
