#include<iostream>
#include <cuda.h>
#include <math.h>
#include<stdio.h>
#include<stdlib.h>
#include <sys/types.h>
#include <time.h>



using namespace std;

__device__ int mymin(int a, int b)
{
	int m = a;
	if(m > b)
		m=b;
	return m;
}
__device__ int min1(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

int min2(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

void swapDiagnolPointers(int **prev,int **current)
{
     int * temp = *prev;
     *prev      = *current;
     *current   = temp;
}

void swapDiagnolPointersForG(int **prevprev, int **prev,int **current)
{
     int * temp = *prevprev;
	 *prevprev = *prev;
     *prev      = *current;
     *current   = temp;
}

__global__ void less_than_n(int k,int numElements,int * D1,int * D2,int * I1,int * I2,int * G0,int *G1,int * G2,char *s1,char *s2, int gi, int ge)
		{
			int i =   blockIdx.x * blockDim.x + threadIdx.x;
			int s =0;
			
			if( i > numElements ) return ;
			
			if(i == 0)
				{
						G2[i]=gi+ge*k;
						I2[i]=G2[i]+ge;
				}
				if(i == k)
				{
						G2[i]=gi+ge*k;
						D2[i]=G2[i]+ge;
				}
				if( i>0 && i<k)
				{
					D2[i]=min(D1[i],G1[i]+gi)+ge;
					I2[i]=min(I1[i-1],G1[i-1]+gi)+ge;
					if(s1[i]!=s2[k-i])
						s=1;
					else
						s=0;
					G2[i]=min1(D2[i],I2[i],G0[i-1]+s);	
				}	
		}

__global__ void greater_than_n(int k,int numElements,int * D1,int * D2,int * I1,int * I2,int * G0,int *G1,int * G2,char *s1,char *s2,int n, int gi, int ge)
		{
			int i =   blockIdx.x * blockDim.x + threadIdx.x;
			int s =0;
			
			if( i > numElements ) return ;
	
				D2[i]=min(D1[i+1],G1[i+1]+gi)+ge;
				I2[i]=min(I1[i],G1[i]+gi)+ge;
				if(s1[i+(k-n)]!=s2[k-(i+k-n)])
					s=1;
				else
					s=0;
				if((k-n)==1)
					G2[i]=min1(D2[i],I2[i],G0[i]+s);
				else
					G2[i]=min1(D2[i],I2[i],G0[i+1]+s);
		}

int main(int argc, char** argv)
{
	int i,j,n,k,l;
	time_t t0, t1;
        clock_t c0,c1;
	char skip;

	scanf("%d",&n);
	printf("%d \n",n);
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	size_t size = (n+1) * sizeof(char);
	size_t size1 = (n+1)*sizeof(int);

	char* h_s1 = (char*)malloc(size);
	char* h_s2 = (char*)malloc(size);
	
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s1[i]);
	}
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s2[i]);
	}
	

/*	t0=time(NULL);
        c0=clock();

        printf ("\tbegin (wall):            %ld\n", (long) t0);
        printf ("\tbegin (CPU):             %d\n", (int) c0);
*/	
	int* h_D0 = (int*)malloc(size1);
	int* h_D1 = (int*)malloc(size1);
	int* h_D2 = (int*)malloc(size1);
	int* h_G0 = (int*)malloc(size1);
	int* h_G1 = (int*)malloc(size1);
	int* h_G2 = (int*)malloc(size1);
	int* h_I0 = (int*)malloc(size1);
	int* h_I1 = (int*)malloc(size1);
	int* h_I2 = (int*)malloc(size1);
	
//	int D0[n+1],D1[n+1],D2[n+1],G0[n+1],G1[n+1],G2[n+1],I0[n+1],I1[n+1],I2[n+1];				//--- declaration of functions
	int gi,ge,s,cost;
	gi=2;ge=1;

		int *d_D0, *d_D1, *d_D2;
		cudaMalloc(&d_D0, size1);
    	cudaMalloc(&d_D1, size1);
		cudaMalloc(&d_D2, size1);
    	int *d_G0, *d_G1, *d_G2;
		cudaMalloc(&d_G0, size1);
    	cudaMalloc(&d_G1, size1);
		cudaMalloc(&d_G2, size1);
    	int *d_I0, *d_I1, *d_I2;
		cudaMalloc(&d_I0, size1);
    	cudaMalloc(&d_I1, size1);
		cudaMalloc(&d_I2, size1);
	
	char *d_s1, *d_s2;
	cudaMalloc(&d_s1, size);
	cudaMalloc(&d_s2, size);

    cudaMemcpy(d_s1, h_s1, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_s2, h_s2, size, cudaMemcpyHostToDevice);
	
		
	h_G1[0]=0;

	cudaMemcpy(d_G1, h_G1, size1, cudaMemcpyHostToDevice);
	int num_threads;
	int num_blocks;
	int numElements;
	
	for(k=1;k<=2*n;k++)
	{
		if(k <=n)
		{	
			 numElements = k+1;
			if( numElements <= 256) {
			 num_threads = numElements;
			 num_blocks =1 ;
			 }
			 else
			 {
			   num_threads = 256 ;
			   num_blocks = numElements/num_threads + ((numElements/num_threads == 0) ? 0 : 1) ;
			 }
			 
			 less_than_n<<<num_blocks,num_threads>>>(  k,  numElements,   d_D1, d_D2,  d_I1,d_I2,  d_G0, d_G1,  d_G2, d_s1, d_s2, gi, ge);
		}
		if(k > n)
		{
			numElements = n-(k-n)+1;
			if( numElements <= 256) {
			 num_threads = numElements;
			 num_blocks =1 ;
			 }
			 else
			 {
			   num_threads = 256 ;
			   num_blocks = numElements/num_threads + ((numElements/num_threads == 0) ? 0 : 1) ;
			 }
			 
			 greater_than_n<<<num_blocks,num_threads>>>(  k,  numElements,   d_D1, d_D2,  d_I1,d_I2,  d_G0, d_G1,  d_G2, d_s1, d_s2, n, gi, ge);
		}

		swapDiagnolPointers(&d_D1,&d_D2);
		swapDiagnolPointers(&d_I1,&d_I2);
		swapDiagnolPointersForG(&d_G0,&d_G1, &d_G2);
	}
	
	cudaMemcpy(h_D2, d_D2, size1, cudaMemcpyDeviceToHost);
	
    cudaMemcpy(h_G2, d_G2, size1, cudaMemcpyDeviceToHost);
   	
	cudaMemcpy(h_I2, d_I2, size1, cudaMemcpyDeviceToHost);

	cudaMemcpy(h_D1, d_D1, size1, cudaMemcpyDeviceToHost);
	
    cudaMemcpy(h_G1, d_G1, size1, cudaMemcpyDeviceToHost);
   	
	cudaMemcpy(h_I1, d_I1, size1, cudaMemcpyDeviceToHost);

	

	


	
	cost=min2(h_D1[0],h_I1[0],h_G1[0]);			//--- allignment cost
	
	cout<<"Optimal Allignment cost: "<<cost<<endl;
/*	
	t1=time(NULL);
        c1=clock();
        printf ("\telapsed wall clock time: %ld\n", (long) (t1 - t0));
        printf ("\telapsed CPU time:        %f\n", (float) (c1 - c0)/CLOCKS_PER_SEC);

	cudaFree(d_G0);
	cudaFree(d_G1);
	cudaFree(d_G2);
	cudaFree(d_D0);
	cudaFree(d_D1);
	cudaFree(d_D2);
	cudaFree(d_I0);
	cudaFree(d_I1);
	cudaFree(d_I2);
	cudaFree(d_s1);
	cudaFree(d_s2);
	
	free(h_s1);
	free(h_s2);
	free(h_G1);
	free(h_G2);
	free(h_D1);
	free(h_D2);
	free(h_I1);
	free(h_I2);
*/
	return 0;
}





	.file	"tmpxft_00372610_00000000-6_diag-new.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3643:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0:
.LFB4301:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4301:
	.size	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	.globl	_Z5myminii
	.type	_Z5myminii, @function
_Z5myminii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z5myminii, .-_Z5myminii
	.globl	_Z4min1iii
	.type	_Z4min1iii, @function
_Z4min1iii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z4min1iii, .-_Z4min1iii
	.globl	_Z4min2iii
	.type	_Z4min2iii, @function
_Z4min2iii:
.LFB3637:
	.cfi_startproc
	endbr64
	cmpl	%edx, %esi
	movl	%edi, %eax
	cmovg	%edx, %esi
	cmpl	%edi, %esi
	cmovle	%esi, %eax
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z4min2iii, .-_Z4min2iii
	.globl	_Z19swapDiagnolPointersPPiS0_
	.type	_Z19swapDiagnolPointersPPiS0_, @function
_Z19swapDiagnolPointersPPiS0_:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	%rdx, (%rdi)
	movq	%rax, (%rsi)
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z19swapDiagnolPointersPPiS0_, .-_Z19swapDiagnolPointersPPiS0_
	.globl	_Z23swapDiagnolPointersForGPPiS0_S0_
	.type	_Z23swapDiagnolPointersForGPPiS0_S0_, @function
_Z23swapDiagnolPointersForGPPiS0_S0_:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	(%rsi), %rcx
	movq	(%rdi), %rax
	movq	%rcx, (%rdi)
	movq	(%rdx), %rcx
	movq	%rcx, (%rsi)
	movq	%rax, (%rdx)
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z23swapDiagnolPointersForGPPiS0_S0_, .-_Z23swapDiagnolPointersForGPPiS0_S0_
	.globl	_Z52__device_stub__Z11less_than_niiPiS_S_S_S_S_S_PcS0_iiiiPiS_S_S_S_S_S_PcS0_ii
	.type	_Z52__device_stub__Z11less_than_niiPiS_S_S_S_S_S_PcS0_iiiiPiS_S_S_S_S_S_PcS0_ii, @function
_Z52__device_stub__Z11less_than_niiPiS_S_S_S_S_S_PcS0_iiiiPiS_S_S_S_S_S_PcS0_ii:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	272(%rsp), %rax
	movl	%edi, 76(%rsp)
	leaq	96(%rsp), %rdi
	movl	%esi, 72(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 32(%rsp)
	movq	280(%rsp), %rax
	movq	%rdx, 64(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movq	288(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 16(%rsp)
	movq	296(%rsp), %rax
	movq	%r8, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	304(%rsp), %rax
	movq	%r9, 40(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	76(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	%rsp, %rax
	movq	%rax, 224(%rsp)
	leaq	312(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	320(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	88(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 288
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L10:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z52__device_stub__Z11less_than_niiPiS_S_S_S_S_S_PcS0_iiiiPiS_S_S_S_S_S_PcS0_ii, .-_Z52__device_stub__Z11less_than_niiPiS_S_S_S_S_S_PcS0_iiiiPiS_S_S_S_S_S_PcS0_ii
	.globl	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.type	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii, @function
_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z11less_than_niiPiS_S_S_S_S_S_PcS0_iiiiPiS_S_S_S_S_S_PcS0_ii
	.cfi_endproc
.LFE3666:
	.size	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii, .-_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.globl	_Z56__device_stub__Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iiiiiPiS_S_S_S_S_S_PcS0_iii
	.type	_Z56__device_stub__Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iiiiiPiS_S_S_S_S_S_PcS0_iii, @function
_Z56__device_stub__Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iiiiiPiS_S_S_S_S_S_PcS0_iii:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$280, %rsp
	.cfi_def_cfa_offset 288
	movq	288(%rsp), %rax
	movl	%edi, 76(%rsp)
	leaq	104(%rsp), %rdi
	movl	%esi, 72(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 32(%rsp)
	movq	296(%rsp), %rax
	movq	%rdx, 64(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movq	304(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 16(%rsp)
	movq	312(%rsp), %rax
	movq	%r8, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	320(%rsp), %rax
	movq	%r9, 40(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	leaq	76(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	%rsp, %rax
	movq	%rax, 232(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	336(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 256(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	96(%rsp)
	.cfi_def_cfa_offset 296
	leaq	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 304
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 296
	popq	%rdx
	.cfi_def_cfa_offset 288
.L16:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$280, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z56__device_stub__Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iiiiiPiS_S_S_S_S_S_PcS0_iii, .-_Z56__device_stub__Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iiiiiPiS_S_S_S_S_S_PcS0_iii
	.globl	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.type	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii, @function
_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iiiiiPiS_S_S_S_S_S_PcS0_iii
	.cfi_endproc
.LFE3668:
	.size	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii, .-_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d"
.LC1:
	.string	"%d \n"
.LC2:
	.string	"%c"
.LC3:
	.string	"Optimal Allignment cost: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	52(%rsp), %rsi
	call	__isoc23_scanf@PLT
	movl	52(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
.L22:
	leaq	51(%rsp), %rbp
	xorl	%eax, %eax
	movq	%r12, %rdi
	movq	%rbp, %rsi
	call	__isoc23_scanf@PLT
	cmpb	$10, 51(%rsp)
	jne	.L22
	movl	52(%rsp), %eax
	xorl	%r13d, %r13d
	leal	1(%rax), %ebx
	movslq	%ebx, %rbx
	leaq	0(,%rbx,4), %rax
	movq	%rbx, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	%rax, %r14
.L23:
	incq	%r13
	cmpl	%r13d, 52(%rsp)
	jl	.L26
	leaq	(%r15,%r13), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	jmp	.L23
.L26:
	xorl	%eax, %eax
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	__isoc23_scanf@PLT
	cmpb	$10, 51(%rsp)
	jne	.L26
	xorl	%ebp, %ebp
.L25:
	incq	%rbp
	cmpl	%ebp, 52(%rsp)
	jl	.L42
	leaq	(%r14,%rbp), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	jmp	.L25
.L42:
	movq	8(%rsp), %rdi
	movl	$1, %r12d
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	%rbx, %rsi
	leaq	128(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	%rbx, %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r15, %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	movq	136(%rsp), %rdi
	movabsq	$4294967297, %rbx
	call	cudaMemcpy@PLT
	xorl	%edx, %edx
	movq	88(%rsp), %rdi
	movq	%rbp, %rsi
	movl	%edx, 0(%rbp)
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
.L28:
	movl	52(%rsp), %eax
	leal	(%rax,%rax), %edx
	cmpl	%r12d, %edx
	jl	.L43
	leal	1(%r12), %r14d
	cmpl	%r12d, %eax
	jl	.L29
	cmpl	$255, %r12d
	jbe	.L38
	movl	%r14d, %eax
	movl	$256, %edx
	sarl	$8, %eax
	incl	%eax
	jmp	.L30
.L38:
	movl	%r14d, %edx
	movl	$1, %eax
.L30:
	movq	%rbx, 160(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	164(%rsp), %ecx
	movq	%rbx, 148(%rsp)
	movl	152(%rsp), %esi
	movl	%edx, 156(%rsp)
	movq	156(%rsp), %rdx
	movl	%eax, 144(%rsp)
	movq	144(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	%rax
	.cfi_def_cfa_offset 248
	movl	%r14d, %esi
	movl	%r12d, %edi
	pushq	$1
	.cfi_def_cfa_offset 256
	pushq	$2
	.cfi_def_cfa_offset 264
	pushq	160(%rsp)
	.cfi_def_cfa_offset 272
	pushq	160(%rsp)
	.cfi_def_cfa_offset 280
	pushq	136(%rsp)
	.cfi_def_cfa_offset 288
	pushq	136(%rsp)
	.cfi_def_cfa_offset 296
	pushq	136(%rsp)
	.cfi_def_cfa_offset 304
	movq	184(%rsp), %r9
	movq	176(%rsp), %r8
	movq	136(%rsp), %rcx
	movq	128(%rsp), %rdx
	call	_Z52__device_stub__Z11less_than_niiPiS_S_S_S_S_S_PcS0_iiiiPiS_S_S_S_S_S_PcS0_ii
	addq	$64, %rsp
	.cfi_def_cfa_offset 240
.L29:
	movl	52(%rsp), %r15d
	cmpl	%r12d, %r15d
	jge	.L32
	movl	%r12d, %eax
	subl	%r15d, %eax
	subl	%eax, %r15d
	incl	%r15d
	cmpl	$256, %r15d
	jle	.L39
	movl	%r15d, %eax
	movl	$256, %edx
	sarl	$8, %eax
	incl	%eax
	jmp	.L33
.L39:
	movl	%r15d, %edx
	movl	$1, %eax
.L33:
	movq	%rbx, 160(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	164(%rsp), %ecx
	movq	%rbx, 148(%rsp)
	movl	152(%rsp), %esi
	movl	%edx, 156(%rsp)
	movq	156(%rsp), %rdx
	movl	%eax, 144(%rsp)
	movq	144(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	$1
	.cfi_def_cfa_offset 248
	movl	%r15d, %esi
	movl	%r12d, %edi
	pushq	$2
	.cfi_def_cfa_offset 256
	movl	68(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 264
	pushq	160(%rsp)
	.cfi_def_cfa_offset 272
	pushq	160(%rsp)
	.cfi_def_cfa_offset 280
	pushq	136(%rsp)
	.cfi_def_cfa_offset 288
	pushq	136(%rsp)
	.cfi_def_cfa_offset 296
	pushq	136(%rsp)
	.cfi_def_cfa_offset 304
	movq	184(%rsp), %r9
	movq	176(%rsp), %r8
	movq	136(%rsp), %rcx
	movq	128(%rsp), %rdx
	call	_Z56__device_stub__Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iiiiiPiS_S_S_S_S_S_PcS0_iii
	addq	$64, %rsp
	.cfi_def_cfa_offset 240
.L32:
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rax
	movl	%r14d, %r12d
	movq	%rdx, 64(%rsp)
	movq	120(%rsp), %rdx
	movq	%rax, 72(%rsp)
	movq	112(%rsp), %rax
	movq	%rdx, 112(%rsp)
	movq	88(%rsp), %rdx
	movq	%rax, 120(%rsp)
	movq	80(%rsp), %rax
	movq	%rdx, 80(%rsp)
	movq	96(%rsp), %rdx
	movq	%rax, 96(%rsp)
	movq	%rdx, 88(%rsp)
	jmp	.L28
.L43:
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	120(%rsp), %rsi
	movl	$2, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	0(%r13), %edx
	movl	0(%rbp), %eax
	leaq	.LC3(%rip), %rsi
	movq	16(%rsp), %rcx
	leaq	_ZSt4cout(%rip), %rdi
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	(%rcx), %edx
	cmpl	%edx, %eax
	movl	%edx, %ebx
	cmovle	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii"
.LC5:
	.string	"_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3670:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3670:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<iostream>
#include <hip/hip_runtime.h>
#include <math.h>
#include<stdio.h>
#include<stdlib.h>
#include <sys/types.h>
#include <time.h>



using namespace std;

__device__ int mymin(int a, int b)
{
	int m = a;
	if(m > b)
		m=b;
	return m;
}
__device__ int min1(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

int min2(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

void swapDiagnolPointers(int **prev,int **current)
{
     int * temp = *prev;
     *prev      = *current;
     *current   = temp;
}

void swapDiagnolPointersForG(int **prevprev, int **prev,int **current)
{
     int * temp = *prevprev;
	 *prevprev = *prev;
     *prev      = *current;
     *current   = temp;
}

__global__ void less_than_n(int k,int numElements,int * D1,int * D2,int * I1,int * I2,int * G0,int *G1,int * G2,char *s1,char *s2, int gi, int ge)
		{
			int i =   blockIdx.x * blockDim.x + threadIdx.x;
			int s =0;
			
			if( i > numElements ) return ;
			
			if(i == 0)
				{
						G2[i]=gi+ge*k;
						I2[i]=G2[i]+ge;
				}
				if(i == k)
				{
						G2[i]=gi+ge*k;
						D2[i]=G2[i]+ge;
				}
				if( i>0 && i<k)
				{
					D2[i]=min(D1[i],G1[i]+gi)+ge;
					I2[i]=min(I1[i-1],G1[i-1]+gi)+ge;
					if(s1[i]!=s2[k-i])
						s=1;
					else
						s=0;
					G2[i]=min1(D2[i],I2[i],G0[i-1]+s);	
				}	
		}

__global__ void greater_than_n(int k,int numElements,int * D1,int * D2,int * I1,int * I2,int * G0,int *G1,int * G2,char *s1,char *s2,int n, int gi, int ge)
		{
			int i =   blockIdx.x * blockDim.x + threadIdx.x;
			int s =0;
			
			if( i > numElements ) return ;
	
				D2[i]=min(D1[i+1],G1[i+1]+gi)+ge;
				I2[i]=min(I1[i],G1[i]+gi)+ge;
				if(s1[i+(k-n)]!=s2[k-(i+k-n)])
					s=1;
				else
					s=0;
				if((k-n)==1)
					G2[i]=min1(D2[i],I2[i],G0[i]+s);
				else
					G2[i]=min1(D2[i],I2[i],G0[i+1]+s);
		}

int main(int argc, char** argv)
{
	int i,j,n,k,l;
	time_t t0, t1;
        clock_t c0,c1;
	char skip;

	scanf("%d",&n);
	printf("%d \n",n);
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	size_t size = (n+1) * sizeof(char);
	size_t size1 = (n+1)*sizeof(int);

	char* h_s1 = (char*)malloc(size);
	char* h_s2 = (char*)malloc(size);
	
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s1[i]);
	}
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s2[i]);
	}
	

/*	t0=time(NULL);
        c0=clock();

        printf ("\tbegin (wall):            %ld\n", (long) t0);
        printf ("\tbegin (CPU):             %d\n", (int) c0);
*/	
	int* h_D0 = (int*)malloc(size1);
	int* h_D1 = (int*)malloc(size1);
	int* h_D2 = (int*)malloc(size1);
	int* h_G0 = (int*)malloc(size1);
	int* h_G1 = (int*)malloc(size1);
	int* h_G2 = (int*)malloc(size1);
	int* h_I0 = (int*)malloc(size1);
	int* h_I1 = (int*)malloc(size1);
	int* h_I2 = (int*)malloc(size1);
	
//	int D0[n+1],D1[n+1],D2[n+1],G0[n+1],G1[n+1],G2[n+1],I0[n+1],I1[n+1],I2[n+1];				//--- declaration of functions
	int gi,ge,s,cost;
	gi=2;ge=1;

		int *d_D0, *d_D1, *d_D2;
		hipMalloc(&d_D0, size1);
    	hipMalloc(&d_D1, size1);
		hipMalloc(&d_D2, size1);
    	int *d_G0, *d_G1, *d_G2;
		hipMalloc(&d_G0, size1);
    	hipMalloc(&d_G1, size1);
		hipMalloc(&d_G2, size1);
    	int *d_I0, *d_I1, *d_I2;
		hipMalloc(&d_I0, size1);
    	hipMalloc(&d_I1, size1);
		hipMalloc(&d_I2, size1);
	
	char *d_s1, *d_s2;
	hipMalloc(&d_s1, size);
	hipMalloc(&d_s2, size);

    hipMemcpy(d_s1, h_s1, size, hipMemcpyHostToDevice);
	hipMemcpy(d_s2, h_s2, size, hipMemcpyHostToDevice);
	
		
	h_G1[0]=0;

	hipMemcpy(d_G1, h_G1, size1, hipMemcpyHostToDevice);
	int num_threads;
	int num_blocks;
	int numElements;
	
	for(k=1;k<=2*n;k++)
	{
		if(k <=n)
		{	
			 numElements = k+1;
			if( numElements <= 256) {
			 num_threads = numElements;
			 num_blocks =1 ;
			 }
			 else
			 {
			   num_threads = 256 ;
			   num_blocks = numElements/num_threads + ((numElements/num_threads == 0) ? 0 : 1) ;
			 }
			 
			 less_than_n<<<num_blocks,num_threads>>>(  k,  numElements,   d_D1, d_D2,  d_I1,d_I2,  d_G0, d_G1,  d_G2, d_s1, d_s2, gi, ge);
		}
		if(k > n)
		{
			numElements = n-(k-n)+1;
			if( numElements <= 256) {
			 num_threads = numElements;
			 num_blocks =1 ;
			 }
			 else
			 {
			   num_threads = 256 ;
			   num_blocks = numElements/num_threads + ((numElements/num_threads == 0) ? 0 : 1) ;
			 }
			 
			 greater_than_n<<<num_blocks,num_threads>>>(  k,  numElements,   d_D1, d_D2,  d_I1,d_I2,  d_G0, d_G1,  d_G2, d_s1, d_s2, n, gi, ge);
		}

		swapDiagnolPointers(&d_D1,&d_D2);
		swapDiagnolPointers(&d_I1,&d_I2);
		swapDiagnolPointersForG(&d_G0,&d_G1, &d_G2);
	}
	
	hipMemcpy(h_D2, d_D2, size1, hipMemcpyDeviceToHost);
	
    hipMemcpy(h_G2, d_G2, size1, hipMemcpyDeviceToHost);
   	
	hipMemcpy(h_I2, d_I2, size1, hipMemcpyDeviceToHost);

	hipMemcpy(h_D1, d_D1, size1, hipMemcpyDeviceToHost);
	
    hipMemcpy(h_G1, d_G1, size1, hipMemcpyDeviceToHost);
   	
	hipMemcpy(h_I1, d_I1, size1, hipMemcpyDeviceToHost);

	

	


	
	cost=min2(h_D1[0],h_I1[0],h_G1[0]);			//--- allignment cost
	
	cout<<"Optimal Allignment cost: "<<cost<<endl;
/*	
	t1=time(NULL);
        c1=clock();
        printf ("\telapsed wall clock time: %ld\n", (long) (t1 - t0));
        printf ("\telapsed CPU time:        %f\n", (float) (c1 - c0)/CLOCKS_PER_SEC);

	cudaFree(d_G0);
	cudaFree(d_G1);
	cudaFree(d_G2);
	cudaFree(d_D0);
	cudaFree(d_D1);
	cudaFree(d_D2);
	cudaFree(d_I0);
	cudaFree(d_I1);
	cudaFree(d_I2);
	cudaFree(d_s1);
	cudaFree(d_s2);
	
	free(h_s1);
	free(h_s2);
	free(h_G1);
	free(h_G2);
	free(h_D1);
	free(h_D2);
	free(h_I1);
	free(h_I2);
*/
	return 0;
}





	.text
	.file	"diag-new.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z4min2iii                      # -- Begin function _Z4min2iii
	.type	_Z4min2iii,@function
_Z4min2iii:                             # @_Z4min2iii
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	cmpl	%esi, %edi
	cmovll	%edi, %eax
	cmpl	%edx, %eax
	cmovgel	%edx, %eax
	retq
.Lfunc_end0:
	.size	_Z4min2iii, .Lfunc_end0-_Z4min2iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19swapDiagnolPointersPPiS0_   # -- Begin function _Z19swapDiagnolPointersPPiS0_
	.type	_Z19swapDiagnolPointersPPiS0_,@function
_Z19swapDiagnolPointersPPiS0_:          # @_Z19swapDiagnolPointersPPiS0_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	(%rsi), %rcx
	movq	%rcx, (%rdi)
	movq	%rax, (%rsi)
	retq
.Lfunc_end1:
	.size	_Z19swapDiagnolPointersPPiS0_, .Lfunc_end1-_Z19swapDiagnolPointersPPiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23swapDiagnolPointersForGPPiS0_S0_ # -- Begin function _Z23swapDiagnolPointersForGPPiS0_S0_
	.type	_Z23swapDiagnolPointersForGPPiS0_S0_,@function
_Z23swapDiagnolPointersForGPPiS0_S0_:   # @_Z23swapDiagnolPointersForGPPiS0_S0_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	(%rsi), %rcx
	movq	%rcx, (%rdi)
	movq	(%rdx), %rcx
	movq	%rcx, (%rsi)
	movq	%rax, (%rdx)
	retq
.Lfunc_end2:
	.size	_Z23swapDiagnolPointersForGPPiS0_S0_, .Lfunc_end2-_Z23swapDiagnolPointersForGPPiS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii # -- Begin function _Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.type	_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii,@function
_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii: # @_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii, .Lfunc_end3-_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii # -- Begin function _Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.type	_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii,@function
_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii: # @_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii, .Lfunc_end4-_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	12(%rsp), %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	11(%rsp), %rbx
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	cmpb	$10, 11(%rsp)
	jne	.LBB5_1
# %bb.2:
	movslq	12(%rsp), %rbx
	leaq	1(%rbx), %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r12
	testq	%rbx, %rbx
	jle	.LBB5_5
# %bb.3:                                # %.lr.ph.preheader
	leaq	1(%r13), %r14
	xorl	%r15d, %r15d
.LBB5_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r14,%r15), %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	12(%rsp), %rax
	incq	%r15
	cmpq	%rax, %r15
	jl	.LBB5_4
.LBB5_5:                                # %.preheader112.preheader
	leaq	4(,%rbx,4), %rbx
	leaq	11(%rsp), %r15
.LBB5_6:                                # %.preheader112
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.2, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	cmpb	$10, 11(%rsp)
	jne	.LBB5_6
# %bb.7:                                # %.preheader
	movq	%r13, 72(%rsp)                  # 8-byte Spill
	cmpl	$0, 12(%rsp)
	jle	.LBB5_10
# %bb.8:                                # %.lr.ph117.preheader
	movq	%r12, %r14
	incq	%r14
	xorl	%r15d, %r15d
.LBB5_9:                                # %.lr.ph117
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r14,%r15), %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	12(%rsp), %rax
	incq	%r15
	cmpq	%rax, %r15
	jl	.LBB5_9
.LBB5_10:                               # %._crit_edge
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	leaq	144(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	136(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %r14
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$0, (%r15)
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r15, 72(%rsp)                  # 8-byte Spill
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	12(%rsp), %r10d
	testl	%r10d, %r10d
	jle	.LBB5_20
# %bb.11:                               # %.lr.ph121.preheader
	xorl	%r14d, %r14d
	movl	$-1, %r15d
	movabsq	$4294967296, %r13               # imm = 0x100000000
.LBB5_12:                               # %.lr.ph121
                                        # =>This Inner Loop Header: Depth=1
	movl	%r14d, %r12d
	leal	1(%r12), %r14d
	cmpl	%r10d, %r14d
	jg	.LBB5_15
# %bb.13:                               #   in Loop: Header=BB5_12 Depth=1
	addl	$2, %r12d
	movl	%r12d, %edi
	shrl	$8, %edi
	incl	%edi
	movl	$256, %eax                      # imm = 0x100
	cmpl	%eax, %r14d
	movl	$1, %eax
	cmovbl	%eax, %edi
	movl	$256, %edx                      # imm = 0x100
	cmovbl	%r12d, %edx
	orq	%r13, %rdi
	orq	%r13, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_15
# %bb.14:                               #   in Loop: Header=BB5_12 Depth=1
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	movq	32(%rsp), %r8
	movq	24(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%r14d, %edi
	movl	%r12d, %esi
	pushq	$1
	.cfi_adjust_cfa_offset 8
	pushq	$2
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB5_15:                               #   in Loop: Header=BB5_12 Depth=1
	movl	12(%rsp), %r10d
	cmpl	%r10d, %r14d
	jle	.LBB5_18
# %bb.16:                               #   in Loop: Header=BB5_12 Depth=1
	leal	(%r15,%r10,2), %eax
	leal	(%r15,%r10,2), %ebp
	incl	%ebp
	movl	%ebp, %edi
	shrl	$8, %edi
	incl	%edi
	movl	$256, %ecx                      # imm = 0x100
	cmpl	%ecx, %eax
	movl	$1, %eax
	cmovll	%eax, %edi
	movl	$256, %edx                      # imm = 0x100
	cmovll	%ebp, %edx
	orq	%r13, %rdi
	orq	%r13, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	movl	12(%rsp), %r10d
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.17:                               #   in Loop: Header=BB5_12 Depth=1
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	movq	32(%rsp), %r8
	movq	24(%rsp), %r9
	movl	%r14d, %edi
	movl	%ebp, %esi
	pushq	$1
	.cfi_adjust_cfa_offset 8
	pushq	$2
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	movl	12(%rsp), %r10d
.LBB5_18:                               #   in Loop: Header=BB5_12 Depth=1
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	%rsi, 48(%rsp)
	movq	32(%rsp), %rax
	movq	24(%rsp), %rcx
	movq	%rcx, 32(%rsp)
	movq	%rax, 24(%rsp)
	movq	64(%rsp), %rax
	movq	16(%rsp), %rcx
	movq	%rcx, 64(%rsp)
	movq	40(%rsp), %rcx
	movq	%rcx, 16(%rsp)
	movq	%rax, 40(%rsp)
	leal	(%r10,%r10), %eax
	decl	%r15d
	cmpl	%eax, %r14d
	jl	.LBB5_12
	jmp	.LBB5_19
.LBB5_20:                               # %._crit_edge.._crit_edge122_crit_edge
	movq	48(%rsp), %rsi
.LBB5_19:                               # %._crit_edge122
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rsi
	movq	104(%rsp), %rdi                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movq	96(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rsi
	movq	128(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movq	72(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movq	120(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%r14), %eax
	movl	(%r12), %ebx
	cmpl	%ebx, %eax
	cmovll	%eax, %ebx
	movl	(%r15), %eax
	cmpl	%eax, %ebx
	cmovgel	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii,@object # @_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.section	.rodata,"a",@progbits
	.globl	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.p2align	3, 0x0
_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii:
	.quad	_Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.size	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii, 8

	.type	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii,@object # @_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.globl	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.p2align	3, 0x0
_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii:
	.quad	_Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.size	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d \n"
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%c"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Optimal Allignment cost: "
	.size	.L.str.3, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii"
	.size	.L__unnamed_1, 39

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii"
	.size	.L__unnamed_2, 43

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.addrsig_sym _Z29__device_stub__greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.addrsig_sym _Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii ; -- Begin function _Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.globl	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
	.p2align	8
	.type	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii,@function
_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii: ; @_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x64
	s_load_b64 s[20:21], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_ge_i32_e64 s21, v1
	s_cbranch_execz .LBB0_7
; %bb.1:
	s_clause 0x1
	s_load_b64 s[22:23], s[0:1], 0x50
	s_load_b512 s[4:19], s[0:1], 0x8
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s23, s20
	v_cmpx_eq_u32_e32 0, v1
; %bb.2:
	s_add_i32 s21, s3, s22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s24, s21, s23
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, s24
	v_mov_b32_e32 v2, s21
	s_clause 0x1
	global_store_b32 v0, v2, s[16:17]
	global_store_b32 v0, v3, s[10:11]
; %bb.3:
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s20, v1
; %bb.4:
	s_ashr_i32 s21, s20, 31
	s_add_i32 s3, s3, s22
	s_lshl_b64 s[24:25], s[20:21], 2
	v_mov_b32_e32 v2, s3
	s_add_u32 s26, s16, s24
	s_addc_u32 s27, s17, s25
	s_add_i32 s21, s3, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, s21
	s_add_u32 s24, s6, s24
	s_addc_u32 s25, s7, s25
	s_clause 0x1
	global_store_b32 v0, v2, s[26:27]
	global_store_b32 v0, v3, s[24:25]
; %bb.5:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_cmp_gt_i32_e64 s2, s20, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_mov_b32_e32 v2, 0
	s_load_b64 s[0:1], s[0:1], 0x48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v5, vcc_lo, s14, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s15, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v0, v[5:6], off
	global_load_b32 v9, v[7:8], off
	v_dual_mov_b32 v6, v2 :: v_dual_add_nc_u32 v5, -1, v1
	v_add_co_u32 v7, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, s22, v0
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v0, v9, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s14, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s15, v6, vcc_lo
	v_add_nc_u32_e32 v0, s23, v0
	v_add_co_u32 v11, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v6, vcc_lo
	global_store_b32 v[7:8], v0, off
	global_load_b32 v0, v[9:10], off
	global_load_b32 v2, v[11:12], off
	v_sub_nc_u32_e32 v11, s20, v1
	v_add_co_u32 v9, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s0, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, s22, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v0, v2, v0
	v_add_nc_u32_e32 v0, s23, v0
	global_store_b32 v[9:10], v0, off
	global_load_u8 v1, v1, s[18:19]
	global_load_u8 v2, v[11:12], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[7:8], off
	s_waitcnt vmcnt(2)
	v_cmp_ne_u16_e32 vcc_lo, v1, v2
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_min3_i32 v2, v6, v0, v1
	v_add_co_u32 v0, vcc_lo, s16, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v4, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii, .Lfunc_end0-_Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 612
; NumSgprs: 30
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii ; -- Begin function _Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.globl	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
	.p2align	8
	.type	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii,@function
_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii: ; @_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x6c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_ge_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:                                ; %.sink.split
	s_load_b512 s[4:19], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[20:23], s[0:1], 0x50
	v_add_nc_u32_e32 v9, 1, v1
	s_load_b64 s[0:1], s[0:1], 0x48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_ashrrev_i32_e32 v10, 31, v9
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s14, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s15, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v4, vcc_lo
	s_sub_i32 s2, s2, s20
	global_load_b32 v0, v[5:6], off offset:4
	global_load_b32 v7, v[7:8], off offset:4
	s_cmp_eq_u32 s2, 1
	v_sub_nc_u32_e32 v12, s20, v1
	v_add_nc_u32_e32 v13, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, s21, v0
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v0, v7, v0
	v_add_co_u32 v7, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v0, s22, v0
	global_store_b32 v[7:8], v0, off
	global_load_b32 v0, v[5:6], off
	v_add_co_u32 v5, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
	global_load_b32 v11, v[5:6], off
	v_add_co_u32 v5, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_dual_cndmask_b32 v2, v10, v2 :: v_dual_cndmask_b32 v1, v9, v1
	v_ashrrev_i32_e32 v10, 31, v12
	v_add_co_u32 v9, vcc_lo, s0, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v15, s21, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v2, v11, v15
	v_add_co_u32 v11, vcc_lo, s18, v13
	v_add_co_ci_u32_e32 v12, vcc_lo, s19, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v2, s22, v2
	v_add_co_u32 v0, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_store_b32 v[5:6], v2, off
	global_load_u8 v5, v[11:12], off
	global_load_u8 v6, v[9:10], off
	global_load_b32 v0, v[0:1], off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(2)
	v_cmp_ne_u16_e32 vcc_lo, v5, v6
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v0, vcc_lo
	v_add_co_u32 v0, vcc_lo, s16, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v4, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_min3_i32 v2, v7, v2, v5
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii, .Lfunc_end1-_Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 26
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .offset:         84
        .size:           4
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         92
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         100
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         102
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         104
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         106
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         108
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         110
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         152
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 344
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _Z11less_than_niiPiS_S_S_S_S_S_PcS0_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .offset:         84
        .size:           4
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z14greater_than_niiPiS_S_S_S_S_S_PcS0_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
