#include <stdlib.h>
#include <stdio.h>
#include <cuda_runtime.h>
#include <math.h>
#include <iostream>
#include<fstream>

#define Pi 3.141516
#define Nthreads 32 

using namespace std; 

__global__ void Sinodails(double* cosine, double* sine, int tam){
	
		int Id= threadIdx.x + blockDim.x* blockIdx.x;

		if(Id<tam){

			for(int i=0;i<tam;i++){
				cosine[Id*tam+i]=cos((2 * Id * i * Pi) / tam);
				sine[Id*tam+i]= sin((2 * Id * i * Pi) / tam);
			}

		}
}

__device__ double GetAmp(double real, double im)
{
    return sqrt(real*real+im*im);
}

__global__ void DFT(double* signal, double* cosine, double* sine, int tam, double* spectrum){
	
	int Id= threadIdx.x + blockDim.x* blockIdx.x;

	extern __shared__ double Shasignal[];

	double temp1, temp2;

	Shasignal[threadIdx.x]=signal[threadIdx.x];

	 __syncthreads();


	 for(int i=0;i<tam;i++){
	 	temp1+= cosine[Id*tam +i]*Shasignal[i];
	 	
	 	temp2+= sine[Id*tam +i]*Shasignal[i];
	 }


	spectrum[Id]=GetAmp(temp1,temp2);
	__syncthreads();

	printf(" jaja");
}

void Signals(double *signal,double *time,int tam){
	
	double dt=0.02;

for(int i=0;i<tam;i++){
	double R1 = (double) rand() / (double) RAND_MAX;
	double R2 = (double) rand() / (double) RAND_MAX;

	signal[i] = (double) sqrt( -2.0f * log( R1 )) * cos( 2.0f * Pi * R2 );
	time[i]=i*dt;

	}


}

int main(){

	// host variables
	double *signal, *time;
	double *cosine, *sine;
	double *spectrum;
	int tam=256;
	size_t dBytes=tam*sizeof(double);
	size_t ddBytes=tam*tam*sizeof(double);

	// device variables 
	double *d_cosine, *d_sine;
	double *d_signal;
	double *d_spectrum;

	// kernel variables 

	int Blocks= tam/Nthreads;


	// -------------------------  BODY ------------------ /////

	cosine= (double*)malloc(ddBytes);
	sine=(double*)malloc(ddBytes);
	spectrum=(double*)malloc(dBytes);
	signal=(double*)malloc(dBytes);
	time=(double*)malloc(dBytes);

	Signals(signal,time,tam);


	/// ---------------------------------------------------

	// we allocate cosine and sine arrays

	cudaMalloc((void**)&d_cosine,ddBytes);
	cudaMalloc((void**)&d_sine,ddBytes);


	Sinodails<<<Blocks,Nthreads>>>(d_cosine,d_sine,tam);

	cudaDeviceSynchronize();
	/// ---------------------------------------------------
	
	cudaMalloc((void**)&d_spectrum,dBytes);
	cudaMalloc((void**)&d_signal,dBytes);
	cudaMemcpy(d_signal,signal,dBytes,cudaMemcpyHostToDevice);

	DFT<<<Blocks,Nthreads,dBytes >>>(d_signal,d_cosine,d_sine,tam,d_spectrum);

	cudaDeviceSynchronize();

	cudaMemcpy(spectrum,d_spectrum,dBytes,cudaMemcpyDeviceToHost);
	// -------------------------  BODY ------------------ /////


	/// ---------------

	ofstream file1,file2;
  	file1.open("fourier.dat");
  	file2.open("signal.dat");
    
    for (int i=0; i<tam;i++){
    	file1<<time[i]<<" "<<spectrum[i]<<endl;
    	file2<<time[i]<<" "<<signal[i]<<endl;
    }

  	
  /// ---------------
	ofstream file3;

	file3.open("imprimir.gnu");

	file3<<"set terminal eps transparent size 6,4 lw 1.8 enhanced font \"Times,24\""<<endl;
	file3<<"set encoding iso_8859_1"<<endl;
	file3<<"set title 'fourier'"<<endl;
	file3<<"set output \"imprimir.eps\""<<endl;
	file3<<"set grid"<<endl;
	file3<<"set xrange[0:5]"<<endl;
	file3<<"set yrange[0:10]"<<endl;
	//file3<<"set datafile separator whiteespace"<<endl;
	file3<<"plot 'fourier.dat' w l"<<endl;
	file3.close();

	system("gnuplot imprimir.gnu");
	system(" evince imprimir.eps");

  /// ----------------

    /// ---------------
	ofstream file4;

	file4.open("imprimir1.gnu");

	file4<<"set terminal eps transparent size 6,4 lw 1.8 enhanced font \"Times,24\""<<endl;
	file4<<"set encoding iso_8859_1"<<endl;
	file4<<"set title 'Senal'"<<endl;
	file4<<"set output \"imprimir1.eps\""<<endl;
	file4<<"set grid"<<endl;
	file4<<"set xrange[0:5]"<<endl;
	file4<<"set yrange[-3:3]"<<endl;
	//file3<<"set datafile separator whiteespace"<<endl;
	file4<<"plot 'signal.dat' w l"<<endl;
	file4.close();

	system("gnuplot imprimir1.gnu");
	system(" evince imprimir1.eps");

  /// ----------------
	cudaFree(d_cosine);
	cudaFree(d_sine);
	cudaFree(d_signal);
	free(cosine);
	free(sine);
	free(signal);

	return 0; 
}



	.file	"tmpxft_0020b427_00000000-6_dft.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3771:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3771:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4479:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4479:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z6GetAmpdd
	.type	_Z6GetAmpdd, @function
_Z6GetAmpdd:
.LFB3766:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3766:
	.size	_Z6GetAmpdd, .-_Z6GetAmpdd
	.globl	_Z7SignalsPdS_i
	.type	_Z7SignalsPdS_i, @function
_Z7SignalsPdS_i:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
.L6:
	cmpl	%ebx, %ebp
	jle	.L10
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC0(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	rand@PLT
	movsd	8(%rsp), %xmm0
	movl	%eax, %r14d
	call	log@PLT
	mulsd	.LC1(%rip), %xmm0
	call	sqrt@PLT
	movsd	%xmm0, 8(%rsp)
	cvtsi2sdl	%r14d, %xmm0
	divsd	.LC0(%rip), %xmm0
	mulsd	.LC2(%rip), %xmm0
	call	cos@PLT
	mulsd	8(%rsp), %xmm0
	movsd	%xmm0, (%r12,%rbx,8)
	cvtsi2sdl	%ebx, %xmm0
	mulsd	.LC3(%rip), %xmm0
	movsd	%xmm0, 0(%r13,%rbx,8)
	incq	%rbx
	jmp	.L6
.L10:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.size	_Z7SignalsPdS_i, .-_Z7SignalsPdS_i
	.globl	_Z31__device_stub__Z9SinodailsPdS_iPdS_i
	.type	_Z31__device_stub__Z9SinodailsPdS_iPdS_i, @function
_Z31__device_stub__Z9SinodailsPdS_iPdS_i:
.LFB3793:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9SinodailsPdS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L11:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3793:
	.size	_Z31__device_stub__Z9SinodailsPdS_iPdS_i, .-_Z31__device_stub__Z9SinodailsPdS_iPdS_i
	.globl	_Z9SinodailsPdS_i
	.type	_Z9SinodailsPdS_i, @function
_Z9SinodailsPdS_i:
.LFB3794:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9SinodailsPdS_iPdS_i
	.cfi_endproc
.LFE3794:
	.size	_Z9SinodailsPdS_i, .-_Z9SinodailsPdS_i
	.globl	_Z29__device_stub__Z3DFTPdS_S_iS_PdS_S_iS_
	.type	_Z29__device_stub__Z3DFTPdS_S_iS_PdS_S_iS_, @function
_Z29__device_stub__Z3DFTPdS_S_iS_PdS_S_iS_:
.LFB3795:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z3DFTPdS_S_iS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L16:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3795:
	.size	_Z29__device_stub__Z3DFTPdS_S_iS_PdS_S_iS_, .-_Z29__device_stub__Z3DFTPdS_S_iS_PdS_S_iS_
	.globl	_Z3DFTPdS_S_iS_
	.type	_Z3DFTPdS_S_iS_, @function
_Z3DFTPdS_S_iS_:
.LFB3796:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z3DFTPdS_S_iS_PdS_S_iS_
	.cfi_endproc
.LFE3796:
	.size	_Z3DFTPdS_S_iS_, .-_Z3DFTPdS_S_iS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"_Z3DFTPdS_S_iS_"
.LC5:
	.string	"_Z9SinodailsPdS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3798:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z3DFTPdS_S_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9SinodailsPdS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3798:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC6:
	.string	"fourier.dat"
.LC7:
	.string	"signal.dat"
.LC8:
	.string	" "
.LC9:
	.string	"imprimir.gnu"
.LC10:
	.string	"set terminal eps transparent size 6,4 lw 1.8 enhanced font \"Times,24\""
.LC11:
	.string	"set encoding iso_8859_1"
.LC12:
	.string	"set title 'fourier'"
.LC13:
	.string	"set output \"imprimir.eps\""
.LC14:
	.string	"set grid"
.LC15:
	.string	"set xrange[0:5]"
.LC16:
	.string	"set yrange[0:10]"
.LC17:
	.string	"plot 'fourier.dat' w l"
.LC18:
	.string	"gnuplot imprimir.gnu"
.LC19:
	.string	" evince imprimir.eps"
.LC20:
	.string	"imprimir1.gnu"
.LC21:
	.string	"set title 'Senal'"
.LC22:
	.string	"set output \"imprimir1.eps\""
.LC23:
	.string	"set yrange[-3:3]"
.LC24:
	.string	"plot 'signal.dat' w l"
.LC25:
	.string	"gnuplot imprimir1.gnu"
.LC26:
	.string	" evince imprimir1.eps"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3768:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3768
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2048, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$2152, %rsp
	.cfi_def_cfa_offset 2208
	movq	%fs:40, %rax
	movq	%rax, 2136(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$2048, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$2048, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$256, %edx
	movq	%rbp, %rdi
	movq	%rax, %rsi
	movq	%rax, %r13
	call	_Z7SignalsPdS_i
	leaq	32(%rsp), %rdi
	movl	$524288, %esi
.LEHB0:
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$524288, %esi
	call	cudaMalloc@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$536870913, %edi
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$3, %rdi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$256, %edx
	call	_Z31__device_stub__Z9SinodailsPdS_iPdS_i
.L24:
	call	cudaDeviceSynchronize@PLT
	leaq	56(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	movl	$536870913, %edi
	xorl	%r9d, %r9d
	salq	$5, %rdx
	salq	$3, %rdi
	movl	$2048, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	56(%rsp), %r8
	movq	40(%rsp), %rdx
	movl	$256, %ecx
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z29__device_stub__Z3DFTPdS_S_iS_PdS_S_iS_
.L25:
	call	cudaDeviceSynchronize@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	leaq	600(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB1:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE1:
	movq	16(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC6(%rip), %rsi
.LEHB2:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	24(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC7(%rip), %rsi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%ebx, %ebx
	leaq	.LC8(%rip), %r14
.L26:
	movq	0(%r13,%rbx), %r15
	movq	16(%rsp), %rdi
	movq	%r15, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%r12,%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	24(%rsp), %rdi
	movq	%r15, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	0(%rbp,%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	addq	$8, %rbx
	cmpq	$2048, %rbx
	jne	.L26
	leaq	1112(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE2:
	movq	8(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC9(%rip), %rsi
.LEHB3:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	leaq	.LC10(%rip), %r15
	movq	8(%rsp), %rdi
	movq	%r15, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC11(%rip), %r14
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	leaq	.LC12(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	leaq	.LC13(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC14(%rip), %r13
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC15(%rip), %r12
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	leaq	.LC16(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	leaq	.LC17(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	leaq	.LC18(%rip), %rdi
	call	system@PLT
	leaq	.LC19(%rip), %rdi
	call	system@PLT
	leaq	1624(%rsp), %rbx
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE3:
	movl	$16, %edx
	leaq	.LC20(%rip), %rsi
	movq	%rbx, %rdi
.LEHB4:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	%r15, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r14, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC21(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC22(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r13, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC23(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC24(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	leaq	.LC25(%rip), %rdi
	call	system@PLT
	leaq	.LC26(%rip), %rdi
	call	system@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
.LEHE4:
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	1112(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	600(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	88(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	2136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	jmp	.L38
.L36:
	endbr64
	movq	%rax, %rbp
.L27:
	movq	%rbx, %rdi
	movq	%rbp, %rbx
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L28
.L35:
	endbr64
	movq	%rax, %rbx
.L28:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L29
.L34:
	endbr64
	movq	%rax, %rbx
.L29:
	movq	24(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L30
.L33:
	endbr64
	movq	%rax, %rbx
.L30:
	movq	16(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	2136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L38
	movq	%rbx, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L38:
	call	__stack_chk_fail@PLT
.L32:
	addq	$2152, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3768:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3768:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3768-.LLSDACSB3768
.LLSDACSB3768:
	.uleb128 .LEHB0-.LFB3768
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3768
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L33-.LFB3768
	.uleb128 0
	.uleb128 .LEHB2-.LFB3768
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L34-.LFB3768
	.uleb128 0
	.uleb128 .LEHB3-.LFB3768
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L35-.LFB3768
	.uleb128 0
	.uleb128 .LEHB4-.LFB3768
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L36-.LFB3768
	.uleb128 0
	.uleb128 .LEHB5-.LFB3768
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE3768:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-4194304
	.long	1105199103
	.align 8
.LC1:
	.long	0
	.long	-1073741824
	.align 8
.LC2:
	.long	603906762
	.long	1075388883
	.align 8
.LC3:
	.long	1202590843
	.long	1066695393
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdlib.h>
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <math.h>
#include <iostream>
#include<fstream>

#define Pi 3.141516
#define Nthreads 32 

using namespace std; 

__global__ void Sinodails(double* cosine, double* sine, int tam){
	
		int Id= threadIdx.x + blockDim.x* blockIdx.x;

		if(Id<tam){

			for(int i=0;i<tam;i++){
				cosine[Id*tam+i]=cos((2 * Id * i * Pi) / tam);
				sine[Id*tam+i]= sin((2 * Id * i * Pi) / tam);
			}

		}
}

__device__ double GetAmp(double real, double im)
{
    return sqrt(real*real+im*im);
}

__global__ void DFT(double* signal, double* cosine, double* sine, int tam, double* spectrum){
	
	int Id= threadIdx.x + blockDim.x* blockIdx.x;

	extern __shared__ double Shasignal[];

	double temp1, temp2;

	Shasignal[threadIdx.x]=signal[threadIdx.x];

	 __syncthreads();


	 for(int i=0;i<tam;i++){
	 	temp1+= cosine[Id*tam +i]*Shasignal[i];
	 	
	 	temp2+= sine[Id*tam +i]*Shasignal[i];
	 }


	spectrum[Id]=GetAmp(temp1,temp2);
	__syncthreads();

	printf(" jaja");
}

void Signals(double *signal,double *time,int tam){
	
	double dt=0.02;

for(int i=0;i<tam;i++){
	double R1 = (double) rand() / (double) RAND_MAX;
	double R2 = (double) rand() / (double) RAND_MAX;

	signal[i] = (double) sqrt( -2.0f * log( R1 )) * cos( 2.0f * Pi * R2 );
	time[i]=i*dt;

	}


}

int main(){

	// host variables
	double *signal, *time;
	double *cosine, *sine;
	double *spectrum;
	int tam=256;
	size_t dBytes=tam*sizeof(double);
	size_t ddBytes=tam*tam*sizeof(double);

	// device variables 
	double *d_cosine, *d_sine;
	double *d_signal;
	double *d_spectrum;

	// kernel variables 

	int Blocks= tam/Nthreads;


	// -------------------------  BODY ------------------ /////

	cosine= (double*)malloc(ddBytes);
	sine=(double*)malloc(ddBytes);
	spectrum=(double*)malloc(dBytes);
	signal=(double*)malloc(dBytes);
	time=(double*)malloc(dBytes);

	Signals(signal,time,tam);


	/// ---------------------------------------------------

	// we allocate cosine and sine arrays

	hipMalloc((void**)&d_cosine,ddBytes);
	hipMalloc((void**)&d_sine,ddBytes);


	Sinodails<<<Blocks,Nthreads>>>(d_cosine,d_sine,tam);

	hipDeviceSynchronize();
	/// ---------------------------------------------------
	
	hipMalloc((void**)&d_spectrum,dBytes);
	hipMalloc((void**)&d_signal,dBytes);
	hipMemcpy(d_signal,signal,dBytes,hipMemcpyHostToDevice);

	DFT<<<Blocks,Nthreads,dBytes >>>(d_signal,d_cosine,d_sine,tam,d_spectrum);

	hipDeviceSynchronize();

	hipMemcpy(spectrum,d_spectrum,dBytes,hipMemcpyDeviceToHost);
	// -------------------------  BODY ------------------ /////


	/// ---------------

	ofstream file1,file2;
  	file1.open("fourier.dat");
  	file2.open("signal.dat");
    
    for (int i=0; i<tam;i++){
    	file1<<time[i]<<" "<<spectrum[i]<<endl;
    	file2<<time[i]<<" "<<signal[i]<<endl;
    }

  	
  /// ---------------
	ofstream file3;

	file3.open("imprimir.gnu");

	file3<<"set terminal eps transparent size 6,4 lw 1.8 enhanced font \"Times,24\""<<endl;
	file3<<"set encoding iso_8859_1"<<endl;
	file3<<"set title 'fourier'"<<endl;
	file3<<"set output \"imprimir.eps\""<<endl;
	file3<<"set grid"<<endl;
	file3<<"set xrange[0:5]"<<endl;
	file3<<"set yrange[0:10]"<<endl;
	//file3<<"set datafile separator whiteespace"<<endl;
	file3<<"plot 'fourier.dat' w l"<<endl;
	file3.close();

	system("gnuplot imprimir.gnu");
	system(" evince imprimir.eps");

  /// ----------------

    /// ---------------
	ofstream file4;

	file4.open("imprimir1.gnu");

	file4<<"set terminal eps transparent size 6,4 lw 1.8 enhanced font \"Times,24\""<<endl;
	file4<<"set encoding iso_8859_1"<<endl;
	file4<<"set title 'Senal'"<<endl;
	file4<<"set output \"imprimir1.eps\""<<endl;
	file4<<"set grid"<<endl;
	file4<<"set xrange[0:5]"<<endl;
	file4<<"set yrange[-3:3]"<<endl;
	//file3<<"set datafile separator whiteespace"<<endl;
	file4<<"plot 'signal.dat' w l"<<endl;
	file4.close();

	system("gnuplot imprimir1.gnu");
	system(" evince imprimir1.eps");

  /// ----------------
	hipFree(d_cosine);
	hipFree(d_sine);
	hipFree(d_signal);
	free(cosine);
	free(sine);
	free(signal);

	return 0; 
}



	.text
	.file	"dft.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__SinodailsPdS_i # -- Begin function _Z24__device_stub__SinodailsPdS_i
	.type	_Z24__device_stub__SinodailsPdS_i,@function
_Z24__device_stub__SinodailsPdS_i:      # @_Z24__device_stub__SinodailsPdS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9SinodailsPdS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__SinodailsPdS_i, .Lfunc_end0-_Z24__device_stub__SinodailsPdS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__DFTPdS_S_iS_ # -- Begin function _Z18__device_stub__DFTPdS_S_iS_
	.type	_Z18__device_stub__DFTPdS_S_iS_,@function
_Z18__device_stub__DFTPdS_S_iS_:        # @_Z18__device_stub__DFTPdS_S_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3DFTPdS_S_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__DFTPdS_S_iS_, .Lfunc_end1-_Z18__device_stub__DFTPdS_S_iS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7SignalsPdS_i
.LCPI2_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI2_1:
	.quad	0xc000000000000000              # double -2
.LCPI2_2:
	.quad	0x401921d323fee2ca              # double 6.2830320000000004
.LCPI2_3:
	.quad	0x3f947ae147ae147b              # double 0.02
.LCPI2_4:
	.quad	0x0000000000000000              # double 0
	.text
	.globl	_Z7SignalsPdS_i
	.type	_Z7SignalsPdS_i,@function
_Z7SignalsPdS_i:                        # @_Z7SignalsPdS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB2_7
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	%edx, %r15d
	xorl	%r12d, %r12d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	callq	rand
	movl	%eax, %ebp
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	log
	mulsd	.LCPI2_1(%rip), %xmm0
	ucomisd	.LCPI2_4(%rip), %xmm0
	jb	.LBB2_4
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB2_5
.LBB2_4:                                # %call.sqrt
                                        #   in Loop: Header=BB2_2 Depth=1
	callq	sqrt
.LBB2_5:                                # %.lr.ph.split
                                        #   in Loop: Header=BB2_2 Depth=1
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	mulsd	.LCPI2_2(%rip), %xmm0
	callq	cos
	mulsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movsd	%xmm0, (%r14,%r12,8)
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	mulsd	.LCPI2_3(%rip), %xmm0
	movsd	%xmm0, (%rbx,%r12,8)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB2_2
# %bb.6:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB2_7:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z7SignalsPdS_i, .Lfunc_end2-_Z7SignalsPdS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$2088, %rsp                     # imm = 0x828
	.cfi_def_cfa_offset 2144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967304, %r14               # imm = 0x100000008
	movl	$2048, %edi                     # imm = 0x800
	callq	malloc
	movq	%rax, %r12
	movl	$2048, %edi                     # imm = 0x800
	callq	malloc
	movq	%rax, %rbx
	movl	$2048, %edi                     # imm = 0x800
	callq	malloc
	movq	%rax, %r13
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movl	$256, %edx                      # imm = 0x100
	callq	_Z7SignalsPdS_i
	leaq	8(%rsp), %rdi
	movl	$524288, %esi                   # imm = 0x80000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$524288, %esi                   # imm = 0x80000
	callq	hipMalloc
	leaq	24(%r14), %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	callq	_Z24__device_stub__SinodailsPdS_i
.LBB3_2:
	callq	hipDeviceSynchronize
	leaq	16(%rsp), %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	leaq	24(%rsp), %rbp
	movl	$2048, %esi                     # imm = 0x800
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$2048, %r8d                     # imm = 0x800
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	16(%rsp), %r8
	movl	$256, %ecx                      # imm = 0x100
	callq	_Z18__device_stub__DFTPdS_S_iS_
.LBB3_4:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	1064(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	leaq	1576(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp1:
# %bb.5:
.Ltmp3:
	movq	%rbx, %r14
	leaq	1064(%rsp), %rdi
	movl	$.L.str, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp4:
# %bb.6:
.Ltmp5:
	leaq	1576(%rsp), %rdi
	movl	$.L.str.1, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp6:
# %bb.7:                                # %.preheader.preheader
	xorl	%ebx, %ebx
	leaq	1576(%rsp), %r15
.LBB3_8:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r13,%rbx,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp8:
	leaq	1064(%rsp), %rdi
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp9:
# %bb.9:                                # %_ZNSolsEd.exit
                                        #   in Loop: Header=BB3_8 Depth=1
.Ltmp10:
	movq	%rax, %rbp
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp11:
# %bb.10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB3_8 Depth=1
	movsd	(%r12,%rbx,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp12:
	movq	%rbp, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp13:
# %bb.11:                               # %_ZNSolsEd.exit60
                                        #   in Loop: Header=BB3_8 Depth=1
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
.Ltmp14:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp15:
# %bb.12:                               # %.noexc
                                        #   in Loop: Header=BB3_8 Depth=1
.Ltmp16:
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
.Ltmp17:
# %bb.13:                               # %.noexc97
                                        #   in Loop: Header=BB3_8 Depth=1
.Ltmp18:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp19:
# %bb.14:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB3_8 Depth=1
.Ltmp20:
	movq	%r15, %rdi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp21:
# %bb.15:                               # %_ZNSolsEd.exit61
                                        #   in Loop: Header=BB3_8 Depth=1
.Ltmp22:
	movq	%rax, %rbp
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp23:
# %bb.16:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit62
                                        #   in Loop: Header=BB3_8 Depth=1
	movsd	(%r14,%rbx,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp24:
	movq	%rbp, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp25:
# %bb.17:                               # %_ZNSolsEd.exit63
                                        #   in Loop: Header=BB3_8 Depth=1
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
.Ltmp26:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp27:
# %bb.18:                               # %.noexc99
                                        #   in Loop: Header=BB3_8 Depth=1
.Ltmp28:
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
.Ltmp29:
# %bb.19:                               # %.noexc100
                                        #   in Loop: Header=BB3_8 Depth=1
.Ltmp30:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp31:
# %bb.20:                               # %_ZNSolsEPFRSoS_E.exit64
                                        #   in Loop: Header=BB3_8 Depth=1
	incq	%rbx
	cmpq	$256, %rbx                      # imm = 0x100
	jne	.LBB3_8
# %bb.21:
.Ltmp33:
	leaq	552(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp34:
# %bb.22:
.Ltmp36:
	leaq	552(%rsp), %rdi
	movl	$.L.str.3, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp37:
# %bb.23:
.Ltmp38:
	movq	%r14, %rbx
	leaq	552(%rsp), %r12
	movl	$.L.str.4, %esi
	movl	$69, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp39:
# %bb.24:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit65
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp40:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp41:
# %bb.25:                               # %.noexc103
.Ltmp42:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp43:
# %bb.26:                               # %.noexc104
.Ltmp44:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp45:
# %bb.27:                               # %_ZNSolsEPFRSoS_E.exit66
.Ltmp46:
	leaq	552(%rsp), %r12
	movl	$.L.str.5, %esi
	movl	$23, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp47:
# %bb.28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit67
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp48:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp49:
# %bb.29:                               # %.noexc107
.Ltmp50:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp51:
# %bb.30:                               # %.noexc108
.Ltmp52:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp53:
# %bb.31:                               # %_ZNSolsEPFRSoS_E.exit68
.Ltmp54:
	leaq	552(%rsp), %r12
	movl	$.L.str.6, %esi
	movl	$19, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp55:
# %bb.32:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit69
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp56:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp57:
# %bb.33:                               # %.noexc111
.Ltmp58:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp59:
# %bb.34:                               # %.noexc112
.Ltmp60:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp61:
# %bb.35:                               # %_ZNSolsEPFRSoS_E.exit70
.Ltmp62:
	leaq	552(%rsp), %r12
	movl	$.L.str.7, %esi
	movl	$25, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp63:
# %bb.36:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit71
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp64:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp65:
# %bb.37:                               # %.noexc115
.Ltmp66:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp67:
# %bb.38:                               # %.noexc116
.Ltmp68:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp69:
# %bb.39:                               # %_ZNSolsEPFRSoS_E.exit72
.Ltmp70:
	leaq	552(%rsp), %r12
	movl	$.L.str.8, %esi
	movl	$8, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp71:
# %bb.40:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit73
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp72:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp73:
# %bb.41:                               # %.noexc119
.Ltmp74:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp75:
# %bb.42:                               # %.noexc120
.Ltmp76:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp77:
# %bb.43:                               # %_ZNSolsEPFRSoS_E.exit74
.Ltmp78:
	leaq	552(%rsp), %r12
	movl	$.L.str.9, %esi
	movl	$15, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp79:
# %bb.44:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit75
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp80:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp81:
# %bb.45:                               # %.noexc123
.Ltmp82:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp83:
# %bb.46:                               # %.noexc124
.Ltmp84:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp85:
# %bb.47:                               # %_ZNSolsEPFRSoS_E.exit76
.Ltmp86:
	leaq	552(%rsp), %r12
	movl	$.L.str.10, %esi
	movl	$16, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp87:
# %bb.48:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit77
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp88:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp89:
# %bb.49:                               # %.noexc127
.Ltmp90:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp91:
# %bb.50:                               # %.noexc128
.Ltmp92:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp93:
# %bb.51:                               # %_ZNSolsEPFRSoS_E.exit78
.Ltmp94:
	leaq	552(%rsp), %r12
	movl	$.L.str.11, %esi
	movl	$22, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp95:
# %bb.52:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit79
	movq	552(%rsp), %rax
	addq	-24(%rax), %r12
.Ltmp96:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp97:
# %bb.53:                               # %.noexc131
.Ltmp98:
	movsbl	%al, %esi
	leaq	552(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp99:
# %bb.54:                               # %.noexc132
.Ltmp100:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp101:
# %bb.55:                               # %_ZNSolsEPFRSoS_E.exit80
.Ltmp102:
	leaq	552(%rsp), %r14
	movq	%r14, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp103:
# %bb.56:
.Ltmp104:
	movl	$.L.str.12, %edi
	callq	system
.Ltmp105:
# %bb.57:
.Ltmp106:
	movl	$.L.str.13, %edi
	callq	system
.Ltmp107:
# %bb.58:
.Ltmp109:
	leaq	40(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp110:
# %bb.59:
.Ltmp112:
	leaq	40(%rsp), %rdi
	movl	$.L.str.14, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp113:
# %bb.60:
.Ltmp114:
	leaq	40(%rsp), %r13
	movl	$.L.str.4, %esi
	movl	$69, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp115:
# %bb.61:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit81
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp116:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp117:
# %bb.62:                               # %.noexc135
.Ltmp118:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp119:
# %bb.63:                               # %.noexc136
.Ltmp120:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp121:
# %bb.64:                               # %_ZNSolsEPFRSoS_E.exit82
.Ltmp122:
	leaq	40(%rsp), %r13
	movl	$.L.str.5, %esi
	movl	$23, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp123:
# %bb.65:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit83
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp124:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp125:
# %bb.66:                               # %.noexc139
.Ltmp126:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp127:
# %bb.67:                               # %.noexc140
.Ltmp128:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp129:
# %bb.68:                               # %_ZNSolsEPFRSoS_E.exit84
.Ltmp130:
	leaq	40(%rsp), %r13
	movl	$.L.str.15, %esi
	movl	$17, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp131:
# %bb.69:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit85
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp132:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp133:
# %bb.70:                               # %.noexc143
.Ltmp134:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp135:
# %bb.71:                               # %.noexc144
.Ltmp136:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp137:
# %bb.72:                               # %_ZNSolsEPFRSoS_E.exit86
.Ltmp138:
	leaq	40(%rsp), %r13
	movl	$.L.str.16, %esi
	movl	$26, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp139:
# %bb.73:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit87
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp140:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp141:
# %bb.74:                               # %.noexc147
.Ltmp142:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp143:
# %bb.75:                               # %.noexc148
.Ltmp144:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp145:
# %bb.76:                               # %_ZNSolsEPFRSoS_E.exit88
.Ltmp146:
	leaq	40(%rsp), %r13
	movl	$.L.str.8, %esi
	movl	$8, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp147:
# %bb.77:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit89
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp148:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp149:
# %bb.78:                               # %.noexc151
.Ltmp150:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp151:
# %bb.79:                               # %.noexc152
.Ltmp152:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp153:
# %bb.80:                               # %_ZNSolsEPFRSoS_E.exit90
.Ltmp154:
	leaq	40(%rsp), %r13
	movl	$.L.str.9, %esi
	movl	$15, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp155:
# %bb.81:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit91
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp156:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp157:
# %bb.82:                               # %.noexc155
.Ltmp158:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp159:
# %bb.83:                               # %.noexc156
.Ltmp160:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp161:
# %bb.84:                               # %_ZNSolsEPFRSoS_E.exit92
.Ltmp162:
	leaq	40(%rsp), %r13
	movl	$.L.str.17, %esi
	movl	$16, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp163:
# %bb.85:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit93
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp164:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp165:
# %bb.86:                               # %.noexc159
.Ltmp166:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp167:
# %bb.87:                               # %.noexc160
.Ltmp168:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp169:
# %bb.88:                               # %_ZNSolsEPFRSoS_E.exit94
.Ltmp170:
	leaq	40(%rsp), %r13
	movl	$.L.str.18, %esi
	movl	$21, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp171:
# %bb.89:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit95
	movq	40(%rsp), %rax
	addq	-24(%rax), %r13
.Ltmp172:
	movq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp173:
# %bb.90:                               # %.noexc163
.Ltmp174:
	movsbl	%al, %esi
	leaq	40(%rsp), %rdi
	callq	_ZNSo3putEc
.Ltmp175:
# %bb.91:                               # %.noexc164
.Ltmp176:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp177:
# %bb.92:                               # %_ZNSolsEPFRSoS_E.exit96
.Ltmp178:
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp179:
# %bb.93:
.Ltmp180:
	movl	$.L.str.19, %edi
	callq	system
.Ltmp181:
# %bb.94:
.Ltmp182:
	movl	$.L.str.20, %edi
	callq	system
.Ltmp183:
# %bb.95:
	movq	8(%rsp), %rdi
.Ltmp184:
	callq	hipFree
.Ltmp185:
# %bb.96:
	movq	(%rsp), %rdi
.Ltmp186:
	callq	hipFree
.Ltmp187:
# %bb.97:
	movq	24(%rsp), %rdi
.Ltmp188:
	callq	hipFree
.Ltmp189:
# %bb.98:
	movq	%rbx, %rdi
	callq	free
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rbx
	leaq	48(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rbp
	movq	-24(%rbx), %rax
	movq	%rbp, 40(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	movl	$248, %r12d
	addq	%r12, %r13
	movq	%r13, %rdi
	callq	_ZNSt8ios_baseD2Ev
	leaq	560(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	movq	-24(%rbx), %rax
	movq	%rbp, 552(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	addq	%r12, %r14
	movq	%r14, %rdi
	callq	_ZNSt8ios_baseD2Ev
	leaq	1584(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	movq	-24(%rbx), %rax
	movq	%rbp, 1576(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	addq	%r12, %r15
	movq	%r15, %rdi
	callq	_ZNSt8ios_baseD2Ev
	leaq	1072(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	movq	-24(%rbx), %rax
	movq	%rbp, 1064(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	1064(%rsp), %rdi
	addq	%r12, %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$2088, %rsp                     # imm = 0x828
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_99:
	.cfi_def_cfa_offset 2144
.Ltmp111:
	jmp	.LBB3_104
.LBB3_100:
.Ltmp35:
	jmp	.LBB3_108
.LBB3_101:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB3_110
.LBB3_102:
.Ltmp7:
	jmp	.LBB3_108
.LBB3_103:
.Ltmp108:
.LBB3_104:
	movq	%rax, %rbx
	jmp	.LBB3_106
.LBB3_105:
.Ltmp190:
	movq	%rax, %rbx
	leaq	40(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.LBB3_106:
	leaq	552(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	jmp	.LBB3_109
.LBB3_107:
.Ltmp32:
.LBB3_108:
	movq	%rax, %rbx
.LBB3_109:
	leaq	1576(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.LBB3_110:
	leaq	1064(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp6-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp31-.Ltmp8                 #   Call between .Ltmp8 and .Ltmp31
	.uleb128 .Ltmp32-.Lfunc_begin0          #     jumps to .Ltmp32
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp34-.Ltmp33                #   Call between .Ltmp33 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin0          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp107-.Ltmp36               #   Call between .Ltmp36 and .Ltmp107
	.uleb128 .Ltmp108-.Lfunc_begin0         #     jumps to .Ltmp108
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp109-.Lfunc_begin0         # >> Call Site 7 <<
	.uleb128 .Ltmp110-.Ltmp109              #   Call between .Ltmp109 and .Ltmp110
	.uleb128 .Ltmp111-.Lfunc_begin0         #     jumps to .Ltmp111
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp112-.Lfunc_begin0         # >> Call Site 8 <<
	.uleb128 .Ltmp189-.Ltmp112              #   Call between .Ltmp112 and .Ltmp189
	.uleb128 .Ltmp190-.Lfunc_begin0         #     jumps to .Ltmp190
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp189-.Lfunc_begin0         # >> Call Site 9 <<
	.uleb128 .Lfunc_end3-.Ltmp189           #   Call between .Ltmp189 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9SinodailsPdS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3DFTPdS_S_iS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9SinodailsPdS_i,@object       # @_Z9SinodailsPdS_i
	.section	.rodata,"a",@progbits
	.globl	_Z9SinodailsPdS_i
	.p2align	3, 0x0
_Z9SinodailsPdS_i:
	.quad	_Z24__device_stub__SinodailsPdS_i
	.size	_Z9SinodailsPdS_i, 8

	.type	_Z3DFTPdS_S_iS_,@object         # @_Z3DFTPdS_S_iS_
	.globl	_Z3DFTPdS_S_iS_
	.p2align	3, 0x0
_Z3DFTPdS_S_iS_:
	.quad	_Z18__device_stub__DFTPdS_S_iS_
	.size	_Z3DFTPdS_S_iS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"fourier.dat"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"signal.dat"
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"imprimir.gnu"
	.size	.L.str.3, 13

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"set terminal eps transparent size 6,4 lw 1.8 enhanced font \"Times,24\""
	.size	.L.str.4, 70

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"set encoding iso_8859_1"
	.size	.L.str.5, 24

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"set title 'fourier'"
	.size	.L.str.6, 20

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"set output \"imprimir.eps\""
	.size	.L.str.7, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"set grid"
	.size	.L.str.8, 9

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"set xrange[0:5]"
	.size	.L.str.9, 16

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"set yrange[0:10]"
	.size	.L.str.10, 17

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"plot 'fourier.dat' w l"
	.size	.L.str.11, 23

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"gnuplot imprimir.gnu"
	.size	.L.str.12, 21

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" evince imprimir.eps"
	.size	.L.str.13, 21

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"imprimir1.gnu"
	.size	.L.str.14, 14

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"set title 'Senal'"
	.size	.L.str.15, 18

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"set output \"imprimir1.eps\""
	.size	.L.str.16, 27

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"set yrange[-3:3]"
	.size	.L.str.17, 17

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"plot 'signal.dat' w l"
	.size	.L.str.18, 22

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"gnuplot imprimir1.gnu"
	.size	.L.str.19, 22

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	" evince imprimir1.eps"
	.size	.L.str.20, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9SinodailsPdS_i"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z3DFTPdS_S_iS_"
	.size	.L__unnamed_2, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__SinodailsPdS_i
	.addrsig_sym _Z18__device_stub__DFTPdS_S_iS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9SinodailsPdS_i
	.addrsig_sym _Z3DFTPdS_S_iS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9SinodailsPdS_i       ; -- Begin function _Z9SinodailsPdS_i
	.globl	_Z9SinodailsPdS_i
	.p2align	8
	.type	_Z9SinodailsPdS_i,@function
_Z9SinodailsPdS_i:                      ; @_Z9SinodailsPdS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s33, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v0, 0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s33, v0
	s_cbranch_execz .LBB0_11
; %bb.1:                                ; %.lr.ph
	v_cvt_f64_i32_e32 v[0:1], s33
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v23, 0 :: v_dual_lshlrev_b32 v22, 1, v2
	v_mul_lo_u32 v2, v2, s33
	v_mov_b32_e32 v4, 0
	s_mov_b32 s2, 0x23fee2ca
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s14, 0x33145c00
	s_mov_b32 s16, 0x252049c0
	s_mov_b32 s18, 0x9037ab78
	s_mov_b32 s20, 0x46cc5e42
	s_mov_b32 s22, 0xa17f65f6
	s_mov_b32 s24, 0x19f4ec90
	s_mov_b32 s26, 0x16c16967
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0xb42fdfa7
	s_mov_b32 s34, 0xf9a43bb8
	s_mov_b32 s36, 0x796cde01
	s_mov_b32 s38, 0x19e83e5c
	s_mov_b32 s40, 0x11110bb3
	s_mov_b32 s3, 0x400921d3
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0xbff921fb
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s15, 0xbc91a626
	s_mov_b32 s17, 0xb97b839a
	s_mov_b32 s19, 0x3e21eeb6
	s_mov_b32 s21, 0xbda907db
	s_mov_b32 s23, 0xbe927e4f
	s_mov_b32 s25, 0x3efa01a0
	s_mov_b32 s27, 0xbf56c16c
	s_mov_b32 s29, 0x3fa55555
	s_mov_b32 s31, 0xbe5ae600
	s_mov_b32 s35, 0x3de5e0b2
	s_mov_b32 s37, 0x3ec71de3
	s_mov_b32 s39, 0xbf2a01a0
	s_mov_b32 s41, 0x3f811111
	s_mov_b32 s43, 0x3c91a626
	s_mov_b32 s44, 0x33145c07
	s_mov_b32 s47, 0xbfc55555
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[5:6], v23
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr16_vgpr17
                                        ; implicit-def: $vgpr18_vgpr19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[5:6], v[5:6], s[2:3]
	v_div_scale_f64 v[7:8], null, v[0:1], v[0:1], v[5:6]
	v_div_scale_f64 v[13:14], vcc_lo, v[5:6], v[0:1], v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	v_fma_f64 v[7:8], -v[7:8], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[11:12]
	v_div_fixup_f64 v[6:7], v[7:8], v[0:1], v[5:6]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[6:7]|
	v_trig_preop_f64 v[12:13], |v[6:7]|, 0
	v_trig_preop_f64 v[10:11], |v[6:7]|, 1
	v_ldexp_f64 v[14:15], |v[6:7]|, 0xffffff80
	v_trig_preop_f64 v[8:9], |v[6:7]|, 2
	v_and_b32_e32 v24, 0x7fffffff, v7
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s42, exec_lo, s0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[6:7]|
	s_mov_b32 s8, s10
	s_mov_b32 s45, s43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v24, v15 :: v_dual_cndmask_b32 v16, v6, v14
	v_mul_f64 v[18:19], v[12:13], v[16:17]
	v_mul_f64 v[20:21], v[10:11], v[16:17]
	v_mul_f64 v[35:36], v[8:9], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[12:13], v[16:17], -v[18:19]
	v_fma_f64 v[37:38], v[10:11], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[8:9], v[16:17], -v[35:36]
	v_add_f64 v[27:28], v[20:21], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[27:28], -v[20:21]
	v_add_f64 v[33:34], v[18:19], v[27:28]
	v_add_f64 v[31:32], v[27:28], -v[29:30]
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[29:30], v[33:34], -2
	v_add_f64 v[18:19], v[33:34], -v[18:19]
	v_add_f64 v[20:21], v[20:21], -v[31:32]
	v_add_f64 v[31:32], v[35:36], v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[29:30]|
	v_add_f64 v[18:19], v[27:28], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[25:26], v[20:21]
	v_fract_f64_e32 v[25:26], v[29:30]
	v_add_f64 v[27:28], v[31:32], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	v_ldexp_f64 v[25:26], v[25:26], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[18:19], v[27:28]
	v_add_f64 v[39:40], v[27:28], -v[31:32]
	v_add_f64 v[33:34], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[45:46], v[27:28], -v[39:40]
	v_add_f64 v[20:21], v[20:21], -v[39:40]
	v_add_f64 v[18:19], v[29:30], -v[18:19]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[33:34]
	v_add_f64 v[33:34], v[31:32], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[27:28], -v[18:19]
	v_cndmask_b32_e64 v5, 0, 0x40100000, vcc_lo
	v_add_f64 v[43:44], v[31:32], -v[33:34]
	v_add_f64 v[33:34], v[37:38], -v[33:34]
	v_add_f64 v[31:32], v[31:32], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], v[4:5]
	v_add_f64 v[37:38], v[35:36], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], v[31:32]
	v_add_f64 v[41:42], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], v[37:38]
	v_cvt_i32_f64_e32 v3, v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[33:34], v[20:21]
	v_cvt_f64_i32_e32 v[39:40], v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[20:21]
	v_add_f64 v[25:26], v[25:26], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[18:19], v[16:17]
	v_add_f64 v[31:32], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[31:32], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[31:32]
	v_add_f64 v[18:19], v[29:30], -v[20:21]
	v_cndmask_b32_e64 v5, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v3, s0, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	v_add_f64 v[18:19], v[31:32], -v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[18:19], v[16:17]
	v_mul_f64 v[25:26], v[20:21], s[8:9]
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], v[20:21], s[8:9], -v[25:26]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], s[44:45], v[27:28]
	v_fma_f64 v[18:19], v[16:17], s[8:9], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[25:26], v[18:19]
	v_add_f64 v[20:21], v[16:17], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[20:21]
.LBB0_4:                                ; %Flow38
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s42
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f64 v[16:17], |v[6:7]|, s[12:13]
	s_mov_b32 s42, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[20:21], v[16:17]
	v_fma_f64 v[16:17], v[20:21], s[10:11], |v[6:7]|
	v_mul_f64 v[18:19], v[20:21], s[14:15]
	v_cvt_i32_f64_e32 v3, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], v[20:21], s[14:15], v[16:17]
	v_add_f64 v[25:26], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[25:26]
	v_add_f64 v[25:26], v[25:26], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	v_fma_f64 v[18:19], v[20:21], s[42:43], v[18:19]
	v_add_f64 v[16:17], v[25:26], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	v_fma_f64 v[18:19], v[20:21], s[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[27:28], v[18:19]
	v_add_f64 v[25:26], v[16:17], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[25:26]
.LBB0_6:                                ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[20:21], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[33:34], v[18:19], 0.5
	s_mov_b32 s46, s28
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x1f8
	v_and_b32_e32 v5, 1, v3
	v_cmp_eq_u32_e64 s0, 0, v5
	v_fma_f64 v[25:26], v[20:21], s[34:35], s[30:31]
	v_fma_f64 v[27:28], v[20:21], s[20:21], s[18:19]
	v_mul_f64 v[29:30], v[20:21], 0.5
	v_mul_f64 v[35:36], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[20:21], v[25:26], s[36:37]
	v_fma_f64 v[27:28], v[20:21], v[27:28], s[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], -v[29:30], 1.0
	v_fma_f64 v[25:26], v[20:21], v[25:26], s[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], v[20:21], v[27:28], s[24:25]
	v_add_f64 v[37:38], -v[31:32], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[20:21], v[25:26], s[40:41]
	v_fma_f64 v[27:28], v[20:21], v[27:28], s[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[37:38], -v[29:30]
	v_fma_f64 v[25:26], v[35:36], v[25:26], v[33:34]
	v_mul_f64 v[33:34], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], v[20:21], v[27:28], s[28:29]
	v_fma_f64 v[29:30], v[16:17], -v[18:19], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[20:21], v[25:26], -v[18:19]
	v_fma_f64 v[20:21], v[33:34], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[35:36], s[46:47], v[18:19]
	v_add_f64 v[20:21], v[31:32], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	v_cndmask_b32_e64 v5, v16, v20, s0
	v_lshlrev_b32_e32 v3, 30, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v16, 0x80000000, v17
	v_dual_cndmask_b32 v18, 0, v5 :: v_dual_and_b32 v17, 0x80000000, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v16, v21, s0
	v_ashrrev_i32_e32 v3, 31, v2
	v_xor_b32_e32 v19, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[16:17], 3, v[2:3]
                                        ; implicit-def: $vgpr3
	v_cndmask_b32_e32 v19, 0x7ff80000, v19, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s4, v16
	v_add_co_ci_u32_e64 v21, s0, s5, v17, s0
	global_store_b64 v[20:21], v[18:19], off
                                        ; implicit-def: $vgpr18_vgpr19
                                        ; implicit-def: $vgpr20_vgpr21
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s42, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_le_f64_e64 s0, 0x7b000000, |v[6:7]|
	s_mov_b32 s8, s10
	s_mov_b32 s45, s43
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v15, v24, v15, s0
	v_cndmask_b32_e64 v14, v6, v14, s0
	v_mul_f64 v[18:19], v[12:13], v[14:15]
	v_mul_f64 v[20:21], v[10:11], v[14:15]
	v_mul_f64 v[32:33], v[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[12:13], v[14:15], -v[18:19]
	v_fma_f64 v[10:11], v[10:11], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[14:15], -v[32:33]
	v_add_f64 v[24:25], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[24:25], -v[20:21]
	v_add_f64 v[30:31], v[18:19], v[24:25]
	v_add_f64 v[28:29], v[24:25], -v[26:27]
	v_add_f64 v[12:13], v[12:13], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[26:27], v[30:31], -2
	v_add_f64 v[18:19], v[30:31], -v[18:19]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_add_f64 v[28:29], v[32:33], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[26:27]|
	v_add_f64 v[18:19], v[24:25], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[20:21]
	v_fract_f64_e32 v[20:21], v[26:27]
	v_add_f64 v[24:25], v[28:29], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v21, 0, v21, s0
	v_cndmask_b32_e64 v20, 0, v20, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[20:21], v[20:21], 2
	v_add_f64 v[26:27], v[18:19], v[24:25]
	v_add_f64 v[34:35], v[24:25], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[26:27], v[20:21]
	v_add_f64 v[40:41], v[24:25], -v[34:35]
	v_add_f64 v[12:13], v[12:13], -v[34:35]
	v_add_f64 v[14:15], v[26:27], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e64 s0, 0, v[30:31]
	v_add_f64 v[30:31], v[28:29], -v[32:33]
	v_add_f64 v[14:15], v[24:25], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, 0, 0x40100000, s0
	v_add_f64 v[38:39], v[28:29], -v[30:31]
	v_add_f64 v[10:11], v[10:11], -v[30:31]
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[20:21], v[4:5]
	v_add_f64 v[30:31], v[32:33], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[28:29]
	v_add_f64 v[36:37], v[26:27], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[30:31]
	v_cvt_i32_f64_e32 v3, v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_cvt_f64_i32_e32 v[34:35], v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_add_f64 v[20:21], v[20:21], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[14:15], v[8:9]
	v_add_f64 v[12:13], v[26:27], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[12:13], -v[20:21]
	v_cmp_le_f64_e64 s0, 0.5, v[12:13]
	v_add_f64 v[10:11], v[26:27], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v3, s1, 0, v3, s0
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[12:13], -v[4:5]
	v_add_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[12:13], s[8:9]
	v_add_f64 v[10:11], v[12:13], -v[10:11]
	v_fma_f64 v[18:19], v[12:13], s[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[44:45], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], s[8:9], v[10:11]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[18:19], -v[14:15]
	v_add_f64 v[20:21], v[8:9], -v[10:11]
.LBB0_8:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s42
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f64 v[8:9], |v[6:7]|, s[12:13]
	s_mov_b32 s42, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[8:9]
	v_fma_f64 v[5:6], v[8:9], s[10:11], |v[6:7]|
	v_mul_f64 v[10:11], v[8:9], s[14:15]
	v_cvt_i32_f64_e32 v3, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[8:9], s[14:15], v[5:6]
	v_add_f64 v[12:13], v[5:6], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[12:13]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[10:11]
	v_fma_f64 v[10:11], v[8:9], s[42:43], v[10:11]
	v_add_f64 v[5:6], v[12:13], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[10:11]
	v_fma_f64 v[5:6], v[8:9], s[16:17], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], v[5:6]
	v_add_f64 v[10:11], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[5:6], -v[10:11]
.LBB0_10:                               ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[5:6], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[24:25], v[20:21], 0.5
	s_mov_b32 s46, s28
	s_add_i32 s33, s33, -1
	v_add_nc_u32_e32 v2, 1, v2
	s_cmp_lg_u32 s33, 0
	v_add_nc_u32_e32 v23, v23, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[8:9], v[5:6], s[34:35], s[30:31]
	v_fma_f64 v[10:11], v[5:6], s[20:21], s[18:19]
	v_mul_f64 v[12:13], v[5:6], 0.5
	v_mul_f64 v[26:27], v[18:19], -v[5:6]
	v_fma_f64 v[8:9], v[5:6], v[8:9], s[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[5:6], v[10:11], s[22:23]
	v_add_f64 v[14:15], -v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[5:6], v[8:9], s[38:39]
	v_fma_f64 v[10:11], v[5:6], v[10:11], s[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], -v[14:15], 1.0
	v_fma_f64 v[8:9], v[5:6], v[8:9], s[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[5:6], v[10:11], s[26:27]
	v_add_f64 v[12:13], v[28:29], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[8:9], v[26:27], v[8:9], v[24:25]
	v_mul_f64 v[24:25], v[5:6], v[5:6]
	v_fma_f64 v[10:11], v[5:6], v[10:11], s[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[18:19], -v[20:21], v[12:13]
	v_fma_f64 v[5:6], v[5:6], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[24:25], v[10:11], v[12:13]
	v_lshlrev_b32_e32 v10, 30, v3
	v_and_b32_e32 v3, 1, v3
	v_xor_b32_e32 v7, v10, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s0, 0, v3
	v_and_b32_e32 v3, 0x80000000, v7
	v_fma_f64 v[5:6], v[26:27], s[46:47], v[5:6]
	v_add_f64 v[8:9], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[18:19], -v[5:6]
	v_cndmask_b32_e64 v7, v8, v5, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v9, v6, s0
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v5, v3
	v_add_co_u32 v5, s0, s6, v16
	v_add_co_ci_u32_e64 v6, s0, s7, v17, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v8, 0x7ff80000, v3, vcc_lo
	global_store_b64 v[5:6], v[7:8], off
	s_cbranch_scc1 .LBB0_2
.LBB0_11:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9SinodailsPdS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 47
		.amdhsa_next_free_sgpr 48
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9SinodailsPdS_i, .Lfunc_end0-_Z9SinodailsPdS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2964
; NumSgprs: 50
; NumVgprs: 47
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 50
; NumVGPRsForWavesPerEU: 47
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3DFTPdS_S_iS_         ; -- Begin function _Z3DFTPdS_S_iS_
	.globl	_Z3DFTPdS_S_iS_
	.p2align	8
	.type	_Z3DFTPdS_S_iS_,@function
_Z3DFTPdS_S_iS_:                        ; @_Z3DFTPdS_S_iS_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 3, v0
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x18
	s_load_b32 s9, s[0:1], 0x34
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	v_add_nc_u32_e32 v5, 0, v1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[3:4], v1, s[4:5]
	s_and_b32 s4, s9, 0xffff
	s_cmp_lt_i32 s8, 1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, 0
	s_waitcnt vmcnt(0)
	ds_store_b64 v5, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s8
	s_load_b64 s[10:11], s[0:1], 0x10
                                        ; implicit-def: $vgpr4_vgpr5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v3, vcc_lo
                                        ; implicit-def: $vgpr2_vgpr3
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[10:11], v[6:7], off
	global_load_b64 v[12:13], v[8:9], off
	v_mov_b32_e32 v0, s4
	v_add_co_u32 v6, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	ds_load_b64 v[14:15], v0
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_add_i32 s8, s8, -1
	s_add_i32 s4, s4, 8
	s_cmp_eq_u32 s8, 0
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fma_f64 v[4:5], v[10:11], v[14:15], v[4:5]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[14:15], v[12:13], v[2:3]
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_4
.LBB1_3:
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
.LBB1_4:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[2:3]
	s_load_b64 s[0:1], s[0:1], 0x20
	v_fma_f64 v[2:3], v[4:5], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[2:3]
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[3:4], v[2:3], v0
	v_cndmask_b32_e64 v0, 0, 0xffffff80, vcc_lo
	v_ashrrev_i32_e32 v2, 31, v1
	v_rsq_f64_e32 v[5:6], v[3:4]
	v_cmp_class_f64_e64 vcc_lo, v[3:4], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[7:8], v[3:4], v[5:6]
	v_mul_f64 v[5:6], v[5:6], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 0.5
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[5:6], v[5:6], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4]
	v_fma_f64 v[7:8], v[9:10], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4]
	v_fma_f64 v[5:6], v[9:10], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[5:6], v[5:6], v0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_mbcnt_lo_u32_b32 v2, -1, 0
	v_mov_b32_e32 v7, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, s0, v0
	v_add_co_ci_u32_e64 v1, s0, s1, v1, s0
	v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v3, v5, v3
	global_store_b64 v[0:1], v[3:4], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_load_b64 s[2:3], s[2:3], 0x50
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v7
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_10
; %bb.5:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[10:11], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	global_load_b64 v[4:5], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v0, v0, v10
	v_and_b32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v1, v1, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[8:9], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[10:11]
	s_cbranch_execz .LBB1_9
; %bb.6:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s5, 0
.LBB1_7:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v10, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v10
	v_and_b32_e32 v6, v5, v11
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v4, 24, v[8:9]
	v_mad_u64_u32 v[4:5], null, v6, 24, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v1, v4
	global_load_b64 v[8:9], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[10:11]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_7
; %bb.8:                                ; %Flow321
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_9:                                ; %Flow323
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_10:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v8, 0
	v_readfirstlane_b32 s4, v0
	v_readfirstlane_b32 s5, v1
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[9:10], v8, s[2:3] offset:40
	global_load_b128 v[3:6], v8, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v9
	v_readfirstlane_b32 s7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, v8
	s_add_i32 s10, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v3, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s10, v4, vcc_lo
	v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1
	global_store_b128 v[0:1], v[9:12], off offset:8
.LBB1_12:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[0:1], 6, v[7:8]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v5, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v5, v0
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo
	v_dual_mov_b32 v7, 33 :: v_dual_mov_b32 v10, v8
	v_mov_b32_e32 v9, v8
	v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v14, s15
	v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s14
	s_clause 0x3
	global_store_b128 v[0:1], v[7:10], off
	global_store_b128 v[0:1], v[11:14], off offset:16
	global_store_b128 v[0:1], v[11:14], off offset:32
	global_store_b128 v[0:1], v[11:14], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_20
; %bb.13:
	v_mov_b32_e32 v11, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[14:15], v11, s[2:3] offset:32 glc
	global_load_b64 v[5:6], v11, s[2:3] offset:40
	v_dual_mov_b32 v12, s4 :: v_dual_mov_b32 v13, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v6, s5, v6
	v_and_b32_e32 v5, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v6, v6, 24
	v_mul_hi_u32 v7, v5, 24
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v7, v6
	v_add_co_u32 v9, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v4, v6, vcc_lo
	global_store_b64 v[9:10], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v11, v[12:15], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[7:8], v[14:15]
	s_cbranch_execz .LBB1_16
; %bb.14:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s10, 0
.LBB1_15:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v5, s4 :: v_dual_mov_b32 v6, s5
	s_sleep 1
	global_store_b64 v[9:10], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v11, v[5:8], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_15
.LBB1_16:                               ; %Flow319
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v8, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v7, s10, 0
	global_load_b64 v[5:6], v8, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB1_18
; %bb.17:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[5:6], v[7:8], off offset:8
.LBB1_18:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[7:8], v[5:6], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8]
	s_cbranch_vccnz .LBB1_20
; %bb.19:
	global_load_b32 v5, v[5:6], off offset:24
	v_mov_b32_e32 v6, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v5
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[7:8], v[5:6], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_20:                               ; %Flow320
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v3, vcc_lo, v3, s9
	v_add_co_ci_u32_e32 v4, vcc_lo, s8, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_21:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v5, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_23
; %bb.22:                               ;   in Loop: Header=BB1_21 Depth=1
	global_load_b32 v5, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v5, 1, v5
.LBB1_23:                               ;   in Loop: Header=BB1_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v5
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_25
; %bb.24:                               ;   in Loop: Header=BB1_21 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_26
.LBB1_25:                               ;   in Loop: Header=BB1_21 Depth=1
	s_mov_b32 s1, -1
.LBB1_26:                               ; %Flow314
                                        ;   in Loop: Header=BB1_21 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_21
; %bb.27:
	global_load_b64 v[0:1], v[0:1], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_31
; %bb.28:
	v_mov_b32_e32 v9, 0
	s_clause 0x2
	global_load_b64 v[5:6], v9, s[2:3] offset:40
	global_load_b64 v[10:11], v9, s[2:3] offset:24 glc
	global_load_b64 v[7:8], v9, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v12, vcc_lo, v5, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v12, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12
	v_and_b32_e32 v6, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v5, v3, v5
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v5, 24
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v7, v5
	v_mov_b32_e32 v5, v10
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo
	v_mov_b32_e32 v6, v11
	global_store_b64 v[7:8], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_31
; %bb.29:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_30:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6]
	v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_30
.LBB1_31:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, .str@rel32@lo+4
	s_addc_u32 s5, s5, .str@rel32@hi+12
	s_mov_b32 s0, -1
	s_cmp_lg_u64 s[4:5], 0
	s_cbranch_scc0 .LBB1_117
; %bb.32:
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v8, v1 :: v_dual_and_b32 v7, -3, v0
	v_dual_mov_b32 v28, 0 :: v_dual_mov_b32 v5, 2
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[6:7], 6
.LBB1_33:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_36 Depth 2
                                        ;     Child Loop BB1_43 Depth 2
                                        ;     Child Loop BB1_51 Depth 2
                                        ;     Child Loop BB1_59 Depth 2
                                        ;     Child Loop BB1_67 Depth 2
                                        ;     Child Loop BB1_75 Depth 2
                                        ;     Child Loop BB1_83 Depth 2
                                        ;     Child Loop BB1_91 Depth 2
                                        ;     Child Loop BB1_99 Depth 2
                                        ;     Child Loop BB1_105 Depth 2
                                        ;     Child Loop BB1_114 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u64_e64 s0, s[6:7], 56
                                        ; implicit-def: $sgpr15
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s8, s6, 56
	s_cselect_b32 s9, s7, 0
	s_cmp_gt_u32 s8, 7
	s_mov_b32 s0, -1
	s_cbranch_scc1 .LBB1_38
; %bb.34:                               ;   in Loop: Header=BB1_33 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc1 .LBB1_37
; %bb.35:                               ; %.preheader31.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_lshl_b64 s[0:1], s[8:9], 3
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], s[4:5]
.LBB1_36:                               ; %.preheader31.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v3, v28, s[12:13]
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v27, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], s10, v[27:28]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_cmp_lg_u32 s0, s10
	v_or_b32_e32 v9, v3, v9
	v_or_b32_e32 v10, v4, v10
	s_cbranch_scc1 .LBB1_36
.LBB1_37:                               ; %Flow289
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s15, 0
.LBB1_38:                               ; %Flow291
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[0:1], s[4:5]
	s_cbranch_vccnz .LBB1_40
; %bb.39:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[9:10], v28, s[4:5]
	s_add_i32 s15, s8, -8
	s_add_u32 s0, s4, 8
	s_addc_u32 s1, s5, 0
.LBB1_40:                               ; %.loopexit32.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_cmp_gt_u32 s15, 7
	s_cbranch_scc1 .LBB1_45
; %bb.41:                               ;   in Loop: Header=BB1_33 Depth=1
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v12, 0
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB1_44
; %bb.42:                               ; %.preheader29.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_43:                               ; %.preheader29.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v3, v28, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v27, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], s10, v[27:28]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s15, s12
	v_or_b32_e32 v11, v3, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v12, v4, v12
	s_cbranch_scc1 .LBB1_43
.LBB1_44:                               ; %Flow284
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s14, 0
	s_branch .LBB1_46
.LBB1_45:                               ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr11_vgpr12
                                        ; implicit-def: $sgpr14
.LBB1_46:                               ; %Flow286
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_48
; %bb.47:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[11:12], v28, s[0:1]
	s_add_i32 s14, s15, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_48:                               ; %.loopexit30.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_cmp_gt_u32 s14, 7
	s_cbranch_scc1 .LBB1_53
; %bb.49:                               ;   in Loop: Header=BB1_33 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB1_52
; %bb.50:                               ; %.preheader27.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_51:                               ; %.preheader27.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v3, v28, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v27, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], s10, v[27:28]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s14, s12
	v_or_b32_e32 v13, v3, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v14, v4, v14
	s_cbranch_scc1 .LBB1_51
.LBB1_52:                               ; %Flow279
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s15, 0
	s_branch .LBB1_54
.LBB1_53:                               ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $sgpr15
.LBB1_54:                               ; %Flow281
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_56
; %bb.55:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[13:14], v28, s[0:1]
	s_add_i32 s15, s14, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_56:                               ; %.loopexit28.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_cmp_gt_u32 s15, 7
	s_cbranch_scc1 .LBB1_61
; %bb.57:                               ;   in Loop: Header=BB1_33 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB1_60
; %bb.58:                               ; %.preheader25.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_59:                               ; %.preheader25.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v3, v28, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v27, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], s10, v[27:28]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s15, s12
	v_or_b32_e32 v15, v3, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v16, v4, v16
	s_cbranch_scc1 .LBB1_59
.LBB1_60:                               ; %Flow274
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s14, 0
	s_branch .LBB1_62
.LBB1_61:                               ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $sgpr14
.LBB1_62:                               ; %Flow276
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_64
; %bb.63:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[15:16], v28, s[0:1]
	s_add_i32 s14, s15, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_64:                               ; %.loopexit26.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_cmp_gt_u32 s14, 7
	s_cbranch_scc1 .LBB1_69
; %bb.65:                               ;   in Loop: Header=BB1_33 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB1_68
; %bb.66:                               ; %.preheader23.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_67:                               ; %.preheader23.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v3, v28, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v27, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], s10, v[27:28]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s14, s12
	v_or_b32_e32 v17, v3, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v18, v4, v18
	s_cbranch_scc1 .LBB1_67
.LBB1_68:                               ; %Flow269
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s15, 0
	s_branch .LBB1_70
.LBB1_69:                               ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $sgpr15
.LBB1_70:                               ; %Flow271
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_72
; %bb.71:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[17:18], v28, s[0:1]
	s_add_i32 s15, s14, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_72:                               ; %.loopexit24.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_cmp_gt_u32 s15, 7
	s_cbranch_scc1 .LBB1_77
; %bb.73:                               ;   in Loop: Header=BB1_33 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB1_76
; %bb.74:                               ; %.preheader21.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_75:                               ; %.preheader21.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v3, v28, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v27, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], s10, v[27:28]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s15, s12
	v_or_b32_e32 v19, v3, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v20, v4, v20
	s_cbranch_scc1 .LBB1_75
.LBB1_76:                               ; %Flow264
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s14, 0
	s_branch .LBB1_78
.LBB1_77:                               ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr19_vgpr20
                                        ; implicit-def: $sgpr14
.LBB1_78:                               ; %Flow266
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_80
; %bb.79:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[19:20], v28, s[0:1]
	s_add_i32 s14, s15, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_80:                               ; %.loopexit22.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_cmp_gt_u32 s14, 7
	s_cbranch_scc1 .LBB1_85
; %bb.81:                               ;   in Loop: Header=BB1_33 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB1_84
; %bb.82:                               ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], s[0:1]
.LBB1_83:                               ; %.preheader.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v3, v28, s[12:13]
	s_add_i32 s14, s14, -1
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v27, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], s10, v[27:28]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_cmp_lg_u32 s14, 0
	v_or_b32_e32 v21, v3, v21
	v_or_b32_e32 v22, v4, v22
	s_cbranch_scc1 .LBB1_83
.LBB1_84:                               ; %Flow259
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, 0
	s_branch .LBB1_86
.LBB1_85:                               ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s10, -1
.LBB1_86:                               ; %Flow261
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_88
; %bb.87:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[21:22], v28, s[0:1]
.LBB1_88:                               ; %.loopexit.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	v_mov_b32_e32 v27, v2
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v27
	v_cmp_eq_u32_e64 s0, s0, v27
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_94
; %bb.89:                               ;   in Loop: Header=BB1_33 Depth=1
	global_load_b64 v[25:26], v28, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v28, s[2:3] offset:40
	global_load_b64 v[23:24], v28, s[2:3]
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v26
	v_and_b32_e32 v3, v3, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v29, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v29, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v23, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v24, v4, vcc_lo
	global_load_b64 v[23:24], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v28, v[23:26], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[3:4], v[25:26]
	s_cbranch_execz .LBB1_93
; %bb.90:                               ; %.preheader3.i.i19.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s11, 0
.LBB1_91:                               ; %.preheader3.i.i19.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[23:24], v28, s[2:3] offset:40
	global_load_b64 v[29:30], v28, s[2:3]
	v_dual_mov_b32 v26, v4 :: v_dual_mov_b32 v25, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v23, v23, v25
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v23, 24, v[29:30]
	v_and_b32_e32 v29, v24, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[23:24], null, v29, 24, v[4:5]
	v_mov_b32_e32 v4, v23
	global_load_b64 v[23:24], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v28, v[23:26], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[25:26]
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_91
; %bb.92:                               ; %Flow254
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB1_93:                               ; %Flow256
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s10
.LBB1_94:                               ; %.loopexit4.i.i14.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[29:30], v28, s[2:3] offset:40
	global_load_b128 v[23:26], v28, s[2:3]
	v_readfirstlane_b32 s10, v3
	v_readfirstlane_b32 s11, v4
	s_mov_b32 s16, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s12, v29
	v_readfirstlane_b32 s13, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[12:13], s[10:11], s[12:13]
	s_mul_i32 s1, s13, 24
	s_mul_hi_u32 s14, s12, 24
	s_mul_i32 s15, s12, 24
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB1_96
; %bb.95:                               ;   in Loop: Header=BB1_33 Depth=1
	v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v4, v28
	s_add_i32 s16, s14, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v29, vcc_lo, v23, s15
	v_add_co_ci_u32_e32 v30, vcc_lo, s16, v24, vcc_lo
	global_store_b128 v[29:30], v[3:6], off offset:8
.LBB1_96:                               ;   in Loop: Header=BB1_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56
	v_or_b32_e32 v3, 2, v7
	s_lshl_b64 s[12:13], s[12:13], 12
	s_lshl_b32 s16, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s16, s16, 28
	v_cndmask_b32_e32 v7, v3, v7, vcc_lo
	v_lshlrev_b64 v[3:4], 6, v[27:28]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v25, vcc_lo, v25, s12
	v_add_co_ci_u32_e32 v26, vcc_lo, s13, v26, vcc_lo
	s_and_b32 s16, s16, 0x1e0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v25, v3
	v_and_or_b32 v7, 0xffffff1f, v7, s16
	v_add_co_ci_u32_e32 v4, vcc_lo, v26, v4, vcc_lo
	s_clause 0x3
	global_store_b128 v[3:4], v[7:10], off
	global_store_b128 v[3:4], v[11:14], off offset:16
	global_store_b128 v[3:4], v[15:18], off offset:32
	global_store_b128 v[3:4], v[19:22], off offset:48
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB1_104
; %bb.97:                               ;   in Loop: Header=BB1_33 Depth=1
	s_clause 0x1
	global_load_b64 v[15:16], v28, s[2:3] offset:32 glc
	global_load_b64 v[7:8], v28, s[2:3] offset:40
	v_dual_mov_b32 v13, s10 :: v_dual_mov_b32 v14, s11
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v7
	v_readfirstlane_b32 s17, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[10:11]
	s_mul_i32 s13, s17, 24
	s_mul_hi_u32 s17, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s17, s17, s13
	v_add_co_u32 v11, vcc_lo, v23, s16
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v24, vcc_lo
	s_mov_b32 s13, exec_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v28, v[13:16], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[9:10], v[15:16]
	s_cbranch_execz .LBB1_100
; %bb.98:                               ; %.preheader1.i.i17.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s16, 0
.LBB1_99:                               ; %.preheader1.i.i17.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
	s_sleep 1
	global_store_b64 v[11:12], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v28, v[7:10], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB1_99
.LBB1_100:                              ; %Flow252
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	global_load_b64 v[7:8], v28, s[2:3] offset:16
	s_mov_b32 s16, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v9, s16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v9
	s_cbranch_execz .LBB1_102
; %bb.101:                              ;   in Loop: Header=BB1_33 Depth=1
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v27, s16
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[7:8], v[27:28], off offset:8
.LBB1_102:                              ;   in Loop: Header=BB1_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	global_load_b64 v[9:10], v[7:8], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[9:10]
	s_cbranch_vccnz .LBB1_104
; %bb.103:                              ;   in Loop: Header=BB1_33 Depth=1
	global_load_b32 v27, v[7:8], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s13, v27
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[9:10], v[27:28], off
	s_and_b32 m0, s13, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_104:                              ; %Flow253
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s14, s14, s1
	v_add_co_u32 v7, vcc_lo, v23, s15
	v_add_co_ci_u32_e32 v8, vcc_lo, s14, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v7, 20
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
.LBB1_105:                              ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v9, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_107
; %bb.106:                              ;   in Loop: Header=BB1_105 Depth=2
	global_load_b32 v9, v[7:8], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v9, 1, v9
.LBB1_107:                              ;   in Loop: Header=BB1_105 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v9
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_109
; %bb.108:                              ;   in Loop: Header=BB1_105 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_110
.LBB1_109:                              ;   in Loop: Header=BB1_105 Depth=2
	s_mov_b32 s1, -1
.LBB1_110:                              ; %Flow247
                                        ;   in Loop: Header=BB1_105 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_105
; %bb.111:                              ;   in Loop: Header=BB1_33 Depth=1
	global_load_b128 v[7:10], v[3:4], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_115
; %bb.112:                              ;   in Loop: Header=BB1_33 Depth=1
	s_clause 0x2
	global_load_b64 v[3:4], v28, s[2:3] offset:40
	global_load_b64 v[13:14], v28, s[2:3] offset:24 glc
	global_load_b64 v[11:12], v28, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v15, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v15, s10
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[9:10]
	v_dual_cndmask_b32 v10, v10, v16 :: v_dual_cndmask_b32 v9, v9, v15
	v_and_b32_e32 v4, v10, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v9, v3
	v_mul_hi_u32 v15, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, vcc_lo, v11, v3
	v_mov_b32_e32 v11, v13
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v4, v15, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, v12, v4, vcc_lo
	v_mov_b32_e32 v12, v14
	global_store_b64 v[3:4], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v28, v[9:12], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[11:12], v[13:14]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_115
; %bb.113:                              ; %.preheader.i.i16.i.preheader
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_mov_b32 s0, 0
.LBB1_114:                              ; %.preheader.i.i16.i
                                        ;   Parent Loop BB1_33 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[13:14], v28, v[9:12], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[11:12]
	v_dual_mov_b32 v11, v13 :: v_dual_mov_b32 v12, v14
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_114
.LBB1_115:                              ; %__ockl_hostcall_preview.exit20.i
                                        ;   in Loop: Header=BB1_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_sub_u32 s6, s6, s8
	s_subb_u32 s7, s7, s9
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc1 .LBB1_33
; %bb.116:                              ; %Flow292
	s_mov_b32 s0, 0
.LBB1_117:                              ; %Flow308
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB1_145
; %bb.118:
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_124
; %bb.119:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s4, exec_lo
	global_load_b64 v[6:7], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB1_123
; %bb.120:                              ; %.preheader3.i.i.i31.preheader
	s_mov_b32 s5, 0
.LBB1_121:                              ; %.preheader3.i.i.i31
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_121
; %bb.122:                              ; %Flow305
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_123:                              ; %Flow307
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_124:                              ; %.loopexit4.i.i.i26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s10, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_126
; %bb.125:
	v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v3
	s_add_i32 s10, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s9
	v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB1_126:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v9, s15
	v_dual_mov_b32 v7, s13 :: v_dual_mov_b32 v8, s14
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_134
; %bb.127:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4
	v_mov_b32_e32 v10, s5
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v0
	v_readfirstlane_b32 s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[4:5]
	s_mul_i32 s7, s11, 24
	s_mul_hi_u32 s11, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s11, s11, s7
	v_add_co_u32 v6, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB1_130
; %bb.128:                              ; %.preheader1.i.i.i29.preheader
	s_mov_b32 s10, 0
.LBB1_129:                              ; %.preheader1.i.i.i29
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_129
.LBB1_130:                              ; %Flow303
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s10, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_132
; %bb.131:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_132:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_134
; %bb.133:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_134:                              ; %Flow304
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v4, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_135:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_137
; %bb.136:                              ;   in Loop: Header=BB1_135 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_137:                              ;   in Loop: Header=BB1_135 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_139
; %bb.138:                              ;   in Loop: Header=BB1_135 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_140
.LBB1_139:                              ;   in Loop: Header=BB1_135 Depth=1
	s_mov_b32 s1, -1
.LBB1_140:                              ; %Flow298
                                        ;   in Loop: Header=BB1_135 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_135
; %bb.141:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_145
; %bb.142:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_145
; %bb.143:                              ; %.preheader.i.i.i28.preheader
	s_mov_b32 s0, 0
.LBB1_144:                              ; %.preheader.i.i.i28
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_144
.LBB1_145:                              ; %__ockl_printf_append_string_n.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3DFTPdS_S_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 31
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z3DFTPdS_S_iS_, .Lfunc_end1-_Z3DFTPdS_S_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5812
; NumSgprs: 20
; NumVgprs: 31
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 31
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	" jaja"
	.size	.str, 6

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9SinodailsPdS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     50
    .sgpr_spill_count: 0
    .symbol:         _Z9SinodailsPdS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     47
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         120
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3DFTPdS_S_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z3DFTPdS_S_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     31
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
