
/* 
   xor_pcases_ref.cu
   Implementation of a XOR neural network in CUDA, 
   calculating output of many input cases in parallel.
   (Refactored version.)

   Andrei de A. Formiga, 2012-03-31
*/

#include <stdio.h>


// weights for the hidden layer
float weights_h[] = { 0.5f, -1.0f, -1.0f,
                      -1.5f, 1.0f, 1.0f };

float weights_h2[2][3] = 
    { 
{ 0.5f, -1.0f, -1.0f }, 
{ -1.5f, 1.0f, 1.0f } };

// weights for the output layer
float weights_o[] = { 0.5f, -1.0f, -1.0f };

// weight arrays for the device
float *dev_hw;
float *dev_ow;

// device input
float *dev_in;

// device hidden outputs
float *dev_hidden;

// device output
float *dev_out;

// inputs
float inputs[] = { 0.0f, 0.0f, 0.0f, 1.0f,
                   1.0f, 0.0f, 1.0f, 1.0f };

const int ncases = 4;
const int input_size = 2;
const int hidden_size = 2;

// weights per neuron
const int ws_per_node[2] = { 3, 2 };

int *dev_wpn;

// index weight from node j to node i in layer l, using array ws of weights
#define W(ws, l, i, j)   ( ws[i * dev_wpn[l] + j] )

// desired outputs
float outputs[] = { 0.0f, 1.0f, 1.0f, 0.0f };

// kernel for hidden layer (indexed as layer 0)
__global__ void calculate_hidden(float *dev_hw, int *dev_wpn, float *input, float *hidden)
{
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    int input_ix = blockIdx.x * blockDim.x;
    int node = threadIdx.x;
    float h;

    // h = dev_hw[toff * 3] * 1.0f +
    //     dev_hw[toff * 3 + 1] * input[input_ix] +
    //     dev_hw[toff * 3 + 2] * input[input_ix+1];

    h = W(dev_hw, 0, node, 0) * 1.0f +
        W(dev_hw, 0, node, 1) * input[input_ix] + 
        W(dev_hw, 0, node, 2) * input[input_ix+1];

    // threshold
    if (h > 0.0f)
        hidden[tid] = 1.0f;
    else
        hidden[tid] = 0.0;
}

// kernel for output layer
__global__ void calculate_output(float *dev_ow, float *hidden, float *output)
{
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    int hidden_ix = blockIdx.x * blockDim.x;
    int toff = threadIdx.x;    
    float o;

    o = dev_ow[toff] * 1.0f +
        dev_ow[toff+1] * hidden[2*hidden_ix] +
        dev_ow[toff+2] * hidden[2*hidden_ix+1];

    // threshold
    if (o > 0.0f)
        output[tid] = 1.0f;
    else
        output[tid] = 0.0f;
}

int main(int argc, char **argv)
{
    float out[ncases];

    printf("### XOR test (forward propagation)\n");
    
    cudaMalloc((void**) &dev_hw, 6 * sizeof(float));
    cudaMalloc((void**) &dev_ow, 3 * sizeof(float));
    cudaMalloc((void**) &dev_in, ncases * input_size * sizeof(float));
    cudaMalloc((void**) &dev_hidden, ncases * hidden_size * sizeof(float));
    cudaMalloc((void**) &dev_out, ncases * sizeof(float));  // output size = 1
    cudaMalloc((void**) &dev_wpn, 2 * sizeof(int));
    
    cudaMemcpy(dev_hw, weights_h, 6 * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(dev_ow, weights_o, 3 * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(dev_wpn, ws_per_node, 2 * sizeof(int), cudaMemcpyHostToDevice);

    // try inputs
    cudaMemcpy(dev_in, inputs, ncases * input_size * sizeof(float), cudaMemcpyHostToDevice);
    calculate_hidden<<<4, 2>>>(dev_hw, dev_wpn, dev_in, dev_hidden);
    calculate_output<<<4, 1>>>(dev_ow, dev_hidden, dev_out);
    cudaMemcpy(out, dev_out, ncases * sizeof(float), cudaMemcpyDeviceToHost);

    for (int i = 0; i < ncases; ++i)
        printf("Input: %2.1f %2.1f -- Output: %f\n", inputs[input_size*i],
               inputs[input_size*i+1], out[i]);
    
    cudaFree(dev_hw);
    cudaFree(dev_ow);
    cudaFree(dev_in);
    cudaFree(dev_hidden);
    cudaFree(dev_out);
    
    return 0;
}

	.file	"tmpxft_002b950e_00000000-6_xor_pcases_ref.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z16calculate_hiddenPfPiS_S_PfPiS_S_
	.type	_Z42__device_stub__Z16calculate_hiddenPfPiS_S_PfPiS_S_, @function
_Z42__device_stub__Z16calculate_hiddenPfPiS_S_PfPiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16calculate_hiddenPfPiS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z42__device_stub__Z16calculate_hiddenPfPiS_S_PfPiS_S_, .-_Z42__device_stub__Z16calculate_hiddenPfPiS_S_PfPiS_S_
	.globl	_Z16calculate_hiddenPfPiS_S_
	.type	_Z16calculate_hiddenPfPiS_S_, @function
_Z16calculate_hiddenPfPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z16calculate_hiddenPfPiS_S_PfPiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z16calculate_hiddenPfPiS_S_, .-_Z16calculate_hiddenPfPiS_S_
	.globl	_Z40__device_stub__Z16calculate_outputPfS_S_PfS_S_
	.type	_Z40__device_stub__Z16calculate_outputPfS_S_PfS_S_, @function
_Z40__device_stub__Z16calculate_outputPfS_S_PfS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16calculate_outputPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z40__device_stub__Z16calculate_outputPfS_S_PfS_S_, .-_Z40__device_stub__Z16calculate_outputPfS_S_PfS_S_
	.globl	_Z16calculate_outputPfS_S_
	.type	_Z16calculate_outputPfS_S_, @function
_Z16calculate_outputPfS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16calculate_outputPfS_S_PfS_S_
	.cfi_endproc
.LFE2055:
	.size	_Z16calculate_outputPfS_S_, .-_Z16calculate_outputPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"### XOR test (forward propagation)\n"
.LC1:
	.string	"Input: %2.1f %2.1f -- Output: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	inputs(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$24, %esi
	leaq	dev_hw(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$12, %esi
	leaq	dev_ow(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$32, %esi
	leaq	dev_in(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$32, %esi
	leaq	dev_hidden(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$16, %esi
	leaq	dev_out(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$8, %esi
	leaq	dev_wpn(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	dev_hw(%rip), %rdi
	movl	$24, %edx
	leaq	weights_h(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movq	dev_ow(%rip), %rdi
	movl	$12, %edx
	leaq	weights_o(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movq	dev_wpn(%rip), %rdi
	movl	$8, %edx
	leaq	_ZL11ws_per_node(%rip), %rsi
	call	cudaMemcpy@PLT
	movq	dev_in(%rip), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movl	$2147483649, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741825, %edi
	addq	%rdx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	movq	%rdx, 12(%rsp)
	movl	$1, 20(%rsp)
	movq	%rdi, (%rsp)
	movl	$1, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	dev_hidden(%rip), %rcx
	movq	dev_in(%rip), %rdx
	movq	dev_wpn(%rip), %rsi
	movq	dev_hw(%rip), %rdi
	call	_Z42__device_stub__Z16calculate_hiddenPfPiS_S_PfPiS_S_
.L14:
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdi
	movl	$1, %esi
	movabsq	$4294967297, %rdx
	movl	$1, 20(%rsp)
	movq	%rdx, 12(%rsp)
	movq	%rdi, (%rsp)
	movl	$1, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	dev_out(%rip), %rdx
	movq	dev_hidden(%rip), %rsi
	movq	dev_ow(%rip), %rdi
	call	_Z40__device_stub__Z16calculate_outputPfS_S_PfS_S_
.L15:
	movq	dev_out(%rip), %rsi
	leaq	24(%rsp), %rbp
	movl	$2, %ecx
	xorl	%ebx, %ebx
	movl	$16, %edx
	movq	%rbp, %rdi
	leaq	4+inputs(%rip), %r13
	call	cudaMemcpy@PLT
.L16:
	cvtss2sd	(%r12,%rbx,8), %xmm0
	cvtss2sd	0(%rbp,%rbx,4), %xmm2
	movb	$3, %al
	cvtss2sd	0(%r13,%rbx,8), %xmm1
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L16
	movq	dev_hw(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_ow(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_in(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_hidden(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_out(%rip), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z16calculate_outputPfS_S_"
.LC3:
	.string	"_Z16calculate_hiddenPfPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16calculate_outputPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16calculate_hiddenPfPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	outputs
	.data
	.align 16
	.type	outputs, @object
	.size	outputs, 16
outputs:
	.long	0
	.long	1065353216
	.long	1065353216
	.long	0
	.globl	dev_wpn
	.bss
	.align 8
	.type	dev_wpn, @object
	.size	dev_wpn, 8
dev_wpn:
	.zero	8
	.section	.rodata
	.align 8
	.type	_ZL11ws_per_node, @object
	.size	_ZL11ws_per_node, 8
_ZL11ws_per_node:
	.long	3
	.long	2
	.globl	inputs
	.data
	.align 32
	.type	inputs, @object
	.size	inputs, 32
inputs:
	.long	0
	.long	0
	.long	0
	.long	1065353216
	.long	1065353216
	.long	0
	.long	1065353216
	.long	1065353216
	.globl	dev_out
	.bss
	.align 8
	.type	dev_out, @object
	.size	dev_out, 8
dev_out:
	.zero	8
	.globl	dev_hidden
	.align 8
	.type	dev_hidden, @object
	.size	dev_hidden, 8
dev_hidden:
	.zero	8
	.globl	dev_in
	.align 8
	.type	dev_in, @object
	.size	dev_in, 8
dev_in:
	.zero	8
	.globl	dev_ow
	.align 8
	.type	dev_ow, @object
	.size	dev_ow, 8
dev_ow:
	.zero	8
	.globl	dev_hw
	.align 8
	.type	dev_hw, @object
	.size	dev_hw, 8
dev_hw:
	.zero	8
	.globl	weights_o
	.data
	.align 8
	.type	weights_o, @object
	.size	weights_o, 12
weights_o:
	.long	1056964608
	.long	-1082130432
	.long	-1082130432
	.globl	weights_h2
	.align 16
	.type	weights_h2, @object
	.size	weights_h2, 24
weights_h2:
	.long	1056964608
	.long	-1082130432
	.long	-1082130432
	.long	-1077936128
	.long	1065353216
	.long	1065353216
	.globl	weights_h
	.align 16
	.type	weights_h, @object
	.size	weights_h, 24
weights_h:
	.long	1056964608
	.long	-1082130432
	.long	-1082130432
	.long	-1077936128
	.long	1065353216
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


/* 
   xor_pcases_ref.cu
   Implementation of a XOR neural network in CUDA, 
   calculating output of many input cases in parallel.
   (Refactored version.)

   Andrei de A. Formiga, 2012-03-31
*/


#include <hip/hip_runtime.h>
#include <stdio.h>


// weights for the hidden layer
float weights_h[] = { 0.5f, -1.0f, -1.0f,
                      -1.5f, 1.0f, 1.0f };

float weights_h2[2][3] = 
    { 
{ 0.5f, -1.0f, -1.0f }, 
{ -1.5f, 1.0f, 1.0f } };

// weights for the output layer
float weights_o[] = { 0.5f, -1.0f, -1.0f };

// weight arrays for the device
float *dev_hw;
float *dev_ow;

// device input
float *dev_in;

// device hidden outputs
float *dev_hidden;

// device output
float *dev_out;

// inputs
float inputs[] = { 0.0f, 0.0f, 0.0f, 1.0f,
                   1.0f, 0.0f, 1.0f, 1.0f };

const int ncases = 4;
const int input_size = 2;
const int hidden_size = 2;

// weights per neuron
const int ws_per_node[2] = { 3, 2 };

int *dev_wpn;

// index weight from node j to node i in layer l, using array ws of weights
#define W(ws, l, i, j)   ( ws[i * dev_wpn[l] + j] )

// desired outputs
float outputs[] = { 0.0f, 1.0f, 1.0f, 0.0f };

// kernel for hidden layer (indexed as layer 0)
__global__ void calculate_hidden(float *dev_hw, int *dev_wpn, float *input, float *hidden)
{
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    int input_ix = blockIdx.x * blockDim.x;
    int node = threadIdx.x;
    float h;

    // h = dev_hw[toff * 3] * 1.0f +
    //     dev_hw[toff * 3 + 1] * input[input_ix] +
    //     dev_hw[toff * 3 + 2] * input[input_ix+1];

    h = W(dev_hw, 0, node, 0) * 1.0f +
        W(dev_hw, 0, node, 1) * input[input_ix] + 
        W(dev_hw, 0, node, 2) * input[input_ix+1];

    // threshold
    if (h > 0.0f)
        hidden[tid] = 1.0f;
    else
        hidden[tid] = 0.0;
}

// kernel for output layer
__global__ void calculate_output(float *dev_ow, float *hidden, float *output)
{
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    int hidden_ix = blockIdx.x * blockDim.x;
    int toff = threadIdx.x;    
    float o;

    o = dev_ow[toff] * 1.0f +
        dev_ow[toff+1] * hidden[2*hidden_ix] +
        dev_ow[toff+2] * hidden[2*hidden_ix+1];

    // threshold
    if (o > 0.0f)
        output[tid] = 1.0f;
    else
        output[tid] = 0.0f;
}

int main(int argc, char **argv)
{
    float out[ncases];

    printf("### XOR test (forward propagation)\n");
    
    hipMalloc((void**) &dev_hw, 6 * sizeof(float));
    hipMalloc((void**) &dev_ow, 3 * sizeof(float));
    hipMalloc((void**) &dev_in, ncases * input_size * sizeof(float));
    hipMalloc((void**) &dev_hidden, ncases * hidden_size * sizeof(float));
    hipMalloc((void**) &dev_out, ncases * sizeof(float));  // output size = 1
    hipMalloc((void**) &dev_wpn, 2 * sizeof(int));
    
    hipMemcpy(dev_hw, weights_h, 6 * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(dev_ow, weights_o, 3 * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(dev_wpn, ws_per_node, 2 * sizeof(int), hipMemcpyHostToDevice);

    // try inputs
    hipMemcpy(dev_in, inputs, ncases * input_size * sizeof(float), hipMemcpyHostToDevice);
    calculate_hidden<<<4, 2>>>(dev_hw, dev_wpn, dev_in, dev_hidden);
    calculate_output<<<4, 1>>>(dev_ow, dev_hidden, dev_out);
    hipMemcpy(out, dev_out, ncases * sizeof(float), hipMemcpyDeviceToHost);

    for (int i = 0; i < ncases; ++i)
        printf("Input: %2.1f %2.1f -- Output: %f\n", inputs[input_size*i],
               inputs[input_size*i+1], out[i]);
    
    hipFree(dev_hw);
    hipFree(dev_ow);
    hipFree(dev_in);
    hipFree(dev_hidden);
    hipFree(dev_out);
    
    return 0;
}

	.text
	.file	"xor_pcases_ref.hip"
	.globl	_Z31__device_stub__calculate_hiddenPfPiS_S_ # -- Begin function _Z31__device_stub__calculate_hiddenPfPiS_S_
	.type	_Z31__device_stub__calculate_hiddenPfPiS_S_,@function
_Z31__device_stub__calculate_hiddenPfPiS_S_: # @_Z31__device_stub__calculate_hiddenPfPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16calculate_hiddenPfPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__calculate_hiddenPfPiS_S_, .Lfunc_end0-_Z31__device_stub__calculate_hiddenPfPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__calculate_outputPfS_S_ # -- Begin function _Z31__device_stub__calculate_outputPfS_S_
	.type	_Z31__device_stub__calculate_outputPfS_S_,@function
_Z31__device_stub__calculate_outputPfS_S_: # @_Z31__device_stub__calculate_outputPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16calculate_outputPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__calculate_outputPfS_S_, .Lfunc_end1-_Z31__device_stub__calculate_outputPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movabsq	$4294967300, %rbx               # imm = 0x100000004
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$dev_hw, %edi
	movl	$24, %esi
	callq	hipMalloc
	movl	$dev_ow, %edi
	movl	$12, %esi
	callq	hipMalloc
	movl	$dev_in, %edi
	movl	$32, %esi
	callq	hipMalloc
	movl	$dev_hidden, %edi
	movl	$32, %esi
	callq	hipMalloc
	movl	$dev_out, %edi
	movl	$16, %esi
	callq	hipMalloc
	movl	$dev_wpn, %edi
	movl	$8, %esi
	callq	hipMalloc
	movq	dev_hw(%rip), %rdi
	movl	$weights_h, %esi
	movl	$24, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_ow(%rip), %rdi
	movl	$weights_o, %esi
	movl	$12, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_wpn(%rip), %rdi
	movl	$_ZL11ws_per_node, %esi
	movl	$8, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_in(%rip), %rdi
	movl	$inputs, %esi
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	-2(%rbx), %rdx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	dev_hw(%rip), %rdi
	movq	dev_wpn(%rip), %rsi
	movq	dev_in(%rip), %rdx
	movq	dev_hidden(%rip), %rcx
	callq	_Z31__device_stub__calculate_hiddenPfPiS_S_
.LBB2_2:
	leaq	-3(%rbx), %rdx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	dev_ow(%rip), %rdi
	movq	dev_hidden(%rip), %rsi
	movq	dev_out(%rip), %rdx
	callq	_Z31__device_stub__calculate_outputPfS_S_
.LBB2_4:
	movq	dev_out(%rip), %rsi
	movq	%rsp, %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	inputs(,%rbx,8), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	inputs+4(,%rbx,8), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	(%rsp,%rbx,4), %xmm2
	movl	$.L.str.1, %edi
	movb	$3, %al
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB2_5
# %bb.6:
	movq	dev_hw(%rip), %rdi
	callq	hipFree
	movq	dev_ow(%rip), %rdi
	callq	hipFree
	movq	dev_in(%rip), %rdi
	callq	hipFree
	movq	dev_hidden(%rip), %rdi
	callq	hipFree
	movq	dev_out(%rip), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16calculate_hiddenPfPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16calculate_outputPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	weights_h,@object               # @weights_h
	.data
	.globl	weights_h
	.p2align	4, 0x0
weights_h:
	.long	0x3f000000                      # float 0.5
	.long	0xbf800000                      # float -1
	.long	0xbf800000                      # float -1
	.long	0xbfc00000                      # float -1.5
	.long	0x3f800000                      # float 1
	.long	0x3f800000                      # float 1
	.size	weights_h, 24

	.type	weights_h2,@object              # @weights_h2
	.globl	weights_h2
	.p2align	4, 0x0
weights_h2:
	.long	0x3f000000                      # float 0.5
	.long	0xbf800000                      # float -1
	.long	0xbf800000                      # float -1
	.long	0xbfc00000                      # float -1.5
	.long	0x3f800000                      # float 1
	.long	0x3f800000                      # float 1
	.size	weights_h2, 24

	.type	weights_o,@object               # @weights_o
	.globl	weights_o
	.p2align	2, 0x0
weights_o:
	.long	0x3f000000                      # float 0.5
	.long	0xbf800000                      # float -1
	.long	0xbf800000                      # float -1
	.size	weights_o, 12

	.type	dev_hw,@object                  # @dev_hw
	.bss
	.globl	dev_hw
	.p2align	3, 0x0
dev_hw:
	.quad	0
	.size	dev_hw, 8

	.type	dev_ow,@object                  # @dev_ow
	.globl	dev_ow
	.p2align	3, 0x0
dev_ow:
	.quad	0
	.size	dev_ow, 8

	.type	dev_in,@object                  # @dev_in
	.globl	dev_in
	.p2align	3, 0x0
dev_in:
	.quad	0
	.size	dev_in, 8

	.type	dev_hidden,@object              # @dev_hidden
	.globl	dev_hidden
	.p2align	3, 0x0
dev_hidden:
	.quad	0
	.size	dev_hidden, 8

	.type	dev_out,@object                 # @dev_out
	.globl	dev_out
	.p2align	3, 0x0
dev_out:
	.quad	0
	.size	dev_out, 8

	.type	inputs,@object                  # @inputs
	.data
	.globl	inputs
	.p2align	4, 0x0
inputs:
	.long	0x00000000                      # float 0
	.long	0x00000000                      # float 0
	.long	0x00000000                      # float 0
	.long	0x3f800000                      # float 1
	.long	0x3f800000                      # float 1
	.long	0x00000000                      # float 0
	.long	0x3f800000                      # float 1
	.long	0x3f800000                      # float 1
	.size	inputs, 32

	.type	dev_wpn,@object                 # @dev_wpn
	.bss
	.globl	dev_wpn
	.p2align	3, 0x0
dev_wpn:
	.quad	0
	.size	dev_wpn, 8

	.type	outputs,@object                 # @outputs
	.data
	.globl	outputs
	.p2align	4, 0x0
outputs:
	.long	0x00000000                      # float 0
	.long	0x3f800000                      # float 1
	.long	0x3f800000                      # float 1
	.long	0x00000000                      # float 0
	.size	outputs, 16

	.type	_Z16calculate_hiddenPfPiS_S_,@object # @_Z16calculate_hiddenPfPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z16calculate_hiddenPfPiS_S_
	.p2align	3, 0x0
_Z16calculate_hiddenPfPiS_S_:
	.quad	_Z31__device_stub__calculate_hiddenPfPiS_S_
	.size	_Z16calculate_hiddenPfPiS_S_, 8

	.type	_Z16calculate_outputPfS_S_,@object # @_Z16calculate_outputPfS_S_
	.globl	_Z16calculate_outputPfS_S_
	.p2align	3, 0x0
_Z16calculate_outputPfS_S_:
	.quad	_Z31__device_stub__calculate_outputPfS_S_
	.size	_Z16calculate_outputPfS_S_, 8

	.type	_ZL11ws_per_node,@object        # @_ZL11ws_per_node
	.p2align	2, 0x0
_ZL11ws_per_node:
	.long	3                               # 0x3
	.long	2                               # 0x2
	.size	_ZL11ws_per_node, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Input: %2.1f %2.1f -- Output: %f\n"
	.size	.L.str.1, 34

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16calculate_hiddenPfPiS_S_"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16calculate_outputPfS_S_"
	.size	.L__unnamed_2, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"### XOR test (forward propagation)"
	.size	.Lstr, 35

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__calculate_hiddenPfPiS_S_
	.addrsig_sym _Z31__device_stub__calculate_outputPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym weights_h
	.addrsig_sym weights_o
	.addrsig_sym dev_hw
	.addrsig_sym dev_ow
	.addrsig_sym dev_in
	.addrsig_sym dev_hidden
	.addrsig_sym dev_out
	.addrsig_sym inputs
	.addrsig_sym dev_wpn
	.addrsig_sym _Z16calculate_hiddenPfPiS_S_
	.addrsig_sym _Z16calculate_outputPfS_S_
	.addrsig_sym _ZL11ws_per_node
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16calculate_hiddenPfPiS_S_ ; -- Begin function _Z16calculate_hiddenPfPiS_S_
	.globl	_Z16calculate_hiddenPfPiS_S_
	.p2align	8
	.type	_Z16calculate_hiddenPfPiS_S_,@function
_Z16calculate_hiddenPfPiS_S_:           ; @_Z16calculate_hiddenPfPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[6:7], 0x0
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s15, s0
	s_ashr_i32 s1, s0, 31
	v_add_nc_u32_e32 v4, s0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, s2, v0
	s_lshl_b64 s[2:3], s[0:1], 2
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	s_load_b64 s[2:3], s[2:3], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b96 v[1:3], v[1:2], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f32 v2, s2, v2, v1
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, s3, v3
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16calculate_hiddenPfPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16calculate_hiddenPfPiS_S_, .Lfunc_end0-_Z16calculate_hiddenPfPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 212
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16calculate_outputPfS_S_ ; -- Begin function _Z16calculate_outputPfS_S_
	.globl	_Z16calculate_outputPfS_S_
	.p2align	8
	.type	_Z16calculate_outputPfS_S_,@function
_Z16calculate_outputPfS_S_:             ; @_Z16calculate_outputPfS_S_
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s0, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s0
	s_lshl_b32 s0, s15, 1
	v_add_nc_u32_e32 v4, s15, v0
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	v_ashrrev_i32_e32 v5, 31, v4
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 2, v0
	global_load_b96 v[1:3], v1, s[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f32 v2, s0, v2, v1
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, s1, v3
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16calculate_outputPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16calculate_outputPfS_S_, .Lfunc_end1-_Z16calculate_outputPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16calculate_hiddenPfPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16calculate_hiddenPfPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16calculate_outputPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16calculate_outputPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
