//#define num_cuda_stream (5)

__global__ void Euler_distance(float* input, float* output, int index, int size)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	float dx, dy;
	while (thread<size)
	{
		dx = input[thread*2]-input[index*2];
		dy = input[thread*2+1]-input[index*2+1];
		output[thread] = (dx)* (dx) + (dy)* (dy);
		output[thread] = sqrtf(output[thread]);
		thread += total;
	}
	return;
}

__global__ void is_in_epsi(float* input, int* output, int index, float epsi, int size)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	float dx, dy;
	while (thread<size)
	{
		if (input[thread]<epsi&&thread!=index)
		{ 
			atomicAdd(output, 1);		
		}
		thread += total;
	}

	return;
}

__global__ void is_in_epsi(float* input, int* output1, int* output2, int index, float epsi, int size)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	float dx, dy;
	while (thread<size)
	{
		output2[thread] = 0;
		if (input[thread]<epsi&&thread!=index)
		{ 
			atomicAdd(output1, 1);
			output2[thread] = 1;
		}
		thread += total;
	}

	return;
}

__global__ void copy_to_euler_neighbour(int* input1, float* input2, float* output, int size, int* length)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	while (thread<size)
	{
		if (!thread&&input1[thread])
		{
			output[(input1[thread]-1)] = input2[thread];
			output[length[0]+(input1[thread])-1] = thread;
		}
		if(thread&&input1[thread]!=input1[thread-1])
		{
			output[(input1[thread]-1)] = input2[thread];
			output[length[0]+(input1[thread])-1] = thread;

		}
		thread += total;
	}

	return;
}

__global__ void set_core_distance(float* input, float* output, int index, float epsi, int size)
{
	//int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int thread = blockIdx.x;
	int j = 0;
	if (thread+index >=size)
	{
		return;
	}
	float* d_input = input +thread* size;
	float* d_output = output + 2*thread*size;
	if (threadIdx.x==0)
	{
		for (int i=0;i<size;i++)
		{
			if (d_input[i]<epsi&&d_input[i])
			{
				d_output[j*2] = i;
				d_output[j*2+1] = d_input[i];
				j++;
			}
		}
		for (int i=0;i<j;i++)
		{
			for (int k=i;k<j;k++)
			{
				if(d_output[i*2+1]>d_output[k*2+1])
				{
					float a1,a2;
					a1 = d_output[i*2];
					a2 = d_output[i*2+1];
					d_output[i*2] = d_output[k*2];
					d_output[i*2+1] = d_output[k*2+1];
					d_output[k*2] = a1;
					d_output[k*2+1] = a2;
				}
			}
		}
	}
	return;
}

__global__ void break_cycle_step1(int* cyc_list, int* vertex, int* mst_edge, int* edge_perv, int* group_id, float* weight, int* edge,float* cyc_delta)
{
	int tid = threadIdx.x + threadIdx.y*blockDim.x + blockIdx.x*(blockDim.x*blockDim.y) + blockIdx.y*gridDim.x*(blockDim.x*blockDim.y);
	int cyc_id = cyc_list[tid];
	int start, end, present, temp;
	present = start = vertex[cyc_id];
	end = vertex[cyc_id] + edge_perv[cyc_id];
	if(mst_edge[cyc_id!=-1])
	{
		while (mst_edge[cyc_id]!=edge[present]){present++;}
		
		int i=present+1;

		for (;i<end;i++)
		{
			int par_id = edge[i];

			if (group_id[par_id]!=group_id[cyc_id])
			{
				cyc_delta[tid*2] = weight[i] - weight[present];
				cyc_delta[tid*2 + 1] = i;//¼edgeϵƫ
				break;
			}

		}

		if (i==end)
		{
			cyc_delta[tid*2] = -weight[present];
			cyc_delta[tid*2 + 1] = -1;
		}
	}
	return ;
}


__global__ void break_cycle_step2(int* cyc_list, int* edge, int* mst_edge, float* cyc_delta, int size)
{
	int tid = threadIdx.x + threadIdx.y*blockDim.x + blockIdx.x*(blockDim.x*blockDim.y) + blockIdx.y*gridDim.x*(blockDim.x*blockDim.y);
	int n0min=0;
	int n0max = 0;
	int i=0;
	while (cyc_delta[i*2]<0&&i<size){i++;}
	if (i==size)
	{
		n0min = -1;
	}else
	{
		n0min = i;
	}
	for(i=0;i<size;i++)
	{
		if (cyc_delta[i*2]>0&&cyc_delta[n0min*2]>cyc_delta[i*2])
		{
			n0min = i;
		}
		if (cyc_delta[i*2]<0&&cyc_delta[n0max*2]>cyc_delta[i*2])
		{
			n0max = i;
		}
	}

	if (n0min==-1)//ɾ;
	{
		int delete_par_id = cyc_list[n0max];
		mst_edge[delete_par_id] = -1;
	}
	if(n0min!=-1)//ɾ߼ӱ;
	{
		int replace_par_id = cyc_delta[2*n0min+1];
		int delete_par_id = cyc_list[n0min];
		mst_edge[delete_par_id] = edge[replace_par_id];
	}
	return;
}
	.file	"tmpxft_00352203_00000000-6_OPTICS_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z14Euler_distancePfS_iiPfS_ii
	.type	_Z38__device_stub__Z14Euler_distancePfS_iiPfS_ii, @function
_Z38__device_stub__Z14Euler_distancePfS_iiPfS_ii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14Euler_distancePfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z38__device_stub__Z14Euler_distancePfS_iiPfS_ii, .-_Z38__device_stub__Z14Euler_distancePfS_iiPfS_ii
	.globl	_Z14Euler_distancePfS_ii
	.type	_Z14Euler_distancePfS_ii, @function
_Z14Euler_distancePfS_ii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14Euler_distancePfS_iiPfS_ii
	.cfi_endproc
.LFE2033:
	.size	_Z14Euler_distancePfS_ii, .-_Z14Euler_distancePfS_ii
	.globl	_Z35__device_stub__Z10is_in_epsiPfPiifiPfPiifi
	.type	_Z35__device_stub__Z10is_in_epsiPfPiifiPfPiifi, @function
_Z35__device_stub__Z10is_in_epsiPfPiifiPfPiifi:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10is_in_epsiPfPiifi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z35__device_stub__Z10is_in_epsiPfPiifiPfPiifi, .-_Z35__device_stub__Z10is_in_epsiPfPiifiPfPiifi
	.globl	_Z10is_in_epsiPfPiifi
	.type	_Z10is_in_epsiPfPiifi, @function
_Z10is_in_epsiPfPiifi:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10is_in_epsiPfPiifiPfPiifi
	.cfi_endproc
.LFE2035:
	.size	_Z10is_in_epsiPfPiifi, .-_Z10is_in_epsiPfPiifi
	.globl	_Z38__device_stub__Z10is_in_epsiPfPiS0_ifiPfPiS0_ifi
	.type	_Z38__device_stub__Z10is_in_epsiPfPiS0_ifiPfPiS0_ifi, @function
_Z38__device_stub__Z10is_in_epsiPfPiS0_ifiPfPiS0_ifi:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movss	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10is_in_epsiPfPiS0_ifi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L13:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z38__device_stub__Z10is_in_epsiPfPiS0_ifiPfPiS0_ifi, .-_Z38__device_stub__Z10is_in_epsiPfPiS0_ifiPfPiS0_ifi
	.globl	_Z10is_in_epsiPfPiS0_ifi
	.type	_Z10is_in_epsiPfPiS0_ifi, @function
_Z10is_in_epsiPfPiS0_ifi:
.LFB2037:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z10is_in_epsiPfPiS0_ifiPfPiS0_ifi
	.cfi_endproc
.LFE2037:
	.size	_Z10is_in_epsiPfPiS0_ifi, .-_Z10is_in_epsiPfPiS0_ifi
	.globl	_Z51__device_stub__Z23copy_to_euler_neighbourPiPfS0_iS_PiPfS0_iS_
	.type	_Z51__device_stub__Z23copy_to_euler_neighbourPiPfS0_iS_PiPfS0_iS_, @function
_Z51__device_stub__Z23copy_to_euler_neighbourPiPfS0_iS_PiPfS0_iS_:
.LFB2038:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z23copy_to_euler_neighbourPiPfS0_iS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L18:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	_Z51__device_stub__Z23copy_to_euler_neighbourPiPfS0_iS_PiPfS0_iS_, .-_Z51__device_stub__Z23copy_to_euler_neighbourPiPfS0_iS_PiPfS0_iS_
	.globl	_Z23copy_to_euler_neighbourPiPfS0_iS_
	.type	_Z23copy_to_euler_neighbourPiPfS0_iS_, @function
_Z23copy_to_euler_neighbourPiPfS0_iS_:
.LFB2039:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z23copy_to_euler_neighbourPiPfS0_iS_PiPfS0_iS_
	.cfi_endproc
.LFE2039:
	.size	_Z23copy_to_euler_neighbourPiPfS0_iS_, .-_Z23copy_to_euler_neighbourPiPfS0_iS_
	.globl	_Z42__device_stub__Z17set_core_distancePfS_ifiPfS_ifi
	.type	_Z42__device_stub__Z17set_core_distancePfS_ifiPfS_ifi, @function
_Z42__device_stub__Z17set_core_distancePfS_ifiPfS_ifi:
.LFB2040:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17set_core_distancePfS_ifi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z42__device_stub__Z17set_core_distancePfS_ifiPfS_ifi, .-_Z42__device_stub__Z17set_core_distancePfS_ifiPfS_ifi
	.globl	_Z17set_core_distancePfS_ifi
	.type	_Z17set_core_distancePfS_ifi, @function
_Z17set_core_distancePfS_ifi:
.LFB2041:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z17set_core_distancePfS_ifiPfS_ifi
	.cfi_endproc
.LFE2041:
	.size	_Z17set_core_distancePfS_ifi, .-_Z17set_core_distancePfS_ifi
	.globl	_Z52__device_stub__Z17break_cycle_step1PiS_S_S_S_PfS_S0_PiS_S_S_S_PfS_S0_
	.type	_Z52__device_stub__Z17break_cycle_step1PiS_S_S_S_PfS_S0_PiS_S_S_S_PfS_S0_, @function
_Z52__device_stub__Z17break_cycle_step1PiS_S_S_S_PfS_S0_PiS_S_S_S_PfS_S0_:
.LFB2042:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 8(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	%rsp, %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L28:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z52__device_stub__Z17break_cycle_step1PiS_S_S_S_PfS_S0_PiS_S_S_S_PfS_S0_, .-_Z52__device_stub__Z17break_cycle_step1PiS_S_S_S_PfS_S0_PiS_S_S_S_PfS_S0_
	.globl	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_
	.type	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_, @function
_Z17break_cycle_step1PiS_S_S_S_PfS_S0_:
.LFB2043:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z17break_cycle_step1PiS_S_S_S_PfS_S0_PiS_S_S_S_PfS_S0_
	.cfi_endproc
.LFE2043:
	.size	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_, .-_Z17break_cycle_step1PiS_S_S_S_PfS_S0_
	.globl	_Z44__device_stub__Z17break_cycle_step2PiS_S_PfiPiS_S_Pfi
	.type	_Z44__device_stub__Z17break_cycle_step2PiS_S_PfiPiS_S_Pfi, @function
_Z44__device_stub__Z17break_cycle_step2PiS_S_PfiPiS_S_Pfi:
.LFB2044:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z17break_cycle_step2PiS_S_Pfi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L33:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z44__device_stub__Z17break_cycle_step2PiS_S_PfiPiS_S_Pfi, .-_Z44__device_stub__Z17break_cycle_step2PiS_S_PfiPiS_S_Pfi
	.globl	_Z17break_cycle_step2PiS_S_Pfi
	.type	_Z17break_cycle_step2PiS_S_Pfi, @function
_Z17break_cycle_step2PiS_S_Pfi:
.LFB2045:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z17break_cycle_step2PiS_S_PfiPiS_S_Pfi
	.cfi_endproc
.LFE2045:
	.size	_Z17break_cycle_step2PiS_S_Pfi, .-_Z17break_cycle_step2PiS_S_Pfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z17break_cycle_step2PiS_S_Pfi"
.LC1:
	.string	"_Z17break_cycle_step1PiS_S_S_S_PfS_S0_"
.LC2:
	.string	"_Z17set_core_distancePfS_ifi"
.LC3:
	.string	"_Z23copy_to_euler_neighbourPiPfS0_iS_"
.LC4:
	.string	"_Z10is_in_epsiPfPiS0_ifi"
.LC5:
	.string	"_Z10is_in_epsiPfPiifi"
.LC6:
	.string	"_Z14Euler_distancePfS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17break_cycle_step2PiS_S_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17set_core_distancePfS_ifi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23copy_to_euler_neighbourPiPfS0_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10is_in_epsiPfPiS0_ifi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10is_in_epsiPfPiifi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14Euler_distancePfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2047:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
//#define num_cuda_stream (5)

__global__ void Euler_distance(float* input, float* output, int index, int size)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	float dx, dy;
	while (thread<size)
	{
		dx = input[thread*2]-input[index*2];
		dy = input[thread*2+1]-input[index*2+1];
		output[thread] = (dx)* (dx) + (dy)* (dy);
		output[thread] = sqrtf(output[thread]);
		thread += total;
	}
	return;
}

__global__ void is_in_epsi(float* input, int* output, int index, float epsi, int size)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	float dx, dy;
	while (thread<size)
	{
		if (input[thread]<epsi&&thread!=index)
		{ 
			atomicAdd(output, 1);		
		}
		thread += total;
	}

	return;
}

__global__ void is_in_epsi(float* input, int* output1, int* output2, int index, float epsi, int size)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	float dx, dy;
	while (thread<size)
	{
		output2[thread] = 0;
		if (input[thread]<epsi&&thread!=index)
		{ 
			atomicAdd(output1, 1);
			output2[thread] = 1;
		}
		thread += total;
	}

	return;
}

__global__ void copy_to_euler_neighbour(int* input1, float* input2, float* output, int size, int* length)
{
	int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int total = gridDim.x*gridDim.y*blockDim.x*blockDim.y;
	while (thread<size)
	{
		if (!thread&&input1[thread])
		{
			output[(input1[thread]-1)] = input2[thread];
			output[length[0]+(input1[thread])-1] = thread;
		}
		if(thread&&input1[thread]!=input1[thread-1])
		{
			output[(input1[thread]-1)] = input2[thread];
			output[length[0]+(input1[thread])-1] = thread;

		}
		thread += total;
	}

	return;
}

__global__ void set_core_distance(float* input, float* output, int index, float epsi, int size)
{
	//int thread = blockIdx.y*gridDim.x*(blockDim.x*blockDim.y) + blockIdx.x*(blockDim.x*blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	int thread = blockIdx.x;
	int j = 0;
	if (thread+index >=size)
	{
		return;
	}
	float* d_input = input +thread* size;
	float* d_output = output + 2*thread*size;
	if (threadIdx.x==0)
	{
		for (int i=0;i<size;i++)
		{
			if (d_input[i]<epsi&&d_input[i])
			{
				d_output[j*2] = i;
				d_output[j*2+1] = d_input[i];
				j++;
			}
		}
		for (int i=0;i<j;i++)
		{
			for (int k=i;k<j;k++)
			{
				if(d_output[i*2+1]>d_output[k*2+1])
				{
					float a1,a2;
					a1 = d_output[i*2];
					a2 = d_output[i*2+1];
					d_output[i*2] = d_output[k*2];
					d_output[i*2+1] = d_output[k*2+1];
					d_output[k*2] = a1;
					d_output[k*2+1] = a2;
				}
			}
		}
	}
	return;
}

__global__ void break_cycle_step1(int* cyc_list, int* vertex, int* mst_edge, int* edge_perv, int* group_id, float* weight, int* edge,float* cyc_delta)
{
	int tid = threadIdx.x + threadIdx.y*blockDim.x + blockIdx.x*(blockDim.x*blockDim.y) + blockIdx.y*gridDim.x*(blockDim.x*blockDim.y);
	int cyc_id = cyc_list[tid];
	int start, end, present, temp;
	present = start = vertex[cyc_id];
	end = vertex[cyc_id] + edge_perv[cyc_id];
	if(mst_edge[cyc_id!=-1])
	{
		while (mst_edge[cyc_id]!=edge[present]){present++;}
		
		int i=present+1;

		for (;i<end;i++)
		{
			int par_id = edge[i];

			if (group_id[par_id]!=group_id[cyc_id])
			{
				cyc_delta[tid*2] = weight[i] - weight[present];
				cyc_delta[tid*2 + 1] = i;//¼edgeϵƫ
				break;
			}

		}

		if (i==end)
		{
			cyc_delta[tid*2] = -weight[present];
			cyc_delta[tid*2 + 1] = -1;
		}
	}
	return ;
}


__global__ void break_cycle_step2(int* cyc_list, int* edge, int* mst_edge, float* cyc_delta, int size)
{
	int tid = threadIdx.x + threadIdx.y*blockDim.x + blockIdx.x*(blockDim.x*blockDim.y) + blockIdx.y*gridDim.x*(blockDim.x*blockDim.y);
	int n0min=0;
	int n0max = 0;
	int i=0;
	while (cyc_delta[i*2]<0&&i<size){i++;}
	if (i==size)
	{
		n0min = -1;
	}else
	{
		n0min = i;
	}
	for(i=0;i<size;i++)
	{
		if (cyc_delta[i*2]>0&&cyc_delta[n0min*2]>cyc_delta[i*2])
		{
			n0min = i;
		}
		if (cyc_delta[i*2]<0&&cyc_delta[n0max*2]>cyc_delta[i*2])
		{
			n0max = i;
		}
	}

	if (n0min==-1)//ɾ;
	{
		int delete_par_id = cyc_list[n0max];
		mst_edge[delete_par_id] = -1;
	}
	if(n0min!=-1)//ɾ߼ӱ;
	{
		int replace_par_id = cyc_delta[2*n0min+1];
		int delete_par_id = cyc_list[n0min];
		mst_edge[delete_par_id] = edge[replace_par_id];
	}
	return;
}
	.text
	.file	"OPTICS_kernel.hip"
	.globl	_Z29__device_stub__Euler_distancePfS_ii # -- Begin function _Z29__device_stub__Euler_distancePfS_ii
	.type	_Z29__device_stub__Euler_distancePfS_ii,@function
_Z29__device_stub__Euler_distancePfS_ii: # @_Z29__device_stub__Euler_distancePfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14Euler_distancePfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__Euler_distancePfS_ii, .Lfunc_end0-_Z29__device_stub__Euler_distancePfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__is_in_epsiPfPiifi # -- Begin function _Z25__device_stub__is_in_epsiPfPiifi
	.type	_Z25__device_stub__is_in_epsiPfPiifi,@function
_Z25__device_stub__is_in_epsiPfPiifi:   # @_Z25__device_stub__is_in_epsiPfPiifi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	4(%rsp), %r8
	movl	%ecx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10is_in_epsiPfPiifi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__is_in_epsiPfPiifi, .Lfunc_end1-_Z25__device_stub__is_in_epsiPfPiifi
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__is_in_epsiPfPiS0_ifi # -- Begin function _Z25__device_stub__is_in_epsiPfPiS0_ifi
	.type	_Z25__device_stub__is_in_epsiPfPiS0_ifi,@function
_Z25__device_stub__is_in_epsiPfPiS0_ifi: # @_Z25__device_stub__is_in_epsiPfPiS0_ifi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	12(%rsp), %r9
	movl	%r8d, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10is_in_epsiPfPiS0_ifi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__is_in_epsiPfPiS0_ifi, .Lfunc_end2-_Z25__device_stub__is_in_epsiPfPiS0_ifi
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_ # -- Begin function _Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_
	.type	_Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_,@function
_Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_: # @_Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23copy_to_euler_neighbourPiPfS0_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_, .Lfunc_end3-_Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__set_core_distancePfS_ifi # -- Begin function _Z32__device_stub__set_core_distancePfS_ifi
	.type	_Z32__device_stub__set_core_distancePfS_ifi,@function
_Z32__device_stub__set_core_distancePfS_ifi: # @_Z32__device_stub__set_core_distancePfS_ifi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	4(%rsp), %r8
	movl	%ecx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17set_core_distancePfS_ifi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z32__device_stub__set_core_distancePfS_ifi, .Lfunc_end4-_Z32__device_stub__set_core_distancePfS_ifi
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_ # -- Begin function _Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_
	.type	_Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_,@function
_Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_: # @_Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17break_cycle_step1PiS_S_S_S_PfS_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_, .Lfunc_end5-_Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__break_cycle_step2PiS_S_Pfi # -- Begin function _Z32__device_stub__break_cycle_step2PiS_S_Pfi
	.type	_Z32__device_stub__break_cycle_step2PiS_S_Pfi,@function
_Z32__device_stub__break_cycle_step2PiS_S_Pfi: # @_Z32__device_stub__break_cycle_step2PiS_S_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17break_cycle_step2PiS_S_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32__device_stub__break_cycle_step2PiS_S_Pfi, .Lfunc_end6-_Z32__device_stub__break_cycle_step2PiS_S_Pfi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14Euler_distancePfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10is_in_epsiPfPiifi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10is_in_epsiPfPiS0_ifi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23copy_to_euler_neighbourPiPfS0_iS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17set_core_distancePfS_ifi, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17break_cycle_step1PiS_S_S_S_PfS_S0_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17break_cycle_step2PiS_S_Pfi, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14Euler_distancePfS_ii,@object # @_Z14Euler_distancePfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z14Euler_distancePfS_ii
	.p2align	3, 0x0
_Z14Euler_distancePfS_ii:
	.quad	_Z29__device_stub__Euler_distancePfS_ii
	.size	_Z14Euler_distancePfS_ii, 8

	.type	_Z10is_in_epsiPfPiifi,@object   # @_Z10is_in_epsiPfPiifi
	.globl	_Z10is_in_epsiPfPiifi
	.p2align	3, 0x0
_Z10is_in_epsiPfPiifi:
	.quad	_Z25__device_stub__is_in_epsiPfPiifi
	.size	_Z10is_in_epsiPfPiifi, 8

	.type	_Z10is_in_epsiPfPiS0_ifi,@object # @_Z10is_in_epsiPfPiS0_ifi
	.globl	_Z10is_in_epsiPfPiS0_ifi
	.p2align	3, 0x0
_Z10is_in_epsiPfPiS0_ifi:
	.quad	_Z25__device_stub__is_in_epsiPfPiS0_ifi
	.size	_Z10is_in_epsiPfPiS0_ifi, 8

	.type	_Z23copy_to_euler_neighbourPiPfS0_iS_,@object # @_Z23copy_to_euler_neighbourPiPfS0_iS_
	.globl	_Z23copy_to_euler_neighbourPiPfS0_iS_
	.p2align	3, 0x0
_Z23copy_to_euler_neighbourPiPfS0_iS_:
	.quad	_Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_
	.size	_Z23copy_to_euler_neighbourPiPfS0_iS_, 8

	.type	_Z17set_core_distancePfS_ifi,@object # @_Z17set_core_distancePfS_ifi
	.globl	_Z17set_core_distancePfS_ifi
	.p2align	3, 0x0
_Z17set_core_distancePfS_ifi:
	.quad	_Z32__device_stub__set_core_distancePfS_ifi
	.size	_Z17set_core_distancePfS_ifi, 8

	.type	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_,@object # @_Z17break_cycle_step1PiS_S_S_S_PfS_S0_
	.globl	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_
	.p2align	3, 0x0
_Z17break_cycle_step1PiS_S_S_S_PfS_S0_:
	.quad	_Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_
	.size	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_, 8

	.type	_Z17break_cycle_step2PiS_S_Pfi,@object # @_Z17break_cycle_step2PiS_S_Pfi
	.globl	_Z17break_cycle_step2PiS_S_Pfi
	.p2align	3, 0x0
_Z17break_cycle_step2PiS_S_Pfi:
	.quad	_Z32__device_stub__break_cycle_step2PiS_S_Pfi
	.size	_Z17break_cycle_step2PiS_S_Pfi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14Euler_distancePfS_ii"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10is_in_epsiPfPiifi"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10is_in_epsiPfPiS0_ifi"
	.size	.L__unnamed_3, 25

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z23copy_to_euler_neighbourPiPfS0_iS_"
	.size	.L__unnamed_4, 38

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z17set_core_distancePfS_ifi"
	.size	.L__unnamed_5, 29

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z17break_cycle_step1PiS_S_S_S_PfS_S0_"
	.size	.L__unnamed_6, 39

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z17break_cycle_step2PiS_S_Pfi"
	.size	.L__unnamed_7, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__Euler_distancePfS_ii
	.addrsig_sym _Z25__device_stub__is_in_epsiPfPiifi
	.addrsig_sym _Z25__device_stub__is_in_epsiPfPiS0_ifi
	.addrsig_sym _Z38__device_stub__copy_to_euler_neighbourPiPfS0_iS_
	.addrsig_sym _Z32__device_stub__set_core_distancePfS_ifi
	.addrsig_sym _Z32__device_stub__break_cycle_step1PiS_S_S_S_PfS_S0_
	.addrsig_sym _Z32__device_stub__break_cycle_step2PiS_S_Pfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14Euler_distancePfS_ii
	.addrsig_sym _Z10is_in_epsiPfPiifi
	.addrsig_sym _Z10is_in_epsiPfPiS0_ifi
	.addrsig_sym _Z23copy_to_euler_neighbourPiPfS0_iS_
	.addrsig_sym _Z17set_core_distancePfS_ifi
	.addrsig_sym _Z17break_cycle_step1PiS_S_S_S_PfS_S0_
	.addrsig_sym _Z17break_cycle_step2PiS_S_Pfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14Euler_distancePfS_ii ; -- Begin function _Z14Euler_distancePfS_ii
	.globl	_Z14Euler_distancePfS_ii
	.p2align	8
	.type	_Z14Euler_distancePfS_ii,@function
_Z14Euler_distancePfS_ii:               ; @_Z14Euler_distancePfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x10
	s_load_b32 s3, s[0:1], 0x24
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s6, s15
	s_lshr_b32 s2, s3, 16
	s_add_i32 s8, s8, s14
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s8, s2, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v2, s3, v[3:4]
	v_cmpx_gt_i32_e64 s5, v0
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[8:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_lshl_b32 s0, s4, 1
	s_mul_i32 s2, s2, s3
	s_ashr_i32 s1, s0, 31
	s_mul_i32 s3, s6, s7
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_lshl_b64 s[0:1], s[0:1], 2
	s_mul_i32 s2, s2, s3
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 1, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s10, v4
	s_add_u32 s6, s8, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	s_addc_u32 s7, s9, s1
	s_ashr_i32 s3, s2, 31
	s_lshl_b32 s4, s2, 1
	s_lshl_b64 s[10:11], s[2:3], 2
	s_mov_b32 s3, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v0, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_cmp_le_i32_e64 s0, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v1, s[6:7]
	s_or_b32 s3, s0, s3
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v3, v7, v9 :: v_dual_sub_f32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v3, v3
	v_fmac_f32_e32 v3, v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v6, 0x4f800000, v3
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v3
	v_cndmask_b32_e32 v3, v3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v6, v3
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v7, -1, v6
	v_add_nc_u32_e32 v8, 1, v6
	v_fma_f32 v9, -v7, v6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v8, v6, v3
	v_cmp_ge_f32_e64 s1, 0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v6, v7, s1
	v_cmp_lt_f32_e64 s1, 0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, v6, v8, s1
	v_mul_f32_e32 v7, 0x37800000, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v6, v7, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x260
	v_dual_cndmask_b32 v3, v6, v3 :: v_dual_add_nc_u32 v2, s4, v2
	global_store_b32 v[4:5], v3, off
	v_add_co_u32 v4, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14Euler_distancePfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14Euler_distancePfS_ii, .Lfunc_end0-_Z14Euler_distancePfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10is_in_epsiPfPiifi   ; -- Begin function _Z10is_in_epsiPfPiifi
	.globl	_Z10is_in_epsiPfPiifi
	.p2align	8
	.type	_Z10is_in_epsiPfPiifi,@function
_Z10is_in_epsiPfPiifi:                  ; @_Z10is_in_epsiPfPiifi
; %bb.0:
	s_clause 0x2
	s_load_b64 s[8:9], s[0:1], 0x20
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s8, s15
	s_lshr_b32 s7, s2, 16
	s_add_i32 s3, s3, s14
	s_and_b32 s10, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s3, s7, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v2, s10, v[3:4]
	v_cmpx_gt_i32_e64 s6, v0
	s_cbranch_execz .LBB1_6
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_mul_i32 s7, s7, s10
	v_mov_b32_e32 v3, 0
	s_mul_i32 s7, s7, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_mul_i32 s8, s7, s9
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_lshl_b64 s[10:11], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s1, 0
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[1:2], off
	v_cmp_ne_u32_e64 s0, s4, v0
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, s0, vcc_lo
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB1_5
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v4, s7, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	s_and_b32 s9, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s9
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	global_atomic_add_u32 v3, v4, s[2:3]
.LBB1_5:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, s8, v0
	v_add_co_u32 v1, s0, v1, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s0, s11, v2, s0
	v_cmp_le_i32_e32 vcc_lo, s6, v0
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_2
.LBB1_6:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10is_in_epsiPfPiifi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10is_in_epsiPfPiifi, .Lfunc_end1-_Z10is_in_epsiPfPiifi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10is_in_epsiPfPiS0_ifi ; -- Begin function _Z10is_in_epsiPfPiS0_ifi
	.globl	_Z10is_in_epsiPfPiS0_ifi
	.p2align	8
	.type	_Z10is_in_epsiPfPiS0_ifi,@function
_Z10is_in_epsiPfPiS0_ifi:               ; @_Z10is_in_epsiPfPiS0_ifi
; %bb.0:
	s_clause 0x2
	s_load_b64 s[12:13], s[0:1], 0x28
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s12, s15
	s_lshr_b32 s7, s2, 16
	s_add_i32 s3, s3, s14
	s_and_b32 s14, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s3, s7, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v2, s14, v[3:4]
	v_cmpx_gt_i32_e64 s6, v0
	s_cbranch_execz .LBB2_7
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v1, 31, v0
	s_mul_i32 s0, s7, s14
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 1
	s_mul_i32 s0, s0, s12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_mul_i32 s12, s0, s13
	s_mov_b32 s7, 0
	s_ashr_i32 s13, s12, 31
	s_lshl_b64 s[14:15], s[12:13], 2
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v2, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, s4, v0
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e64 s0, s5, v3
	v_add_co_u32 v3, s1, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, s1, s3, v2, s1
	s_and_b32 s1, vcc_lo, s0
	global_store_b32 v[3:4], v5, off
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_6
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s13, exec_lo
	s_mov_b32 s1, exec_lo
	v_mbcnt_lo_u32_b32 v7, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s13
	global_atomic_add_u32 v5, v7, s[10:11]
.LBB2_5:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	global_store_b32 v[3:4], v6, off
.LBB2_6:                                ; %Flow
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, s12, v0
	v_add_co_u32 v1, s0, v1, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s0, s15, v2, s0
	v_cmp_le_i32_e32 vcc_lo, s6, v0
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_2
.LBB2_7:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10is_in_epsiPfPiS0_ifi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10is_in_epsiPfPiS0_ifi, .Lfunc_end2-_Z10is_in_epsiPfPiS0_ifi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 372
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z23copy_to_euler_neighbourPiPfS0_iS_ ; -- Begin function _Z23copy_to_euler_neighbourPiPfS0_iS_
	.globl	_Z23copy_to_euler_neighbourPiPfS0_iS_
	.p2align	8
	.type	_Z23copy_to_euler_neighbourPiPfS0_iS_,@function
_Z23copy_to_euler_neighbourPiPfS0_iS_:  ; @_Z23copy_to_euler_neighbourPiPfS0_iS_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[8:9], s[0:1], 0x28
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s12, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s8, s15
	s_lshr_b32 s10, s2, 16
	s_add_i32 s3, s3, s14
	s_and_b32 s11, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s3, s10, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v2, s11, v[3:4]
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB3_13
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x2
	s_load_b64 s[14:15], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x20
	v_ashrrev_i32_e32 v1, 31, v0
	s_mul_i32 s0, s10, s11
	v_mov_b32_e32 v5, 0
	s_mul_i32 s0, s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s8, s0, s9
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s13, s14, -4
	s_addc_u32 s14, s15, -1
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
	s_mov_b32 s9, 0
.LBB3_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s15, 0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr4
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB3_6
; %bb.3:                                ; %.critedge
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v3, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	s_mov_b32 s1, 0
	global_load_b64 v[3:4], v[3:4], off offset:-4
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v4, v3
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s15, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s15, exec_lo, s15
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	s_mov_b32 s1, exec_lo
	v_cvt_f32_i32_e32 v3, v0
	global_load_b32 v8, v[6:7], off
	v_ashrrev_i32_e32 v7, 31, v4
	v_mov_b32_e32 v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s13, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s14, v7, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v8, off
.LBB3_5:                                ; %Flow81
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s15, s1, exec_lo
.LBB3_6:                                ; %Flow
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_and_not1_saveexec_b32 s16, s0
	s_cbranch_execz .LBB3_10
; %bb.7:                                ;   in Loop: Header=BB3_2 Depth=1
	s_load_b32 s0, s[4:5], 0x0
	s_mov_b32 s1, s15
                                        ; implicit-def: $sgpr17
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s0, 0
	s_cbranch_scc0 .LBB3_9
; %bb.8:                                ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v3, v5, s[6:7]
	s_ashr_i32 s1, s0, 31
	s_mov_b32 s17, 0
	s_lshl_b64 s[18:19], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s18, s13, s18
	s_addc_u32 s19, s14, s19
	s_or_b32 s1, s15, exec_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v5, v3, s[18:19]
.LBB3_9:                                ; %Flow83
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v3, s17 :: v_dual_mov_b32 v4, s0
	s_and_not1_b32 s0, s15, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s0, s1
.LBB3_10:                               ; %Flow82
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	s_and_saveexec_b32 s0, s15
	s_cbranch_execz .LBB3_12
; %bb.11:                               ; %.sink.split
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_load_b32 s1, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, s1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s13, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s14, v7, vcc_lo
	global_store_b32 v[6:7], v3, off
.LBB3_12:                               ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, s8, v0
	v_add_co_u32 v1, s0, v1, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s0, s11, v2, s0
	v_cmp_le_i32_e32 vcc_lo, s12, v0
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB3_2
.LBB3_13:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23copy_to_euler_neighbourPiPfS0_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z23copy_to_euler_neighbourPiPfS0_iS_, .Lfunc_end3-_Z23copy_to_euler_neighbourPiPfS0_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17set_core_distancePfS_ifi ; -- Begin function _Z17set_core_distancePfS_ifi
	.globl	_Z17set_core_distancePfS_ifi
	.p2align	8
	.type	_Z17set_core_distancePfS_ifi,@function
_Z17set_core_distancePfS_ifi:           ; @_Z17set_core_distancePfS_ifi
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s15, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s2, s6
	s_cbranch_scc1 .LBB4_14
; %bb.1:
	s_mov_b32 s12, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_14
; %bb.2:                                ; %.preheader62
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s10, s15, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s8, s10, 1
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s13, s2, s8
	s_addc_u32 s14, s3, s9
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB4_7
; %bb.3:                                ; %.lr.ph.preheader
	s_ashr_i32 s11, s10, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[10:11], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s10, s0, s10
	s_addc_u32 s11, s1, s11
	s_mov_b32 s1, 0
.LBB4_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v0, s[10:11]
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, s5, v1
	v_cmp_eq_f32_e64 s0, 0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB4_6
; %bb.5:                                ;   in Loop: Header=BB4_4 Depth=1
	s_lshl_b32 s16, s12, 1
	v_cvt_f32_i32_e32 v1, s1
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[16:17], 2
	s_add_u32 s16, s13, s16
	s_addc_u32 s17, s14, s17
	s_add_i32 s12, s12, 1
	global_store_b32 v0, v1, s[16:17]
	global_load_b32 v1, v0, s[10:11]
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[16:17] offset:4
.LBB4_6:                                ;   in Loop: Header=BB4_4 Depth=1
	s_add_i32 s1, s1, 1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u32 s6, s1
	s_cbranch_scc0 .LBB4_4
.LBB4_7:                                ; %.preheader61
	s_cmp_lt_i32 s12, 1
	s_cbranch_scc1 .LBB4_14
; %bb.8:                                ; %.preheader.preheader
	s_add_u32 s0, s8, s2
	v_mov_b32_e32 v4, 0
	s_addc_u32 s1, s9, s3
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_mov_b32 s3, 0
	s_mov_b32 s8, 0
.LBB4_9:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_10 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s2, s8, 1
	s_mov_b64 s[4:5], s[0:1]
	s_lshl_b64 s[6:7], s[2:3], 2
	s_mov_b32 s2, s8
	s_add_u32 s6, s13, s6
	s_addc_u32 s7, s14, s7
.LBB4_10:                               ;   Parent Loop BB4_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_clause 0x1
	global_load_b32 v1, v4, s[6:7] offset:4
	global_load_b32 v3, v4, s[4:5]
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v1, v3
	s_cbranch_vccnz .LBB4_12
; %bb.11:                               ;   in Loop: Header=BB4_10 Depth=2
	s_clause 0x1
	global_load_b32 v2, v4, s[4:5] offset:-4
	global_load_b32 v0, v4, s[6:7]
	s_waitcnt vmcnt(1)
	global_store_b64 v4, v[2:3], s[6:7]
	s_waitcnt vmcnt(0)
	global_store_b64 v4, v[0:1], s[4:5] offset:-4
.LBB4_12:                               ;   in Loop: Header=BB4_10 Depth=2
	s_add_i32 s2, s2, 1
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	s_cmp_ge_i32 s2, s12
	s_cbranch_scc0 .LBB4_10
; %bb.13:                               ;   in Loop: Header=BB4_9 Depth=1
	s_add_i32 s8, s8, 1
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s8, s12
	s_cbranch_scc0 .LBB4_9
.LBB4_14:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17set_core_distancePfS_ifi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z17set_core_distancePfS_ifi, .Lfunc_end4-_Z17set_core_distancePfS_ifi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 20
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_ ; -- Begin function _Z17break_cycle_step1PiS_S_S_S_PfS_S0_
	.globl	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_
	.p2align	8
	.type	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_,@function
_Z17break_cycle_step1PiS_S_S_S_PfS_S0_: ; @_Z17break_cycle_step1PiS_S_S_S_PfS_S0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x40
	s_load_b32 s16, s[0:1], 0x4c
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s15
	s_lshr_b32 s3, s16, 16
	s_add_i32 s2, s2, s14
	s_and_b32 s16, s16, 0xffff
	v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_load_b512 s[0:15], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v2, s16, v[3:4]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	global_load_b32 v2, v2, s[4:5]
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB5_11
; %bb.1:                                ; %.preheader
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v9, v[1:2], off
	v_add_co_u32 v1, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v12, v[1:2], off
	global_load_b32 v5, v[3:4], off
	s_waitcnt vmcnt(2)
	v_ashrrev_i32_e32 v10, 31, v9
	v_add_co_u32 v1, vcc_lo, v9, -2
	v_mov_b32_e32 v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[9:10]
	v_add_co_ci_u32_e32 v2, vcc_lo, -1, v10, vcc_lo
	v_add_co_u32 v3, vcc_lo, s12, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s13, v4, vcc_lo
.LBB5_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[3:4], off
	v_add_co_u32 v1, vcc_lo, v1, 1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v3, s0, v3, 4
	v_add_nc_u32_e32 v11, 1, v11
	v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v6
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB5_2
; %bb.3:                                ; %.critedge.preheader
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v5, vcc_lo, v1, 1
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_nc_u32_e32 v9, v12, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $sgpr4
                                        ; implicit-def: $sgpr3
.LBB5_4:                                ; %.critedge
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v10, v11
	s_or_b32 s3, s3, exec_lo
	s_or_b32 s4, s4, exec_lo
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v10, v9
	s_cbranch_execz .LBB5_6
; %bb.5:                                ;   in Loop: Header=BB5_4 Depth=1
	global_load_b32 v11, v[3:4], off
	v_add_co_u32 v1, s0, v1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s0, 0, v2, s0
	s_and_not1_b32 s0, s4, exec_lo
	s_and_not1_b32 s3, s3, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v11, v[11:12], off
	global_load_b32 v12, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v11, v12
	v_add_nc_u32_e32 v11, 1, v10
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s0, s4
.LBB5_6:                                ; %Flow124
                                        ;   in Loop: Header=BB5_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s4
	s_or_b32 s2, s0, s2
	s_and_not1_b32 s0, s1, exec_lo
	s_and_b32 s1, s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB5_4
; %bb.7:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	v_lshlrev_b32_e32 v0, 1, v0
	s_xor_b32 s0, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s0, exec_lo, s1
	s_cbranch_execz .LBB5_9
; %bb.8:
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[1:2], off offset:4
	global_load_b32 v5, v[5:6], off
	v_ashrrev_i32_e32 v1, 31, v0
	v_cvt_f32_i32_e32 v6, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s14, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s15, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v5, v7, v5
	global_store_b64 v[1:2], v[5:6], off
.LBB5_9:                                ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_eq_u32_e32 vcc_lo, v10, v9
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_11
; %bb.10:
	v_add_co_u32 v1, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v4, vcc_lo
	v_mov_b32_e32 v3, -1.0
	global_load_b32 v2, v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v2, 0x80000000, v2
	global_store_b64 v[0:1], v[2:3], off
.LBB5_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17break_cycle_step1PiS_S_S_S_PfS_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z17break_cycle_step1PiS_S_S_S_PfS_S0_, .Lfunc_end5-_Z17break_cycle_step1PiS_S_S_S_PfS_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 860
; NumSgprs: 19
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17break_cycle_step2PiS_S_Pfi ; -- Begin function _Z17break_cycle_step2PiS_S_Pfi
	.globl	_Z17break_cycle_step2PiS_S_Pfi
	.p2align	8
	.type	_Z17break_cycle_step2PiS_S_Pfi,@function
_Z17break_cycle_step2PiS_S_Pfi:         ; @_Z17break_cycle_step2PiS_S_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s13, s[0:1], 0x20
	s_mov_b32 s12, -1
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[2:3], s[10:11]
	s_mov_b64 s[0:1], s[10:11]
.LBB6_1:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s14, s[0:1], 0x0
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_cmp_lt_i32 s12, s13
	s_cselect_b32 s15, -1, 0
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f32_e64 s14, s14, 0
	s_and_b32 s14, s15, s14
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_and_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB6_1
; %bb.2:
	s_cmp_lg_u32 s12, s13
	s_cselect_b32 s0, s12, -1
	s_cmp_lt_i32 s13, 1
	s_cbranch_scc1 .LBB6_12
; %bb.3:                                ; %.lr.ph.preheader
	s_mov_b32 s12, 0
	s_mov_b32 s1, 0
.LBB6_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s14, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f32_e64 s15, s14, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB6_7
; %bb.5:                                ;   in Loop: Header=BB6_4 Depth=1
	s_lshl_b32 s16, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s17, s16, 31
	s_lshl_b64 s[16:17], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_add_u32 s16, s10, s16
	s_addc_u32 s17, s11, s17
	s_load_b32 s15, s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f32_e64 s15, s15, s14
	s_and_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB6_7
; %bb.6:                                ;   in Loop: Header=BB6_4 Depth=1
	s_mov_b32 s0, s1
.LBB6_7:                                ;   in Loop: Header=BB6_4 Depth=1
	v_cmp_nlt_f32_e64 s15, s14, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB6_10
; %bb.8:                                ;   in Loop: Header=BB6_4 Depth=1
	s_lshl_b32 s16, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s17, s16, 31
	s_lshl_b64 s[16:17], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_add_u32 s16, s10, s16
	s_addc_u32 s17, s11, s17
	s_load_b32 s15, s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f32_e64 s14, s15, s14
	s_and_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB6_10
; %bb.9:                                ;   in Loop: Header=BB6_4 Depth=1
	s_mov_b32 s12, s1
.LBB6_10:                               ;   in Loop: Header=BB6_4 Depth=1
	s_add_i32 s1, s1, 1
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s13, s1
	s_cbranch_scc1 .LBB6_4
; %bb.11:                               ; %._crit_edge.loopexit
	s_ashr_i32 s13, s12, 31
	s_branch .LBB6_13
.LBB6_12:
	s_mov_b64 s[12:13], 0
.LBB6_13:                               ; %._crit_edge
	s_cmp_eq_u32 s0, -1
	s_mov_b32 s2, -1
	s_cbranch_scc1 .LBB6_15
; %bb.14:
	s_lshl_b32 s2, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s10, s2
	s_addc_u32 s3, s11, s3
	s_load_b32 s1, s[2:3], 0x4
	s_waitcnt lgkmcnt(0)
	v_cvt_i32_f32_e32 v0, s1
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b64 s[12:13], s[0:1]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_readfirstlane_b32 s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_readfirstlane_b32 s3, v1
	s_load_b32 s2, s[2:3], 0x0
.LBB6_15:
	s_lshl_b64 s[0:1], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17break_cycle_step2PiS_S_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z17break_cycle_step2PiS_S_Pfi, .Lfunc_end6-_Z17break_cycle_step2PiS_S_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 20
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14Euler_distancePfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14Euler_distancePfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10is_in_epsiPfPiifi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10is_in_epsiPfPiifi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10is_in_epsiPfPiS0_ifi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10is_in_epsiPfPiS0_ifi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23copy_to_euler_neighbourPiPfS0_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z23copy_to_euler_neighbourPiPfS0_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17set_core_distancePfS_ifi
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z17set_core_distancePfS_ifi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17break_cycle_step1PiS_S_S_S_PfS_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z17break_cycle_step1PiS_S_S_S_PfS_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17break_cycle_step2PiS_S_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z17break_cycle_step2PiS_S_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
