/*
============================================================================
Filename    : implementation.cu
Author      : Martino Milani / Sébastien Gachoud
SCIPER      : 286204 / 250083
============================================================================
*/

#include <iostream>
#include <iomanip>
#include <sys/time.h>
#include <cuda_runtime.h>
using namespace std;

// CPU Baseline
void array_process(double *input, double *output, int length, int iterations)
{
    double *temp;

    for(int n=0; n<(int) iterations; n++)
    {
        for(int i=1; i<length-1; i++)
        {
            for(int j=1; j<length-1; j++)
            {
                output[(i)*(length)+(j)] = (input[(i-1)*(length)+(j-1)] +
                                            input[(i-1)*(length)+(j)]   +
                                            input[(i-1)*(length)+(j+1)] +
                                            input[(i)*(length)+(j-1)]   +
                                            input[(i)*(length)+(j)]     +
                                            input[(i)*(length)+(j+1)]   +
                                            input[(i+1)*(length)+(j-1)] +
                                            input[(i+1)*(length)+(j)]   +
                                            input[(i+1)*(length)+(j+1)] ) / 9;

            }
        }
        output[(length/2-1)*length+(length/2-1)] = 1000;
        output[(length/2)*length+(length/2-1)]   = 1000;
        output[(length/2-1)*length+(length/2)]   = 1000;
        output[(length/2)*length+(length/2)]     = 1000;

        temp = input;
        input = output;
        output = temp;
    }
}

__global__
void gpu_computation(double* input, double* output, int length);

// GPU Optimized function
void GPU_array_process(double *input, double *output, int length, int iterations)
{
    //Cuda events for calculating elapsed time
    cudaEvent_t cpy_H2D_start, cpy_H2D_end, comp_start, comp_end, cpy_D2H_start, cpy_D2H_end;
    cudaEventCreate(&cpy_H2D_start);
    cudaEventCreate(&cpy_H2D_end);
    cudaEventCreate(&cpy_D2H_start);
    cudaEventCreate(&cpy_D2H_end);
    cudaEventCreate(&comp_start);
    cudaEventCreate(&comp_end);

    /* Preprocessing goes here */

    /*----- What I did -----*/
    const long SIZE = length * length * sizeof(double);
    double* gpu_input;
    double* gpu_output;
    dim3 threadsPerBlock(32,32);
    dim3 nbBlocks(length / threadsPerBlock.x + 1, length / threadsPerBlock.y + 1);
    const long PADDED_SIZE = (nbBlocks.x+1) * threadsPerBlock.x * (nbBlocks.y+1) * threadsPerBlock.y * sizeof(double); //+1 to avoid going out of the input
    cudaSetDevice(0);
    if(cudaMalloc((void**)&gpu_input, PADDED_SIZE) != cudaSuccess){
        cerr << "Error allocating input" << endl;
    }
    if(cudaMalloc((void**)&gpu_output, PADDED_SIZE) != cudaSuccess){
        cerr << "Error allocating output" << endl;
    }
    /*----------------------*/

    cudaEventRecord(cpy_H2D_start);
    /* Copying array from host to device goes here */

    /*----- What I did -----*/
    if(cudaMemcpy(gpu_input, input, SIZE, cudaMemcpyHostToDevice) != cudaSuccess){
        cerr << "Error copying input to gpu" << endl;
    }

    if(cudaMemcpy(gpu_output, output, SIZE, cudaMemcpyHostToDevice) != cudaSuccess){
        cerr << "Error copying output to gpu" << endl;
    }
    /*----------------------*/

    cudaEventRecord(cpy_H2D_end);
    cudaEventSynchronize(cpy_H2D_end);

    //Copy array from host to device
    cudaEventRecord(comp_start);
    /* GPU calculation goes here */

    /*----- What I did -----*/
    for(int iter(0); iter < iterations; iter++){
        if(iter%2){ 
            gpu_computation <<< nbBlocks, threadsPerBlock >>> (gpu_output, gpu_input, length);
        }
        else{
            gpu_computation <<< nbBlocks, threadsPerBlock >>> (gpu_input, gpu_output, length);
        }
        cudaThreadSynchronize();
    }
    /*----------------------*/

    cudaEventRecord(comp_end);
    cudaEventSynchronize(comp_end);

    cudaEventRecord(cpy_D2H_start);
    /* Copying array from device to host goes here */

    /*----- What I did -----*/
    if(iterations%2==0)
    {
        if(cudaMemcpy(output, gpu_input, SIZE, cudaMemcpyDeviceToHost) != cudaSuccess){
            cerr << "failed to retrieve gpu_input" << endl;
        }
    }
    else{
        if(cudaMemcpy(output, gpu_output, SIZE, cudaMemcpyDeviceToHost) != cudaSuccess){
            cerr << "failed to retrieve gpu_output" << endl;
        }
    }
    /*----------------------*/

    cudaEventRecord(cpy_D2H_end);
    cudaEventSynchronize(cpy_D2H_end);

    /* Postprocessing goes here */

    /*----- What I did -----*/
    cudaFree(&gpu_input);
    cudaFree(&gpu_output);
    /*----------------------*/

    float time;
    cudaEventElapsedTime(&time, cpy_H2D_start, cpy_H2D_end);
    cout<<"Host to Device MemCpy takes "<<setprecision(4)<<time/1000<<"s"<<endl;

    cudaEventElapsedTime(&time, comp_start, comp_end);
    cout<<"Computation takes "<<setprecision(4)<<time/1000<<"s"<<endl;

    cudaEventElapsedTime(&time, cpy_D2H_start, cpy_D2H_end);
    cout<<"Device to Host MemCpy takes "<<setprecision(4)<<time/1000<<"s"<<endl;
}

__global__
void gpu_computation(double* input, double* output, int length){
    int x_glob = (blockIdx.x * blockDim.x) + threadIdx.x + 1;   //+1 to avoid first column
    int y_glob = (blockIdx.y * blockDim.y) + threadIdx.y + 1;   //+1 to avoid first row
    int element_id = (y_glob * length) + x_glob;
    if ( ((x_glob == length/2-1) || (x_glob == length/2)) && ((y_glob == length/2-1) || (y_glob == length/2)) 
        || x_glob >= length - 1 || y_glob >= length-1)
    {
        return;
    }
    output[element_id] = (input[(y_glob-1)*(length)+(x_glob-1)] +
                                            input[(y_glob-1)*(length)+(x_glob)]   +
                                            input[(y_glob-1)*(length)+(x_glob+1)] +
                                            input[(y_glob)*(length)+(x_glob-1)]   +
                                            input[(y_glob)*(length)+(x_glob)]     +
                                            input[(y_glob)*(length)+(x_glob+1)]   +
                                            input[(y_glob+1)*(length)+(x_glob-1)] +
                                            input[(y_glob+1)*(length)+(x_glob)]   +
                                            input[(y_glob+1)*(length)+(x_glob+1)] ) / 9;
}
	.file	"tmpxft_00225fc6_00000000-6_implementation_single_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3919:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3919:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4589:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4589:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z13array_processPdS_ii
	.type	_Z13array_processPdS_ii, @function
_Z13array_processPdS_ii:
.LFB3915:
	.cfi_startproc
	endbr64
	movslq	%edx, %r10
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movsd	.LC0(%rip), %xmm2
	movl	%r10d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r10, %r8
	movsd	.LC1(%rip), %xmm1
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	cltd
	movl	%ecx, %r13d
	movl	$2, %ecx
	idivl	%ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r10d, %ecx
	leaq	0(,%r10,8), %rbp
	xorl	%r12d, %r12d
	leal	-1(%rax), %edx
	imull	%edx, %ecx
	leal	(%rcx,%rdx), %r9d
	addl	%eax, %ecx
	movslq	%r9d, %r9
	movslq	%ecx, %rcx
	leaq	0(,%r9,8), %rbx
	movl	%r10d, %r9d
	salq	$4, %r10
	imull	%eax, %r9d
	movq	%rbx, -24(%rsp)
	addl	%r9d, %edx
	movslq	%edx, %rdx
	leaq	0(,%rdx,8), %rbx
	leal	(%rax,%r9), %edx
	movq	%rbx, -16(%rsp)
	leaq	0(,%rcx,8), %rbx
	movslq	%edx, %rdx
	leal	-1(%r8), %eax
	movq	%rbx, -8(%rsp)
	salq	$3, %rdx
.L4:
	cmpl	%r13d, %r12d
	jge	.L3
	movq	%rdi, %rcx
	movq	%rbp, %rbx
	movl	$1, %r11d
.L8:
	cmpl	%r11d, %eax
	jle	.L12
	leaq	(%r10,%rcx), %r15
	incl	%r11d
	movq	%rbx, %r8
	movl	$1, %r14d
	movq	%r15, %r9
.L5:
	movsd	(%rcx), %xmm0
	addsd	8(%rcx), %xmm0
	incl	%r14d
	addq	$8, %rcx
	addsd	8(%rcx), %xmm0
	addsd	(%rdi,%r8), %xmm0
	addq	$8, %r9
	addsd	8(%rdi,%r8), %xmm0
	addsd	16(%rdi,%r8), %xmm0
	addsd	-8(%r9), %xmm0
	addsd	(%r9), %xmm0
	addsd	8(%r9), %xmm0
	divsd	%xmm2, %xmm0
	movsd	%xmm0, 8(%rsi,%r8)
	addq	$8, %r8
	cmpl	%eax, %r14d
	jl	.L5
	movq	%r15, %rcx
	addq	%rbp, %rbx
	subq	%rbp, %rcx
	jmp	.L8
.L12:
	movq	-24(%rsp), %rbx
	incl	%r12d
	movsd	%xmm1, (%rsi,%rbx)
	movq	-16(%rsp), %rbx
	movsd	%xmm1, (%rsi,%rbx)
	movq	-8(%rsp), %rbx
	movsd	%xmm1, (%rsi,%rbx)
	movsd	%xmm1, (%rsi,%rdx)
	xchgq	%rsi, %rdi
	jmp	.L4
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3915:
	.size	_Z13array_processPdS_ii, .-_Z13array_processPdS_ii
	.globl	_Z38__device_stub__Z15gpu_computationPdS_iPdS_i
	.type	_Z38__device_stub__Z15gpu_computationPdS_iPdS_i, @function
_Z38__device_stub__Z15gpu_computationPdS_iPdS_i:
.LFB3941:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15gpu_computationPdS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3941:
	.size	_Z38__device_stub__Z15gpu_computationPdS_iPdS_i, .-_Z38__device_stub__Z15gpu_computationPdS_iPdS_i
	.globl	_Z15gpu_computationPdS_i
	.type	_Z15gpu_computationPdS_i, @function
_Z15gpu_computationPdS_i:
.LFB3942:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15gpu_computationPdS_iPdS_i
	.cfi_endproc
.LFE3942:
	.size	_Z15gpu_computationPdS_i, .-_Z15gpu_computationPdS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Error allocating input"
.LC3:
	.string	"Error allocating output"
.LC4:
	.string	"Error copying input to gpu"
.LC5:
	.string	"Error copying output to gpu"
.LC6:
	.string	"failed to retrieve gpu_input"
.LC7:
	.string	"failed to retrieve gpu_output"
.LC8:
	.string	"Host to Device MemCpy takes "
.LC10:
	.string	"s"
.LC11:
	.string	"Computation takes "
.LC12:
	.string	"Device to Host MemCpy takes "
	.text
	.globl	_Z17GPU_array_processPdS_ii
	.type	_Z17GPU_array_processPdS_ii, @function
_Z17GPU_array_processPdS_ii:
.LFB3916:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%ebx, %eax
	xorl	%edi, %edi
	movl	$1, 120(%rsp)
	movl	$1, 132(%rsp)
	imull	%ebx, %eax
	cltq
	salq	$3, %rax
	movq	%rax, 8(%rsp)
	movl	%ebx, %eax
	shrl	$5, %eax
	leal	1(%rax), %r14d
	addl	$2, %eax
	imull	%eax, %eax
	sall	$10, %eax
	leaq	0(,%rax,8), %r15
	call	cudaSetDevice@PLT
	leaq	96(%rsp), %rax
	movq	%r15, %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L19
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L19:
	leaq	104(%rsp), %rax
	movq	%r15, %rsi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L20
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L20:
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L21
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L21:
	movq	8(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L22
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L22:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%r13d, %r13d
	movabsq	$137438953504, %r15
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L23:
	cmpl	%r12d, %r13d
	jge	.L52
	testl	$1, %r13d
	movl	%r14d, 124(%rsp)
	movl	120(%rsp), %ecx
	movq	%r15, %rdx
	movl	%r14d, 128(%rsp)
	movl	132(%rsp), %esi
	movl	$0, %r9d
	movl	$0, %r8d
	movq	%r15, 112(%rsp)
	movq	124(%rsp), %rdi
	je	.L24
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	96(%rsp), %rsi
	movq	104(%rsp), %rdi
	movl	%ebx, %edx
	jmp	.L50
.L24:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	%ebx, %edx
.L50:
	call	_Z38__device_stub__Z15gpu_computationPdS_iPdS_i
.L26:
	call	cudaThreadSynchronize@PLT
	incl	%r13d
	jmp	.L23
.L52:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	andl	$1, %r12d
	movq	8(%rsp), %rdx
	movl	$2, %ecx
	jne	.L29
	movq	96(%rsp), %rsi
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	testl	%eax, %eax
	je	.L31
	jmp	.L51
.L29:
	movq	104(%rsp), %rsi
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L31
	leaq	.LC7(%rip), %rsi
.L51:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L31:
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	leaq	44(%rsp), %r12
	leaq	_ZSt4cout(%rip), %rbp
	leaq	.LC10(%rip), %rbx
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	%r12, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	44(%rsp), %xmm0
	divss	.LC9(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$4, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	%r12, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	44(%rsp), %xmm0
	divss	.LC9(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$4, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	%r12, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	44(%rsp), %xmm0
	divss	.LC9(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$4, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3916:
	.size	_Z17GPU_array_processPdS_ii, .-_Z17GPU_array_processPdS_ii
	.section	.rodata.str1.1
.LC13:
	.string	"_Z15gpu_computationPdS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3944:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15gpu_computationPdS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3944:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1075970048
	.align 8
.LC1:
	.long	0
	.long	1083129856
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC9:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
============================================================================
Filename    : implementation.cu
Author      : Martino Milani / Sébastien Gachoud
SCIPER      : 286204 / 250083
============================================================================
*/

#include <iostream>
#include <iomanip>
#include <sys/time.h>
#include <hip/hip_runtime.h>
using namespace std;

// CPU Baseline
void array_process(double *input, double *output, int length, int iterations)
{
    double *temp;

    for(int n=0; n<(int) iterations; n++)
    {
        for(int i=1; i<length-1; i++)
        {
            for(int j=1; j<length-1; j++)
            {
                output[(i)*(length)+(j)] = (input[(i-1)*(length)+(j-1)] +
                                            input[(i-1)*(length)+(j)]   +
                                            input[(i-1)*(length)+(j+1)] +
                                            input[(i)*(length)+(j-1)]   +
                                            input[(i)*(length)+(j)]     +
                                            input[(i)*(length)+(j+1)]   +
                                            input[(i+1)*(length)+(j-1)] +
                                            input[(i+1)*(length)+(j)]   +
                                            input[(i+1)*(length)+(j+1)] ) / 9;

            }
        }
        output[(length/2-1)*length+(length/2-1)] = 1000;
        output[(length/2)*length+(length/2-1)]   = 1000;
        output[(length/2-1)*length+(length/2)]   = 1000;
        output[(length/2)*length+(length/2)]     = 1000;

        temp = input;
        input = output;
        output = temp;
    }
}

__global__
void gpu_computation(double* input, double* output, int length);

// GPU Optimized function
void GPU_array_process(double *input, double *output, int length, int iterations)
{
    //Cuda events for calculating elapsed time
    hipEvent_t cpy_H2D_start, cpy_H2D_end, comp_start, comp_end, cpy_D2H_start, cpy_D2H_end;
    hipEventCreate(&cpy_H2D_start);
    hipEventCreate(&cpy_H2D_end);
    hipEventCreate(&cpy_D2H_start);
    hipEventCreate(&cpy_D2H_end);
    hipEventCreate(&comp_start);
    hipEventCreate(&comp_end);

    /* Preprocessing goes here */

    /*----- What I did -----*/
    const long SIZE = length * length * sizeof(double);
    double* gpu_input;
    double* gpu_output;
    dim3 threadsPerBlock(32,32);
    dim3 nbBlocks(length / threadsPerBlock.x + 1, length / threadsPerBlock.y + 1);
    const long PADDED_SIZE = (nbBlocks.x+1) * threadsPerBlock.x * (nbBlocks.y+1) * threadsPerBlock.y * sizeof(double); //+1 to avoid going out of the input
    hipSetDevice(0);
    if(hipMalloc((void**)&gpu_input, PADDED_SIZE) != hipSuccess){
        cerr << "Error allocating input" << endl;
    }
    if(hipMalloc((void**)&gpu_output, PADDED_SIZE) != hipSuccess){
        cerr << "Error allocating output" << endl;
    }
    /*----------------------*/

    hipEventRecord(cpy_H2D_start);
    /* Copying array from host to device goes here */

    /*----- What I did -----*/
    if(hipMemcpy(gpu_input, input, SIZE, hipMemcpyHostToDevice) != hipSuccess){
        cerr << "Error copying input to gpu" << endl;
    }

    if(hipMemcpy(gpu_output, output, SIZE, hipMemcpyHostToDevice) != hipSuccess){
        cerr << "Error copying output to gpu" << endl;
    }
    /*----------------------*/

    hipEventRecord(cpy_H2D_end);
    hipEventSynchronize(cpy_H2D_end);

    //Copy array from host to device
    hipEventRecord(comp_start);
    /* GPU calculation goes here */

    /*----- What I did -----*/
    for(int iter(0); iter < iterations; iter++){
        if(iter%2){ 
            gpu_computation <<< nbBlocks, threadsPerBlock >>> (gpu_output, gpu_input, length);
        }
        else{
            gpu_computation <<< nbBlocks, threadsPerBlock >>> (gpu_input, gpu_output, length);
        }
        hipDeviceSynchronize();
    }
    /*----------------------*/

    hipEventRecord(comp_end);
    hipEventSynchronize(comp_end);

    hipEventRecord(cpy_D2H_start);
    /* Copying array from device to host goes here */

    /*----- What I did -----*/
    if(iterations%2==0)
    {
        if(hipMemcpy(output, gpu_input, SIZE, hipMemcpyDeviceToHost) != hipSuccess){
            cerr << "failed to retrieve gpu_input" << endl;
        }
    }
    else{
        if(hipMemcpy(output, gpu_output, SIZE, hipMemcpyDeviceToHost) != hipSuccess){
            cerr << "failed to retrieve gpu_output" << endl;
        }
    }
    /*----------------------*/

    hipEventRecord(cpy_D2H_end);
    hipEventSynchronize(cpy_D2H_end);

    /* Postprocessing goes here */

    /*----- What I did -----*/
    hipFree(&gpu_input);
    hipFree(&gpu_output);
    /*----------------------*/

    float time;
    hipEventElapsedTime(&time, cpy_H2D_start, cpy_H2D_end);
    cout<<"Host to Device MemCpy takes "<<setprecision(4)<<time/1000<<"s"<<endl;

    hipEventElapsedTime(&time, comp_start, comp_end);
    cout<<"Computation takes "<<setprecision(4)<<time/1000<<"s"<<endl;

    hipEventElapsedTime(&time, cpy_D2H_start, cpy_D2H_end);
    cout<<"Device to Host MemCpy takes "<<setprecision(4)<<time/1000<<"s"<<endl;
}

__global__
void gpu_computation(double* input, double* output, int length){
    int x_glob = (blockIdx.x * blockDim.x) + threadIdx.x + 1;   //+1 to avoid first column
    int y_glob = (blockIdx.y * blockDim.y) + threadIdx.y + 1;   //+1 to avoid first row
    int element_id = (y_glob * length) + x_glob;
    if ( ((x_glob == length/2-1) || (x_glob == length/2)) && ((y_glob == length/2-1) || (y_glob == length/2)) 
        || x_glob >= length - 1 || y_glob >= length-1)
    {
        return;
    }
    output[element_id] = (input[(y_glob-1)*(length)+(x_glob-1)] +
                                            input[(y_glob-1)*(length)+(x_glob)]   +
                                            input[(y_glob-1)*(length)+(x_glob+1)] +
                                            input[(y_glob)*(length)+(x_glob-1)]   +
                                            input[(y_glob)*(length)+(x_glob)]     +
                                            input[(y_glob)*(length)+(x_glob+1)]   +
                                            input[(y_glob+1)*(length)+(x_glob-1)] +
                                            input[(y_glob+1)*(length)+(x_glob)]   +
                                            input[(y_glob+1)*(length)+(x_glob+1)] ) / 9;
}
	.text
	.file	"implementation_single_kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13array_processPdS_ii
.LCPI0_0:
	.quad	0x4022000000000000              # double 9
	.text
	.globl	_Z13array_processPdS_ii
	.type	_Z13array_processPdS_ii,@function
_Z13array_processPdS_ii:                # @_Z13array_processPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $edx killed $edx def $rdx
	movq	%rdx, -48(%rsp)                 # 8-byte Spill
	movl	%ecx, -52(%rsp)                 # 4-byte Spill
	testl	%ecx, %ecx
	jle	.LBB0_8
# %bb.1:                                # %.preheader72.lr.ph
	movq	-48(%rsp), %r10                 # 8-byte Reload
	leal	-1(%r10), %eax
	movl	%r10d, %ecx
	shrl	$31, %ecx
	addl	%r10d, %ecx
	sarl	%ecx
	leal	-1(%rcx), %edx
	imull	%r10d, %edx
	leal	(%rdx,%rcx), %r8d
	decl	%r8d
	movslq	%r8d, %r8
	movq	%r8, -8(%rsp)                   # 8-byte Spill
	movl	%ecx, %r8d
	imull	%r10d, %r8d
	leal	(%r8,%rcx), %r9d
	decl	%r9d
	movslq	%r9d, %r9
	movq	%r9, -16(%rsp)                  # 8-byte Spill
	addl	%ecx, %edx
	movslq	%edx, %rdx
	addl	%ecx, %r8d
	movslq	%r8d, %r11
	movslq	%r10d, %rcx
	leaq	(,%rcx,8), %rbx
	leaq	8(,%rcx,8), %r8
	movq	%r8, -24(%rsp)                  # 8-byte Spill
	leaq	16(,%rcx,8), %r8
	movq	%r8, -32(%rsp)                  # 8-byte Spill
	shlq	$4, %rcx
	addq	$16, %rcx
	movq	%rcx, -40(%rsp)                 # 8-byte Spill
	leaq	-8(,%rax,8), %r13
	xorl	%ebp, %ebp
	movsd	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movabsq	$4652007308841189376, %r14      # imm = 0x408F400000000000
.LBB0_2:                                # %.preheader72
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
                                        #       Child Loop BB0_5 Depth 3
	movq	%rdi, %r15
	cmpl	$3, -48(%rsp)                   # 4-byte Folded Reload
	jl	.LBB0_7
# %bb.3:                                # %.preheader.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	-40(%rsp), %rcx                 # 8-byte Reload
	leaq	(%r15,%rcx), %rdi
	movq	-24(%rsp), %rcx                 # 8-byte Reload
	leaq	(%rsi,%rcx), %r12
	movq	-32(%rsp), %rcx                 # 8-byte Reload
	leaq	(%r15,%rcx), %r8
	leaq	16(%r15), %rcx
	movl	$1, %r9d
.LBB0_4:                                # %.preheader
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_5 Depth 3
	incq	%r9
	xorl	%r10d, %r10d
.LBB0_5:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	-16(%rcx,%r10), %xmm1           # xmm1 = mem[0],zero
	addsd	-8(%rcx,%r10), %xmm1
	addsd	(%rcx,%r10), %xmm1
	addsd	-16(%r8,%r10), %xmm1
	addsd	-8(%r8,%r10), %xmm1
	addsd	(%r8,%r10), %xmm1
	addsd	-16(%rdi,%r10), %xmm1
	addsd	-8(%rdi,%r10), %xmm1
	addsd	(%rdi,%r10), %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, (%r12,%r10)
	addq	$8, %r10
	cmpq	%r10, %r13
	jne	.LBB0_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB0_4 Depth=2
	addq	%rbx, %rdi
	addq	%rbx, %r12
	addq	%rbx, %r8
	addq	%rbx, %rcx
	cmpq	%rax, %r9
	jne	.LBB0_4
.LBB0_7:                                # %._crit_edge75
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	-8(%rsp), %rcx                  # 8-byte Reload
	movq	%r14, (%rsi,%rcx,8)
	movq	-16(%rsp), %rcx                 # 8-byte Reload
	movq	%r14, (%rsi,%rcx,8)
	movq	%r14, (%rsi,%rdx,8)
	movq	%r14, (%rsi,%r11,8)
	incl	%ebp
	movq	%rsi, %rdi
	movq	%r15, %rsi
	cmpl	-52(%rsp), %ebp                 # 4-byte Folded Reload
	jne	.LBB0_2
.LBB0_8:                                # %._crit_edge79
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z13array_processPdS_ii, .Lfunc_end0-_Z13array_processPdS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z17GPU_array_processPdS_ii
.LCPI1_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	_Z17GPU_array_processPdS_ii
	.type	_Z17GPU_array_processPdS_ii,@function
_Z17GPU_array_processPdS_ii:            # @_Z17GPU_array_processPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %r12
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	movl	%r15d, %r14d
	imull	%r14d, %r14d
	movl	%r15d, %eax
	andl	$134217696, %eax                # imm = 0x7FFFFE0
	addl	$64, %eax
	movl	%r15d, %r13d
	andl	$-32, %r13d
	addl	$64, %r13d
	imull	%eax, %r13d
	shlq	$3, %r13
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_2
# %bb.1:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_2:
	shlq	$3, %r14
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_4:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_6:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_8:
	movq	48(%rsp), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	48(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%ebp, %ebp
	jle	.LBB1_17
# %bb.9:                                # %.lr.ph.preheader
	movl	%r15d, %eax
	shrl	$5, %eax
	leaq	1(%rax), %rcx
	shlq	$32, %rcx
	leaq	(%rax,%rcx), %r12
	incq	%r12
	movabsq	$137438953504, %r13             # imm = 0x2000000020
.LBB1_10:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testb	$1, %bl
	jne	.LBB1_11
# %bb.13:                               #   in Loop: Header=BB1_10 Depth=1
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.14:                               #   in Loop: Header=BB1_10 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	jmp	.LBB1_15
.LBB1_11:                               #   in Loop: Header=BB1_10 Depth=1
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.12:                               #   in Loop: Header=BB1_10 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
.LBB1_15:                               #   in Loop: Header=BB1_10 Depth=1
	movl	%r15d, %edx
	callq	_Z30__device_stub__gpu_computationPdS_i
.LBB1_16:                               #   in Loop: Header=BB1_10 Depth=1
	callq	hipDeviceSynchronize
	incl	%ebx
	cmpl	%ebx, %ebp
	jne	.LBB1_10
.LBB1_17:                               # %._crit_edge
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testb	$1, %bpl
	jne	.LBB1_20
# %bb.18:
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_23
# %bb.19:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$28, %edx
	jmp	.LBB1_22
.LBB1_20:
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_23
# %bb.21:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$29, %edx
.LBB1_22:                               # %.sink.split
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_23:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	16(%rsp), %rdi
	callq	hipFree
	leaq	8(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rsi
	movq	48(%rsp), %rdx
	leaq	84(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movl	$4, %r15d
	movq	%r15, _ZSt4cout+8(%rax)
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI1_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.7, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	%r15, _ZSt4cout+8(%rax)
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI1_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.7, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	56(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	%r15, _ZSt4cout+8(%rax)
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI1_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z17GPU_array_processPdS_ii, .Lfunc_end1-_Z17GPU_array_processPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gpu_computationPdS_i # -- Begin function _Z30__device_stub__gpu_computationPdS_i
	.type	_Z30__device_stub__gpu_computationPdS_i,@function
_Z30__device_stub__gpu_computationPdS_i: # @_Z30__device_stub__gpu_computationPdS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gpu_computationPdS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__gpu_computationPdS_i, .Lfunc_end2-_Z30__device_stub__gpu_computationPdS_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gpu_computationPdS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error allocating input"
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error allocating output"
	.size	.L.str.1, 24

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error copying input to gpu"
	.size	.L.str.2, 27

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error copying output to gpu"
	.size	.L.str.3, 28

	.type	_Z15gpu_computationPdS_i,@object # @_Z15gpu_computationPdS_i
	.section	.rodata,"a",@progbits
	.globl	_Z15gpu_computationPdS_i
	.p2align	3, 0x0
_Z15gpu_computationPdS_i:
	.quad	_Z30__device_stub__gpu_computationPdS_i
	.size	_Z15gpu_computationPdS_i, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"failed to retrieve gpu_input"
	.size	.L.str.4, 29

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"failed to retrieve gpu_output"
	.size	.L.str.5, 30

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Host to Device MemCpy takes "
	.size	.L.str.6, 29

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"s"
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Computation takes "
	.size	.L.str.8, 19

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Device to Host MemCpy takes "
	.size	.L.str.9, 29

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15gpu_computationPdS_i"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__gpu_computationPdS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _Z15gpu_computationPdS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15gpu_computationPdS_i ; -- Begin function _Z15gpu_computationPdS_i
	.globl	_Z15gpu_computationPdS_i
	.p2align	8
	.type	_Z15gpu_computationPdS_i,@function
_Z15gpu_computationPdS_i:               ; @_Z15gpu_computationPdS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	v_bfe_u32 v4, v0, 10, 10
	s_lshr_b32 s3, s4, 31
	s_add_i32 s3, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_ashr_i32 s3, s3, 1
	v_add_nc_u32_e32 v0, 1, v1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
	s_add_i32 s7, s3, -1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s7, v0
	v_cmp_eq_u32_e64 s2, s3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v2
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, s2, -1
	s_and_saveexec_b32 s6, s2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, s7, v3
	v_cmp_ne_u32_e64 s2, s3, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s5, s3, s2
; %bb.2:                                ; %Flow70
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB0_5
; %bb.3:
	v_max_i32_e32 v4, v0, v3
	s_add_i32 s2, s4, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_mul_lo_u32 v16, v2, s4
	s_load_b128 s[0:3], s[0:1], 0x0
	v_add_nc_u32_e32 v18, 2, v1
	v_mul_lo_u32 v14, v3, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v4, v16, v1
	v_add_nc_u32_e32 v6, v16, v0
	v_add_nc_u32_e32 v8, v16, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v2, v14, v1
	v_add_nc_u32_e32 v10, v14, v0
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v9, 31, v8
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	v_add_nc_u32_e32 v14, v14, v18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v8
	s_clause 0x1
	global_load_b64 v[4:5], v[4:5], off
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v12, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v11, vcc_lo
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshl_add_u32 v19, s4, 1, v16
	s_clause 0x1
	global_load_b64 v[12:13], v[12:13], off
	global_load_b64 v[2:3], v[2:3], off
	v_lshlrev_b64 v[14:15], 3, v[14:15]
	v_add_nc_u32_e32 v16, v19, v1
	v_add_nc_u32_e32 v0, v19, v0
	v_add_nc_u32_e32 v18, v19, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s1, v15, vcc_lo
	v_ashrrev_i32_e32 v17, 31, v16
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v19, 31, v18
	global_load_b64 v[14:15], v[14:15], off
	v_lshlrev_b64 v[16:17], 3, v[16:17]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v16, vcc_lo, s0, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s1, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	v_add_co_u32 v18, vcc_lo, s0, v18
	global_load_b64 v[0:1], v[0:1], off
	v_add_co_ci_u32_e32 v19, vcc_lo, s1, v19, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
	s_waitcnt vmcnt(7)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], v[8:9]
	s_waitcnt vmcnt(4)
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[12:13]
	s_waitcnt vmcnt(3)
	v_add_f64 v[2:3], v[2:3], v[14:15]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[16:17]
	s_waitcnt vmcnt(1)
	v_add_f64 v[0:1], v[2:3], v[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[18:19]
	v_div_scale_f64 v[2:3], null, 0x40220000, 0x40220000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_div_scale_f64 v[6:7], vcc_lo, v[0:1], 0x40220000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[6:7], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
	v_div_fixup_f64 v[0:1], v[2:3], 0x40220000, v[0:1]
	v_add_co_u32 v2, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gpu_computationPdS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15gpu_computationPdS_i, .Lfunc_end0-_Z15gpu_computationPdS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 856
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15gpu_computationPdS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15gpu_computationPdS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
