/*
 * vim: ts=8:sw=8:tw=79:noet
 *
 * Copyright (c) 2013, Colin Patrick McCabe
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 * 
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <cuda.h>
#include <cuda_runtime.h>
#include <stdio.h>

#define ARR_SIZE 5

#define EXPECT_CUDASUCCESS(x) \
	do { \
		cudaError_t err = x; \
		if (x != cudaSuccess) { \
			fprintf(stderr, "error %d (%s) on line %d of %s\n", \
				err, cudaGetErrorString(err), \
				__LINE__, __FILE__); \
			exit(1); \
		} \
	} while (0);

static int *gd_a, *gd_b, *gd_c;

__global__ void add(int *a, int *b, int *c)
{
	int tid = blockIdx.x;
	if (tid < ARR_SIZE) {
		c[tid] = a[tid]  + b[tid];
	}
}

static void print_vector(const int * const a, size_t len)
{
	size_t i;
	const char *prefix = "";

	for (i = 0; i < len; i++) {
		printf("%s%d", prefix, a[i]);
		prefix = ", ";
	}
}

int main(void)
{
	int i, a[ARR_SIZE], b[ARR_SIZE], c[ARR_SIZE];
	for (i = 0; i < ARR_SIZE; i++) {
		a[i] = i;
	}
	for (i = 0; i < ARR_SIZE; i++) {
		b[i] = 1;
	}
	EXPECT_CUDASUCCESS(cudaMalloc((void**)&gd_a,
			sizeof(int) * ARR_SIZE));
	EXPECT_CUDASUCCESS(cudaMemcpy(gd_a, &a,
			sizeof(int) * ARR_SIZE, cudaMemcpyHostToDevice));
	EXPECT_CUDASUCCESS(cudaMalloc((void**)&gd_b,
			sizeof(int) * ARR_SIZE));
	EXPECT_CUDASUCCESS(cudaMemcpy(gd_b, &b,
			sizeof(int) * ARR_SIZE, cudaMemcpyHostToDevice));
	EXPECT_CUDASUCCESS(cudaMalloc((void**)&gd_c,
			sizeof(int) * ARR_SIZE));
	add<<<ARR_SIZE, 1>>>(gd_a, gd_b, gd_c);
	EXPECT_CUDASUCCESS(cudaMemcpy(c, gd_c,
			sizeof(int) * ARR_SIZE, cudaMemcpyDeviceToHost));
	printf("initial vector a: ");
	print_vector(a, ARR_SIZE);
	printf("\ninitial vector b: ");
	print_vector(b, ARR_SIZE);
	printf("\nfinal vector c: ");
	print_vector(c, ARR_SIZE);
	printf("\n");

	cudaFree(gd_a);
	cudaFree(gd_b);
	cudaFree(gd_c);
	return EXIT_SUCCESS;
}

	.file	"tmpxft_0026e0f7_00000000-6_vector_test.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	""
.LC1:
	.string	"%s%d"
.LC2:
	.string	", "
	.text
	.type	_ZL12print_vectorPKim.constprop.0, @function
_ZL12print_vectorPKim.constprop.0:
.LFB2172:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC0(%rip), %rdx
	leaq	.LC1(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	movl	0(%rbp,%rbx,4), %ecx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	leaq	.LC2(%rip), %rdx
	cmpq	$5, %rbx
	jne	.L3
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2172:
	.size	_ZL12print_vectorPKim.constprop.0, .-_ZL12print_vectorPKim.constprop.0
	.globl	_Z26__device_stub__Z3addPiS_S_PiS_S_
	.type	_Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L7:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
	.globl	_Z3addPiS_S_
	.type	_Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3addPiS_S_PiS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z3addPiS_S_, .-_Z3addPiS_S_
	.section	.rodata.str1.1
.LC3:
	.string	"error %d (%s) on line %d of %s\n"
.LC4:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/cmccabe/cudatest1/master/vector_test.cu"
.LC5:
	.string	"initial vector a: "
.LC6:
	.string	"\ninitial vector b: "
.LC7:
	.string	"\nfinal vector c: "
.LC8:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$20, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movabsq	$4294967297, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	leaq	_ZL4gd_a(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rbp, %rdi
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	movabsq	$4294967296, %rax
	movl	$4, 44(%rsp)
	movq	%r13, 48(%rsp)
	movq	%r13, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 28(%rsp)
	movabsq	$12884901890, %rax
	movq	%rax, 36(%rsp)
	call	cudaMalloc@PLT
	movl	$20, %esi
	movq	%rbp, %rdi
	movl	%eax, %ebx
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L13
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movq	%rax, %r8
	leaq	.LC4(%rip), %rax
	pushq	%r9
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	movl	$77, %r9d
	pushq	%rax
	.cfi_def_cfa_offset 160
	jmp	.L22
.L13:
	.cfi_restore_state
	leaq	28(%rsp), %r12
	movl	$1, %ecx
	movl	$20, %edx
	movq	_ZL4gd_a(%rip), %rdi
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	_ZL4gd_a(%rip), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$20, %edx
	movl	%eax, %ebx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L14
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	$79, %r9d
	movq	%rax, %r8
	leaq	.LC4(%rip), %rax
	pushq	%rdi
	.cfi_def_cfa_offset 152
	pushq	%rax
	.cfi_def_cfa_offset 160
.L22:
	movq	stderr(%rip), %rdi
	movl	%ebx, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rdx
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L14:
	.cfi_def_cfa_offset 144
	leaq	_ZL4gd_b(%rip), %rbp
	movl	$20, %esi
	movq	%rbp, %rdi
	call	cudaMalloc@PLT
	movl	$20, %esi
	movq	%rbp, %rdi
	movl	%eax, %ebx
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L15
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	$81, %r9d
	movq	%rax, %r8
	leaq	.LC4(%rip), %rax
	pushq	%rsi
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	%rax
	.cfi_def_cfa_offset 160
	jmp	.L22
.L15:
	.cfi_restore_state
	leaq	48(%rsp), %rbp
	movl	$1, %ecx
	movl	$20, %edx
	movq	_ZL4gd_b(%rip), %rdi
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movq	_ZL4gd_b(%rip), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$20, %edx
	movl	%eax, %ebx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L16
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	$83, %r9d
	movq	%rax, %r8
	leaq	.LC4(%rip), %rax
	pushq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	%rax
	.cfi_def_cfa_offset 160
	jmp	.L22
.L16:
	.cfi_restore_state
	leaq	_ZL4gd_c(%rip), %r14
	movl	$20, %esi
	movq	%r14, %rdi
	call	cudaMalloc@PLT
	movl	$20, %esi
	movq	%r14, %rdi
	movl	%eax, %ebx
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L17
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	$85, %r9d
	movq	%rax, %r8
	leaq	.LC4(%rip), %rax
	pushq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	%rax
	.cfi_def_cfa_offset 160
	jmp	.L22
.L17:
	.cfi_restore_state
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movl	$1, %ecx
	movabsq	$4294967301, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	_ZL4gd_c(%rip), %rdx
	movq	_ZL4gd_b(%rip), %rsi
	movq	_ZL4gd_a(%rip), %rdi
	call	_Z26__device_stub__Z3addPiS_S_PiS_S_
.L18:
	leaq	68(%rsp), %r13
	movl	$2, %ecx
	movl	$20, %edx
	movq	_ZL4gd_c(%rip), %rsi
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	_ZL4gd_c(%rip), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$20, %edx
	movl	%eax, %ebx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L19
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	$88, %r9d
	movq	%rax, %r8
	pushq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	leaq	.LC4(%rip), %rax
	pushq	%rax
	.cfi_def_cfa_offset 160
	jmp	.L22
.L19:
	.cfi_restore_state
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	_ZL12print_vectorPKim.constprop.0
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	_ZL12print_vectorPKim.constprop.0
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	_ZL12print_vectorPKim.constprop.0
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	_ZL4gd_a(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL4gd_b(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL4gd_c(%rip), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$96, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z3addPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL4gd_c
	.comm	_ZL4gd_c,8,8
	.local	_ZL4gd_b
	.comm	_ZL4gd_b,8,8
	.local	_ZL4gd_a
	.comm	_ZL4gd_a,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * vim: ts=8:sw=8:tw=79:noet
 *
 * Copyright (c) 2013, Colin Patrick McCabe
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 * 
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <hip/hip_runtime.h>

#include <stdio.h>

#define ARR_SIZE 5

#define EXPECT_CUDASUCCESS(x) \
	do { \
		hipError_t err = x; \
		if (x != hipSuccess) { \
			fprintf(stderr, "error %d (%s) on line %d of %s\n", \
				err, hipGetErrorString(err), \
				__LINE__, __FILE__); \
			exit(1); \
		} \
	} while (0);

static int *gd_a, *gd_b, *gd_c;

__global__ void add(int *a, int *b, int *c)
{
	int tid = blockIdx.x;
	if (tid < ARR_SIZE) {
		c[tid] = a[tid]  + b[tid];
	}
}

static void print_vector(const int * const a, size_t len)
{
	size_t i;
	const char *prefix = "";

	for (i = 0; i < len; i++) {
		printf("%s%d", prefix, a[i]);
		prefix = ", ";
	}
}

int main(void)
{
	int i, a[ARR_SIZE], b[ARR_SIZE], c[ARR_SIZE];
	for (i = 0; i < ARR_SIZE; i++) {
		a[i] = i;
	}
	for (i = 0; i < ARR_SIZE; i++) {
		b[i] = 1;
	}
	EXPECT_CUDASUCCESS(hipMalloc((void**)&gd_a,
			sizeof(int) * ARR_SIZE));
	EXPECT_CUDASUCCESS(hipMemcpy(gd_a, &a,
			sizeof(int) * ARR_SIZE, hipMemcpyHostToDevice));
	EXPECT_CUDASUCCESS(hipMalloc((void**)&gd_b,
			sizeof(int) * ARR_SIZE));
	EXPECT_CUDASUCCESS(hipMemcpy(gd_b, &b,
			sizeof(int) * ARR_SIZE, hipMemcpyHostToDevice));
	EXPECT_CUDASUCCESS(hipMalloc((void**)&gd_c,
			sizeof(int) * ARR_SIZE));
	add<<<ARR_SIZE, 1>>>(gd_a, gd_b, gd_c);
	EXPECT_CUDASUCCESS(hipMemcpy(c, gd_c,
			sizeof(int) * ARR_SIZE, hipMemcpyDeviceToHost));
	printf("initial vector a: ");
	print_vector(a, ARR_SIZE);
	printf("\ninitial vector b: ");
	print_vector(b, ARR_SIZE);
	printf("\nfinal vector c: ");
	print_vector(c, ARR_SIZE);
	printf("\n");

	hipFree(gd_a);
	hipFree(gd_b);
	hipFree(gd_c);
	return EXIT_SUCCESS;
}

	.text
	.file	"vector_test.hip"
	.globl	_Z18__device_stub__addPiS_S_    # -- Begin function _Z18__device_stub__addPiS_S_
	.type	_Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_:           # @_Z18__device_stub__addPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPiS_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, 32(%rsp,%rax,4)
	incq	%rax
	cmpq	$5, %rax
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%rsp,%rax,4)
	incq	%rax
	cmpq	$5, %rax
	jne	.LBB1_3
# %bb.4:
	movl	$_ZL4gd_a, %edi
	movl	$20, %esi
	callq	hipMalloc
	movl	%eax, %ebx
	movl	$_ZL4gd_a, %edi
	movl	$20, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.7:
	movq	_ZL4gd_a(%rip), %rdi
	leaq	32(%rsp), %r14
	movl	$20, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %ebx
	movq	_ZL4gd_a(%rip), %rdi
	movl	$20, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:
	movl	$_ZL4gd_b, %edi
	movl	$20, %esi
	callq	hipMalloc
	movl	%eax, %ebx
	movl	$_ZL4gd_b, %edi
	movl	$20, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:
	movq	_ZL4gd_b(%rip), %rdi
	movq	%rsp, %r14
	movl	$20, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %ebx
	movq	_ZL4gd_b(%rip), %rdi
	movl	$20, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:
	movl	$_ZL4gd_c, %edi
	movl	$20, %esi
	callq	hipMalloc
	movl	%eax, %ebx
	movl	$_ZL4gd_c, %edi
	movl	$20, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	leaq	4(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:
	movq	_ZL4gd_a(%rip), %rdi
	movq	_ZL4gd_b(%rip), %rsi
	movq	_ZL4gd_c(%rip), %rdx
	callq	_Z18__device_stub__addPiS_S_
.LBB1_17:
	movq	_ZL4gd_c(%rip), %rsi
	leaq	64(%rsp), %r14
	movl	$20, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %ebx
	movq	_ZL4gd_c(%rip), %rsi
	movl	$20, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.19:
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %esi
	xorl	%ebx, %ebx
.LBB1_20:                               # =>This Inner Loop Header: Depth=1
	movl	32(%rsp,%rbx,4), %edx
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	movl	$.L.str.8, %esi
	cmpq	$5, %rbx
	jne	.LBB1_20
# %bb.21:                               # %_ZL12print_vectorPKim.exit
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %esi
	xorl	%ebx, %ebx
.LBB1_22:                               # =>This Inner Loop Header: Depth=1
	movl	(%rsp,%rbx,4), %edx
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	movl	$.L.str.8, %esi
	cmpq	$5, %rbx
	jne	.LBB1_22
# %bb.23:                               # %_ZL12print_vectorPKim.exit30
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %esi
	xorl	%ebx, %ebx
.LBB1_24:                               # =>This Inner Loop Header: Depth=1
	movl	64(%rsp,%rbx,4), %edx
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	movl	$.L.str.8, %esi
	cmpq	$5, %rbx
	jne	.LBB1_24
# %bb.25:                               # %_ZL12print_vectorPKim.exit34
	movl	$10, %edi
	callq	putchar@PLT
	movq	_ZL4gd_a(%rip), %rdi
	callq	hipFree
	movq	_ZL4gd_b(%rip), %rdi
	callq	hipFree
	movq	_ZL4gd_c(%rip), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB1_5:
	.cfi_def_cfa_offset 112
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r9d
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%rax, %rcx
	movl	$78, %r8d
	jmp	.LBB1_6
.LBB1_8:
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r9d
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%rax, %rcx
	movl	$80, %r8d
	jmp	.LBB1_6
.LBB1_10:
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r9d
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%rax, %rcx
	movl	$82, %r8d
	jmp	.LBB1_6
.LBB1_12:
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r9d
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%rax, %rcx
	movl	$84, %r8d
	jmp	.LBB1_6
.LBB1_14:
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r9d
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%rax, %rcx
	movl	$86, %r8d
	jmp	.LBB1_6
.LBB1_18:
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r9d
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%rax, %rcx
	movl	$89, %r8d
.LBB1_6:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addPiS_S_,@object            # @_Z3addPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_
	.p2align	3, 0x0
_Z3addPiS_S_:
	.quad	_Z18__device_stub__addPiS_S_
	.size	_Z3addPiS_S_, 8

	.type	_ZL4gd_a,@object                # @_ZL4gd_a
	.local	_ZL4gd_a
	.comm	_ZL4gd_a,8,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"error %d (%s) on line %d of %s\n"
	.size	.L.str, 32

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/cmccabe/cudatest1/master/vector_test.hip"
	.size	.L.str.1, 103

	.type	_ZL4gd_b,@object                # @_ZL4gd_b
	.local	_ZL4gd_b
	.comm	_ZL4gd_b,8,8
	.type	_ZL4gd_c,@object                # @_ZL4gd_c
	.local	_ZL4gd_c
	.comm	_ZL4gd_c,8,8
	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"initial vector a: "
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\ninitial vector b: "
	.size	.L.str.3, 20

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nfinal vector c: "
	.size	.L.str.4, 18

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.zero	1
	.size	.L.str.6, 1

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%s%d"
	.size	.L.str.7, 5

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	", "
	.size	.L.str.8, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_"
	.size	.L__unnamed_1, 13

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addPiS_S_
	.addrsig_sym _ZL4gd_a
	.addrsig_sym _ZL4gd_b
	.addrsig_sym _ZL4gd_c
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_            ; -- Begin function _Z3addPiS_S_
	.globl	_Z3addPiS_S_
	.p2align	8
	.type	_Z3addPiS_S_,@function
_Z3addPiS_S_:                           ; @_Z3addPiS_S_
; %bb.0:
	s_cmp_gt_i32 s15, 4
	s_cbranch_scc1 .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_ashr_i32 s3, s15, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s8, s0
	s_addc_u32 s3, s9, s1
	s_add_u32 s6, s6, s0
	s_addc_u32 s7, s7, s1
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_load_b32 s0, s[0:1], 0x0
	s_load_b32 s1, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	global_store_b32 v0, v1, s[2:3]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_, .Lfunc_end0-_Z3addPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 128
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
