/* This program sorts an input array by bucket sort.
 * Each bucket in turn is sorted using Parallel Bubble sort.
 * The array consists of float numbers, all less than 1. To find the destination bucket,
 * the float number is multiplied by 10 to get the first digit, which determines the bucket number.
 * For eg., 0.1234 -> (int)(0.1234*10) = 1. Thus the bucket number for 0.1234 is 1.
 * Thus the total number of buckets will be 10. (0-9)
 * Implemented in CUDA. 
 *
 *
 * 
 * code by Anand Goyal. Dated: 12/13/2014
*/

#include<stdio.h>
#include<cuda.h>
#include<time.h>
#include<sys/time.h>

#define range 10
#define SIZE 5000
#define bucketLength (SIZE/range * 2)

__global__ void bucketSortKernel(float *inData, long size, float *outData)
{
	__shared__ float localBucket[bucketLength];
	__shared__ int localCount; /* Counter to track index with a bucket */

	int tid = threadIdx.x; int blockId = blockIdx.x;
	int offset = blockDim.x;
	int bucket, index, phase;
	float temp;
	
	if(tid == 0)
		localCount = 0;

	__syncthreads();

	/* Block traverses through the array and buckets the element accordingly */
	while(tid < size) {
		bucket = inData[tid] * 10;
		if(bucket == blockId) {
			index = atomicAdd(&localCount, 1);
			localBucket[index] = inData[tid]; 
		}
		tid += offset;		
	}

	__syncthreads();
	
	tid = threadIdx.x;
	//Sorting the bucket using Parallel Bubble Sort
	for(phase = 0; phase < bucketLength; phase ++) {
		if(phase % 2 == 0) {
			while((tid < bucketLength) && (tid % 2 == 0)) {
				if(localBucket[tid] > localBucket[tid +1]) {
					temp = localBucket[tid];
					localBucket[tid] = localBucket[tid + 1];
					localBucket[tid + 1] = temp;
				}
				tid += offset;
			}
		}
		else {
			while((tid < bucketLength - 1) && (tid %2 != 0)) {
				if(localBucket[tid] > localBucket[tid + 1]) {
					temp = localBucket[tid];
					localBucket[tid] = localBucket[tid + 1];
					localBucket[tid + 1] = temp;
				}
				tid += offset;
			}
		}
	}
	
	tid = threadIdx.x;
	while(tid < bucketLength) {
		outData[(blockIdx.x * bucketLength) + tid] = localBucket[tid];
		tid += offset;
	}
}

int main()
{
	float *input, *output;
	float *d_input, *d_output;
	int i;
	float elapsedTime;
	cudaEvent_t start, stop;
	
	cudaEventCreate(&start, 0);
	cudaEventCreate(&stop, 0);

	/* Each block sorts one bucket */
	const int numOfThreads = 4;
	const int numOfBlocks = range;

	input = (float *)malloc(sizeof(float) * SIZE);
	output = (float *)malloc(sizeof(float) * bucketLength * range);
	cudaMalloc((void**)&d_input, sizeof(float) * SIZE);
	cudaMalloc((void **)&d_output, sizeof(float) * bucketLength * range);
	cudaMemset(d_output, 0, sizeof(float) * bucketLength * range);

	/* Generating the input array to be sorted */
	srand(time(NULL));
	for(i = 0; i < SIZE; i++)
		input[i] = (float)(rand()%10000 + 1)/(float)10000;

	// Printing the input array
/*	for(i = 0; i < SIZE; i++)
		printf("%0.4f\n", input[i]);

	printf("***********************\n");
*/
	cudaEventRecord(start, 0);

	cudaMemcpy(d_input, input, sizeof(float) * SIZE, cudaMemcpyHostToDevice);
	bucketSortKernel<<<numOfBlocks, numOfThreads>>>(d_input, SIZE, d_output);
	cudaMemcpy(output, d_output, sizeof(float) * bucketLength * range, cudaMemcpyDeviceToHost);
	
	cudaEventRecord(stop, 0);
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&elapsedTime, start, stop);

/*	//Printing the sorted array
	for(i = 0; i < range; i++) {
		for(j = 0; j < bucketLength; j++)
			if(output[i*bucketLength + j] != 0)
				printf("%0.4f ", output[i*bucketLength + j]);
	}

	printf("\n");
*/	printf("Time :  %3.1f ms \n", elapsedTime);

	cudaFree(d_input);
	cudaFree(d_output);
	free(input);
	free(output);

	return 0;
}

	.file	"tmpxft_003b9c8b_00000000-6_bucketSort.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z16bucketSortKernelPflS_PflS_
	.type	_Z39__device_stub__Z16bucketSortKernelPflS_PflS_, @function
_Z39__device_stub__Z16bucketSortKernelPflS_PflS_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16bucketSortKernelPflS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z39__device_stub__Z16bucketSortKernelPflS_PflS_, .-_Z39__device_stub__Z16bucketSortKernelPflS_PflS_
	.globl	_Z16bucketSortKernelPflS_
	.type	_Z16bucketSortKernelPflS_, @function
_Z16bucketSortKernelPflS_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16bucketSortKernelPflS_PflS_
	.cfi_endproc
.LFE2053:
	.size	_Z16bucketSortKernelPflS_, .-_Z16bucketSortKernelPflS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Time :  %3.1f ms \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%esi, %esi
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	xorl	%esi, %esi
	leaq	24(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	movl	$20000, %edi
	call	malloc@PLT
	movl	$40000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rsp, %rdi
	movl	$20000, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$40000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L9:
	call	rand@PLT
	movl	$10000, %ecx
	cltd
	idivl	%ecx
	incl	%edx
	cvtsi2ssl	%edx, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	$5000, %r12
	jne	.L9
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$20000, %edx
	call	cudaMemcpy@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147483653, %edi
	salq	$2, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	8(%rsp), %rdx
	movq	(%rsp), %rdi
	movl	$5000, %esi
	call	_Z39__device_stub__Z16bucketSortKernelPflS_PflS_
.L10:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$40000, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	44(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z16bucketSortKernelPflS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16bucketSortKernelPflS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1176256512
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* This program sorts an input array by bucket sort.
 * Each bucket in turn is sorted using Parallel Bubble sort.
 * The array consists of float numbers, all less than 1. To find the destination bucket,
 * the float number is multiplied by 10 to get the first digit, which determines the bucket number.
 * For eg., 0.1234 -> (int)(0.1234*10) = 1. Thus the bucket number for 0.1234 is 1.
 * Thus the total number of buckets will be 10. (0-9)
 * Implemented in CUDA. 
 *
 *
 * 
 * code by Anand Goyal. Dated: 12/13/2014
*/

#include<stdio.h>
#include<hip/hip_runtime.h>
#include<time.h>
#include<sys/time.h>

#define range 10
#define SIZE 5000
#define bucketLength (SIZE/range * 2)

__global__ void bucketSortKernel(float *inData, long size, float *outData)
{
	__shared__ float localBucket[bucketLength];
	__shared__ int localCount; /* Counter to track index with a bucket */

	int tid = threadIdx.x; int blockId = blockIdx.x;
	int offset = blockDim.x;
	int bucket, index, phase;
	float temp;
	
	if(tid == 0)
		localCount = 0;

	__syncthreads();

	/* Block traverses through the array and buckets the element accordingly */
	while(tid < size) {
		bucket = inData[tid] * 10;
		if(bucket == blockId) {
			index = atomicAdd(&localCount, 1);
			localBucket[index] = inData[tid]; 
		}
		tid += offset;		
	}

	__syncthreads();
	
	tid = threadIdx.x;
	//Sorting the bucket using Parallel Bubble Sort
	for(phase = 0; phase < bucketLength; phase ++) {
		if(phase % 2 == 0) {
			while((tid < bucketLength) && (tid % 2 == 0)) {
				if(localBucket[tid] > localBucket[tid +1]) {
					temp = localBucket[tid];
					localBucket[tid] = localBucket[tid + 1];
					localBucket[tid + 1] = temp;
				}
				tid += offset;
			}
		}
		else {
			while((tid < bucketLength - 1) && (tid %2 != 0)) {
				if(localBucket[tid] > localBucket[tid + 1]) {
					temp = localBucket[tid];
					localBucket[tid] = localBucket[tid + 1];
					localBucket[tid + 1] = temp;
				}
				tid += offset;
			}
		}
	}
	
	tid = threadIdx.x;
	while(tid < bucketLength) {
		outData[(blockIdx.x * bucketLength) + tid] = localBucket[tid];
		tid += offset;
	}
}

int main()
{
	float *input, *output;
	float *d_input, *d_output;
	int i;
	float elapsedTime;
	hipEvent_t start, stop;
	
	hipEventCreateWithFlags(&start, 0);
	hipEventCreateWithFlags(&stop, 0);

	/* Each block sorts one bucket */
	const int numOfThreads = 4;
	const int numOfBlocks = range;

	input = (float *)malloc(sizeof(float) * SIZE);
	output = (float *)malloc(sizeof(float) * bucketLength * range);
	hipMalloc((void**)&d_input, sizeof(float) * SIZE);
	hipMalloc((void **)&d_output, sizeof(float) * bucketLength * range);
	hipMemset(d_output, 0, sizeof(float) * bucketLength * range);

	/* Generating the input array to be sorted */
	srand(time(NULL));
	for(i = 0; i < SIZE; i++)
		input[i] = (float)(rand()%10000 + 1)/(float)10000;

	// Printing the input array
/*	for(i = 0; i < SIZE; i++)
		printf("%0.4f\n", input[i]);

	printf("***********************\n");
*/
	hipEventRecord(start, 0);

	hipMemcpy(d_input, input, sizeof(float) * SIZE, hipMemcpyHostToDevice);
	bucketSortKernel<<<numOfBlocks, numOfThreads>>>(d_input, SIZE, d_output);
	hipMemcpy(output, d_output, sizeof(float) * bucketLength * range, hipMemcpyDeviceToHost);
	
	hipEventRecord(stop, 0);
	hipEventSynchronize(stop);
	hipEventElapsedTime(&elapsedTime, start, stop);

/*	//Printing the sorted array
	for(i = 0; i < range; i++) {
		for(j = 0; j < bucketLength; j++)
			if(output[i*bucketLength + j] != 0)
				printf("%0.4f ", output[i*bucketLength + j]);
	}

	printf("\n");
*/	printf("Time :  %3.1f ms \n", elapsedTime);

	hipFree(d_input);
	hipFree(d_output);
	free(input);
	free(output);

	return 0;
}

	.text
	.file	"bucketSort.hip"
	.globl	_Z31__device_stub__bucketSortKernelPflS_ # -- Begin function _Z31__device_stub__bucketSortKernelPflS_
	.type	_Z31__device_stub__bucketSortKernelPflS_,@function
_Z31__device_stub__bucketSortKernelPflS_: # @_Z31__device_stub__bucketSortKernelPflS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16bucketSortKernelPflS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__bucketSortKernelPflS_, .Lfunc_end0-_Z31__device_stub__bucketSortKernelPflS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x461c4000                      # float 1.0E+4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movq	%rsp, %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$20000, %edi                    # imm = 0x4E20
	callq	malloc
	movq	%rax, %rbx
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %r14
	leaq	16(%rsp), %rdi
	movl	$20000, %esi                    # imm = 0x4E20
	callq	hipMalloc
	leaq	8(%rsp), %r15
	movl	$40000, %esi                    # imm = 0x9C40
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	hipMemset
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1759218605, %rax, %rcx         # imm = 0x68DB8BAD
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$44, %rcx
	addl	%edx, %ecx
	imull	$10000, %ecx, %ecx              # imm = 0x2710
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	$5000, %r12                     # imm = 0x1388
	jne	.LBB1_1
# %bb.2:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	movl	$20000, %edx                    # imm = 0x4E20
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967300, %rdx               # imm = 0x100000004
	leaq	6(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rdx
	movl	$5000, %esi                     # imm = 0x1388
	callq	_Z31__device_stub__bucketSortKernelPflS_
.LBB1_4:
	movq	8(%rsp), %rsi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	36(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16bucketSortKernelPflS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16bucketSortKernelPflS_,@object # @_Z16bucketSortKernelPflS_
	.section	.rodata,"a",@progbits
	.globl	_Z16bucketSortKernelPflS_
	.p2align	3, 0x0
_Z16bucketSortKernelPflS_:
	.quad	_Z31__device_stub__bucketSortKernelPflS_
	.size	_Z16bucketSortKernelPflS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time :  %3.1f ms \n"
	.size	.L.str, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16bucketSortKernelPflS_"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__bucketSortKernelPflS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16bucketSortKernelPflS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16bucketSortKernelPflS_ ; -- Begin function _Z16bucketSortKernelPflS_
	.globl	_Z16bucketSortKernelPflS_
	.p2align	8
	.type	_Z16bucketSortKernelPflS_,@function
_Z16bucketSortKernelPflS_:              ; @_Z16bucketSortKernelPflS_
; %bb.0:
	s_load_b32 s8, s[0:1], 0x24
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mov_b32_e32 v1, 0
	ds_store_b32 v1, v1 offset:4000
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, 0xffff, s8
	s_mov_b32 s0, exec_lo
	s_barrier
	v_mov_b32_e32 v1, v2
	buffer_gl0_inv
	v_cmpx_gt_i64_e64 s[6:7], v[0:1]
	s_cbranch_execz .LBB0_9
; %bb.3:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v3, v0
	s_mov_b32 s1, 0
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	s_mov_b32 s9, exec_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v1, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v4, 0x41200000, v1
	v_cvt_i32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 s15, v4
	s_cbranch_execz .LBB0_8
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s11, exec_lo
	s_mov_b32 s10, exec_lo
	v_mbcnt_lo_u32_b32 v4, s11, 0
                                        ; implicit-def: $vgpr5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s11
	ds_add_rtn_u32 v5, v2, v5 offset:4000
.LBB0_7:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_lshl_u32 v4, s10, v4, 2
	ds_store_b32 v4, v1
.LBB0_8:                                ; %Flow105
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v1, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
	v_cmp_le_u64_e32 vcc_lo, s[6:7], v[1:2]
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_4
.LBB0_9:                                ; %Flow107
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v3, v0
	s_lshl_b32 s4, s8, 2
	s_mov_b32 s5, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_10:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_13 Depth 2
                                        ;     Child Loop BB0_21 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 1, v3
	s_bitcmp0_b32 s5, 0
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr4
	v_cmp_eq_u32_e64 s0, 0, v1
	s_cbranch_scc1 .LBB0_18
; %bb.11:                               ; %.preheader55
                                        ;   in Loop: Header=BB0_10 Depth=1
	v_cmp_gt_i32_e32 vcc_lo, 0x3e7, v3
	v_mov_b32_e32 v4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s0, -1
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_17
; %bb.12:                               ; %.lr.ph61.preheader
                                        ;   in Loop: Header=BB0_10 Depth=1
	v_dual_mov_b32 v4, v3 :: v_dual_lshlrev_b32 v5, 2, v3
	s_mov_b32 s7, 0
.LBB0_13:                               ; %.lr.ph61
                                        ;   Parent Loop BB0_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_2addr_b32 v[1:2], v5 offset1:1
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_f32_e32 v1, v2
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=2
	ds_store_2addr_b32 v5, v2, v1 offset1:1
.LBB0_15:                               ;   in Loop: Header=BB0_13 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v4, s8, v4
	v_add_nc_u32_e32 v5, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, 1, v4
	v_cmp_lt_i32_e32 vcc_lo, 0x3e6, v4
	v_cmp_eq_u32_e64 s1, 0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, vcc_lo, s1
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s7, s1, s7
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_13
; %bb.16:                               ; %Flow100
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_17:                               ; %Flow101
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s1, 0
.LBB0_18:                               ; %Flow104
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_26
; %bb.19:                               ; %.preheader54
                                        ;   in Loop: Header=BB0_10 Depth=1
	v_cmp_gt_i32_e32 vcc_lo, 0x3e8, v3
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_25
; %bb.20:                               ; %.lr.ph64.preheader
                                        ;   in Loop: Header=BB0_10 Depth=1
	v_lshlrev_b32_e32 v4, 2, v3
	s_mov_b32 s6, 0
.LBB0_21:                               ; %.lr.ph64
                                        ;   Parent Loop BB0_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_2addr_b32 v[1:2], v4 offset1:1
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_f32_e32 v1, v2
	s_cbranch_execz .LBB0_23
; %bb.22:                               ;   in Loop: Header=BB0_21 Depth=2
	ds_store_2addr_b32 v4, v2, v1 offset1:1
.LBB0_23:                               ;   in Loop: Header=BB0_21 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v3, s8, v3
	v_add_nc_u32_e32 v4, s4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, 1, v3
	v_cmp_lt_i32_e32 vcc_lo, 0x3e7, v3
	v_cmp_eq_u32_e64 s0, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s6, s0, s6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_21
; %bb.24:                               ; %Flow102
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_25:                               ; %Flow103
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v3
.LBB0_26:                               ; %.critedge
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v3, v4
	s_add_i32 s5, s5, 1
	s_cmpk_eq_i32 s5, 0x3e8
	s_cbranch_scc0 .LBB0_10
; %bb.27:                               ; %.preheader
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 0x3e8, v0
	s_cbranch_execz .LBB0_30
; %bb.28:                               ; %.lr.ph69
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
	s_mulk_i32 s15, 0x3e8
	s_mov_b32 s1, 0
.LBB0_29:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v6, v3
	v_add_nc_u32_e32 v1, s15, v0
	v_add_nc_u32_e32 v0, s8, v0
	v_add_nc_u32_e32 v3, s4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_cmp_lt_u32_e32 vcc_lo, 0x3e7, v0
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, s2, v4
	v_add_co_ci_u32_e64 v5, s0, s3, v5, s0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_29
.LBB0_30:                               ; %._crit_edge70
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16bucketSortKernelPflS_
		.amdhsa_group_segment_fixed_size 4004
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16bucketSortKernelPflS_, .Lfunc_end0-_Z16bucketSortKernelPflS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 828
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4004 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4004
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16bucketSortKernelPflS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16bucketSortKernelPflS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
