//============================================================
//  File:       im_cuda.cu
//  Author:     John Gauch
//  Date:       Summer 2010
//============================================================

#include <stdio.h>
#include <math.h>
#include <cuda.h>

#define PIXEL(x,y) ( (((y)+ydim)%ydim)*xdim + ((x)+xdim)%xdim )

// Global variables for timers
#define CUDA_TIMER
#ifdef CUDA_TIMER
cudaEvent_t cuda_start;
cudaEvent_t cuda_stop;
float cuda_time;
#endif

//============================================================
void query_cuda()
{
    // Get number of CUDA devices
    int devCount;
    cudaGetDeviceCount(&devCount);
    printf("There are %d CUDA devices.\n", devCount);

    // Iterate through CUDA devices
    for (int i = 0; i < devCount; ++i)
    {
        // Get CUDA device properties
        printf("\nCUDA Device #%d\n", i);
        cudaDeviceProp devProp;
        cudaGetDeviceProperties(&devProp, i);

        // Print CUDA device properties
        printf("Major revision number:         %d\n",  (int)devProp.major);
        printf("Minor revision number:         %d\n",  (int)devProp.minor);
        printf("Name:                          %s\n",  devProp.name);
        printf("Total global memory:           %d\n",  (int)devProp.totalGlobalMem);
        printf("Total shared memory per block: %d\n",  (int)devProp.sharedMemPerBlock);
        printf("Total registers per block:     %d\n",  (int)devProp.regsPerBlock);
        printf("Warp size:                     %d\n",  (int)devProp.warpSize);
        printf("Maximum memory pitch:          %d\n",  (int)devProp.memPitch);
        printf("Maximum threads per block:     %d\n",  (int)devProp.maxThreadsPerBlock);
        for (int i = 0; i < 3; ++i)
           printf("Maximum dimension %d of block:  %d\n", i, (int)devProp.maxThreadsDim[i]);
        for (int i = 0; i < 3; ++i)
           printf("Maximum dimension %d of grid:   %d\n", i, (int)devProp.maxGridSize[i]);
        printf("Clock rate:                    %d\n",  (int)devProp.clockRate);
        printf("Total constant memory:         %d\n",  (int)devProp.totalConstMem);
        printf("Texture alignment:             %d\n",  (int)devProp.textureAlignment);
        printf("Concurrent copy and execution: %s\n",  (devProp.deviceOverlap ? "Yes" : "No"));
        printf("Number of multiprocessors:     %d\n",  (int)devProp.multiProcessorCount);
        printf("Kernel execution timeout:      %s\n",  (devProp.kernelExecTimeoutEnabled ? "Yes" : "No"));
    }
}

//============================================================
void create_timer()
{
#ifdef CUDA_TIMER
   cudaEventCreate(&cuda_start);
   cudaEventCreate(&cuda_stop);
#endif
}

//============================================================
void destroy_timer()
{
#ifdef CUDA_TIMER
   cudaEventDestroy(cuda_start);
   cudaEventDestroy(cuda_stop);
#endif
}

//============================================================
void start_timer()
{
#ifdef CUDA_TIMER
   cudaEventRecord(cuda_start,0);
#endif
}

//============================================================
void end_timer(char *str)
{
#ifdef CUDA_TIMER
   cudaEventRecord(cuda_stop,0);
   cudaEventSynchronize(cuda_stop);
   cudaEventElapsedTime(&cuda_time, cuda_start, cuda_stop);
   printf("%s: %f\n", str, cuda_time/1000);
#endif
}

//============================================================
void cuda_config(int length, int &thread_cnt, int &block_cnt)
{
   thread_cnt = 0;
   block_cnt = 0;
   cudaDeviceProp devProp;
   if (cudaGetDeviceProperties(&devProp, 0) != cudaSuccess) return;
   thread_cnt = devProp.maxThreadsPerBlock / 4;
   block_cnt = length / thread_cnt;
   if (block_cnt * thread_cnt < length) block_cnt++;
   // printf("thread_cnt=%d, block_cnt=%d\n", thread_cnt, block_cnt);
}

//============================================================
__global__ void binomial_kernel(float *cu_in, float *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   cu_out[PIXEL(x,y)] 
      = (cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x,y)] * 4
      + cu_in[PIXEL(x,y-1)] * 2
      + cu_in[PIXEL(x-1,y+1)] 
      + cu_in[PIXEL(x-1,y)] * 2
      + cu_in[PIXEL(x-1,y-1)]) / (float)16.0;
}

//============================================================
float* binomial_cuda(float *data, int count, int xdim, int ydim)
{
   // declare variables
   float *cu_in;  
   float *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(float);
   size_t size_out = length*sizeof(float);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   cudaMalloc((void **) &cu_in, size_in);
   cudaMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   cudaMemcpy(cu_in, data,  size_in, cudaMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   while (count >= 2)
   {
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
      binomial_kernel <<< blocks, threads >>> (cu_out, cu_in, xdim, ydim);
      count -= 2;
   }
   if (count == 1)
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   if (count == 1)
      cudaMemcpy(data, cu_out,  size_out, cudaMemcpyDeviceToHost);
   else
      cudaMemcpy(data, cu_in,  size_in, cudaMemcpyDeviceToHost);
   end_timer("Copy memory from device");

   // cleanup
   cudaFree(cu_in);
   cudaFree(cu_out);
   destroy_timer();
   return data;
}

//============================================================
__global__ void binomial_kernel(short *cu_in, short *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   cu_out[PIXEL(x,y)] 
      = (cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x,y)] * 4
      + cu_in[PIXEL(x,y-1)] * 2
      + cu_in[PIXEL(x-1,y+1)] 
      + cu_in[PIXEL(x-1,y)] * 2
      + cu_in[PIXEL(x-1,y-1)] + 8) / 16;
}

//============================================================
short* binomial_cuda(short *data, int count, int xdim, int ydim)
{
   // declare variables
   short *cu_in;  
   short *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(short);
   size_t size_out = length*sizeof(short);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   cudaMalloc((void **) &cu_in, size_in);
   cudaMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   cudaMemcpy(cu_in, data, size_in, cudaMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   while (count >= 2)
   {
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
      binomial_kernel <<< blocks, threads >>> (cu_out, cu_in, xdim, ydim);
      count -= 2;
   }
   if (count == 1)
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   if (count == 1)
      cudaMemcpy(data, cu_out, size_out, cudaMemcpyDeviceToHost);
   else
      cudaMemcpy(data, cu_in, size_in, cudaMemcpyDeviceToHost);
   end_timer("Copy memory from device");

   // cleanup
   cudaFree(cu_in);
   cudaFree(cu_out);
   destroy_timer();
   return data;
}

//============================================================
__global__ void gradient_kernel(float *cu_in, float *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   float dx 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x-1,y)] * 2
      - cu_in[PIXEL(x-1,y-1)];
   float dy 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x,y-1)] * 2
      - cu_in[PIXEL(x-1,y-1)];

   if (dx < 0) dx = -dx;
   if (dy < 0) dy = -dy;
   cu_out[PIXEL(x,y)] = (dx+dy) / (float)8.0;
}

//============================================================
float* gradient_cuda(float *data, int xdim, int ydim)
{
   // declare variables
   float *cu_in;  
   float *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(float);
   size_t size_out = length*sizeof(float);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   cudaMalloc((void **) &cu_in, size_in);
   cudaMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   cudaMemcpy(cu_in, data, size_in, cudaMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   gradient_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   cudaMemcpy(data, cu_out, size_out, cudaMemcpyDeviceToHost);
   end_timer("Copy memory from device");

   // cleanup
   cudaFree(cu_in);
   cudaFree(cu_out);
   return data;
}

//============================================================
__global__ void gradient_kernel(short *cu_in, short *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   int dx 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x-1,y)] * 2
      - cu_in[PIXEL(x-1,y-1)];
   int dy 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x,y-1)] * 2
      - cu_in[PIXEL(x-1,y-1)];

   if (dx < 0) dx = -dx;
   if (dy < 0) dy = -dy;
   cu_out[PIXEL(x,y)] = (dx+dy) / 8;
}

//============================================================
short* gradient_cuda(short *data, int xdim, int ydim)
{
   // declare variables
   short *cu_in;  
   short *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(short);
   size_t size_out = length*sizeof(short);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   cudaMalloc((void **) &cu_in, size_in);
   cudaMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   cudaMemcpy(cu_in, data, size_in, cudaMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   gradient_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   end_timer("Copy memory from device");
   cudaMemcpy(data, cu_out, size_out, cudaMemcpyDeviceToHost);

   // cleanup
   cudaFree(cu_in);
   cudaFree(cu_out);
   return data;
}


	.file	"tmpxft_00223d2c_00000000-6_im_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Yes"
.LC1:
	.string	"No"
.LC2:
	.string	"There are %d CUDA devices.\n"
.LC3:
	.string	"\nCUDA Device #%d\n"
.LC4:
	.string	"Major revision number:         %d\n"
.LC5:
	.string	"Minor revision number:         %d\n"
.LC6:
	.string	"Name:                          %s\n"
.LC7:
	.string	"Total global memory:           %d\n"
.LC8:
	.string	"Total shared memory per block: %d\n"
.LC9:
	.string	"Total registers per block:     %d\n"
.LC10:
	.string	"Warp size:                     %d\n"
.LC11:
	.string	"Maximum memory pitch:          %d\n"
.LC12:
	.string	"Maximum threads per block:     %d\n"
.LC13:
	.string	"Maximum dimension %d of block:  %d\n"
.LC14:
	.string	"Maximum dimension %d of grid:   %d\n"
.LC15:
	.string	"Clock rate:                    %d\n"
.LC16:
	.string	"Total constant memory:         %d\n"
.LC17:
	.string	"Texture alignment:             %d\n"
.LC18:
	.string	"Concurrent copy and execution: %s\n"
.LC19:
	.string	"Number of multiprocessors:     %d\n"
.LC20:
	.string	"Kernel execution timeout:      %s\n"
	.text
	.globl	_Z10query_cudav
	.type	_Z10query_cudav, @function
_Z10query_cudav:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	leaq	.LC3(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	subq	$1056, %rsp
	.cfi_def_cfa_offset 1104
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	12(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
.L3:
	cmpl	%ebx, 12(%rsp)
	jle	.L16
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	16(%rsp), %r13
	xorl	%ebp, %ebp
	leaq	.LC13(%rip), %r14
	call	__printf_chk@PLT
	movl	%ebx, %esi
	movq	%r13, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	376(%rsp), %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	380(%rsp), %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r13, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movl	304(%rsp), %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	312(%rsp), %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	320(%rsp), %edx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	324(%rsp), %edx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	328(%rsp), %edx
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	336(%rsp), %edx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L4:
	movl	324(%r13,%rbp,4), %ecx
	movl	%ebp, %edx
	movq	%r14, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$3, %rbp
	jne	.L4
	xorl	%ebp, %ebp
	leaq	.LC14(%rip), %r14
.L5:
	movl	336(%r13,%rbp,4), %ecx
	movl	%ebp, %edx
	movq	%r14, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$3, %rbp
	jne	.L5
	movl	364(%rsp), %edx
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %r13
	leaq	.LC1(%rip), %rbp
	call	__printf_chk@PLT
	movl	368(%rsp), %edx
	leaq	.LC16(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	384(%rsp), %edx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 400(%rsp)
	movq	%r13, %rdx
	leaq	.LC18(%rip), %rsi
	cmove	%rbp, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	404(%rsp), %edx
	leaq	.LC19(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 408(%rsp)
	movq	%r13, %rdx
	leaq	.LC20(%rip), %rsi
	cmove	%rbp, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	call	__printf_chk@PLT
	jmp	.L3
.L16:
	movq	1048(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$1056, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10query_cudav, .-_Z10query_cudav
	.globl	_Z12create_timerv
	.type	_Z12create_timerv, @function
_Z12create_timerv:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	cuda_start(%rip), %rdi
	call	cudaEventCreate@PLT
	leaq	cuda_stop(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaEventCreate@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z12create_timerv, .-_Z12create_timerv
	.globl	_Z13destroy_timerv
	.type	_Z13destroy_timerv, @function
_Z13destroy_timerv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	cuda_start(%rip), %rdi
	call	cudaEventDestroy@PLT
	movq	cuda_stop(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaEventDestroy@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z13destroy_timerv, .-_Z13destroy_timerv
	.globl	_Z11start_timerv
	.type	_Z11start_timerv, @function
_Z11start_timerv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z11start_timerv, .-_Z11start_timerv
	.section	.rodata.str1.1
.LC22:
	.string	"%s: %f\n"
	.text
	.globl	_Z9end_timerPc
	.type	_Z9end_timerPc, @function
_Z9end_timerPc:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	cuda_stop(%rip), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	cuda_stop(%rip), %rdi
	call	cudaEventSynchronize@PLT
	movq	cuda_stop(%rip), %rdx
	movq	cuda_start(%rip), %rsi
	leaq	cuda_time(%rip), %rdi
	call	cudaEventElapsedTime@PLT
	movq	%rbx, %rdx
	leaq	.LC22(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 8
	movl	$2, %edi
	movb	$1, %al
	movss	cuda_time(%rip), %xmm0
	divss	.LC21(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z9end_timerPc, .-_Z9end_timerPc
	.globl	_Z11cuda_configiRiS_
	.type	_Z11cuda_configiRiS_, @function
_Z11cuda_configiRiS_:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$1040, %rsp
	.cfi_def_cfa_offset 1072
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rsp, %rdi
	movl	%eax, (%rsi)
	xorl	%esi, %esi
	movl	%eax, (%rdx)
	call	cudaGetDeviceProperties_v2@PLT
	testl	%eax, %eax
	jne	.L24
	movl	320(%rsp), %eax
	movl	$4, %ecx
	cltd
	idivl	%ecx
	movl	%eax, 0(%rbp)
	movl	%eax, %ecx
	movl	%r12d, %eax
	cltd
	idivl	%ecx
	movl	%eax, (%rbx)
	movl	0(%rbp), %edx
	imull	%eax, %edx
	cmpl	%r12d, %edx
	jge	.L24
	incl	%eax
	movl	%eax, (%rbx)
.L24:
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$1040, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z11cuda_configiRiS_, .-_Z11cuda_configiRiS_
	.globl	_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii
	.type	_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii, @function
_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15binomial_kernelPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii, .-_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii
	.globl	_Z15binomial_kernelPfS_ii
	.type	_Z15binomial_kernelPfS_ii, @function
_Z15binomial_kernelPfS_ii:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii
	.cfi_endproc
.LFE2062:
	.size	_Z15binomial_kernelPfS_ii, .-_Z15binomial_kernelPfS_ii
	.section	.rodata.str1.1
.LC23:
	.string	"Copy memory to device"
.LC24:
	.string	"Run kernel"
.LC25:
	.string	"Copy memory from device"
	.text
	.globl	_Z13binomial_cudaPfiii
	.type	_Z13binomial_cudaPfiii, @function
_Z13binomial_cudaPfiii:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	movl	%edx, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	imull	%ecx, %edi
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movslq	%edi, %rbx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	leaq	12(%rsp), %rdx
	salq	$2, %rbx
	call	_Z11cuda_configiRiS_
	movl	12(%rsp), %eax
	movl	8(%rsp), %edx
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movl	%edx, 44(%rsp)
	movq	%rax, 36(%rsp)
	movq	%rax, 48(%rsp)
	call	_Z12create_timerv
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	_Z11start_timerv
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC23(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
.L35:
	cmpl	$1, %r12d
	jle	.L47
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r14d, %ecx
	movl	%r13d, %edx
	call	_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii
.L36:
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%r14d, %ecx
	movl	%r13d, %edx
	call	_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii
.L37:
	subl	$2, %r12d
	jmp	.L35
.L47:
	jne	.L40
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r14d, %ecx
	movl	%r13d, %edx
	call	_Z39__device_stub__Z15binomial_kernelPfS_iiPfS_ii
.L40:
	leaq	.LC24(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
	decl	%r12d
	movl	$2, %ecx
	movq	%rbx, %rdx
	jne	.L42
	movq	24(%rsp), %rsi
	jmp	.L46
.L42:
	movq	16(%rsp), %rsi
.L46:
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC25(%rip), %rdi
	call	_Z9end_timerPc
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	_Z13destroy_timerv
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z13binomial_cudaPfiii, .-_Z13binomial_cudaPfiii
	.globl	_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii
	.type	_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii, @function
_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15binomial_kernelPsS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L48:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii, .-_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii
	.globl	_Z15binomial_kernelPsS_ii
	.type	_Z15binomial_kernelPsS_ii, @function
_Z15binomial_kernelPsS_ii:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii
	.cfi_endproc
.LFE2064:
	.size	_Z15binomial_kernelPsS_ii, .-_Z15binomial_kernelPsS_ii
	.globl	_Z13binomial_cudaPsiii
	.type	_Z13binomial_cudaPsiii, @function
_Z13binomial_cudaPsiii:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	movl	%edx, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	imull	%ecx, %edi
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movslq	%edi, %rbx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	leaq	12(%rsp), %rdx
	addq	%rbx, %rbx
	call	_Z11cuda_configiRiS_
	movl	12(%rsp), %eax
	movl	8(%rsp), %edx
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movl	%edx, 44(%rsp)
	movq	%rax, 36(%rsp)
	movq	%rax, 48(%rsp)
	call	_Z12create_timerv
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	_Z11start_timerv
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC23(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
.L54:
	cmpl	$1, %r12d
	jle	.L66
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r14d, %ecx
	movl	%r13d, %edx
	call	_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii
.L55:
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%r14d, %ecx
	movl	%r13d, %edx
	call	_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii
.L56:
	subl	$2, %r12d
	jmp	.L54
.L66:
	jne	.L59
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r14d, %ecx
	movl	%r13d, %edx
	call	_Z39__device_stub__Z15binomial_kernelPsS_iiPsS_ii
.L59:
	leaq	.LC24(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
	decl	%r12d
	movl	$2, %ecx
	movq	%rbx, %rdx
	jne	.L61
	movq	24(%rsp), %rsi
	jmp	.L65
.L61:
	movq	16(%rsp), %rsi
.L65:
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC25(%rip), %rdi
	call	_Z9end_timerPc
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	_Z13destroy_timerv
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L63
	call	__stack_chk_fail@PLT
.L63:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z13binomial_cudaPsiii, .-_Z13binomial_cudaPsiii
	.globl	_Z39__device_stub__Z15gradient_kernelPfS_iiPfS_ii
	.type	_Z39__device_stub__Z15gradient_kernelPfS_iiPfS_ii, @function
_Z39__device_stub__Z15gradient_kernelPfS_iiPfS_ii:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15gradient_kernelPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L67:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z39__device_stub__Z15gradient_kernelPfS_iiPfS_ii, .-_Z39__device_stub__Z15gradient_kernelPfS_iiPfS_ii
	.globl	_Z15gradient_kernelPfS_ii
	.type	_Z15gradient_kernelPfS_ii, @function
_Z15gradient_kernelPfS_ii:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15gradient_kernelPfS_iiPfS_ii
	.cfi_endproc
.LFE2066:
	.size	_Z15gradient_kernelPfS_ii, .-_Z15gradient_kernelPfS_ii
	.globl	_Z13gradient_cudaPfii
	.type	_Z13gradient_cudaPfii, @function
_Z13gradient_cudaPfii:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	movl	%esi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	imull	%edx, %edi
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movslq	%edi, %rbx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	leaq	12(%rsp), %rdx
	salq	$2, %rbx
	call	_Z11cuda_configiRiS_
	movl	12(%rsp), %eax
	movl	8(%rsp), %edx
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movl	%edx, 44(%rsp)
	movq	%rax, 36(%rsp)
	movq	%rax, 48(%rsp)
	call	_Z12create_timerv
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	_Z11start_timerv
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC23(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r13d, %ecx
	movl	%r12d, %edx
	call	_Z39__device_stub__Z15gradient_kernelPfS_iiPfS_ii
.L73:
	leaq	.LC24(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC25(%rip), %rdi
	call	_Z9end_timerPc
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L74
	call	__stack_chk_fail@PLT
.L74:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z13gradient_cudaPfii, .-_Z13gradient_cudaPfii
	.globl	_Z39__device_stub__Z15gradient_kernelPsS_iiPsS_ii
	.type	_Z39__device_stub__Z15gradient_kernelPsS_iiPsS_ii, @function
_Z39__device_stub__Z15gradient_kernelPsS_iiPsS_ii:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15gradient_kernelPsS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L76:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L78
	call	__stack_chk_fail@PLT
.L78:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z39__device_stub__Z15gradient_kernelPsS_iiPsS_ii, .-_Z39__device_stub__Z15gradient_kernelPsS_iiPsS_ii
	.globl	_Z15gradient_kernelPsS_ii
	.type	_Z15gradient_kernelPsS_ii, @function
_Z15gradient_kernelPsS_ii:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15gradient_kernelPsS_iiPsS_ii
	.cfi_endproc
.LFE2068:
	.size	_Z15gradient_kernelPsS_ii, .-_Z15gradient_kernelPsS_ii
	.globl	_Z13gradient_cudaPsii
	.type	_Z13gradient_cudaPsii, @function
_Z13gradient_cudaPsii:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	movl	%esi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	imull	%edx, %edi
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movslq	%edi, %rbx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	leaq	12(%rsp), %rdx
	addq	%rbx, %rbx
	call	_Z11cuda_configiRiS_
	movl	12(%rsp), %eax
	movl	8(%rsp), %edx
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movl	%edx, 44(%rsp)
	movq	%rax, 36(%rsp)
	movq	%rax, 48(%rsp)
	call	_Z12create_timerv
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	_Z11start_timerv
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC23(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r13d, %ecx
	movl	%r12d, %edx
	call	_Z39__device_stub__Z15gradient_kernelPsS_iiPsS_ii
.L82:
	leaq	.LC24(%rip), %rdi
	call	_Z9end_timerPc
	call	_Z11start_timerv
	leaq	.LC25(%rip), %rdi
	call	_Z9end_timerPc
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L83
	call	__stack_chk_fail@PLT
.L83:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z13gradient_cudaPsii, .-_Z13gradient_cudaPsii
	.section	.rodata.str1.1
.LC26:
	.string	"_Z15gradient_kernelPsS_ii"
.LC27:
	.string	"_Z15gradient_kernelPfS_ii"
.LC28:
	.string	"_Z15binomial_kernelPsS_ii"
.LC29:
	.string	"_Z15binomial_kernelPfS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2070:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC26(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15gradient_kernelPsS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15gradient_kernelPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15binomial_kernelPsS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15binomial_kernelPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2070:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	cuda_time
	.bss
	.align 4
	.type	cuda_time, @object
	.size	cuda_time, 4
cuda_time:
	.zero	4
	.globl	cuda_stop
	.align 8
	.type	cuda_stop, @object
	.size	cuda_stop, 8
cuda_stop:
	.zero	8
	.globl	cuda_start
	.align 8
	.type	cuda_start, @object
	.size	cuda_start, 8
cuda_start:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC21:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//============================================================
//  File:       im_cuda.cu
//  Author:     John Gauch
//  Date:       Summer 2010
//============================================================

#include <stdio.h>
#include <math.h>
#include <hip/hip_runtime.h>

#define PIXEL(x,y) ( (((y)+ydim)%ydim)*xdim + ((x)+xdim)%xdim )

// Global variables for timers
#define CUDA_TIMER
#ifdef CUDA_TIMER
hipEvent_t cuda_start;
hipEvent_t cuda_stop;
float cuda_time;
#endif

//============================================================
void query_cuda()
{
    // Get number of CUDA devices
    int devCount;
    hipGetDeviceCount(&devCount);
    printf("There are %d CUDA devices.\n", devCount);

    // Iterate through CUDA devices
    for (int i = 0; i < devCount; ++i)
    {
        // Get CUDA device properties
        printf("\nCUDA Device #%d\n", i);
        hipDeviceProp_t devProp;
        hipGetDeviceProperties(&devProp, i);

        // Print CUDA device properties
        printf("Major revision number:         %d\n",  (int)devProp.major);
        printf("Minor revision number:         %d\n",  (int)devProp.minor);
        printf("Name:                          %s\n",  devProp.name);
        printf("Total global memory:           %d\n",  (int)devProp.totalGlobalMem);
        printf("Total shared memory per block: %d\n",  (int)devProp.sharedMemPerBlock);
        printf("Total registers per block:     %d\n",  (int)devProp.regsPerBlock);
        printf("Warp size:                     %d\n",  (int)devProp.warpSize);
        printf("Maximum memory pitch:          %d\n",  (int)devProp.memPitch);
        printf("Maximum threads per block:     %d\n",  (int)devProp.maxThreadsPerBlock);
        for (int i = 0; i < 3; ++i)
           printf("Maximum dimension %d of block:  %d\n", i, (int)devProp.maxThreadsDim[i]);
        for (int i = 0; i < 3; ++i)
           printf("Maximum dimension %d of grid:   %d\n", i, (int)devProp.maxGridSize[i]);
        printf("Clock rate:                    %d\n",  (int)devProp.clockRate);
        printf("Total constant memory:         %d\n",  (int)devProp.totalConstMem);
        printf("Texture alignment:             %d\n",  (int)devProp.textureAlignment);
        printf("Concurrent copy and execution: %s\n",  (devProp.deviceOverlap ? "Yes" : "No"));
        printf("Number of multiprocessors:     %d\n",  (int)devProp.multiProcessorCount);
        printf("Kernel execution timeout:      %s\n",  (devProp.kernelExecTimeoutEnabled ? "Yes" : "No"));
    }
}

//============================================================
void create_timer()
{
#ifdef CUDA_TIMER
   hipEventCreate(&cuda_start);
   hipEventCreate(&cuda_stop);
#endif
}

//============================================================
void destroy_timer()
{
#ifdef CUDA_TIMER
   hipEventDestroy(cuda_start);
   hipEventDestroy(cuda_stop);
#endif
}

//============================================================
void start_timer()
{
#ifdef CUDA_TIMER
   hipEventRecord(cuda_start,0);
#endif
}

//============================================================
void end_timer(char *str)
{
#ifdef CUDA_TIMER
   hipEventRecord(cuda_stop,0);
   hipEventSynchronize(cuda_stop);
   hipEventElapsedTime(&cuda_time, cuda_start, cuda_stop);
   printf("%s: %f\n", str, cuda_time/1000);
#endif
}

//============================================================
void cuda_config(int length, int &thread_cnt, int &block_cnt)
{
   thread_cnt = 0;
   block_cnt = 0;
   hipDeviceProp_t devProp;
   if (hipGetDeviceProperties(&devProp, 0) != hipSuccess) return;
   thread_cnt = devProp.maxThreadsPerBlock / 4;
   block_cnt = length / thread_cnt;
   if (block_cnt * thread_cnt < length) block_cnt++;
   // printf("thread_cnt=%d, block_cnt=%d\n", thread_cnt, block_cnt);
}

//============================================================
__global__ void binomial_kernel(float *cu_in, float *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   cu_out[PIXEL(x,y)] 
      = (cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x,y)] * 4
      + cu_in[PIXEL(x,y-1)] * 2
      + cu_in[PIXEL(x-1,y+1)] 
      + cu_in[PIXEL(x-1,y)] * 2
      + cu_in[PIXEL(x-1,y-1)]) / (float)16.0;
}

//============================================================
float* binomial_cuda(float *data, int count, int xdim, int ydim)
{
   // declare variables
   float *cu_in;  
   float *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(float);
   size_t size_out = length*sizeof(float);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   hipMalloc((void **) &cu_in, size_in);
   hipMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   hipMemcpy(cu_in, data,  size_in, hipMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   while (count >= 2)
   {
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
      binomial_kernel <<< blocks, threads >>> (cu_out, cu_in, xdim, ydim);
      count -= 2;
   }
   if (count == 1)
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   if (count == 1)
      hipMemcpy(data, cu_out,  size_out, hipMemcpyDeviceToHost);
   else
      hipMemcpy(data, cu_in,  size_in, hipMemcpyDeviceToHost);
   end_timer("Copy memory from device");

   // cleanup
   hipFree(cu_in);
   hipFree(cu_out);
   destroy_timer();
   return data;
}

//============================================================
__global__ void binomial_kernel(short *cu_in, short *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   cu_out[PIXEL(x,y)] 
      = (cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x,y)] * 4
      + cu_in[PIXEL(x,y-1)] * 2
      + cu_in[PIXEL(x-1,y+1)] 
      + cu_in[PIXEL(x-1,y)] * 2
      + cu_in[PIXEL(x-1,y-1)] + 8) / 16;
}

//============================================================
short* binomial_cuda(short *data, int count, int xdim, int ydim)
{
   // declare variables
   short *cu_in;  
   short *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(short);
   size_t size_out = length*sizeof(short);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   hipMalloc((void **) &cu_in, size_in);
   hipMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   hipMemcpy(cu_in, data, size_in, hipMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   while (count >= 2)
   {
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
      binomial_kernel <<< blocks, threads >>> (cu_out, cu_in, xdim, ydim);
      count -= 2;
   }
   if (count == 1)
      binomial_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   if (count == 1)
      hipMemcpy(data, cu_out, size_out, hipMemcpyDeviceToHost);
   else
      hipMemcpy(data, cu_in, size_in, hipMemcpyDeviceToHost);
   end_timer("Copy memory from device");

   // cleanup
   hipFree(cu_in);
   hipFree(cu_out);
   destroy_timer();
   return data;
}

//============================================================
__global__ void gradient_kernel(float *cu_in, float *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   float dx 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x-1,y)] * 2
      - cu_in[PIXEL(x-1,y-1)];
   float dy 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x,y-1)] * 2
      - cu_in[PIXEL(x-1,y-1)];

   if (dx < 0) dx = -dx;
   if (dy < 0) dy = -dy;
   cu_out[PIXEL(x,y)] = (dx+dy) / (float)8.0;
}

//============================================================
float* gradient_cuda(float *data, int xdim, int ydim)
{
   // declare variables
   float *cu_in;  
   float *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(float);
   size_t size_out = length*sizeof(float);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   hipMalloc((void **) &cu_in, size_in);
   hipMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   hipMemcpy(cu_in, data, size_in, hipMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   gradient_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   hipMemcpy(data, cu_out, size_out, hipMemcpyDeviceToHost);
   end_timer("Copy memory from device");

   // cleanup
   hipFree(cu_in);
   hipFree(cu_out);
   return data;
}

//============================================================
__global__ void gradient_kernel(short *cu_in, short *cu_out, int xdim, int ydim)
{
   // get (x,y) coordinates
   int pixel = blockIdx.x*blockDim.x + threadIdx.x;
   if (pixel > xdim * ydim) return;
   int x = pixel % xdim;
   int y = pixel / xdim;

   int dx 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x+1,y)] * 2
      + cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x-1,y)] * 2
      - cu_in[PIXEL(x-1,y-1)];
   int dy 
      = cu_in[PIXEL(x+1,y+1)] 
      + cu_in[PIXEL(x,y+1)] * 2
      + cu_in[PIXEL(x-1,y+1)]
      - cu_in[PIXEL(x+1,y-1)]
      - cu_in[PIXEL(x,y-1)] * 2
      - cu_in[PIXEL(x-1,y-1)];

   if (dx < 0) dx = -dx;
   if (dy < 0) dy = -dy;
   cu_out[PIXEL(x,y)] = (dx+dy) / 8;
}

//============================================================
short* gradient_cuda(short *data, int xdim, int ydim)
{
   // declare variables
   short *cu_in;  
   short *cu_out;
   int length = xdim*ydim;
   size_t size_in = length*sizeof(short);
   size_t size_out = length*sizeof(short);
   int thread_cnt, block_cnt;
   cuda_config(length, thread_cnt, block_cnt);
   dim3 blocks(block_cnt, 1, 1);
   dim3 threads(thread_cnt, 1, 1);

   // allocate array on device
   create_timer();
   hipMalloc((void **) &cu_in, size_in);
   hipMalloc((void **) &cu_out, size_out);

   // copy data from host to device
   start_timer();
   hipMemcpy(cu_in, data, size_in, hipMemcpyHostToDevice);
   end_timer("Copy memory to device");

   // run kernel
   start_timer();
   gradient_kernel <<< blocks, threads >>> (cu_in, cu_out, xdim, ydim);
   end_timer("Run kernel");

   // copy data from device to host
   start_timer();
   end_timer("Copy memory from device");
   hipMemcpy(data, cu_out, size_out, hipMemcpyDeviceToHost);

   // cleanup
   hipFree(cu_in);
   hipFree(cu_out);
   return data;
}


	.text
	.file	"im_cuda.hip"
	.globl	_Z10query_cudav                 # -- Begin function _Z10query_cudav
	.type	_Z10query_cudav,@function
_Z10query_cudav:                        # @_Z10query_cudav
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1520
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	4(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	(%rbx), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, (%rbx)
	jle	.LBB0_7
# %bb.1:                                # %.lr.ph
	leaq	8(%rsp), %rbx
	movl	$.L.str.18, %r15d
	xorl	%ebp, %ebp
.LBB0_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
                                        #     Child Loop BB0_5 Depth 2
	movl	$.L.str.1, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	368(%rsp), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	372(%rsp), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	296(%rsp), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	304(%rsp), %esi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	312(%rsp), %esi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movl	316(%rsp), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%rsp), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	328(%rsp), %esi
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	xorl	%r14d, %r14d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	332(%rsp,%r14,4), %edx
	movl	$.L.str.11, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB0_3
# %bb.4:                                # %.preheader.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	xorl	%r14d, %r14d
.LBB0_5:                                # %.preheader
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	344(%rsp,%r14,4), %edx
	movl	$.L.str.12, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB0_5
# %bb.6:                                #   in Loop: Header=BB0_2 Depth=1
	movl	356(%rsp), %esi
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	movl	360(%rsp), %esi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	movl	376(%rsp), %esi
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 392(%rsp)
	movl	$.L.str.17, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
	movl	396(%rsp), %esi
	movl	$.L.str.19, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 400(%rsp)
	movl	$.L.str.17, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.20, %edi
	xorl	%eax, %eax
	callq	printf
	incl	%ebp
	cmpl	4(%rsp), %ebp
	jl	.LBB0_2
.LBB0_7:                                # %._crit_edge
	addq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10query_cudav, .Lfunc_end0-_Z10query_cudav
	.cfi_endproc
                                        # -- End function
	.globl	_Z12create_timerv               # -- Begin function _Z12create_timerv
	.type	_Z12create_timerv,@function
_Z12create_timerv:                      # @_Z12create_timerv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$cuda_start, %edi
	callq	hipEventCreate
	movl	$cuda_stop, %edi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipEventCreate                  # TAILCALL
.Lfunc_end1:
	.size	_Z12create_timerv, .Lfunc_end1-_Z12create_timerv
	.cfi_endproc
                                        # -- End function
	.globl	_Z13destroy_timerv              # -- Begin function _Z13destroy_timerv
	.type	_Z13destroy_timerv,@function
_Z13destroy_timerv:                     # @_Z13destroy_timerv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	cuda_start(%rip), %rdi
	callq	hipEventDestroy
	movq	cuda_stop(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipEventDestroy                 # TAILCALL
.Lfunc_end2:
	.size	_Z13destroy_timerv, .Lfunc_end2-_Z13destroy_timerv
	.cfi_endproc
                                        # -- End function
	.globl	_Z11start_timerv                # -- Begin function _Z11start_timerv
	.type	_Z11start_timerv,@function
_Z11start_timerv:                       # @_Z11start_timerv
	.cfi_startproc
# %bb.0:
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	jmp	hipEventRecord                  # TAILCALL
.Lfunc_end3:
	.size	_Z11start_timerv, .Lfunc_end3-_Z11start_timerv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9end_timerPc
.LCPI4_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	_Z9end_timerPc
	.type	_Z9end_timerPc,@function
_Z9end_timerPc:                         # @_Z9end_timerPc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	cuda_stop(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	cuda_stop(%rip), %rdi
	callq	hipEventSynchronize
	movq	cuda_start(%rip), %rsi
	movq	cuda_stop(%rip), %rdx
	movl	$cuda_time, %edi
	callq	hipEventElapsedTime
	movss	cuda_time(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.21, %edi
	movq	%rbx, %rsi
	movb	$1, %al
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end4:
	.size	_Z9end_timerPc, .Lfunc_end4-_Z9end_timerPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z11cuda_configiRiS_            # -- Begin function _Z11cuda_configiRiS_
	.type	_Z11cuda_configiRiS_,@function
_Z11cuda_configiRiS_:                   # @_Z11cuda_configiRiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movl	%edi, %ebp
	xorl	%eax, %eax
	movl	%eax, (%rsi)
	movl	%eax, (%rdx)
	movq	%rsp, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB5_3
# %bb.1:
	movl	320(%rsp), %eax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$2, %ecx
	movl	%ecx, (%r14)
	movl	%ebp, %eax
	cltd
	idivl	%ecx
	movl	%eax, (%rbx)
	movl	(%r14), %ecx
	imull	%eax, %ecx
	cmpl	%ebp, %ecx
	jge	.LBB5_3
# %bb.2:
	incl	%eax
	movl	%eax, (%rbx)
.LBB5_3:
	addq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z11cuda_configiRiS_, .Lfunc_end5-_Z11cuda_configiRiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__binomial_kernelPfS_ii # -- Begin function _Z30__device_stub__binomial_kernelPfS_ii
	.type	_Z30__device_stub__binomial_kernelPfS_ii,@function
_Z30__device_stub__binomial_kernelPfS_ii: # @_Z30__device_stub__binomial_kernelPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15binomial_kernelPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z30__device_stub__binomial_kernelPfS_ii, .Lfunc_end6-_Z30__device_stub__binomial_kernelPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13binomial_cudaPfiii          # -- Begin function _Z13binomial_cudaPfiii
	.type	_Z13binomial_cudaPfiii,@function
_Z13binomial_cudaPfiii:                 # @_Z13binomial_cudaPfiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 1552
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movl	%esi, %r13d
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movl	%ecx, %r14d
	imull	%edx, %r14d
	movslq	%r14d, %rax
	shlq	$2, %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB7_2
# %bb.1:
	movq	%rbx, %r12
	jmp	.LBB7_3
.LBB7_2:
	movl	344(%rsp), %eax
	leal	3(%rax), %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	sarl	$2, %r12d
	movl	%r14d, %eax
	cltd
	idivl	%r12d
	movl	%r12d, %ecx
	imull	%eax, %ecx
	xorl	%edx, %edx
	cmpl	%r14d, %ecx
	setl	%dl
	addl	%eax, %edx
	orq	%rbx, %rdx
	orq	%rbx, %r12
	movq	%rdx, %rbx
.LBB7_3:                                # %_Z11cuda_configiRiS_.exit
	movl	$cuda_start, %edi
	callq	hipEventCreate
	movl	$cuda_stop, %edi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	movq	8(%rsp), %r14                   # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.22, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	cmpl	$2, %r13d
	jl	.LBB7_4
# %bb.5:                                # %.lr.ph.preheader
	leaq	24(%rsp), %r14
.LBB7_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_8
# %bb.7:                                #   in Loop: Header=BB7_6 Depth=1
	movq	24(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__binomial_kernelPfS_ii
.LBB7_8:                                #   in Loop: Header=BB7_6 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_10
# %bb.9:                                #   in Loop: Header=BB7_6 Depth=1
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__binomial_kernelPfS_ii
.LBB7_10:                               #   in Loop: Header=BB7_6 Depth=1
	leal	-2(%r13), %eax
	cmpl	$3, %r13d
	movl	%eax, %r13d
	jg	.LBB7_6
	jmp	.LBB7_11
.LBB7_4:
	movl	%r13d, %eax
	leaq	24(%rsp), %r14
.LBB7_11:                               # %._crit_edge
	cmpl	$1, %eax
	jne	.LBB7_15
# %bb.12:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_14
# %bb.13:
	movq	24(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__binomial_kernelPfS_ii
.LBB7_14:
	movq	%rsp, %r14
.LBB7_15:
	movl	$.L.str.23, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rsi
	movq	16(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.24, %edi
	callq	_Z9end_timerPc
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	cuda_start(%rip), %rdi
	callq	hipEventDestroy
	movq	cuda_stop(%rip), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rax
	addq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z13binomial_cudaPfiii, .Lfunc_end7-_Z13binomial_cudaPfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__binomial_kernelPsS_ii # -- Begin function _Z30__device_stub__binomial_kernelPsS_ii
	.type	_Z30__device_stub__binomial_kernelPsS_ii,@function
_Z30__device_stub__binomial_kernelPsS_ii: # @_Z30__device_stub__binomial_kernelPsS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15binomial_kernelPsS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z30__device_stub__binomial_kernelPsS_ii, .Lfunc_end8-_Z30__device_stub__binomial_kernelPsS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13binomial_cudaPsiii          # -- Begin function _Z13binomial_cudaPsiii
	.type	_Z13binomial_cudaPsiii,@function
_Z13binomial_cudaPsiii:                 # @_Z13binomial_cudaPsiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 1552
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movl	%esi, %r13d
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movl	%ecx, %r14d
	imull	%edx, %r14d
	movslq	%r14d, %rax
	addq	%rax, %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB9_2
# %bb.1:
	movq	%rbx, %r12
	jmp	.LBB9_3
.LBB9_2:
	movl	344(%rsp), %eax
	leal	3(%rax), %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	sarl	$2, %r12d
	movl	%r14d, %eax
	cltd
	idivl	%r12d
	movl	%r12d, %ecx
	imull	%eax, %ecx
	xorl	%edx, %edx
	cmpl	%r14d, %ecx
	setl	%dl
	addl	%eax, %edx
	orq	%rbx, %rdx
	orq	%rbx, %r12
	movq	%rdx, %rbx
.LBB9_3:                                # %_Z11cuda_configiRiS_.exit
	movl	$cuda_start, %edi
	callq	hipEventCreate
	movl	$cuda_stop, %edi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	movq	8(%rsp), %r14                   # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.22, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	cmpl	$2, %r13d
	jl	.LBB9_4
# %bb.5:                                # %.lr.ph.preheader
	leaq	24(%rsp), %r14
.LBB9_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_8
# %bb.7:                                #   in Loop: Header=BB9_6 Depth=1
	movq	24(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__binomial_kernelPsS_ii
.LBB9_8:                                #   in Loop: Header=BB9_6 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_10
# %bb.9:                                #   in Loop: Header=BB9_6 Depth=1
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__binomial_kernelPsS_ii
.LBB9_10:                               #   in Loop: Header=BB9_6 Depth=1
	leal	-2(%r13), %eax
	cmpl	$3, %r13d
	movl	%eax, %r13d
	jg	.LBB9_6
	jmp	.LBB9_11
.LBB9_4:
	movl	%r13d, %eax
	leaq	24(%rsp), %r14
.LBB9_11:                               # %._crit_edge
	cmpl	$1, %eax
	jne	.LBB9_15
# %bb.12:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_14
# %bb.13:
	movq	24(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__binomial_kernelPsS_ii
.LBB9_14:
	movq	%rsp, %r14
.LBB9_15:
	movl	$.L.str.23, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rsi
	movq	16(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.24, %edi
	callq	_Z9end_timerPc
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	cuda_start(%rip), %rdi
	callq	hipEventDestroy
	movq	cuda_stop(%rip), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rax
	addq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z13binomial_cudaPsiii, .Lfunc_end9-_Z13binomial_cudaPsiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gradient_kernelPfS_ii # -- Begin function _Z30__device_stub__gradient_kernelPfS_ii
	.type	_Z30__device_stub__gradient_kernelPfS_ii,@function
_Z30__device_stub__gradient_kernelPfS_ii: # @_Z30__device_stub__gradient_kernelPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gradient_kernelPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z30__device_stub__gradient_kernelPfS_ii, .Lfunc_end10-_Z30__device_stub__gradient_kernelPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13gradient_cudaPfii           # -- Begin function _Z13gradient_cudaPfii
	.type	_Z13gradient_cudaPfii,@function
_Z13gradient_cudaPfii:                  # @_Z13gradient_cudaPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 1552
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movl	%edx, 20(%rsp)                  # 4-byte Spill
	imull	%esi, %ebp
	movslq	%ebp, %r14
	shlq	$2, %r14
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB11_2
# %bb.1:
	movq	%r12, %r13
	jmp	.LBB11_3
.LBB11_2:
	movl	344(%rsp), %eax
	leal	3(%rax), %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$2, %r13d
	movl	%ebp, %eax
	cltd
	idivl	%r13d
	movl	%r13d, %ecx
	imull	%eax, %ecx
	xorl	%edx, %edx
	cmpl	%ebp, %ecx
	setl	%dl
	addl	%eax, %edx
	orq	%r12, %rdx
	orq	%r12, %r13
	movq	%rdx, %r12
.LBB11_3:                               # %_Z11cuda_configiRiS_.exit
	movl	$cuda_start, %edi
	callq	hipEventCreate
	movl	$cuda_stop, %edi
	callq	hipEventCreate
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.22, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_5
# %bb.4:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	callq	_Z30__device_stub__gradient_kernelPfS_ii
.LBB11_5:
	movl	$.L.str.23, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.24, %edi
	callq	_Z9end_timerPc
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rax
	addq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z13gradient_cudaPfii, .Lfunc_end11-_Z13gradient_cudaPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gradient_kernelPsS_ii # -- Begin function _Z30__device_stub__gradient_kernelPsS_ii
	.type	_Z30__device_stub__gradient_kernelPsS_ii,@function
_Z30__device_stub__gradient_kernelPsS_ii: # @_Z30__device_stub__gradient_kernelPsS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gradient_kernelPsS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z30__device_stub__gradient_kernelPsS_ii, .Lfunc_end12-_Z30__device_stub__gradient_kernelPsS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13gradient_cudaPsii           # -- Begin function _Z13gradient_cudaPsii
	.type	_Z13gradient_cudaPsii,@function
_Z13gradient_cudaPsii:                  # @_Z13gradient_cudaPsii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 1552
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movl	%edx, 20(%rsp)                  # 4-byte Spill
	imull	%esi, %ebp
	movslq	%ebp, %r14
	addq	%r14, %r14
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB13_2
# %bb.1:
	movq	%r12, %r13
	jmp	.LBB13_3
.LBB13_2:
	movl	344(%rsp), %eax
	leal	3(%rax), %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$2, %r13d
	movl	%ebp, %eax
	cltd
	idivl	%r13d
	movl	%r13d, %ecx
	imull	%eax, %ecx
	xorl	%edx, %edx
	cmpl	%ebp, %ecx
	setl	%dl
	addl	%eax, %edx
	orq	%r12, %rdx
	orq	%r12, %r13
	movq	%rdx, %r12
.LBB13_3:                               # %_Z11cuda_configiRiS_.exit
	movl	$cuda_start, %edi
	callq	hipEventCreate
	movl	$cuda_stop, %edi
	callq	hipEventCreate
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.22, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_5
# %bb.4:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	callq	_Z30__device_stub__gradient_kernelPsS_ii
.LBB13_5:
	movl	$.L.str.23, %edi
	callq	_Z9end_timerPc
	movq	cuda_start(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$.L.str.24, %edi
	callq	_Z9end_timerPc
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rax
	addq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z13gradient_cudaPsii, .Lfunc_end13-_Z13gradient_cudaPsii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB14_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB14_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15binomial_kernelPfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15binomial_kernelPsS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gradient_kernelPfS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gradient_kernelPsS_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end14:
	.size	__hip_module_ctor, .Lfunc_end14-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB15_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB15_2:
	retq
.Lfunc_end15:
	.size	__hip_module_dtor, .Lfunc_end15-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	cuda_start,@object              # @cuda_start
	.bss
	.globl	cuda_start
	.p2align	3, 0x0
cuda_start:
	.quad	0
	.size	cuda_start, 8

	.type	cuda_stop,@object               # @cuda_stop
	.globl	cuda_stop
	.p2align	3, 0x0
cuda_stop:
	.quad	0
	.size	cuda_stop, 8

	.type	cuda_time,@object               # @cuda_time
	.globl	cuda_time
	.p2align	2, 0x0
cuda_time:
	.long	0x00000000                      # float 0
	.size	cuda_time, 4

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"There are %d CUDA devices.\n"
	.size	.L.str, 28

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\nCUDA Device #%d\n"
	.size	.L.str.1, 18

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Major revision number:         %d\n"
	.size	.L.str.2, 35

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Minor revision number:         %d\n"
	.size	.L.str.3, 35

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Name:                          %s\n"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Total global memory:           %d\n"
	.size	.L.str.5, 35

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Total shared memory per block: %d\n"
	.size	.L.str.6, 35

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Total registers per block:     %d\n"
	.size	.L.str.7, 35

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Warp size:                     %d\n"
	.size	.L.str.8, 35

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Maximum memory pitch:          %d\n"
	.size	.L.str.9, 35

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Maximum threads per block:     %d\n"
	.size	.L.str.10, 35

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Maximum dimension %d of block:  %d\n"
	.size	.L.str.11, 36

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Maximum dimension %d of grid:   %d\n"
	.size	.L.str.12, 36

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Clock rate:                    %d\n"
	.size	.L.str.13, 35

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Total constant memory:         %d\n"
	.size	.L.str.14, 35

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Texture alignment:             %d\n"
	.size	.L.str.15, 35

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Concurrent copy and execution: %s\n"
	.size	.L.str.16, 35

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Yes"
	.size	.L.str.17, 4

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"No"
	.size	.L.str.18, 3

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Number of multiprocessors:     %d\n"
	.size	.L.str.19, 35

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Kernel execution timeout:      %s\n"
	.size	.L.str.20, 35

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"%s: %f\n"
	.size	.L.str.21, 8

	.type	_Z15binomial_kernelPfS_ii,@object # @_Z15binomial_kernelPfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z15binomial_kernelPfS_ii
	.p2align	3, 0x0
_Z15binomial_kernelPfS_ii:
	.quad	_Z30__device_stub__binomial_kernelPfS_ii
	.size	_Z15binomial_kernelPfS_ii, 8

	.type	.L.str.22,@object               # @.str.22
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.22:
	.asciz	"Copy memory to device"
	.size	.L.str.22, 22

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Run kernel"
	.size	.L.str.23, 11

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Copy memory from device"
	.size	.L.str.24, 24

	.type	_Z15binomial_kernelPsS_ii,@object # @_Z15binomial_kernelPsS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z15binomial_kernelPsS_ii
	.p2align	3, 0x0
_Z15binomial_kernelPsS_ii:
	.quad	_Z30__device_stub__binomial_kernelPsS_ii
	.size	_Z15binomial_kernelPsS_ii, 8

	.type	_Z15gradient_kernelPfS_ii,@object # @_Z15gradient_kernelPfS_ii
	.globl	_Z15gradient_kernelPfS_ii
	.p2align	3, 0x0
_Z15gradient_kernelPfS_ii:
	.quad	_Z30__device_stub__gradient_kernelPfS_ii
	.size	_Z15gradient_kernelPfS_ii, 8

	.type	_Z15gradient_kernelPsS_ii,@object # @_Z15gradient_kernelPsS_ii
	.globl	_Z15gradient_kernelPsS_ii
	.p2align	3, 0x0
_Z15gradient_kernelPsS_ii:
	.quad	_Z30__device_stub__gradient_kernelPsS_ii
	.size	_Z15gradient_kernelPsS_ii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15binomial_kernelPfS_ii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15binomial_kernelPsS_ii"
	.size	.L__unnamed_2, 26

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z15gradient_kernelPfS_ii"
	.size	.L__unnamed_3, 26

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15gradient_kernelPsS_ii"
	.size	.L__unnamed_4, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__binomial_kernelPfS_ii
	.addrsig_sym _Z30__device_stub__binomial_kernelPsS_ii
	.addrsig_sym _Z30__device_stub__gradient_kernelPfS_ii
	.addrsig_sym _Z30__device_stub__gradient_kernelPsS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym cuda_start
	.addrsig_sym cuda_stop
	.addrsig_sym cuda_time
	.addrsig_sym _Z15binomial_kernelPfS_ii
	.addrsig_sym _Z15binomial_kernelPsS_ii
	.addrsig_sym _Z15gradient_kernelPfS_ii
	.addrsig_sym _Z15gradient_kernelPsS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15binomial_kernelPfS_ii ; -- Begin function _Z15binomial_kernelPfS_ii
	.globl	_Z15binomial_kernelPfS_ii
	.p2align	8
	.type	_Z15binomial_kernelPfS_ii,@function
_Z15binomial_kernelPfS_ii:              ; @_Z15binomial_kernelPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_ashr_i32 s6, s2, 31
	v_ashrrev_i32_e32 v3, 31, v1
	s_add_i32 s4, s2, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s4, s4, s6
	v_add_nc_u32_e32 v4, v1, v3
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v3
	v_rcp_iflag_f32_e32 v0, v0
	v_xor_b32_e32 v3, s6, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s5, v0
	s_ashr_i32 s5, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s7, s3, s5
	s_xor_b32 s5, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v6, s5
	v_mul_hi_u32 v2, v0, v2
	s_sub_i32 s6, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_add_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v4, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_mul_lo_u32 v5, v2, s4
	v_sub_nc_u32_e32 v4, v4, v5
	v_add_nc_u32_e32 v5, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v7, s4, v4
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v7 :: v_dual_add_nc_u32 v5, 1, v2
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cvt_u32_f32_e32 v4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_mul_lo_u32 v5, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_sub_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v4, v5
	v_add3_u32 v6, s3, 1, v2
	v_mul_lo_u32 v5, v2, s2
	v_add_nc_u32_e32 v2, s3, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v3, v4, v3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v8, 31, v2
	v_add_nc_u32_e32 v9, -1, v2
	v_sub_nc_u32_e32 v1, v1, v5
	v_add_nc_u32_e32 v4, v6, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v2, v8
	v_add3_u32 v6, s2, 1, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v4, v7
	v_add_nc_u32_e32 v1, s2, v1
	v_xor_b32_e32 v2, v2, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v10, 31, v6
	v_mul_hi_u32 v13, v4, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v11, 31, v1
	v_mul_hi_u32 v14, v2, v3
	v_add_nc_u32_e32 v12, -1, v1
	v_add_nc_u32_e32 v6, v6, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v1, v1, v11
	v_mul_lo_u32 v13, v13, s5
	v_xor_b32_e32 v6, v6, v10
	v_mul_lo_u32 v14, v14, s5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v1, v1, v11
	v_ashrrev_i32_e32 v15, 31, v12
	v_mul_hi_u32 v16, v6, v0
	v_sub_nc_u32_e32 v4, v4, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v13, v1, v0
	v_sub_nc_u32_e32 v2, v2, v14
	v_add_nc_u32_e32 v12, v12, v15
	v_subrev_nc_u32_e32 v14, s5, v4
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v17, s5, v2
	v_mul_lo_u32 v16, v16, s4
	v_xor_b32_e32 v12, v12, v15
	v_cndmask_b32_e32 v4, v4, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_sub_nc_u32_e32 v6, v6, v16
	v_cndmask_b32_e32 v2, v2, v17, vcc_lo
	v_ashrrev_i32_e32 v5, 31, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v14, s5, v2
	v_add_nc_u32_e32 v9, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v9, v5
	v_mul_hi_u32 v3, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v3, s5
	v_sub_nc_u32_e32 v3, v9, v3
	v_mul_lo_u32 v9, v13, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v13, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_sub_nc_u32_e32 v1, v1, v9
	v_subrev_nc_u32_e32 v9, s5, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e32 v3, v3, v13, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	v_subrev_nc_u32_e32 v13, s4, v6
	v_subrev_nc_u32_e32 v16, s4, v1
	v_cndmask_b32_e32 v4, v4, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_subrev_nc_u32_e32 v9, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v4, v4, v7
	v_cndmask_b32_e32 v2, v2, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_sub_nc_u32_e32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v8
	v_cndmask_b32_e32 v6, v6, v13, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v1
	v_sub_nc_u32_e32 v2, v2, v8
	v_cndmask_b32_e32 v1, v1, v16, vcc_lo
	v_mul_hi_u32 v0, v12, v0
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v13, s4, v1
	v_cndmask_b32_e32 v3, v3, v9, vcc_lo
	v_subrev_nc_u32_e32 v9, s4, v6
	v_mul_lo_u32 v0, v0, s4
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v12, v0
	v_subrev_nc_u32_e32 v12, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v0, v0, v12, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_mul_lo_u32 v12, v4, s2
	v_subrev_nc_u32_e32 v7, s4, v0
	v_cndmask_b32_e32 v6, v6, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v1
	v_cndmask_b32_e32 v1, v1, v13, vcc_lo
	v_mul_lo_u32 v13, v2, s2
	v_sub_nc_u32_e32 v2, v3, v5
	v_xor_b32_e32 v3, v6, v10
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_xor_b32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v16, v2, s2
	v_sub_nc_u32_e32 v3, v3, v10
	v_cndmask_b32_e32 v0, v0, v7, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x0
	v_sub_nc_u32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v13, v3
	v_xor_b32_e32 v5, v0, v15
	v_add_nc_u32_e32 v0, v12, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v6, v1, v12
	v_add_nc_u32_e32 v8, v1, v13
	v_add_nc_u32_e32 v10, v1, v16
	v_add_nc_u32_e32 v4, v16, v3
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v2
	v_sub_nc_u32_e32 v15, v5, v15
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_ashrrev_i32_e32 v11, 31, v10
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v18, v[0:1], off
	global_load_b32 v19, v[2:3], off
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_nc_u32_e32 v12, v15, v12
	v_add_co_u32 v0, vcc_lo, s0, v6
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v20, v[4:5], off
	v_add_nc_u32_e32 v14, v15, v13
	v_ashrrev_i32_e32 v13, 31, v12
	global_load_b32 v21, v[0:1], off
	v_add_co_u32 v2, vcc_lo, s0, v8
	v_add_nc_u32_e32 v16, v15, v16
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v10
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v11, vcc_lo
	v_lshlrev_b64 v[4:5], 2, v[12:13]
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 2, v[14:15]
	s_clause 0x1
	global_load_b32 v12, v[2:3], off
	global_load_b32 v13, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s0, v4
	v_lshlrev_b64 v[10:11], 2, v[16:17]
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v4, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v11, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(7)
	v_fmac_f32_e32 v18, 2.0, v19
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v18, v20
	s_waitcnt vmcnt(5)
	v_fmac_f32_e32 v1, 2.0, v21
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, 4.0, v12
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v1, 2.0, v13
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v4
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v1, 2.0, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v1
	v_mul_f32_e32 v2, 0x3d800000, v0
	v_add_co_u32 v0, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15binomial_kernelPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15binomial_kernelPfS_ii, .Lfunc_end0-_Z15binomial_kernelPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1324
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15binomial_kernelPsS_ii ; -- Begin function _Z15binomial_kernelPsS_ii
	.globl	_Z15binomial_kernelPsS_ii
	.p2align	8
	.type	_Z15binomial_kernelPsS_ii,@function
_Z15binomial_kernelPsS_ii:              ; @_Z15binomial_kernelPsS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_ashr_i32 s6, s2, 31
	v_ashrrev_i32_e32 v3, 31, v1
	s_add_i32 s4, s2, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s4, s4, s6
	v_add_nc_u32_e32 v4, v1, v3
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v3
	v_rcp_iflag_f32_e32 v0, v0
	v_xor_b32_e32 v3, s6, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s5, v0
	s_ashr_i32 s5, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s7, s3, s5
	s_xor_b32 s5, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v6, s5
	v_mul_hi_u32 v2, v0, v2
	s_sub_i32 s6, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_add_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v4, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_mul_lo_u32 v5, v2, s4
	v_sub_nc_u32_e32 v4, v4, v5
	v_add_nc_u32_e32 v5, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v7, s4, v4
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v7 :: v_dual_add_nc_u32 v5, 1, v2
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cvt_u32_f32_e32 v4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_mul_lo_u32 v5, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_sub_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v4, v5
	v_add3_u32 v6, s3, 1, v2
	v_mul_lo_u32 v5, v2, s2
	v_add_nc_u32_e32 v2, s3, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v3, v4, v3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v8, 31, v2
	v_add_nc_u32_e32 v9, -1, v2
	v_sub_nc_u32_e32 v1, v1, v5
	v_add_nc_u32_e32 v4, v6, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v2, v8
	v_add3_u32 v6, s2, 1, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v4, v7
	v_add_nc_u32_e32 v1, s2, v1
	v_xor_b32_e32 v2, v2, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v10, 31, v6
	v_mul_hi_u32 v13, v4, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v11, 31, v1
	v_mul_hi_u32 v14, v2, v3
	v_add_nc_u32_e32 v12, -1, v1
	v_add_nc_u32_e32 v6, v6, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v1, v1, v11
	v_mul_lo_u32 v13, v13, s5
	v_xor_b32_e32 v6, v6, v10
	v_mul_lo_u32 v14, v14, s5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v1, v1, v11
	v_ashrrev_i32_e32 v15, 31, v12
	v_mul_hi_u32 v16, v6, v0
	v_sub_nc_u32_e32 v4, v4, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v13, v1, v0
	v_sub_nc_u32_e32 v2, v2, v14
	v_add_nc_u32_e32 v12, v12, v15
	v_subrev_nc_u32_e32 v14, s5, v4
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v17, s5, v2
	v_mul_lo_u32 v16, v16, s4
	v_xor_b32_e32 v12, v12, v15
	v_cndmask_b32_e32 v4, v4, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_sub_nc_u32_e32 v6, v6, v16
	v_cndmask_b32_e32 v2, v2, v17, vcc_lo
	v_ashrrev_i32_e32 v5, 31, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v14, s5, v2
	v_add_nc_u32_e32 v9, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v9, v5
	v_mul_hi_u32 v3, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v3, s5
	v_sub_nc_u32_e32 v3, v9, v3
	v_mul_lo_u32 v9, v13, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v13, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_sub_nc_u32_e32 v1, v1, v9
	v_subrev_nc_u32_e32 v9, s5, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e32 v3, v3, v13, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	v_subrev_nc_u32_e32 v13, s4, v6
	v_subrev_nc_u32_e32 v16, s4, v1
	v_cndmask_b32_e32 v4, v4, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_subrev_nc_u32_e32 v9, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v4, v4, v7
	v_cndmask_b32_e32 v2, v2, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_sub_nc_u32_e32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v8
	v_cndmask_b32_e32 v6, v6, v13, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v1
	v_sub_nc_u32_e32 v2, v2, v8
	v_cndmask_b32_e32 v1, v1, v16, vcc_lo
	v_mul_hi_u32 v0, v12, v0
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v13, s4, v1
	v_cndmask_b32_e32 v3, v3, v9, vcc_lo
	v_subrev_nc_u32_e32 v9, s4, v6
	v_mul_lo_u32 v0, v0, s4
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v12, v0
	v_subrev_nc_u32_e32 v12, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v0, v0, v12, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_mul_lo_u32 v12, v4, s2
	v_subrev_nc_u32_e32 v7, s4, v0
	v_cndmask_b32_e32 v6, v6, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v1
	v_cndmask_b32_e32 v1, v1, v13, vcc_lo
	v_mul_lo_u32 v13, v2, s2
	v_sub_nc_u32_e32 v2, v3, v5
	v_xor_b32_e32 v3, v6, v10
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_xor_b32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v16, v2, s2
	v_sub_nc_u32_e32 v3, v3, v10
	v_cndmask_b32_e32 v0, v0, v7, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x0
	v_sub_nc_u32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v13, v3
	v_xor_b32_e32 v5, v0, v15
	v_add_nc_u32_e32 v0, v12, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v6, v1, v12
	v_add_nc_u32_e32 v8, v1, v13
	v_add_nc_u32_e32 v10, v1, v16
	v_add_nc_u32_e32 v4, v16, v3
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v2
	v_sub_nc_u32_e32 v15, v5, v15
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 1, v[0:1]
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_nc_u32_e32 v12, v15, v12
	v_lshlrev_b64 v[4:5], 1, v[4:5]
	v_lshlrev_b64 v[6:7], 1, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_nc_u32_e32 v14, v15, v13
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[8:9], 1, v[8:9]
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_nc_u32_e32 v16, v15, v16
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_lshlrev_b64 v[10:11], 1, v[10:11]
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_lshlrev_b64 v[12:13], 1, v[12:13]
	v_add_co_u32 v18, vcc_lo, s0, v8
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_co_ci_u32_e32 v19, vcc_lo, s1, v9, vcc_lo
	v_lshlrev_b64 v[14:15], 1, v[14:15]
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	v_lshlrev_b64 v[16:17], 1, v[16:17]
	s_clause 0x5
	global_load_i16 v20, v[0:1], off
	global_load_i16 v21, v[2:3], off
	global_load_i16 v22, v[4:5], off
	global_load_i16 v6, v[6:7], off
	global_load_i16 v7, v[18:19], off
	global_load_i16 v10, v[10:11], off
	v_add_co_u32 v0, vcc_lo, s0, v12
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v13, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v15, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v16
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v17, vcc_lo
	s_clause 0x2
	global_load_i16 v0, v[0:1], off
	global_load_i16 v1, v[2:3], off
	global_load_i16 v2, v[4:5], off
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v3, 2, v7
	s_waitcnt vmcnt(3)
	v_add3_u32 v4, v6, v21, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v20, v22, v3
	s_waitcnt vmcnt(1)
	v_add_lshl_u32 v1, v4, v1, 1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v3, v0, v2
	v_add3_u32 v0, v0, v1, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshrrev_b32_e32 v1, 28, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v1
	v_lshrrev_b32_e32 v2, 4, v0
	v_add_co_u32 v0, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	global_store_b16 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15binomial_kernelPsS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15binomial_kernelPsS_ii, .Lfunc_end1-_Z15binomial_kernelPsS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1320
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15gradient_kernelPfS_ii ; -- Begin function _Z15gradient_kernelPfS_ii
	.globl	_Z15gradient_kernelPfS_ii
	.p2align	8
	.type	_Z15gradient_kernelPfS_ii,@function
_Z15gradient_kernelPfS_ii:              ; @_Z15gradient_kernelPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_ashr_i32 s6, s2, 31
	v_ashrrev_i32_e32 v3, 31, v1
	s_add_i32 s4, s2, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s4, s4, s6
	v_add_nc_u32_e32 v4, v1, v3
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v3
	v_rcp_iflag_f32_e32 v0, v0
	v_xor_b32_e32 v3, s6, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s5, v0
	s_ashr_i32 s5, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s7, s3, s5
	s_xor_b32 s5, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v6, s5
	v_mul_hi_u32 v2, v0, v2
	s_sub_i32 s6, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_add_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v4, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_mul_lo_u32 v5, v2, s4
	v_sub_nc_u32_e32 v4, v4, v5
	v_add_nc_u32_e32 v5, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v7, s4, v4
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v7 :: v_dual_add_nc_u32 v5, 1, v2
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cvt_u32_f32_e32 v4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_mul_lo_u32 v5, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_sub_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v4, v5
	v_add3_u32 v6, s3, 1, v2
	v_mul_lo_u32 v5, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, v4, v3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v5
	v_add_nc_u32_e32 v4, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v6, s2, 1, v1
	v_xor_b32_e32 v4, v4, v7
	v_add3_u32 v10, s2, -1, v1
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v11, 31, v6
	v_mul_hi_u32 v14, v4, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v12, 31, v10
	v_ashrrev_i32_e32 v13, 31, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v6, v11
	v_add_nc_u32_e32 v10, v10, v12
	v_mul_lo_u32 v14, v14, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v6, v6, v11
	v_xor_b32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v16, v6, v0
	v_sub_nc_u32_e32 v4, v4, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v10, v0
	v_subrev_nc_u32_e32 v14, s5, v4
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v14 :: v_dual_add_nc_u32 v1, v1, v13
	v_xor_b32_e32 v1, v1, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v1, v0
	v_mul_lo_u32 v0, v0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v1, v0
	v_subrev_nc_u32_e32 v1, s5, v4
	v_add_nc_u32_e32 v2, s3, v2
	v_ashrrev_i32_e32 v8, 31, v2
	v_add_nc_u32_e32 v9, -1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v8
	v_xor_b32_e32 v2, v2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v2, v3
	v_mul_lo_u32 v15, v15, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v15
	v_mul_lo_u32 v15, v16, s4
	v_subrev_nc_u32_e32 v16, s5, v2
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v6, v6, v15
	v_cndmask_b32_e32 v2, v2, v16, vcc_lo
	v_ashrrev_i32_e32 v5, 31, v9
	v_subrev_nc_u32_e32 v16, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v9, v5
	v_xor_b32_e32 v9, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v9, v3
	v_mul_lo_u32 v3, v3, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v9, v3
	v_mul_lo_u32 v9, v17, s4
	v_subrev_nc_u32_e32 v14, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v9, v10, v9
	v_subrev_nc_u32_e32 v10, s5, v2
	v_cndmask_b32_e32 v3, v3, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	v_subrev_nc_u32_e32 v14, s4, v6
	v_subrev_nc_u32_e32 v15, s4, v9
	v_cndmask_b32_e32 v1, v4, v1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_subrev_nc_u32_e32 v4, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v1, v1, v7
	v_cndmask_b32_e32 v2, v2, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_sub_nc_u32_e32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v2, v2, v8
	v_cndmask_b32_e32 v6, v6, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v9
	v_mul_lo_u32 v1, v1, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v8
	v_cndmask_b32_e32 v9, v9, v15, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_subrev_nc_u32_e32 v10, s4, v9
	v_cndmask_b32_e32 v0, v0, v16, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_mul_lo_u32 v16, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v14, s4, v0
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s4, v6
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, v6, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v9
	v_sub_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v4, v11
	v_cndmask_b32_e32 v6, v9, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_mul_lo_u32 v3, v3, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_sub_nc_u32_e32 v4, v4, v11
	v_xor_b32_e32 v2, v6, v12
	v_cndmask_b32_e32 v0, v0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v2, v12
	v_xor_b32_e32 v0, v0, v13
	v_add_nc_u32_e32 v2, v16, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v5, v1
	v_sub_nc_u32_e32 v17, v0, v13
	v_add_nc_u32_e32 v0, v1, v4
	v_add_nc_u32_e32 v4, v3, v4
	v_add_nc_u32_e32 v10, v5, v3
	v_add_nc_u32_e32 v8, v5, v16
	v_add_nc_u32_e32 v12, v17, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v14, v17, v3
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_ashrrev_i32_e32 v9, 31, v8
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v12, vcc_lo, s0, v12
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v13, vcc_lo
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_ashrrev_i32_e32 v11, 31, v10
	s_clause 0x2
	global_load_b32 v18, v[0:1], off
	global_load_b32 v19, v[2:3], off
	global_load_b32 v12, v[12:13], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v0, vcc_lo, s0, v8
	s_clause 0x1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v15, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v11, vcc_lo
	s_clause 0x2
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[2:3], off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(6)
	v_fma_f32 v3, 2.0, v19, v18
	s_waitcnt vmcnt(5)
	v_fmac_f32_e32 v18, 2.0, v12
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v3, v3, v8 :: v_dual_add_f32 v4, v6, v18
	v_dual_sub_f32 v3, v3, v6 :: v_dual_sub_f32 v4, v4, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v3, -2.0, v0 :: v_dual_fmac_f32 v4, -2.0, v1
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v1, v3, v2 :: v_dual_add_nc_u32 v0, v17, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v2, v4, v2
	v_cmp_gt_f32_e32 vcc_lo, 0, v1
	v_cndmask_b32_e64 v3, v1, -v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e32 vcc_lo, 0, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_cndmask_b32_e64 v2, v2, -v2, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v3, v2
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_mul_f32_e32 v2, 0x3e000000, v2
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gradient_kernelPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15gradient_kernelPfS_ii, .Lfunc_end2-_Z15gradient_kernelPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1360
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15gradient_kernelPsS_ii ; -- Begin function _Z15gradient_kernelPsS_ii
	.globl	_Z15gradient_kernelPsS_ii
	.p2align	8
	.type	_Z15gradient_kernelPsS_ii,@function
_Z15gradient_kernelPsS_ii:              ; @_Z15gradient_kernelPsS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_ashr_i32 s6, s2, 31
	v_ashrrev_i32_e32 v3, 31, v1
	s_add_i32 s4, s2, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s4, s4, s6
	v_add_nc_u32_e32 v4, v1, v3
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v3
	v_rcp_iflag_f32_e32 v0, v0
	v_xor_b32_e32 v3, s6, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s5, v0
	s_ashr_i32 s5, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s7, s3, s5
	s_xor_b32 s5, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v6, s5
	v_mul_hi_u32 v2, v0, v2
	s_sub_i32 s6, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_add_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v4, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_mul_lo_u32 v5, v2, s4
	v_sub_nc_u32_e32 v4, v4, v5
	v_add_nc_u32_e32 v5, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v7, s4, v4
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v7 :: v_dual_add_nc_u32 v5, 1, v2
	v_cmp_le_u32_e32 vcc_lo, s4, v4
	v_cvt_u32_f32_e32 v4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_mul_lo_u32 v5, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_sub_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v4, v5
	v_add3_u32 v6, s3, 1, v2
	v_mul_lo_u32 v5, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, v4, v3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v5
	v_add_nc_u32_e32 v4, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v6, s2, 1, v1
	v_xor_b32_e32 v4, v4, v7
	v_add3_u32 v10, s2, -1, v1
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v11, 31, v6
	v_mul_hi_u32 v14, v4, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v12, 31, v10
	v_ashrrev_i32_e32 v13, 31, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v6, v11
	v_add_nc_u32_e32 v10, v10, v12
	v_mul_lo_u32 v14, v14, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v6, v6, v11
	v_xor_b32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v16, v6, v0
	v_sub_nc_u32_e32 v4, v4, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v10, v0
	v_subrev_nc_u32_e32 v14, s5, v4
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v14 :: v_dual_add_nc_u32 v1, v1, v13
	v_xor_b32_e32 v1, v1, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v1, v0
	v_mul_lo_u32 v0, v0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v1, v0
	v_subrev_nc_u32_e32 v1, s5, v4
	v_add_nc_u32_e32 v2, s3, v2
	v_ashrrev_i32_e32 v8, 31, v2
	v_add_nc_u32_e32 v9, -1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v8
	v_xor_b32_e32 v2, v2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v2, v3
	v_mul_lo_u32 v15, v15, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v15
	v_mul_lo_u32 v15, v16, s4
	v_subrev_nc_u32_e32 v16, s5, v2
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v6, v6, v15
	v_cndmask_b32_e32 v2, v2, v16, vcc_lo
	v_ashrrev_i32_e32 v5, 31, v9
	v_subrev_nc_u32_e32 v16, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v9, v5
	v_xor_b32_e32 v9, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v9, v3
	v_mul_lo_u32 v3, v3, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v9, v3
	v_mul_lo_u32 v9, v17, s4
	v_subrev_nc_u32_e32 v14, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v9, v10, v9
	v_subrev_nc_u32_e32 v10, s5, v2
	v_cndmask_b32_e32 v3, v3, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	v_subrev_nc_u32_e32 v14, s4, v6
	v_subrev_nc_u32_e32 v15, s4, v9
	v_cndmask_b32_e32 v1, v4, v1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_subrev_nc_u32_e32 v4, s5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v1, v1, v7
	v_cndmask_b32_e32 v2, v2, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_sub_nc_u32_e32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v2, v2, v8
	v_cndmask_b32_e32 v6, v6, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v9
	v_mul_lo_u32 v1, v1, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v8
	v_cndmask_b32_e32 v9, v9, v15, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_subrev_nc_u32_e32 v10, s4, v9
	v_cndmask_b32_e32 v0, v0, v16, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_mul_lo_u32 v16, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v14, s4, v0
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s4, v6
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, v6, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v9
	v_sub_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v4, v11
	v_cndmask_b32_e32 v6, v9, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_mul_lo_u32 v3, v3, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_sub_nc_u32_e32 v4, v4, v11
	v_xor_b32_e32 v2, v6, v12
	v_cndmask_b32_e32 v0, v0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v2, v12
	v_xor_b32_e32 v0, v0, v13
	v_add_nc_u32_e32 v2, v16, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v5, v1
	v_sub_nc_u32_e32 v17, v0, v13
	v_add_nc_u32_e32 v0, v1, v4
	v_add_nc_u32_e32 v4, v3, v4
	v_add_nc_u32_e32 v10, v5, v3
	v_add_nc_u32_e32 v8, v5, v16
	v_add_nc_u32_e32 v12, v17, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v14, v17, v3
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[0:1], 1, v[0:1]
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_lshlrev_b64 v[4:5], 1, v[4:5]
	v_lshlrev_b64 v[6:7], 1, v[6:7]
	v_ashrrev_i32_e32 v11, 31, v10
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[8:9], 1, v[8:9]
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_lshlrev_b64 v[10:11], 1, v[10:11]
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_lshlrev_b64 v[12:13], 1, v[12:13]
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_lshlrev_b64 v[14:15], 1, v[14:15]
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	v_add_co_u32 v12, vcc_lo, s0, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v13, vcc_lo
	v_add_co_u32 v14, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s1, v15, vcc_lo
	s_clause 0x7
	global_load_i16 v0, v[0:1], off
	global_load_i16 v1, v[4:5], off
	global_load_i16 v4, v[6:7], off
	global_load_i16 v5, v[10:11], off
	global_load_i16 v2, v[2:3], off
	global_load_i16 v3, v[8:9], off
	global_load_i16 v6, v[12:13], off
	global_load_i16 v7, v[14:15], off
	s_waitcnt vmcnt(6)
	v_add_nc_u32_e32 v8, v1, v0
	s_waitcnt vmcnt(5)
	v_add_nc_u32_e32 v0, v0, v4
	s_waitcnt vmcnt(4)
	v_add_nc_u32_e32 v1, v1, v5
	v_add_nc_u32_e32 v9, v4, v5
	s_waitcnt vmcnt(2)
	v_sub_nc_u32_e32 v2, v2, v3
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v3, v6, v7
	v_sub_nc_u32_e32 v0, v0, v1
	v_sub_nc_u32_e32 v4, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v1, v2, 1, v4
	v_lshl_add_u32 v2, v3, 1, v0
	v_add_nc_u32_e32 v0, v17, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, 0, v1
	v_sub_nc_u32_e32 v4, 0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_max_i32_e32 v3, v1, v3
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max_i32_e32 v2, v2, v4
	v_lshlrev_b64 v[0:1], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v3
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshrrev_b32_e32 v2, 3, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b16 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gradient_kernelPsS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15gradient_kernelPsS_ii, .Lfunc_end3-_Z15gradient_kernelPsS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1344
; NumSgprs: 18
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15binomial_kernelPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15binomial_kernelPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15binomial_kernelPsS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15binomial_kernelPsS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15gradient_kernelPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15gradient_kernelPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15gradient_kernelPsS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15gradient_kernelPsS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
