
#include <stdio.h>
#include <assert.h>
#include <iostream>
#include <cuda.h>
#include <cuda_runtime.h>
#include <limits>

#ifndef MAX
#define MAX(a,b) (a > b ? a : b)
#endif

__global__ void vectorAddGPU(float *a, float *b, float *c, int N, int offset)
{
    int idx = blockIdx.x*blockDim.x + threadIdx.x;
    
    if (idx < N)
    {
        c[offset + idx] = a[offset + idx] + b[offset + idx];
    }
}

int check(float *a, float *b, float *c, int size) {
    for (int i = 0; i < size; ++i) {
        if (std::fabs(c[i] - (a[i] + b[i])) > std::numeric_limits<double>::epsilon()) {
            return 0;
        }
    }
    return 1;
}

void sample_vec_add(int size = 1048576)
{
    int n = size;
    
    int nBytes = n*sizeof(int);
    
    float *a, *b;  // host data
    float *c;  // results
    
    a = (float *)malloc(nBytes);
    b = (float *)malloc(nBytes);
    c = (float *)malloc(nBytes);
    
    float *a_d,*b_d,*c_d;
    
    dim3 block(256);
    dim3 grid((unsigned int)ceil(n/(float)block.x));
    
    for(int i=0;i<n;i++)
    {
        a[i] = rand() / (float)RAND_MAX;
        b[i] = rand() / (float)RAND_MAX;
        c[i] = 0;
    }
    
    printf("Allocating device memory on host..\n");
    
    cudaMalloc((void **)&a_d,n*sizeof(float));
    cudaMalloc((void **)&b_d,n*sizeof(float));
    cudaMalloc((void **)&c_d,n*sizeof(float));
    
    printf("Copying to device..\n");
    
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    
    cudaEventRecord(start);
    
    cudaMemcpy(a_d,a,n*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(b_d,b,n*sizeof(float), cudaMemcpyHostToDevice);
    
    printf("Doing GPU Vector add\n");
    
    vectorAddGPU<<<grid, block>>>(a_d, b_d, c_d, n, 0);
    cudaMemcpy(c,c_d,n*sizeof(float), cudaMemcpyDeviceToHost);
    cudaEventRecord(stop);
    cudaEventSynchronize(stop);
    float milliseconds = 0;
    cudaEventElapsedTime(&milliseconds, start, stop);
    printf("GPU time: %f ms\n", milliseconds);
    
    cudaDeviceSynchronize();

    int res = check(a, b, c, n);
    if (res) {
        std::cout << "Correct result" << std::endl;
    } else {
        std::cout << "Not correct result" << std::endl;
    }
    
    cudaFree(a_d);
    cudaFree(b_d);
    cudaFree(c_d);
}

void streams_vec_add(int n_streams, int size = 1048576)
{
    int n = size;
    
    float *a, *b;  // host data
    float *c;  // results
    
    cudaHostAlloc( (void**) &a, n * sizeof(float) ,cudaHostAllocDefault );
    cudaHostAlloc( (void**) &b, n * sizeof(float) ,cudaHostAllocDefault );
    cudaHostAlloc( (void**) &c, n * sizeof(float) ,cudaHostAllocDefault );
    
    float *a_d,*b_d,*c_d;
    
    for(int i=0;i<n;i++)
    {
        a[i] = rand() / (float)RAND_MAX;
        b[i] = rand() / (float)RAND_MAX;
        c[i] = 0;
    }
    
    printf("Allocating device memory on host..\n");

    cudaMalloc((void **)&a_d,n*sizeof(float));
    cudaMalloc((void **)&b_d,n*sizeof(float));
    cudaMalloc((void **)&c_d,n*sizeof(float));
    
    printf("Copying to device..\n");
    
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    
    cudaEventRecord(start);
    
    printf("Doing GPU-stream Vector add\n");
    
    
    const int NbStreams = n_streams;
    const int StreamSize = n / NbStreams;
    cudaStream_t Stream[NbStreams];
    for ( int i = 0; i < NbStreams; i++ )
        cudaStreamCreate(&Stream[i]);
    

    for ( int i = 0; i < NbStreams; i++ )
    {
        int Offset = i * StreamSize;
        
        cudaMemcpyAsync(&a_d[Offset], &a[Offset], StreamSize * sizeof(float), cudaMemcpyHostToDevice, Stream[ i ]);
        cudaMemcpyAsync(&b_d[Offset], &b[Offset], StreamSize * sizeof(float), cudaMemcpyHostToDevice, Stream[ i ]);
        cudaMemcpyAsync(&c_d[Offset], &c[Offset], StreamSize * sizeof(float), cudaMemcpyHostToDevice, Stream[ i ]);
        
        dim3 block(1024);
        dim3 grid((StreamSize - 1)/1024 + 1);
        vectorAddGPU<<<grid, block, 0, Stream[i]>>>(a_d, b_d, c_d, StreamSize, Offset);
    
        cudaMemcpyAsync(&a[Offset], &a_d[Offset], StreamSize * sizeof(float), cudaMemcpyDeviceToHost, Stream[ i ]);
        cudaMemcpyAsync(&b[Offset], &b_d[Offset], StreamSize * sizeof(float), cudaMemcpyDeviceToHost, Stream[ i ]);
        cudaMemcpyAsync(&c[Offset], &c_d[Offset], StreamSize * sizeof(float), cudaMemcpyDeviceToHost, Stream[ i ]);

    }
    
    cudaEventRecord(stop);
    cudaEventSynchronize(stop);
    float milliseconds = 0;
    cudaEventElapsedTime(&milliseconds, start, stop);
    std::cout << "STREAMS NUMBERS: " << NbStreams << std::endl;
    printf("GPU-stream time: %f ms\n", milliseconds);
    
    cudaDeviceSynchronize();
    int res = check(a, b, c, n);
    if (res) {
        std::cout << "Correct result" << std::endl;
    } else {
        std::cout << "Not correct result" << std::endl;
    }
    
    cudaFree(a_d);
    cudaFree(b_d);
    cudaFree(c_d);
    
    cudaFreeHost(a);
    cudaFreeHost(b);
    cudaFreeHost(c);
}


int main(int argc, char **argv)
{
    sample_vec_add(atoi(argv[1]));
    sample_vec_add(atoi(argv[1]));
    int n_streams = (argc == 3) ? atoi(argv[2]) : 8;
    std::cout << "=================================================" << std::endl;
    std::cout << "STREAMS NUMBERS: " << n_streams << std::endl;
    streams_vec_add(n_streams, atoi(argv[1]));

    return 0;
}

	.file	"tmpxft_002bcfea_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4295:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4295:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z5checkPfS_S_i
	.type	_Z5checkPfS_S_i, @function
_Z5checkPfS_S_i:
.LFB3635:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movss	.LC0(%rip), %xmm2
.L4:
	cmpl	%eax, %ecx
	jle	.L9
	movss	(%rdi,%rax,4), %xmm1
	addss	(%rsi,%rax,4), %xmm1
	movss	(%rdx,%rax,4), %xmm0
	incq	%rax
	subss	%xmm1, %xmm0
	andps	%xmm2, %xmm0
	comiss	.LC1(%rip), %xmm0
	jbe	.L4
	xorl	%eax, %eax
	ret
.L9:
	movl	$1, %eax
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z5checkPfS_S_i, .-_Z5checkPfS_S_i
	.globl	_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii
	.type	_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii, @function
_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12vectorAddGPUPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii, .-_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii
	.globl	_Z12vectorAddGPUPfS_S_ii
	.type	_Z12vectorAddGPUPfS_S_ii, @function
_Z12vectorAddGPUPfS_S_ii:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE3664:
	.size	_Z12vectorAddGPUPfS_S_ii, .-_Z12vectorAddGPUPfS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"Allocating device memory on host..\n"
.LC6:
	.string	"Copying to device..\n"
.LC7:
	.string	"Doing GPU Vector add\n"
.LC8:
	.string	"GPU time: %f ms\n"
.LC9:
	.string	"Correct result"
.LC10:
	.string	"Not correct result"
	.text
	.globl	_Z14sample_vec_addi
	.type	_Z14sample_vec_addi, @function
_Z14sample_vec_addi:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movabsq	$4294967297, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%edi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leal	0(,%rbp,4), %r14d
	movq	%rbp, %rbx
	movslq	%r14d, %r14
	movq	%r14, %rdi
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	cvtsi2ssl	%ebp, %xmm0
	movq	%r15, 52(%rsp)
	mulss	.LC2(%rip), %xmm0
	movq	%rax, %r14
	call	ceilf@PLT
	movq	%r15, 64(%rsp)
	xorl	%r15d, %r15d
	cvttss2siq	%xmm0, %rax
	movl	%eax, 60(%rsp)
.L16:
	cmpl	%r15d, %ebx
	jle	.L24
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, (%r12,%r15,4)
	call	rand@PLT
	movl	$0x00000000, (%r14,%r15,4)
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, 0(%r13,%r15,4)
	incq	%r15
	jmp	.L16
.L24:
	salq	$2, %rbp
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movl	$256, 48(%rsp)
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	xorl	%r8d, %r8d
	movl	%ebx, %ecx
	movq	8(%rsp), %rdi
	call	_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii
.L18:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	movq	%r13, %rsi
	movq	%r12, %rdi
	movl	%ebx, %ecx
	movq	%r14, %rdx
	call	_Z5checkPfS_S_i
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	testl	%eax, %eax
	jne	.L23
	leaq	.LC10(%rip), %rsi
.L23:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z14sample_vec_addi, .-_Z14sample_vec_addi
	.section	.rodata.str1.1
.LC11:
	.string	"Doing GPU-stream Vector add\n"
.LC12:
	.string	"STREAMS NUMBERS: "
.LC13:
	.string	"GPU-stream time: %f ms\n"
	.text
	.globl	_Z15streams_vec_addii
	.type	_Z15streams_vec_addii, @function
_Z15streams_vec_addii:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edx, %edx
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_offset 12, -48
	movl	%edi, %r12d
	leaq	-144(%rbp), %rdi
	pushq	%rbx
	.cfi_offset 3, -56
	movslq	%esi, %rbx
	salq	$2, %rbx
	subq	$136, %rsp
	movl	%esi, -156(%rbp)
	movq	%rbx, %rsi
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	call	cudaHostAlloc@PLT
	leaq	-136(%rbp), %rdi
	xorl	%edx, %edx
	movq	%rbx, %rsi
	call	cudaHostAlloc@PLT
	leaq	-128(%rbp), %rdi
	xorl	%edx, %edx
	movq	%rbx, %rsi
	call	cudaHostAlloc@PLT
.L26:
	cmpl	%r13d, -156(%rbp)
	jle	.L44
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movq	-144(%rbp), %rax
	movss	%xmm0, (%rax,%r13,4)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movq	-136(%rbp), %rax
	movss	%xmm0, (%rax,%r13,4)
	movq	-128(%rbp), %rax
	movl	$0x00000000, (%rax,%r13,4)
	incq	%r13
	jmp	.L26
.L44:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	-120(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-112(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-104(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	-96(%rbp), %rdi
	call	cudaEventCreate@PLT
	leaq	-88(%rbp), %rdi
	call	cudaEventCreate@PLT
	movq	-96(%rbp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	-156(%rbp), %eax
	movq	%rsp, %rcx
	cltd
	idivl	%r12d
	movl	%eax, %r14d
	movslq	%r12d, %rax
	leaq	15(,%rax,8), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L28:
	cmpq	%rcx, %rsp
	je	.L29
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L28
.L29:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L30
	orq	$0, -8(%rsp,%rax)
.L30:
	movq	%rsp, %r13
	xorl	%ebx, %ebx
	movq	%r13, %r15
.L31:
	cmpl	%r12d, %ebx
	jge	.L45
	movq	%r15, %rdi
	incl	%ebx
	addq	$8, %r15
	call	cudaStreamCreate@PLT
	jmp	.L31
.L45:
	movslq	%r14d, %rax
	movl	$1024, %ecx
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	salq	$2, %rax
	movq	%rax, -152(%rbp)
	leal	-1(%r14), %eax
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, -164(%rbp)
	xorl	%eax, %eax
	movl	%eax, -160(%rbp)
.L33:
	cmpl	%ebx, %r12d
	jle	.L46
	movq	-144(%rbp), %rsi
	movq	-120(%rbp), %rdi
	movl	$1, %ecx
	movq	0(%r13,%rbx,8), %r8
	movq	-152(%rbp), %rdx
	addq	%r15, %rsi
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movq	-136(%rbp), %rsi
	movq	-112(%rbp), %rdi
	movl	$1, %ecx
	movq	0(%r13,%rbx,8), %r8
	movq	-152(%rbp), %rdx
	addq	%r15, %rsi
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movq	-128(%rbp), %rsi
	movq	-104(%rbp), %rdi
	movl	$1, %ecx
	movq	0(%r13,%rbx,8), %r8
	movq	-152(%rbp), %rdx
	addq	%r15, %rsi
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movl	$4194305, %eax
	movl	$4194305, %edx
	xorl	%r8d, %r8d
	salq	$10, %rax
	movq	0(%r13,%rbx,8), %r9
	salq	$10, %rdx
	movl	$1, %ecx
	movq	%rax, -80(%rbp)
	movl	-164(%rbp), %eax
	movl	$1, -72(%rbp)
	movl	%eax, -68(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -64(%rbp)
	movq	-68(%rbp), %rdi
	movl	-60(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movl	-160(%rbp), %r8d
	movq	-104(%rbp), %rdx
	movl	%r14d, %ecx
	movq	-112(%rbp), %rsi
	movq	-120(%rbp), %rdi
	call	_Z38__device_stub__Z12vectorAddGPUPfS_S_iiPfS_S_ii
.L34:
	movq	-120(%rbp), %rsi
	movq	-144(%rbp), %rdi
	movl	$2, %ecx
	movq	0(%r13,%rbx,8), %r8
	movq	-152(%rbp), %rdx
	addq	%r15, %rsi
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movq	-112(%rbp), %rsi
	movq	-136(%rbp), %rdi
	movl	$2, %ecx
	movq	0(%r13,%rbx,8), %r8
	movq	-152(%rbp), %rdx
	addq	%r15, %rsi
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movq	-104(%rbp), %rsi
	movq	-128(%rbp), %rdi
	movl	$2, %ecx
	movq	0(%r13,%rbx,8), %r8
	movq	-152(%rbp), %rdx
	incq	%rbx
	addq	%r15, %rsi
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movq	-152(%rbp), %rax
	addl	%r14d, -160(%rbp)
	addq	%rax, %r15
	jmp	.L33
.L46:
	movq	-88(%rbp), %rdi
	xorl	%esi, %esi
	leaq	_ZSt4cout(%rip), %rbx
	call	cudaEventRecord@PLT
	movq	-88(%rbp), %rdi
	call	cudaEventSynchronize@PLT
	movq	-88(%rbp), %rdx
	movq	-96(%rbp), %rsi
	leaq	-68(%rbp), %rdi
	movl	$0x00000000, -68(%rbp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	-68(%rbp), %xmm0
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	movq	-136(%rbp), %rsi
	movq	-128(%rbp), %rdx
	movl	-156(%rbp), %ecx
	movq	-144(%rbp), %rdi
	call	_Z5checkPfS_S_i
	leaq	.LC9(%rip), %rsi
	testl	%eax, %eax
	jne	.L43
	leaq	.LC10(%rip), %rsi
.L43:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	-120(%rbp), %rdi
	call	cudaFree@PLT
	movq	-112(%rbp), %rdi
	call	cudaFree@PLT
	movq	-104(%rbp), %rdi
	call	cudaFree@PLT
	movq	-144(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-136(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-128(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z15streams_vec_addii, .-_Z15streams_vec_addii
	.section	.rodata.str1.1
.LC14:
	.string	"================================================="
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	$8, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movl	%eax, %edi
	call	_Z14sample_vec_addi
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %edi
	call	_Z14sample_vec_addi
	cmpl	$3, %r12d
	jne	.L48
	movq	16(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
.L48:
	leaq	_ZSt4cout(%rip), %r12
	leaq	.LC14(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r12, %rdi
	leaq	.LC12(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%ebp, %edi
	movl	%eax, %esi
	call	_Z15streams_vec_addii
	popq	%rbx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z12vectorAddGPUPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12vectorAddGPUPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC0:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	629145600
	.align 4
.LC2:
	.long	998244352
	.align 4
.LC3:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <stdio.h>
#include <assert.h>
#include <iostream>
#include <hip/hip_runtime.h>

#include <limits>

#ifndef MAX
#define MAX(a,b) (a > b ? a : b)
#endif

__global__ void vectorAddGPU(float *a, float *b, float *c, int N, int offset)
{
    int idx = blockIdx.x*blockDim.x + threadIdx.x;
    
    if (idx < N)
    {
        c[offset + idx] = a[offset + idx] + b[offset + idx];
    }
}

int check(float *a, float *b, float *c, int size) {
    for (int i = 0; i < size; ++i) {
        if (std::fabs(c[i] - (a[i] + b[i])) > std::numeric_limits<double>::epsilon()) {
            return 0;
        }
    }
    return 1;
}

void sample_vec_add(int size = 1048576)
{
    int n = size;
    
    int nBytes = n*sizeof(int);
    
    float *a, *b;  // host data
    float *c;  // results
    
    a = (float *)malloc(nBytes);
    b = (float *)malloc(nBytes);
    c = (float *)malloc(nBytes);
    
    float *a_d,*b_d,*c_d;
    
    dim3 block(256);
    dim3 grid((unsigned int)ceil(n/(float)block.x));
    
    for(int i=0;i<n;i++)
    {
        a[i] = rand() / (float)RAND_MAX;
        b[i] = rand() / (float)RAND_MAX;
        c[i] = 0;
    }
    
    printf("Allocating device memory on host..\n");
    
    hipMalloc((void **)&a_d,n*sizeof(float));
    hipMalloc((void **)&b_d,n*sizeof(float));
    hipMalloc((void **)&c_d,n*sizeof(float));
    
    printf("Copying to device..\n");
    
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    
    hipEventRecord(start);
    
    hipMemcpy(a_d,a,n*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(b_d,b,n*sizeof(float), hipMemcpyHostToDevice);
    
    printf("Doing GPU Vector add\n");
    
    vectorAddGPU<<<grid, block>>>(a_d, b_d, c_d, n, 0);
    hipMemcpy(c,c_d,n*sizeof(float), hipMemcpyDeviceToHost);
    hipEventRecord(stop);
    hipEventSynchronize(stop);
    float milliseconds = 0;
    hipEventElapsedTime(&milliseconds, start, stop);
    printf("GPU time: %f ms\n", milliseconds);
    
    hipDeviceSynchronize();

    int res = check(a, b, c, n);
    if (res) {
        std::cout << "Correct result" << std::endl;
    } else {
        std::cout << "Not correct result" << std::endl;
    }
    
    hipFree(a_d);
    hipFree(b_d);
    hipFree(c_d);
}

void streams_vec_add(int n_streams, int size = 1048576)
{
    int n = size;
    
    float *a, *b;  // host data
    float *c;  // results
    
    hipHostAlloc( (void**) &a, n * sizeof(float) ,hipHostMallocDefault );
    hipHostAlloc( (void**) &b, n * sizeof(float) ,hipHostMallocDefault );
    hipHostAlloc( (void**) &c, n * sizeof(float) ,hipHostMallocDefault );
    
    float *a_d,*b_d,*c_d;
    
    for(int i=0;i<n;i++)
    {
        a[i] = rand() / (float)RAND_MAX;
        b[i] = rand() / (float)RAND_MAX;
        c[i] = 0;
    }
    
    printf("Allocating device memory on host..\n");

    hipMalloc((void **)&a_d,n*sizeof(float));
    hipMalloc((void **)&b_d,n*sizeof(float));
    hipMalloc((void **)&c_d,n*sizeof(float));
    
    printf("Copying to device..\n");
    
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    
    hipEventRecord(start);
    
    printf("Doing GPU-stream Vector add\n");
    
    
    const int NbStreams = n_streams;
    const int StreamSize = n / NbStreams;
    hipStream_t Stream[NbStreams];
    for ( int i = 0; i < NbStreams; i++ )
        hipStreamCreate(&Stream[i]);
    

    for ( int i = 0; i < NbStreams; i++ )
    {
        int Offset = i * StreamSize;
        
        hipMemcpyAsync(&a_d[Offset], &a[Offset], StreamSize * sizeof(float), hipMemcpyHostToDevice, Stream[ i ]);
        hipMemcpyAsync(&b_d[Offset], &b[Offset], StreamSize * sizeof(float), hipMemcpyHostToDevice, Stream[ i ]);
        hipMemcpyAsync(&c_d[Offset], &c[Offset], StreamSize * sizeof(float), hipMemcpyHostToDevice, Stream[ i ]);
        
        dim3 block(1024);
        dim3 grid((StreamSize - 1)/1024 + 1);
        vectorAddGPU<<<grid, block, 0, Stream[i]>>>(a_d, b_d, c_d, StreamSize, Offset);
    
        hipMemcpyAsync(&a[Offset], &a_d[Offset], StreamSize * sizeof(float), hipMemcpyDeviceToHost, Stream[ i ]);
        hipMemcpyAsync(&b[Offset], &b_d[Offset], StreamSize * sizeof(float), hipMemcpyDeviceToHost, Stream[ i ]);
        hipMemcpyAsync(&c[Offset], &c_d[Offset], StreamSize * sizeof(float), hipMemcpyDeviceToHost, Stream[ i ]);

    }
    
    hipEventRecord(stop);
    hipEventSynchronize(stop);
    float milliseconds = 0;
    hipEventElapsedTime(&milliseconds, start, stop);
    std::cout << "STREAMS NUMBERS: " << NbStreams << std::endl;
    printf("GPU-stream time: %f ms\n", milliseconds);
    
    hipDeviceSynchronize();
    int res = check(a, b, c, n);
    if (res) {
        std::cout << "Correct result" << std::endl;
    } else {
        std::cout << "Not correct result" << std::endl;
    }
    
    hipFree(a_d);
    hipFree(b_d);
    hipFree(c_d);
    
    hipHostFree(a);
    hipHostFree(b);
    hipHostFree(c);
}


int main(int argc, char **argv)
{
    sample_vec_add(atoi(argv[1]));
    sample_vec_add(atoi(argv[1]));
    int n_streams = (argc == 3) ? atoi(argv[2]) : 8;
    std::cout << "=================================================" << std::endl;
    std::cout << "STREAMS NUMBERS: " << n_streams << std::endl;
    streams_vec_add(n_streams, atoi(argv[1]));

    return 0;
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__vectorAddGPUPfS_S_ii # -- Begin function _Z27__device_stub__vectorAddGPUPfS_S_ii
	.type	_Z27__device_stub__vectorAddGPUPfS_S_ii,@function
_Z27__device_stub__vectorAddGPUPfS_S_ii: # @_Z27__device_stub__vectorAddGPUPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12vectorAddGPUPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__vectorAddGPUPfS_S_ii, .Lfunc_end0-_Z27__device_stub__vectorAddGPUPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z5checkPfS_S_i
.LCPI1_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_1:
	.long	0x25800000                      # float 2.22044605E-16
	.text
	.globl	_Z5checkPfS_S_i
	.type	_Z5checkPfS_S_i,@function
_Z5checkPfS_S_i:                        # @_Z5checkPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_1
# %bb.3:                                # %.lr.ph.preheader
	movss	(%rdi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi), %xmm0
	movss	(%rdx), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	subss	%xmm0, %xmm1
	andps	.LCPI1_0(%rip), %xmm1
	xorl	%eax, %eax
	ucomiss	.LCPI1_1(%rip), %xmm1
	ja	.LBB1_2
# %bb.4:                                # %.lr.ph18.preheader
	movl	%ecx, %ecx
	movl	$1, %eax
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movss	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
.LBB1_5:                                # %.lr.ph18
                                        # =>This Inner Loop Header: Depth=1
	movq	%rax, %r8
	cmpq	%rax, %rcx
	je	.LBB1_7
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB1_5 Depth=1
	movss	(%rdx,%r8,4), %xmm2             # xmm2 = mem[0],zero,zero,zero
	movss	(%rdi,%r8,4), %xmm3             # xmm3 = mem[0],zero,zero,zero
	addss	(%rsi,%r8,4), %xmm3
	subss	%xmm3, %xmm2
	andps	%xmm0, %xmm2
	leaq	1(%r8), %rax
	ucomiss	%xmm1, %xmm2
	jbe	.LBB1_5
.LBB1_7:                                # %._crit_edge.loopexit.loopexit
	xorl	%eax, %eax
	cmpq	%rcx, %r8
	setae	%al
	retq
.LBB1_1:
	movl	$1, %eax
.LBB1_2:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z5checkPfS_S_i, .Lfunc_end1-_Z5checkPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14sample_vec_addi
.LCPI2_0:
	.long	0x3b800000                      # float 0.00390625
.LCPI2_1:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI2_3:
	.long	0x25800000                      # float 2.22044605E-16
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_2:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z14sample_vec_addi
	.type	_Z14sample_vec_addi,@function
_Z14sample_vec_addi:                    # @_Z14sample_vec_addi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebp
	movslq	%edi, %r13
	leaq	(,%r13,4), %r12
	movq	%r13, %r15
	shlq	$34, %r15
	sarq	$32, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	malloc
	cvtsi2ss	%r13d, %xmm0
	movq	%rax, %r15
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %eax
	btsq	$32, %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	%ebp, 44(%rsp)                  # 4-byte Spill
	movl	%ebp, %ebp
	testl	%r13d, %r13d
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r13d, %r13d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r13,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	movss	%xmm0, (%r14,%r13,4)
	movl	$0, (%r15,%r13,4)
	incq	%r13
	cmpq	%r13, %rbp
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	leaq	56(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	addq	$256, %rdx                      # imm = 0x100
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	44(%rsp), %r13d                 # 4-byte Reload
	jne	.LBB2_5
# %bb.4:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%r13d, %ecx
	xorl	%r8d, %r8d
	callq	_Z27__device_stub__vectorAddGPUPfS_S_ii
.LBB2_5:
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	68(%rsp), %r12
	movl	$0, (%r12)
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	callq	hipDeviceSynchronize
	testl	%r13d, %r13d
	jle	.LBB2_11
# %bb.6:                                # %.lr.ph.preheader.i
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	(%r14), %xmm0
	movss	(%r15), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	subss	%xmm0, %xmm1
	andps	.LCPI2_2(%rip), %xmm1
	ucomiss	.LCPI2_3(%rip), %xmm1
	ja	.LBB2_12
# %bb.7:                                # %.lr.ph45.preheader
	movl	$1, %ecx
	movaps	.LCPI2_2(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movss	.LCPI2_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
.LBB2_8:                                # %.lr.ph45
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, %rax
	cmpq	%rcx, %rbp
	je	.LBB2_10
# %bb.9:                                # %.lr.ph.i
                                        #   in Loop: Header=BB2_8 Depth=1
	movss	(%r15,%rax,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%rbx,%rax,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	addss	(%r14,%rax,4), %xmm3
	subss	%xmm3, %xmm2
	andps	%xmm0, %xmm2
	leaq	1(%rax), %rcx
	ucomiss	%xmm1, %xmm2
	jbe	.LBB2_8
.LBB2_10:                               # %_Z5checkPfS_S_i.exit
	cmpq	%rbp, %rax
	jae	.LBB2_11
.LBB2_12:                               # %.critedge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$18, %edx
	jmp	.LBB2_13
.LBB2_11:                               # %_Z5checkPfS_S_i.exit.thread
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$14, %edx
.LBB2_13:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z14sample_vec_addi, .Lfunc_end2-_Z14sample_vec_addi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z15streams_vec_addii
.LCPI3_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI3_2:
	.long	0x25800000                      # float 2.22044605E-16
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI3_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z15streams_vec_addii
	.type	_Z15streams_vec_addii,@function
_Z15streams_vec_addii:                  # @_Z15streams_vec_addii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$136, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movl	%edi, %r13d
	movslq	%esi, %r14
	leaq	(,%r14,4), %rbx
	leaq	-64(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	-56(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	-48(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	movl	%r12d, %r15d
	testl	%r14d, %r14d
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r14d, %r14d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movq	-64(%rbp), %rax
	movss	%xmm0, (%rax,%r14,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	movq	-56(%rbp), %rax
	movss	%xmm0, (%rax,%r14,4)
	movq	-48(%rbp), %rax
	movl	$0, (%rax,%r14,4)
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB3_2
.LBB3_3:                                # %._crit_edge
	movq	%r15, -128(%rbp)                # 8-byte Spill
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	leaq	-96(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-88(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-80(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	leaq	-160(%rbp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	-112(%rbp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	%rsp, -136(%rbp)                # 8-byte Spill
	movl	%r12d, -116(%rbp)               # 4-byte Spill
	movl	%r12d, %eax
	cltd
	idivl	%r13d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, -104(%rbp)                # 8-byte Spill
	movl	%r13d, %r12d
	movq	%rsp, %r15
	leaq	15(,%r12,8), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	movl	%r13d, -68(%rbp)                # 4-byte Spill
	testl	%r13d, %r13d
	jle	.LBB3_11
# %bb.4:
	movq	%r12, %r14
	movq	%r15, %rbx
.LBB3_5:                                # %.lr.ph77
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	hipStreamCreate
	addq	$8, %rbx
	decq	%r14
	jne	.LBB3_5
# %bb.6:                                # %.preheader
	cmpl	$0, -68(%rbp)                   # 4-byte Folded Reload
	jle	.LBB3_11
# %bb.7:                                # %.lr.ph79
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	movq	-104(%rbp), %rcx                # 8-byte Reload
	movslq	%ecx, %r13
	shlq	$2, %r13
	leal	-1(%rcx), %eax
	addl	$1022, %ecx                     # imm = 0x3FE
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$10, %ecx
	incl	%ecx
	btsq	$32, %rcx
	movq	%rcx, -144(%rbp)                # 8-byte Spill
	xorl	%r14d, %r14d
	addq	$1024, %rdx                     # imm = 0x400
	movq	%rdx, -152(%rbp)                # 8-byte Spill
	xorl	%ebx, %ebx
.LBB3_8:                                # =>This Inner Loop Header: Depth=1
	movq	-96(%rbp), %rdi
	addq	%rbx, %rdi
	movq	-64(%rbp), %rsi
	addq	%rbx, %rsi
	movq	(%r15), %r8
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	-88(%rbp), %rdi
	addq	%rbx, %rdi
	movq	-56(%rbp), %rsi
	addq	%rbx, %rsi
	movq	(%r15), %r8
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	-80(%rbp), %rdi
	addq	%rbx, %rdi
	movq	-48(%rbp), %rsi
	addq	%rbx, %rsi
	movq	(%r15), %r8
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%r15), %r9
	movq	-144(%rbp), %rdi                # 8-byte Reload
	movl	$1, %esi
	movq	-152(%rbp), %rdx                # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.9:                                #   in Loop: Header=BB3_8 Depth=1
	movq	-96(%rbp), %rdi
	movq	-88(%rbp), %rsi
	movq	-80(%rbp), %rdx
	movq	-104(%rbp), %rcx                # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r14d, %r8d
	callq	_Z27__device_stub__vectorAddGPUPfS_S_ii
.LBB3_10:                               #   in Loop: Header=BB3_8 Depth=1
	movq	-64(%rbp), %rdi
	addq	%rbx, %rdi
	movq	-96(%rbp), %rsi
	addq	%rbx, %rsi
	movq	(%r15), %r8
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	-56(%rbp), %rdi
	addq	%rbx, %rdi
	movq	-88(%rbp), %rsi
	addq	%rbx, %rsi
	movq	(%r15), %r8
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	-48(%rbp), %rdi
	addq	%rbx, %rdi
	movq	-80(%rbp), %rsi
	addq	%rbx, %rsi
	movq	(%r15), %r8
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	addq	%r13, %rbx
	addl	-104(%rbp), %r14d               # 4-byte Folded Reload
	addq	$8, %r15
	decq	%r12
	jne	.LBB3_8
.LBB3_11:                               # %._crit_edge80
	movq	-112(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	-112(%rbp), %rdi
	callq	hipEventSynchronize
	leaq	-164(%rbp), %rbx
	movl	$0, (%rbx)
	movq	-160(%rbp), %rsi
	movq	-112(%rbp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	-68(%rbp), %esi                 # 4-byte Reload
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	callq	hipDeviceSynchronize
	cmpl	$0, -116(%rbp)                  # 4-byte Folded Reload
	jle	.LBB3_17
# %bb.12:                               # %.lr.ph.preheader.i
	movq	-64(%rbp), %rax
	movq	-56(%rbp), %rcx
	movq	-48(%rbp), %rdx
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	(%rcx), %xmm0
	movss	(%rdx), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	subss	%xmm0, %xmm1
	andps	.LCPI3_1(%rip), %xmm1
	ucomiss	.LCPI3_2(%rip), %xmm1
	ja	.LBB3_18
# %bb.13:                               # %.lr.ph82.preheader
	movl	$1, %edi
	movaps	.LCPI3_1(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movss	.LCPI3_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movq	-128(%rbp), %r8                 # 8-byte Reload
.LBB3_14:                               # %.lr.ph82
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdi, %rsi
	cmpq	%rdi, %r8
	je	.LBB3_16
# %bb.15:                               # %.lr.ph.i
                                        #   in Loop: Header=BB3_14 Depth=1
	movss	(%rdx,%rsi,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%rax,%rsi,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	addss	(%rcx,%rsi,4), %xmm3
	subss	%xmm3, %xmm2
	andps	%xmm0, %xmm2
	leaq	1(%rsi), %rdi
	ucomiss	%xmm1, %xmm2
	jbe	.LBB3_14
.LBB3_16:                               # %_Z5checkPfS_S_i.exit
	cmpq	%r8, %rsi
	jae	.LBB3_17
.LBB3_18:                               # %.critedge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$18, %edx
	jmp	.LBB3_19
.LBB3_17:                               # %_Z5checkPfS_S_i.exit.thread
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$14, %edx
.LBB3_19:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	-96(%rbp), %rdi
	callq	hipFree
	movq	-88(%rbp), %rdi
	callq	hipFree
	movq	-80(%rbp), %rdi
	callq	hipFree
	movq	-64(%rbp), %rdi
	callq	hipHostFree
	movq	-56(%rbp), %rdi
	callq	hipHostFree
	movq	-48(%rbp), %rdi
	callq	hipHostFree
	movq	-136(%rbp), %rsp                # 8-byte Reload
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end3:
	.size	_Z15streams_vec_addii, .Lfunc_end3-_Z15streams_vec_addii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %r14d
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %edi
	callq	_Z14sample_vec_addi
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %edi
	callq	_Z14sample_vec_addi
	movl	$8, %ebp
	cmpl	$3, %r14d
	jne	.LBB4_2
# %bb.1:
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
.LBB4_2:
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$49, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%ebp, %edi
	movl	%eax, %esi
	callq	_Z15streams_vec_addii
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12vectorAddGPUPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12vectorAddGPUPfS_S_ii,@object # @_Z12vectorAddGPUPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z12vectorAddGPUPfS_S_ii
	.p2align	3, 0x0
_Z12vectorAddGPUPfS_S_ii:
	.quad	_Z27__device_stub__vectorAddGPUPfS_S_ii
	.size	_Z12vectorAddGPUPfS_S_ii, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"GPU time: %f ms\n"
	.size	.L.str.3, 17

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Correct result"
	.size	.L.str.4, 15

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Not correct result"
	.size	.L.str.5, 19

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"STREAMS NUMBERS: "
	.size	.L.str.7, 18

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPU-stream time: %f ms\n"
	.size	.L.str.8, 24

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"================================================="
	.size	.L.str.9, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12vectorAddGPUPfS_S_ii"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.2,@object                 # @str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.2:
	.asciz	"Doing GPU Vector add"
	.size	.Lstr.2, 21

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Allocating device memory on host.."
	.size	.Lstr.3, 35

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Copying to device.."
	.size	.Lstr.4, 20

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Doing GPU-stream Vector add"
	.size	.Lstr.5, 28

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__vectorAddGPUPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12vectorAddGPUPfS_S_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12vectorAddGPUPfS_S_ii ; -- Begin function _Z12vectorAddGPUPfS_S_ii
	.globl	_Z12vectorAddGPUPfS_S_ii
	.p2align	8
	.type	_Z12vectorAddGPUPfS_S_ii,@function
_Z12vectorAddGPUPfS_S_ii:               ; @_Z12vectorAddGPUPfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_add_nc_u32_e32 v0, s3, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12vectorAddGPUPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12vectorAddGPUPfS_S_ii, .Lfunc_end0-_Z12vectorAddGPUPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12vectorAddGPUPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12vectorAddGPUPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
