/*
 * dotproduct.cu
 * includes setup funtion called from "driver" program
 * also includes kernel function 'kernel_dotproduct[2]()'
 * largely inspired in the pdf http://www.cuvilib.com/Reduction.pdf
 */

#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>

#define BLOCK_SIZE 1024

struct timeval  tp1, tp2;
#define GPU_ERR_CHK(ans) { gpu_assert((ans), __FILE__, __LINE__); }
static void gpu_assert(cudaError_t code, const char *file, int line,
        bool abort = true) {
    if (code != cudaSuccess) {
        fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code),
                file, line);
        if (abort) {
            exit(code);
        }
    }
}
__global__ void kernel_laplacian(float *lap,long long size, int tUnit) {
    extern __shared__ float lapd[];
    
    int bid = blockDim.x;
    int nTotalThreads;
    nTotalThreads= 0;
    if (!bid){
	nTotalThreads = bid;
    }else{
	//(0 == 2^0)
    	int x = 1;
    	while(x < bid)
    	{
      	    x <<= 1;
    	}
        nTotalThreads = x;
    }

    // each thread loads one element from global to shared mem
    unsigned int tid = threadIdx.x;
    long long i = blockIdx.x*nTotalThreads + threadIdx.x;
    lapd[tid] = 1;
    if(i < size){
    	lapd[tid]= (lap[i-1]+lap[i+1])/2;
	if(i==(size-1)){
    		lapd[tid]= (lap[i-1]+23)/2;
	}
    }
    __syncthreads();
    if(i && i < size){
    	lap[i] = lapd[tid];}
   
}



// This function is called from the host computer.
// It manages memory and calls the function that is executed on the GPU
extern "C" void cuda_laplacian(float *lap,long long arraySize, int tUnit, double*time_result)
{
	// force_d, distance_d and result_d are the GPU counterparts of the arrays that exists in host memory 
	float *lap_d;
	

	

	// Reset the device and exit
    	GPU_ERR_CHK(cudaDeviceReset());

    		
	// allocate space in the device 
	GPU_ERR_CHK(cudaMalloc ((void**) &lap_d, sizeof(float) * arraySize));
        
	
	//copy the arrays from host to the device 
	GPU_ERR_CHK(cudaMemcpy (lap_d, lap, sizeof(float) * arraySize, cudaMemcpyHostToDevice));

	
	int threads;
	if(arraySize < 128){
		threads = 64;
	} else if (arraySize < 256 ){
		threads = 128;
	} else if (arraySize < 512){
		threads = 256;
	} else if (arraySize < 1024){
		threads = 512;
	} else {
		threads = BLOCK_SIZE;
	}
	long long block_size = threads;
        long long blocks = ceil(arraySize / ((float) block_size));
	// set execution configuration
        dim3 dimblock (block_size);
        dim3 dimgrid (blocks);
        int smemSize = dimblock.x * sizeof(long long);
        
	// actual computation: Call the kernel
	gettimeofday(&tp1, NULL);
	int i;
	for(i=0; i<tUnit;i++){
        kernel_laplacian<<<dimgrid,dimblock,smemSize>>>(lap_d, arraySize,tUnit);
                  
	} 
       //copy the arrays from host to the device
        GPU_ERR_CHK(cudaMemcpy (lap, lap_d, sizeof(float) * arraySize, cudaMemcpyDeviceToHost));
	gettimeofday(&tp2, NULL);
    	*time_result = (double) (tp2.tv_usec - tp1.tv_usec) / 1000000 + (double) (tp2.tv_sec - tp1.tv_sec);
       cudaFree(lap_d); 
}


	.file	"tmpxft_002fa90e_00000000-6_lap.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/rgvogel/Laplacian/master/lap.cu"
.LC1:
	.string	"GPUassert: %s %s %d\n"
	.text
	.type	_ZL10gpu_assert9cudaErrorPKcib.constprop.0, @function
_ZL10gpu_assert9cudaErrorPKcib.constprop.0:
.LFB2173:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC1(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE2173:
	.size	_ZL10gpu_assert9cudaErrorPKcib.constprop.0, .-_ZL10gpu_assert9cudaErrorPKcib.constprop.0
	.globl	_Z38__device_stub__Z16kernel_laplacianPfxiPfxi
	.type	_Z38__device_stub__Z16kernel_laplacianPfxiPfxi, @function
_Z38__device_stub__Z16kernel_laplacianPfxiPfxi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_laplacianPfxi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z38__device_stub__Z16kernel_laplacianPfxiPfxi, .-_Z38__device_stub__Z16kernel_laplacianPfxiPfxi
	.globl	_Z16kernel_laplacianPfxi
	.type	_Z16kernel_laplacianPfxi, @function
_Z16kernel_laplacianPfxi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z16kernel_laplacianPfxiPfxi
	.cfi_endproc
.LFE2054:
	.size	_Z16kernel_laplacianPfxi, .-_Z16kernel_laplacianPfxi
	.globl	cuda_laplacian
	.type	cuda_laplacian, @function
cuda_laplacian:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$64, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	cudaDeviceReset@PLT
	movl	$73, %esi
	movl	%eax, %edi
	call	_ZL10gpu_assert9cudaErrorPKcib.constprop.0
	leaq	0(,%rbx,4), %rax
	leaq	24(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movl	$77, %esi
	movl	%eax, %edi
	call	_ZL10gpu_assert9cudaErrorPKcib.constprop.0
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$81, %esi
	movl	%eax, %edi
	call	_ZL10gpu_assert9cudaErrorPKcib.constprop.0
	cmpq	$127, %rbx
	jle	.L14
	movl	$128, %ebp
	cmpq	$255, %rbx
	jle	.L14
	movl	$256, %ebp
	cmpq	$511, %rbx
	jle	.L14
	cmpq	$1023, %rbx
	movl	$1024, %ebp
	movl	$512, %eax
	cmovle	%eax, %ebp
.L14:
	cvtsi2ssl	%ebp, %xmm1
	leal	0(,%rbp,8), %r15d
	xorl	%r14d, %r14d
	cvtsi2ssq	%rbx, %xmm0
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	xorl	%esi, %esi
	leaq	tp1(%rip), %rdi
	movl	$1, 36(%rsp)
	cvttss2siq	%xmm0, %rax
	movl	$1, 40(%rsp)
	movl	%eax, 44(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	call	gettimeofday@PLT
.L15:
	cmpl	%r12d, %r14d
	jge	.L24
	movl	%ebp, 32(%rsp)
	movl	40(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	%r15, %r8
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	24(%rsp), %rdi
	movl	%r12d, %edx
	movq	%rbx, %rsi
	call	_Z38__device_stub__Z16kernel_laplacianPfxiPfxi
.L16:
	incl	%r14d
	jmp	.L15
.L24:
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$111, %esi
	movl	%eax, %edi
	call	_ZL10gpu_assert9cudaErrorPKcib.constprop.0
	xorl	%esi, %esi
	leaq	tp2(%rip), %rdi
	call	gettimeofday@PLT
	movq	8+tp2(%rip), %rax
	movq	24(%rsp), %rdi
	subq	8+tp1(%rip), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	tp2(%rip), %rax
	subq	tp1(%rip), %rax
	divsd	.LC2(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 0(%r13)
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	cuda_laplacian, .-cuda_laplacian
	.section	.rodata.str1.1
.LC3:
	.string	"_Z16kernel_laplacianPfxi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16kernel_laplacianPfxi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	tp2
	.bss
	.align 16
	.type	tp2, @object
	.size	tp2, 16
tp2:
	.zero	16
	.globl	tp1
	.align 16
	.type	tp1, @object
	.size	tp1, 16
tp1:
	.zero	16
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * dotproduct.cu
 * includes setup funtion called from "driver" program
 * also includes kernel function 'kernel_dotproduct[2]()'
 * largely inspired in the pdf http://www.cuvilib.com/Reduction.pdf
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>

#define BLOCK_SIZE 1024

struct timeval  tp1, tp2;
#define GPU_ERR_CHK(ans) { gpu_assert((ans), __FILE__, __LINE__); }
static void gpu_assert(hipError_t code, const char *file, int line,
        bool abort = true) {
    if (code != hipSuccess) {
        fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code),
                file, line);
        if (abort) {
            exit(code);
        }
    }
}
__global__ void kernel_laplacian(float *lap,long long size, int tUnit) {
    extern __shared__ float lapd[];
    
    int bid = blockDim.x;
    int nTotalThreads;
    nTotalThreads= 0;
    if (!bid){
	nTotalThreads = bid;
    }else{
	//(0 == 2^0)
    	int x = 1;
    	while(x < bid)
    	{
      	    x <<= 1;
    	}
        nTotalThreads = x;
    }

    // each thread loads one element from global to shared mem
    unsigned int tid = threadIdx.x;
    long long i = blockIdx.x*nTotalThreads + threadIdx.x;
    lapd[tid] = 1;
    if(i < size){
    	lapd[tid]= (lap[i-1]+lap[i+1])/2;
	if(i==(size-1)){
    		lapd[tid]= (lap[i-1]+23)/2;
	}
    }
    __syncthreads();
    if(i && i < size){
    	lap[i] = lapd[tid];}
   
}



// This function is called from the host computer.
// It manages memory and calls the function that is executed on the GPU
extern "C" void cuda_laplacian(float *lap,long long arraySize, int tUnit, double*time_result)
{
	// force_d, distance_d and result_d are the GPU counterparts of the arrays that exists in host memory 
	float *lap_d;
	

	

	// Reset the device and exit
    	GPU_ERR_CHK(hipDeviceReset());

    		
	// allocate space in the device 
	GPU_ERR_CHK(hipMalloc ((void**) &lap_d, sizeof(float) * arraySize));
        
	
	//copy the arrays from host to the device 
	GPU_ERR_CHK(hipMemcpy (lap_d, lap, sizeof(float) * arraySize, hipMemcpyHostToDevice));

	
	int threads;
	if(arraySize < 128){
		threads = 64;
	} else if (arraySize < 256 ){
		threads = 128;
	} else if (arraySize < 512){
		threads = 256;
	} else if (arraySize < 1024){
		threads = 512;
	} else {
		threads = BLOCK_SIZE;
	}
	long long block_size = threads;
        long long blocks = ceil(arraySize / ((float) block_size));
	// set execution configuration
        dim3 dimblock (block_size);
        dim3 dimgrid (blocks);
        int smemSize = dimblock.x * sizeof(long long);
        
	// actual computation: Call the kernel
	gettimeofday(&tp1, NULL);
	int i;
	for(i=0; i<tUnit;i++){
        kernel_laplacian<<<dimgrid,dimblock,smemSize>>>(lap_d, arraySize,tUnit);
                  
	} 
       //copy the arrays from host to the device
        GPU_ERR_CHK(hipMemcpy (lap, lap_d, sizeof(float) * arraySize, hipMemcpyDeviceToHost));
	gettimeofday(&tp2, NULL);
    	*time_result = (double) (tp2.tv_usec - tp1.tv_usec) / 1000000 + (double) (tp2.tv_sec - tp1.tv_sec);
       hipFree(lap_d); 
}


	.text
	.file	"lap.hip"
	.globl	_Z31__device_stub__kernel_laplacianPfxi # -- Begin function _Z31__device_stub__kernel_laplacianPfxi
	.type	_Z31__device_stub__kernel_laplacianPfxi,@function
_Z31__device_stub__kernel_laplacianPfxi: # @_Z31__device_stub__kernel_laplacianPfxi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_laplacianPfxi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__kernel_laplacianPfxi, .Lfunc_end0-_Z31__device_stub__kernel_laplacianPfxi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function cuda_laplacian
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	cuda_laplacian
	.type	cuda_laplacian,@function
cuda_laplacian:                         # @cuda_laplacian
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	movq	%rsi, %r15
	movq	%rdi, %r14
	callq	hipDeviceReset
	movl	%eax, %edi
	movl	$75, %esi
	callq	_ZL10gpu_assert10hipError_tPKcib
	leaq	(,%r15,4), %r13
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$79, %esi
	callq	_ZL10gpu_assert10hipError_tPKcib
	movq	(%rbx), %rdi
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	movq	%r13, 16(%rsp)                  # 8-byte Spill
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$83, %esi
	callq	_ZL10gpu_assert10hipError_tPKcib
	movl	$64, %r13d
	cmpq	$128, %r15
	jl	.LBB1_4
# %bb.1:
	movl	$128, %r13d
	cmpq	$256, %r15                      # imm = 0x100
	jb	.LBB1_4
# %bb.2:
	movl	$256, %r13d                     # imm = 0x100
	cmpq	$512, %r15                      # imm = 0x200
	jb	.LBB1_4
# %bb.3:
	xorl	%r13d, %r13d
	cmpq	$1024, %r15                     # imm = 0x400
	setae	%r13b
	shll	$9, %r13d
	addl	$512, %r13d                     # imm = 0x200
.LBB1_4:
	cvtsi2ss	%r15, %xmm0
	cvtsi2ss	%r13d, %xmm1
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	$tp1, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%r12d, %r12d
	jle	.LBB1_9
# %bb.5:                                # %.lr.ph
	cvttss2si	12(%rsp), %rax          # 4-byte Folded Reload
	movl	%r13d, %ebx
	btsq	$32, %rbx
	movl	%eax, %r14d
	btsq	$32, %r14
	shll	$3, %r13d
	movl	%r12d, %ebp
.LBB1_6:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:                                #   in Loop: Header=BB1_6 Depth=1
	movq	(%rsp), %rdi
	movq	%r15, %rsi
	movl	%r12d, %edx
	callq	_Z31__device_stub__kernel_laplacianPfxi
.LBB1_8:                                #   in Loop: Header=BB1_6 Depth=1
	decl	%ebp
	jne	.LBB1_6
.LBB1_9:                                # %._crit_edge
	movq	(%rsp), %rsi
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$113, %esi
	callq	_ZL10gpu_assert10hipError_tPKcib
	movl	$tp2, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	tp2+8(%rip), %rax
	subq	tp1+8(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movq	tp2(%rip), %rax
	subq	tp1(%rip), %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	addsd	%xmm0, %xmm1
	movq	32(%rsp), %rax                  # 8-byte Reload
	movsd	%xmm1, (%rax)
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	cuda_laplacian, .Lfunc_end1-cuda_laplacian
	.cfi_endproc
                                        # -- End function
	.type	_ZL10gpu_assert10hipError_tPKcib,@function # -- Begin function _ZL10gpu_assert10hipError_tPKcib
_ZL10gpu_assert10hipError_tPKcib:       # @_ZL10gpu_assert10hipError_tPKcib
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movl	%edi, %ebx
	movq	stderr(%rip), %r14
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	%ebp, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end2:
	.size	_ZL10gpu_assert10hipError_tPKcib, .Lfunc_end2-_ZL10gpu_assert10hipError_tPKcib
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernel_laplacianPfxi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	tp1,@object                     # @tp1
	.bss
	.globl	tp1
	.p2align	3, 0x0
tp1:
	.zero	16
	.size	tp1, 16

	.type	tp2,@object                     # @tp2
	.globl	tp2
	.p2align	3, 0x0
tp2:
	.zero	16
	.size	tp2, 16

	.type	_Z16kernel_laplacianPfxi,@object # @_Z16kernel_laplacianPfxi
	.section	.rodata,"a",@progbits
	.globl	_Z16kernel_laplacianPfxi
	.p2align	3, 0x0
_Z16kernel_laplacianPfxi:
	.quad	_Z31__device_stub__kernel_laplacianPfxi
	.size	_Z16kernel_laplacianPfxi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/rgvogel/Laplacian/master/lap.hip"
	.size	.L.str, 95

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.1, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16kernel_laplacianPfxi"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__kernel_laplacianPfxi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym tp1
	.addrsig_sym tp2
	.addrsig_sym _Z16kernel_laplacianPfxi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16kernel_laplacianPfxi ; -- Begin function _Z16kernel_laplacianPfxi
	.globl	_Z16kernel_laplacianPfxi
	.p2align	8
	.type	_Z16kernel_laplacianPfxi,@function
_Z16kernel_laplacianPfxi:               ; @_Z16kernel_laplacianPfxi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_mov_b32 s2, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.preheader.preheader
	s_mov_b32 s4, 1
.LBB0_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, s4
	s_lshl_b32 s4, s4, 1
	s_cmp_lt_i32 s2, s3
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, s2, s15, v[0:1]
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 1.0
	v_lshl_add_u32 v0, v0, 2, 0
	s_mov_b32 s1, exec_lo
	ds_store_b32 v0, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i64_e32 vcc_lo, s[6:7], v[1:2]
	v_cmpx_gt_i64_e64 s[6:7], v[1:2]
	s_cbranch_execz .LBB0_6
; %bb.4:
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_add_u32 s2, s6, -1
	s_addc_u32 s3, s7, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s0, s4, v3
	v_add_co_ci_u32_e64 v6, s0, s5, v4, s0
	v_cmp_eq_u64_e64 s0, s[2:3], v[1:2]
	s_clause 0x1
	global_load_b32 v3, v[5:6], off offset:-4
	global_load_b32 v4, v[5:6], off offset:4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v4, 0.5, v4
	ds_store_b32 v0, v4
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_add_f32_e32 v3, 0x41b80000, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v3, 0.5, v3
	ds_store_b32 v0, v3
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_ne_u32_e64 s0, 0, v1
	s_xor_b32 s1, vcc_lo, -1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_8
; %bb.7:
	ds_load_b32 v3, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_laplacianPfxi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16kernel_laplacianPfxi, .Lfunc_end0-_Z16kernel_laplacianPfxi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16kernel_laplacianPfxi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16kernel_laplacianPfxi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
