#include <stdio.h>
#include <stdlib.h>

/* check for CUDA error */
#define CHECK_ERROR check_cuda_error(__LINE__-1, __FILE__)

/* #bodies */
static int N;

/* #threads/block (leapfrog) */
static int TPB = 128;

/* #tiles (acceleration kernel) */
static int P;

/* #timesteps */
static int TIMESTEPS = 1000;
/* softening factor (square), G, \Delta t */
static const float EPS = 0.1f, G = 2.f, DELTA_T = 0.01f;

/* acceleration */
__device__ float4 *a;
/* x,y,z: position; w: mass */
static float4 *r_host;
__device__ float4 *r;
/* velocity */
static float4 *v_host;
__device__ float4 *v;

/* random number in [0,1] */
static inline float rnd()
{
	return (float)rand() / RAND_MAX;
}

/* check for CUDA error */
static void check_cuda_error(const int line, const char *file)
{
	cudaError_t e;

	e = cudaGetLastError();
	if (e != cudaSuccess) {
		printf("CUDA error: %s, line %i, file '%s'\n",
		       cudaGetErrorString(e), line, file);
		exit(1);
	}
}

/* leap frog integration kernel (1 particle/thread) */
__global__ void leap_frog_1p_2(float4 *a, float4 *v, float4 *r, float delta_t)
{
	int i = threadIdx.x + __mul24(blockIdx.x, blockDim.x);
	float3 v_tmp;

	v_tmp.x = v[i].x;
	v_tmp.y = v[i].y;
	v_tmp.z = v[i].z;

	v_tmp.x += a[i].x * delta_t;
	v_tmp.y += a[i].y * delta_t;
	v_tmp.z += a[i].z * delta_t;

	r[i].x += v_tmp.x * delta_t;
	r[i].y += v_tmp.y * delta_t;
	r[i].z += v_tmp.z * delta_t;

	v[i] = make_float4(v_tmp.x, v_tmp.y, v_tmp.z, 0.f);
}

/* body-body interaction, returns a_i */
__device__ float3 interaction(float3 ri, float4 rj, float eps)
{
	float3 rij, ai;
	float dst_sqr, cube, inv_sqrt;

	/* distance vector */
	rij.x = rj.x - ri.x;
	rij.y = rj.y - ri.y;
	rij.z = rj.z - ri.z;

	/* compute acceleration */
	dst_sqr = rij.x*rij.x + rij.y*rij.y + rij.z*rij.z + eps;
	cube = dst_sqr * dst_sqr * dst_sqr;
	inv_sqrt = rsqrtf(cube) * rj.w;

	/* acceleration a_i */
	ai.x = rij.x * inv_sqrt;
	ai.y = rij.y * inv_sqrt;
	ai.z = rij.z * inv_sqrt;

	return ai;
}

/* calculate accelerations */
__global__ void acc(float4 *r, float4 *a, float eps, float g)
{
	/* dynamically allocated shared memory */
	extern __shared__ float4 shared[];
	/* acceleration a_i */
	float3 ai = make_float3(0.f, 0.f, 0.f), tmp;
	/* position particle i */
	float3 ri;
	/* particle i */
	int i = threadIdx.x + __mul24(blockIdx.x, blockDim.x);
	int k, l;

	/* get position of particle i */
	ri.x = r[i].x;
	ri.y = r[i].y;
	ri.z = r[i].z;	

	/* loop over tiles */
	for (k = 0; k < gridDim.x; ++k) {
		/* load position and mass into shared memory */
		shared[threadIdx.x] = r[__mul24(k, blockDim.x) + threadIdx.x];
		__syncthreads();

		/* loop over particles in a tile */
		#pragma unroll 32
		for (l = 0; l < blockDim.x; ++l) {
			tmp = interaction(ri, shared[l], eps);
			ai.x += tmp.x;
			ai.y += tmp.y;
			ai.z += tmp.z;
		}

		/* wait for other threads to finish calculation */
		__syncthreads();
	}

	/* save acceleration a_i in global memory */
	a[i] = make_float4(ai.x*g, ai.y*g, ai.z*g, 0.f);
}

void init();

int main(int argc, char *argv[])
{
	cudaEvent_t start, stop;
	float time;
	int i, timestep;

	if (argc < 2) {
		printf("usage: nbody -N#bodies [-T#threads/block] [-S#timesteps] -P#tiles\n");
		exit(1);
	}

	/* get command line parameters */
	for (i = 1; i < argc; ++i) {
		if (argv[i][0] == '-') {
			switch (argv[i][1]) {
			case 'N':
				N = atoi(argv[i]+2);
				break;
			case 'T':
				TPB = atoi(argv[i]+2);
				break;
			case 'S':
				TIMESTEPS = atoi(argv[i]+2);
				break;
			case 'P':
				P = atoi(argv[i]+2);
				break;
			default:
				break;
			}
		}
	}

	/*printf("N: %i, TPB: %i, TIMESTEPS: %i, P: %i\n", N, TPB, TIMESTEPS, P);*/

	if (N % TPB) {
		printf("#bodies must be a multiple of #threads/block!\n");
		exit(1);
	}

	if (N % P) {
		printf("#bodies must be a multiple of #p!\n");
		exit(1);
	}

	/* alloc host memory */
	r_host = (float4 *)malloc(N*sizeof(float4));
	v_host = (float4 *)malloc(N*sizeof(float4));
	/* alloc device memory */
	cudaMalloc((void **)&a, N*sizeof(float4));
	cudaMalloc((void **)&r, N*sizeof(float4));
	cudaMalloc((void **)&v, N*sizeof(float4));
	CHECK_ERROR;

	/* generate initial configuration */
	srand(1);
	init();

	/* copy config to device memory */
	cudaMemcpy(r, r_host, N*sizeof(float4), cudaMemcpyHostToDevice);
	cudaMemcpy(v, v_host, N*sizeof(float4), cudaMemcpyHostToDevice);
	CHECK_ERROR;

	/* start counter */
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start, 0);

	/* integration steps */
	for (timestep = 0; timestep < TIMESTEPS; ++timestep) {
		/* update accelerations */
		acc<<<N/P, P>>>(r, a, EPS, G);

		/* leap frog */
		leap_frog_1p_2<<<N/TPB, TPB>>>(a, v, r, DELTA_T);
		/*cudaMemcpy(r_host, r, N * sizeof(float3), cudaMemcpyDeviceToHost);
		printf("#1: x: %f, y: %f, z: %f\n", r_host[0].x, r_host[0].y, r_host[0].z);
		printf("#2: x: %f, y: %f, z: %f\n", r_host[1].x, r_host[1].y, r_host[1].z);*/
	}

	/* stop counter */
	cudaEventRecord(stop, 0);
	cudaEventSynchronize(stop);
	/* unit: milliseconds */
	cudaEventElapsedTime(&time, start, stop);
	CHECK_ERROR;
	/*printf("elapsed time: %f\n", time);
	printf("#interactions/s: %f\n", ((float)TIMESTEPS*N*N) / time * 1000);*/
	printf("%f\n", ((float)TIMESTEPS*N*N) / time * 1000);

	/* free host memory */
	free(r_host);
	free(v_host);
	/* free device memory */
	cudaFree(a);
	cudaFree(r);
	cudaFree(v);
	CHECK_ERROR;

	return 0;
}

/* generate initial configuration */
void init()
{
	int i;

	for (i = 0; i < N; ++i) {
		/* mass */
		r_host[i].w = rnd()>0.5 ? 1.f : 10.f;

		/* velocity */
		v_host[i].x = 3.f;
		v_host[i].y = rnd() * 10.f;
		v_host[i].z = -5.f;

		/* position */
		r_host[i].x = rnd() * 50.f;
		r_host[i].y = rnd() * 50.f;
		r_host[i].z = rnd() * 50.f;
	}
}

	.file	"tmpxft_002d875c_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL3rndv, @function
_ZL3rndv:
.LFB2027:
	.cfi_startproc
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_ZL3rndv, .-_ZL3rndv
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/m-thu/sandbox/master/nbody/nbody/kernel.cu"
.LC2:
	.string	"CUDA error: %s, line %i, file '%s'\n"
	.text
	.type	_ZL16check_cuda_erroriPKc.constprop.0, @function
_ZL16check_cuda_erroriPKc.constprop.0:
.LFB2177:
	.cfi_startproc
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L4
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	%ebx, %ecx
	leaq	.LC1(%rip), %r8
	movq	%rax, %rdx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L4:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2177:
	.size	_ZL16check_cuda_erroriPKc.constprop.0, .-_ZL16check_cuda_erroriPKc.constprop.0
	.globl	_Z11interaction6float36float4f
	.type	_Z11interaction6float36float4f, @function
_Z11interaction6float36float4f:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, 28(%rsp)
	movl	28(%rsp), %edi
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z11interaction6float36float4f, .-_Z11interaction6float36float4f
	.globl	_Z4initv
	.type	_Z4initv, @function
_Z4initv:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rdx
	.cfi_def_cfa_offset 32
.L11:
	cmpl	%ebp, _ZL1N(%rip)
	jle	.L18
	call	_ZL3rndv
	movss	.LC5(%rip), %xmm1
	movss	.LC4(%rip), %xmm3
	movq	%rbp, %rbx
	movss	.LC3(%rip), %xmm2
	movq	_ZL6r_host(%rip), %rax
	salq	$4, %rbx
	incq	%rbp
	cmpltss	%xmm0, %xmm1
	andps	%xmm1, %xmm2
	andnps	%xmm3, %xmm1
	orps	%xmm1, %xmm2
	movss	%xmm2, 12(%rax,%rbx)
	movq	_ZL6v_host(%rip), %rax
	movl	$0x40400000, (%rax,%rbx)
	call	_ZL3rndv
	movq	_ZL6v_host(%rip), %rax
	mulss	.LC4(%rip), %xmm0
	addq	%rbx, %rax
	movl	$0xc0a00000, 8(%rax)
	movss	%xmm0, 4(%rax)
	call	_ZL3rndv
	mulss	.LC8(%rip), %xmm0
	movq	_ZL6r_host(%rip), %rax
	movss	%xmm0, (%rax,%rbx)
	call	_ZL3rndv
	mulss	.LC8(%rip), %xmm0
	movq	_ZL6r_host(%rip), %rax
	movss	%xmm0, 4(%rax,%rbx)
	call	_ZL3rndv
	mulss	.LC8(%rip), %xmm0
	movq	_ZL6r_host(%rip), %rax
	movss	%xmm0, 8(%rax,%rbx)
	jmp	.L11
.L18:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z4initv, .-_Z4initv
	.globl	_Z47__device_stub__Z14leap_frog_1p_2P6float4S0_S0_fP6float4S0_S0_f
	.type	_Z47__device_stub__Z14leap_frog_1p_2P6float4S0_S0_fP6float4S0_S0_f, @function
_Z47__device_stub__Z14leap_frog_1p_2P6float4S0_S0_fP6float4S0_S0_f:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14leap_frog_1p_2P6float4S0_S0_f(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L19:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z47__device_stub__Z14leap_frog_1p_2P6float4S0_S0_fP6float4S0_S0_f, .-_Z47__device_stub__Z14leap_frog_1p_2P6float4S0_S0_fP6float4S0_S0_f
	.globl	_Z14leap_frog_1p_2P6float4S0_S0_f
	.type	_Z14leap_frog_1p_2P6float4S0_S0_f, @function
_Z14leap_frog_1p_2P6float4S0_S0_f:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z14leap_frog_1p_2P6float4S0_S0_fP6float4S0_S0_f
	.cfi_endproc
.LFE2057:
	.size	_Z14leap_frog_1p_2P6float4S0_S0_f, .-_Z14leap_frog_1p_2P6float4S0_S0_f
	.globl	_Z33__device_stub__Z3accP6float4S0_ffP6float4S0_ff
	.type	_Z33__device_stub__Z3accP6float4S0_ffP6float4S0_ff, @function
_Z33__device_stub__Z3accP6float4S0_ffP6float4S0_ff:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	40(%rsp), %rdx
	movq	%rsi, 16(%rsp)
	leaq	56(%rsp), %rdi
	leaq	68(%rsp), %rsi
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3accP6float4S0_ff(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L24:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z33__device_stub__Z3accP6float4S0_ffP6float4S0_ff, .-_Z33__device_stub__Z3accP6float4S0_ffP6float4S0_ff
	.globl	_Z3accP6float4S0_ff
	.type	_Z3accP6float4S0_ff, @function
_Z3accP6float4S0_ff:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z3accP6float4S0_ffP6float4S0_ff
	.cfi_endproc
.LFE2059:
	.size	_Z3accP6float4S0_ff, .-_Z3accP6float4S0_ff
	.section	.rodata.str1.1
.LC9:
	.string	"usage: nbody -N#bodies [-T#threads/block] [-S#timesteps] -P#tiles\n"
.LC10:
	.string	"#bodies must be a multiple of #threads/block!\n"
.LC11:
	.string	"#bodies must be a multiple of #p!\n"
.LC16:
	.string	"%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	cmpl	$1, %edi
	jg	.L30
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	jmp	.L47
.L30:
	leal	-2(%rdi), %eax
	leaq	8(%rsi), %rbx
	leaq	16(%rsi,%rax,8), %rbp
.L37:
	movq	(%rbx), %rdi
	cmpb	$45, (%rdi)
	jne	.L31
	movb	1(%rdi), %al
	cmpb	$83, %al
	je	.L32
	jg	.L33
	cmpb	$78, %al
	je	.L34
	cmpb	$80, %al
	jne	.L31
	addq	$2, %rdi
	call	atoi@PLT
	movl	%eax, _ZL1P(%rip)
	jmp	.L31
.L33:
	cmpb	$84, %al
	jne	.L31
	addq	$2, %rdi
	call	atoi@PLT
	movl	%eax, _ZL3TPB(%rip)
	jmp	.L31
.L34:
	addq	$2, %rdi
	call	atoi@PLT
	movl	%eax, _ZL1N(%rip)
	jmp	.L31
.L32:
	addq	$2, %rdi
	call	atoi@PLT
	movl	%eax, _ZL9TIMESTEPS(%rip)
.L31:
	addq	$8, %rbx
	cmpq	%rbx, %rbp
	jne	.L37
	movslq	_ZL1N(%rip), %rbx
	movl	%ebx, %eax
	cltd
	idivl	_ZL3TPB(%rip)
	testl	%edx, %edx
	je	.L38
	leaq	.LC10(%rip), %rsi
.L48:
	movl	$2, %edi
	xorl	%eax, %eax
.L47:
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L38:
	movl	%ebx, %eax
	leaq	.LC11(%rip), %rsi
	cltd
	idivl	_ZL1P(%rip)
	movl	%edx, %ebp
	testl	%edx, %edx
	jne	.L48
	salq	$4, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, _ZL6r_host(%rip)
	call	malloc@PLT
	movq	%rbx, %rsi
	leaq	_ZL1a(%rip), %rdi
	movabsq	$4294967297, %rbx
	movq	%rax, _ZL6v_host(%rip)
	call	cudaMalloc@PLT
	movslq	_ZL1N(%rip), %rsi
	leaq	_ZL1r(%rip), %rdi
	salq	$4, %rsi
	call	cudaMalloc@PLT
	movslq	_ZL1N(%rip), %rsi
	leaq	_ZL1v(%rip), %rdi
	salq	$4, %rsi
	call	cudaMalloc@PLT
	movl	$188, %edi
	call	_ZL16check_cuda_erroriPKc.constprop.0
	movl	$1, %edi
	call	srand@PLT
	call	_Z4initv
	movslq	_ZL1N(%rip), %rdx
	movl	$1, %ecx
	movq	_ZL6r_host(%rip), %rsi
	movq	_ZL1r(%rip), %rdi
	salq	$4, %rdx
	call	cudaMemcpy@PLT
	movslq	_ZL1N(%rip), %rdx
	movl	$1, %ecx
	movq	_ZL6v_host(%rip), %rsi
	movq	_ZL1v(%rip), %rdi
	salq	$4, %rdx
	call	cudaMemcpy@PLT
	movl	$197, %edi
	call	_ZL16check_cuda_erroriPKc.constprop.0
	movq	%rsp, %rdi
	call	cudaEventCreate@PLT
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L40:
	cmpl	%ebp, _ZL9TIMESTEPS(%rip)
	jle	.L49
	movl	_ZL1N(%rip), %eax
	movq	%rbx, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	_ZL1P(%rip), %ecx
	movq	%rbx, 20(%rsp)
	cltd
	movl	24(%rsp), %esi
	idivl	%ecx
	movl	%ecx, 28(%rsp)
	movl	36(%rsp), %ecx
	movq	28(%rsp), %rdx
	movl	%eax, 16(%rsp)
	movq	16(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movss	.LC12(%rip), %xmm1
	movss	.LC13(%rip), %xmm0
	movq	_ZL1a(%rip), %rsi
	movq	_ZL1r(%rip), %rdi
	call	_Z33__device_stub__Z3accP6float4S0_ffP6float4S0_ff
.L41:
	movl	_ZL1N(%rip), %eax
	movq	%rbx, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	_ZL3TPB(%rip), %ecx
	movq	%rbx, 20(%rsp)
	cltd
	movl	24(%rsp), %esi
	idivl	%ecx
	movl	%ecx, 28(%rsp)
	movl	36(%rsp), %ecx
	movq	28(%rsp), %rdx
	movl	%eax, 16(%rsp)
	movq	16(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movss	.LC14(%rip), %xmm0
	movq	_ZL1r(%rip), %rdx
	movq	_ZL1v(%rip), %rsi
	movq	_ZL1a(%rip), %rdi
	call	_Z47__device_stub__Z14leap_frog_1p_2P6float4S0_S0_fP6float4S0_S0_f
.L42:
	incl	%ebp
	jmp	.L40
.L49:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	$221, %edi
	call	_ZL16check_cuda_erroriPKc.constprop.0
	cvtsi2ssl	_ZL1N(%rip), %xmm1
	movl	$2, %edi
	movb	$1, %al
	cvtsi2ssl	_ZL9TIMESTEPS(%rip), %xmm0
	leaq	.LC16(%rip), %rsi
	mulss	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	divss	28(%rsp), %xmm0
	mulss	.LC15(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	_ZL6r_host(%rip), %rdi
	call	free@PLT
	movq	_ZL6v_host(%rip), %rdi
	call	free@PLT
	movq	_ZL1a(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL1r(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL1v(%rip), %rdi
	call	cudaFree@PLT
	movl	$233, %edi
	call	_ZL16check_cuda_erroriPKc.constprop.0
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z3accP6float4S0_ff"
.LC18:
	.string	"_Z14leap_frog_1p_2P6float4S0_S0_f"
.LC19:
	.string	"a"
.LC20:
	.string	"r"
.LC21:
	.string	"v"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z3accP6float4S0_ff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14leap_frog_1p_2P6float4S0_S0_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	movl	$8, %r9d
	leaq	_ZL1a(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL1r(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$8, %r9d
	movq	%rdx, %rcx
	leaq	_ZL1v(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL1v
	.comm	_ZL1v,8,8
	.local	_ZL6v_host
	.comm	_ZL6v_host,8,8
	.local	_ZL1r
	.comm	_ZL1r,8,8
	.local	_ZL6r_host
	.comm	_ZL6r_host,8,8
	.local	_ZL1a
	.comm	_ZL1a,8,8
	.data
	.align 4
	.type	_ZL9TIMESTEPS, @object
	.size	_ZL9TIMESTEPS, 4
_ZL9TIMESTEPS:
	.long	1000
	.local	_ZL1P
	.comm	_ZL1P,4,4
	.align 4
	.type	_ZL3TPB, @object
	.size	_ZL3TPB, 4
_ZL3TPB:
	.long	128
	.local	_ZL1N
	.comm	_ZL1N,4,4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.align 4
.LC3:
	.long	1065353216
	.align 4
.LC4:
	.long	1092616192
	.align 4
.LC5:
	.long	1056964608
	.align 4
.LC8:
	.long	1112014848
	.align 4
.LC12:
	.long	1073741824
	.align 4
.LC13:
	.long	1036831949
	.align 4
.LC14:
	.long	1008981770
	.align 4
.LC15:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

/* check for CUDA error */
#define CHECK_ERROR check_cuda_error(__LINE__-1, __FILE__)

/* #bodies */
static int N;

/* #threads/block (leapfrog) */
static int TPB = 128;

/* #tiles (acceleration kernel) */
static int P;

/* #timesteps */
static int TIMESTEPS = 1000;
/* softening factor (square), G, \Delta t */
static const float EPS = 0.1f, G = 2.f, DELTA_T = 0.01f;

/* acceleration */
__device__ float4 *a;
/* x,y,z: position; w: mass */
static float4 *r_host;
__device__ float4 *r;
/* velocity */
static float4 *v_host;
__device__ float4 *v;

/* random number in [0,1] */
static inline float rnd()
{
	return (float)rand() / RAND_MAX;
}

/* check for CUDA error */
static void check_cuda_error(const int line, const char *file)
{
	hipError_t e;

	e = hipGetLastError();
	if (e != hipSuccess) {
		printf("CUDA error: %s, line %i, file '%s'\n",
		       hipGetErrorString(e), line, file);
		exit(1);
	}
}

/* leap frog integration kernel (1 particle/thread) */
__global__ void leap_frog_1p_2(float4 *a, float4 *v, float4 *r, float delta_t)
{
	int i = threadIdx.x + __mul24(blockIdx.x, blockDim.x);
	float3 v_tmp;

	v_tmp.x = v[i].x;
	v_tmp.y = v[i].y;
	v_tmp.z = v[i].z;

	v_tmp.x += a[i].x * delta_t;
	v_tmp.y += a[i].y * delta_t;
	v_tmp.z += a[i].z * delta_t;

	r[i].x += v_tmp.x * delta_t;
	r[i].y += v_tmp.y * delta_t;
	r[i].z += v_tmp.z * delta_t;

	v[i] = make_float4(v_tmp.x, v_tmp.y, v_tmp.z, 0.f);
}

/* body-body interaction, returns a_i */
__device__ float3 interaction(float3 ri, float4 rj, float eps)
{
	float3 rij, ai;
	float dst_sqr, cube, inv_sqrt;

	/* distance vector */
	rij.x = rj.x - ri.x;
	rij.y = rj.y - ri.y;
	rij.z = rj.z - ri.z;

	/* compute acceleration */
	dst_sqr = rij.x*rij.x + rij.y*rij.y + rij.z*rij.z + eps;
	cube = dst_sqr * dst_sqr * dst_sqr;
	inv_sqrt = rsqrtf(cube) * rj.w;

	/* acceleration a_i */
	ai.x = rij.x * inv_sqrt;
	ai.y = rij.y * inv_sqrt;
	ai.z = rij.z * inv_sqrt;

	return ai;
}

/* calculate accelerations */
__global__ void acc(float4 *r, float4 *a, float eps, float g)
{
	/* dynamically allocated shared memory */
	extern __shared__ float4 shared[];
	/* acceleration a_i */
	float3 ai = make_float3(0.f, 0.f, 0.f), tmp;
	/* position particle i */
	float3 ri;
	/* particle i */
	int i = threadIdx.x + __mul24(blockIdx.x, blockDim.x);
	int k, l;

	/* get position of particle i */
	ri.x = r[i].x;
	ri.y = r[i].y;
	ri.z = r[i].z;	

	/* loop over tiles */
	for (k = 0; k < gridDim.x; ++k) {
		/* load position and mass into shared memory */
		shared[threadIdx.x] = r[__mul24(k, blockDim.x) + threadIdx.x];
		__syncthreads();

		/* loop over particles in a tile */
		#pragma unroll 32
		for (l = 0; l < blockDim.x; ++l) {
			tmp = interaction(ri, shared[l], eps);
			ai.x += tmp.x;
			ai.y += tmp.y;
			ai.z += tmp.z;
		}

		/* wait for other threads to finish calculation */
		__syncthreads();
	}

	/* save acceleration a_i in global memory */
	a[i] = make_float4(ai.x*g, ai.y*g, ai.z*g, 0.f);
}

void init();

int main(int argc, char *argv[])
{
	hipEvent_t start, stop;
	float time;
	int i, timestep;

	if (argc < 2) {
		printf("usage: nbody -N#bodies [-T#threads/block] [-S#timesteps] -P#tiles\n");
		exit(1);
	}

	/* get command line parameters */
	for (i = 1; i < argc; ++i) {
		if (argv[i][0] == '-') {
			switch (argv[i][1]) {
			case 'N':
				N = atoi(argv[i]+2);
				break;
			case 'T':
				TPB = atoi(argv[i]+2);
				break;
			case 'S':
				TIMESTEPS = atoi(argv[i]+2);
				break;
			case 'P':
				P = atoi(argv[i]+2);
				break;
			default:
				break;
			}
		}
	}

	/*printf("N: %i, TPB: %i, TIMESTEPS: %i, P: %i\n", N, TPB, TIMESTEPS, P);*/

	if (N % TPB) {
		printf("#bodies must be a multiple of #threads/block!\n");
		exit(1);
	}

	if (N % P) {
		printf("#bodies must be a multiple of #p!\n");
		exit(1);
	}

	/* alloc host memory */
	r_host = (float4 *)malloc(N*sizeof(float4));
	v_host = (float4 *)malloc(N*sizeof(float4));
	/* alloc device memory */
	hipMalloc((void **)&a, N*sizeof(float4));
	hipMalloc((void **)&r, N*sizeof(float4));
	hipMalloc((void **)&v, N*sizeof(float4));
	CHECK_ERROR;

	/* generate initial configuration */
	srand(1);
	init();

	/* copy config to device memory */
	hipMemcpy(r, r_host, N*sizeof(float4), hipMemcpyHostToDevice);
	hipMemcpy(v, v_host, N*sizeof(float4), hipMemcpyHostToDevice);
	CHECK_ERROR;

	/* start counter */
	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start, 0);

	/* integration steps */
	for (timestep = 0; timestep < TIMESTEPS; ++timestep) {
		/* update accelerations */
		acc<<<N/P, P>>>(r, a, EPS, G);

		/* leap frog */
		leap_frog_1p_2<<<N/TPB, TPB>>>(a, v, r, DELTA_T);
		/*cudaMemcpy(r_host, r, N * sizeof(float3), cudaMemcpyDeviceToHost);
		printf("#1: x: %f, y: %f, z: %f\n", r_host[0].x, r_host[0].y, r_host[0].z);
		printf("#2: x: %f, y: %f, z: %f\n", r_host[1].x, r_host[1].y, r_host[1].z);*/
	}

	/* stop counter */
	hipEventRecord(stop, 0);
	hipEventSynchronize(stop);
	/* unit: milliseconds */
	hipEventElapsedTime(&time, start, stop);
	CHECK_ERROR;
	/*printf("elapsed time: %f\n", time);
	printf("#interactions/s: %f\n", ((float)TIMESTEPS*N*N) / time * 1000);*/
	printf("%f\n", ((float)TIMESTEPS*N*N) / time * 1000);

	/* free host memory */
	free(r_host);
	free(v_host);
	/* free device memory */
	hipFree(a);
	hipFree(r);
	hipFree(v);
	CHECK_ERROR;

	return 0;
}

/* generate initial configuration */
void init()
{
	int i;

	for (i = 0; i < N; ++i) {
		/* mass */
		r_host[i].w = rnd()>0.5 ? 1.f : 10.f;

		/* velocity */
		v_host[i].x = 3.f;
		v_host[i].y = rnd() * 10.f;
		v_host[i].z = -5.f;

		/* position */
		r_host[i].x = rnd() * 50.f;
		r_host[i].y = rnd() * 50.f;
		r_host[i].z = rnd() * 50.f;
	}
}

	.text
	.file	"kernel.hip"
	.globl	_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f # -- Begin function _Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.type	_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f,@function
_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f: # @_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f, .Lfunc_end0-_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff # -- Begin function _Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff
	.type	_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff,@function
_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff: # @_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	8(%rsp), %rsi
	movss	%xmm1, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3accP15HIP_vector_typeIfLj4EES1_ff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff, .Lfunc_end1-_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3dcccccd                      # float 0.100000001
.LCPI2_1:
	.long	0x40000000                      # float 2
.LCPI2_2:
	.long	0x3c23d70a                      # float 0.00999999977
.LCPI2_3:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jl	.LBB2_9
# %bb.1:                                # %.preheader.preheader
	movq	%rsi, %rbx
	movl	%edi, %r14d
	movl	$1, %r15d
	movl	$101, %ebp
.LBB2_2:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r15,8), %rdi
	cmpb	$45, (%rdi)
	jne	.LBB2_6
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movb	1(%rdi), %al
	addb	$-78, %al
	cmpb	$6, %al
	ja	.LBB2_6
# %bb.4:                                # %switch.hole_check
                                        #   in Loop: Header=BB2_2 Depth=1
	movzbl	%al, %eax
	btl	%eax, %ebp
	jae	.LBB2_6
# %bb.5:                                # %switch.lookup
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	.Lswitch.table.main(,%rax,8), %r12
	addq	$2, %rdi
	callq	atoi
	movl	%eax, (%r12)
.LBB2_6:                                #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB2_2
# %bb.7:
	movslq	_ZL1N(%rip), %rbx
	movl	%ebx, %eax
	cltd
	idivl	_ZL3TPB(%rip)
	testl	%edx, %edx
	jne	.LBB2_8
# %bb.11:
	movl	%ebx, %eax
	cltd
	idivl	_ZL1P(%rip)
	testl	%edx, %edx
	jne	.LBB2_12
# %bb.13:
	shlq	$4, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, _ZL6r_host(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, _ZL6v_host(%rip)
	movl	$a, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movslq	_ZL1N(%rip), %rsi
	shlq	$4, %rsi
	movl	$r, %edi
	callq	hipMalloc
	movslq	_ZL1N(%rip), %rsi
	shlq	$4, %rsi
	movl	$v, %edi
	callq	hipMalloc
	movl	$190, %edi
	callq	_ZL16check_cuda_erroriPKc
	movl	$1, %edi
	callq	srand
	callq	_Z4initv
	movq	r(%rip), %rdi
	movq	_ZL6r_host(%rip), %rsi
	movslq	_ZL1N(%rip), %rdx
	shlq	$4, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	v(%rip), %rdi
	movq	_ZL6v_host(%rip), %rsi
	movslq	_ZL1N(%rip), %rdx
	shlq	$4, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$199, %edi
	callq	_ZL16check_cuda_erroriPKc
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	cmpl	$0, _ZL9TIMESTEPS(%rip)
	jle	.LBB2_20
# %bb.14:                               # %.lr.ph.preheader
	movabsq	$4294967296, %r14               # imm = 0x100000000
.LBB2_15:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	_ZL1N(%rip), %eax
	movl	_ZL1P(%rip), %ecx
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	orq	%r14, %rax
	orq	%r14, %rcx
	movq	%rax, %rdi
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_17
# %bb.16:                               #   in Loop: Header=BB2_15 Depth=1
	movq	r(%rip), %rdi
	movq	a(%rip), %rsi
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	callq	_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff
.LBB2_17:                               #   in Loop: Header=BB2_15 Depth=1
	movl	_ZL1N(%rip), %eax
	movl	_ZL3TPB(%rip), %ecx
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	orq	%r14, %rax
	orq	%r14, %rcx
	movq	%rax, %rdi
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_19
# %bb.18:                               #   in Loop: Header=BB2_15 Depth=1
	movq	a(%rip), %rdi
	movq	v(%rip), %rsi
	movq	r(%rip), %rdx
	movss	.LCPI2_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
.LBB2_19:                               #   in Loop: Header=BB2_15 Depth=1
	incl	%ebx
	cmpl	_ZL9TIMESTEPS(%rip), %ebx
	jl	.LBB2_15
.LBB2_20:                               # %._crit_edge
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$223, %edi
	callq	_ZL16check_cuda_erroriPKc
	xorps	%xmm0, %xmm0
	cvtsi2ssl	_ZL9TIMESTEPS(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ssl	_ZL1N(%rip), %xmm1
	mulss	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	divss	(%rbx), %xmm0
	mulss	.LCPI2_3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	_ZL6r_host(%rip), %rdi
	callq	free
	movq	_ZL6v_host(%rip), %rdi
	callq	free
	movq	a(%rip), %rdi
	callq	hipFree
	movq	r(%rip), %rdi
	callq	hipFree
	movq	v(%rip), %rdi
	callq	hipFree
	movl	$235, %edi
	callq	_ZL16check_cuda_erroriPKc
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_9:
	.cfi_def_cfa_offset 80
	movl	$.Lstr.2, %edi
	jmp	.LBB2_10
.LBB2_8:
	movl	$.Lstr.1, %edi
	jmp	.LBB2_10
.LBB2_12:
	movl	$.Lstr, %edi
.LBB2_10:
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL16check_cuda_erroriPKc,@function # -- Begin function _ZL16check_cuda_erroriPKc
_ZL16check_cuda_erroriPKc:              # @_ZL16check_cuda_erroriPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %edi
	movl	$.L.str.3, %ecx
	movq	%rax, %rsi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	_ZL16check_cuda_erroriPKc, .Lfunc_end3-_ZL16check_cuda_erroriPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z4initv
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI4_1:
	.long	0x3f000000                      # float 0.5
.LCPI4_3:
	.long	0x41200000                      # float 10
.LCPI4_4:
	.long	0x42480000                      # float 50
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	2, 0x0
.LCPI4_2:
	.long	0x41200000                      # float 10
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z4initv
	.type	_Z4initv,@function
_Z4initv:                               # @_Z4initv
	.cfi_startproc
# %bb.0:
	cmpl	$0, _ZL1N(%rip)
	jle	.LBB4_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	xorl	%eax, %eax
	ucomiss	.LCPI4_1(%rip), %xmm0
	seta	%al
	movss	.LCPI4_2(,%rax,4), %xmm0        # xmm0 = mem[0],zero,zero,zero
	movq	_ZL6r_host(%rip), %rax
	movss	%xmm0, 12(%rax,%rbx)
	movq	_ZL6v_host(%rip), %rax
	movl	$1077936128, (%rax,%rbx)        # imm = 0x40400000
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	mulss	.LCPI4_3(%rip), %xmm0
	movq	_ZL6v_host(%rip), %rax
	movss	%xmm0, 4(%rax,%rbx)
	movl	$-1063256064, 8(%rax,%rbx)      # imm = 0xC0A00000
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	movss	.LCPI4_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movq	_ZL6r_host(%rip), %rax
	movss	%xmm0, (%rax,%rbx)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	mulss	.LCPI4_4(%rip), %xmm0
	movq	_ZL6r_host(%rip), %rax
	movss	%xmm0, 4(%rax,%rbx)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	mulss	.LCPI4_4(%rip), %xmm0
	movq	_ZL6r_host(%rip), %rax
	movss	%xmm0, 8(%rax,%rbx)
	incq	%r14
	movslq	_ZL1N(%rip), %rax
	addq	$16, %rbx
	cmpq	%rax, %r14
	jl	.LBB4_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB4_4:                                # %._crit_edge
	retq
.Lfunc_end4:
	.size	_Z4initv, .Lfunc_end4-_Z4initv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3accP15HIP_vector_typeIfLj4EES1_ff, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$a, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$r, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$v, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	a,@object                       # @a
	.local	a
	.comm	a,8,8
	.type	r,@object                       # @r
	.local	r
	.comm	r,8,8
	.type	v,@object                       # @v
	.local	v
	.comm	v,8,8
	.type	_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f,@object # @_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.section	.rodata,"a",@progbits
	.globl	_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.p2align	3, 0x0
_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f:
	.quad	_Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.size	_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f, 8

	.type	_Z3accP15HIP_vector_typeIfLj4EES1_ff,@object # @_Z3accP15HIP_vector_typeIfLj4EES1_ff
	.globl	_Z3accP15HIP_vector_typeIfLj4EES1_ff
	.p2align	3, 0x0
_Z3accP15HIP_vector_typeIfLj4EES1_ff:
	.quad	_Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff
	.size	_Z3accP15HIP_vector_typeIfLj4EES1_ff, 8

	.type	_ZL1N,@object                   # @_ZL1N
	.local	_ZL1N
	.comm	_ZL1N,4,4
	.type	_ZL3TPB,@object                 # @_ZL3TPB
	.data
	.p2align	2, 0x0
_ZL3TPB:
	.long	128                             # 0x80
	.size	_ZL3TPB, 4

	.type	_ZL9TIMESTEPS,@object           # @_ZL9TIMESTEPS
	.p2align	2, 0x0
_ZL9TIMESTEPS:
	.long	1000                            # 0x3e8
	.size	_ZL9TIMESTEPS, 4

	.type	_ZL1P,@object                   # @_ZL1P
	.local	_ZL1P
	.comm	_ZL1P,4,4
	.type	_ZL6r_host,@object              # @_ZL6r_host
	.local	_ZL6r_host
	.comm	_ZL6r_host,8,8
	.type	_ZL6v_host,@object              # @_ZL6v_host
	.local	_ZL6v_host
	.comm	_ZL6v_host,8,8
	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/m-thu/sandbox/master/nbody/nbody/kernel.hip"
	.size	.L.str.3, 106

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%f\n"
	.size	.L.str.4, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CUDA error: %s, line %i, file '%s'\n"
	.size	.L.str.5, 36

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f"
	.size	.L__unnamed_1, 51

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z3accP15HIP_vector_typeIfLj4EES1_ff"
	.size	.L__unnamed_2, 37

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"a"
	.size	.L__unnamed_3, 2

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"r"
	.size	.L__unnamed_4, 2

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"v"
	.size	.L__unnamed_5, 2

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"#bodies must be a multiple of #p!"
	.size	.Lstr, 34

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"#bodies must be a multiple of #threads/block!"
	.size	.Lstr.1, 46

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"usage: nbody -N#bodies [-T#threads/block] [-S#timesteps] -P#tiles"
	.size	.Lstr.2, 66

	.type	.Lswitch.table.main,@object     # @switch.table.main
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.Lswitch.table.main:
	.quad	_ZL1N
	.quad	_ZL1N
	.quad	_ZL1P
	.quad	_ZL1N
	.quad	_ZL1N
	.quad	_ZL9TIMESTEPS
	.quad	_ZL3TPB
	.size	.Lswitch.table.main, 56

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.addrsig_sym _Z18__device_stub__accP15HIP_vector_typeIfLj4EES1_ff
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym a
	.addrsig_sym r
	.addrsig_sym v
	.addrsig_sym _Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.addrsig_sym _Z3accP15HIP_vector_typeIfLj4EES1_ff
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f ; -- Begin function _Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.globl	_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
	.p2align	8
	.type	_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f,@function
_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f: ; @_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_bfe_i32 s3, s15, 0x180000
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s3, s2, v[0:1]
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s0, s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	v_add_co_u32 v9, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v1, vcc_lo
	global_load_b96 v[0:2], v[9:10], off
	global_load_b96 v[3:5], v[3:4], off
	global_load_b96 v[6:8], v[11:12], off
	s_waitcnt vmcnt(1)
	v_fma_f32 v0, s0, v3, v0
	v_fma_f32 v1, s0, v4, v1
	v_dual_fmac_f32 v2, s0, v5 :: v_dual_mov_b32 v3, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v6, s0, v0, v6
	v_fma_f32 v7, s0, v1, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v8, s0, v2
	global_store_b96 v[11:12], v[6:8], off
	global_store_b128 v[9:10], v[0:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f, .Lfunc_end0-_Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 240
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3accP15HIP_vector_typeIfLj4EES1_ff ; -- Begin function _Z3accP15HIP_vector_typeIfLj4EES1_ff
	.globl	_Z3accP15HIP_vector_typeIfLj4EES1_ff
	.p2align	8
	.type	_Z3accP15HIP_vector_typeIfLj4EES1_ff,@function
_Z3accP15HIP_vector_typeIfLj4EES1_ff:   ; @_Z3accP15HIP_vector_typeIfLj4EES1_ff
; %bb.0:
	s_clause 0x3
	s_load_b32 s9, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_bfe_i32 s0, s15, 0x180000
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s9, 0xffff
	s_cmp_eq_u32 s8, 0
	v_mad_u64_u32 v[1:2], null, s0, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[4:5], 4, v[1:2]
	s_cbranch_scc1 .LBB1_10
; %bb.1:                                ; %.lr.ph48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v5, vcc_lo
	s_cmp_lg_u32 s9, 0
	v_lshl_add_u32 v7, v0, 4, 0
	s_cselect_b32 s0, -1, 0
	global_load_b96 v[1:3], v[1:2], off
	s_and_b32 s11, s9, 31
	s_cmp_gt_u32 s9, 31
	v_cndmask_b32_e64 v8, 0, 1, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s12, s9, 0xffe0
	v_cndmask_b32_e64 v9, 0, 1, s0
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v10, 0
	v_cmp_ne_u32_e64 s0, 1, v8
	v_mov_b32_e32 v8, 0
	v_cmp_ne_u32_e64 s1, 1, v9
	v_mov_b32_e32 v9, 0
	s_cmp_lg_u32 s11, 0
	s_cselect_b32 s13, -1, 0
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_5 Depth 2
                                        ;     Child Loop BB1_8 Depth 2
	s_bfe_i32 s14, s10, 0x180000
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s14, s9, v[0:1]
	v_mov_b32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 4, v[11:12]
	v_add_co_u32 v11, vcc_lo, s4, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s0
	global_load_b128 v[11:14], v[11:12], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v7, v[11:14]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB1_9
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s14, 0
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_6
; %bb.4:                                ; %.lr.ph.preheader73
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s15, 0
.LBB1_5:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v11, s15
	s_add_i32 s14, s14, 32
	s_addk_i32 s15, 0x200
	s_cmp_lg_u32 s12, s14
	ds_load_b128 v[12:15], v11
	ds_load_b128 v[16:19], v11 offset:16
	ds_load_b128 v[20:23], v11 offset:32
	ds_load_b128 v[24:27], v11 offset:48
	s_waitcnt lgkmcnt(3)
	v_dual_sub_f32 v12, v12, v1 :: v_dual_sub_f32 v13, v13, v2
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v28, v13, v13
	v_fmac_f32_e32 v28, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v28, v14, v14
	v_add_f32_e32 v28, s2, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v29, v28, v28
	v_mul_f32_e32 v28, v28, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v28
	v_mul_f32_e32 v29, 0x4b800000, v28
	v_cndmask_b32_e32 v28, v28, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v28, v28
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v29, 0x45800000, v28
	v_cndmask_b32_e32 v28, v28, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v28
	v_fmac_f32_e32 v6, v14, v15
	s_waitcnt lgkmcnt(2)
	v_sub_f32_e32 v14, v18, v3
	v_fmac_f32_e32 v8, v13, v15
	v_sub_f32_e32 v13, v17, v2
	v_fmac_f32_e32 v9, v12, v15
	v_sub_f32_e32 v12, v16, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v13, v13
	v_fmac_f32_e32 v15, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v14, v14
	v_add_f32_e32 v15, s2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v15, v15
	v_mul_f32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v15
	v_mul_f32_e32 v16, 0x4b800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v15, v15
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, 0x45800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v19, v15
	v_fmac_f32_e32 v6, v14, v15
	s_waitcnt lgkmcnt(1)
	v_sub_f32_e32 v14, v22, v3
	v_fmac_f32_e32 v8, v13, v15
	v_sub_f32_e32 v13, v21, v2
	v_fmac_f32_e32 v9, v12, v15
	v_sub_f32_e32 v12, v20, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v13, v13
	v_fmac_f32_e32 v15, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v14, v14
	v_add_f32_e32 v15, s2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v15, v15
	v_mul_f32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v15
	v_mul_f32_e32 v16, 0x4b800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v15, v15
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, 0x45800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v23, v15
	v_fmac_f32_e32 v6, v14, v15
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v14, v26, v3
	v_fmac_f32_e32 v8, v13, v15
	v_sub_f32_e32 v13, v25, v2
	v_fmac_f32_e32 v9, v12, v15
	v_sub_f32_e32 v12, v24, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v13, v13
	v_fmac_f32_e32 v15, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v14, v14
	v_add_f32_e32 v15, s2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v15, v15
	v_mul_f32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v15
	v_mul_f32_e32 v16, 0x4b800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v15, v15
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, 0x45800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v27, v15
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:64
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:80
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:96
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:112
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:128
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:144
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:160
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:176
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:192
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:208
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:224
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:240
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:256
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:272
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:288
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:304
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:320
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:336
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:352
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:368
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:384
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:400
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:416
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:432
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:448
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:464
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[12:15], v11 offset:480
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v13, v13, v2 :: v_dual_sub_f32 v12, v12, v1
	v_sub_f32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v13, v13
	v_fmac_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v14, v14
	v_add_f32_e32 v16, s2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v16, v16
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v16
	v_fmac_f32_e32 v9, v12, v15
	v_fmac_f32_e32 v8, v13, v15
	v_fmac_f32_e32 v6, v14, v15
	ds_load_b128 v[11:14], v11 offset:496
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v12, v12, v2 :: v_dual_sub_f32 v11, v11, v1
	v_sub_f32_e32 v13, v13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v12, v12
	v_fmac_f32_e32 v15, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v13, v13
	v_add_f32_e32 v15, s2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v15, v15
	v_mul_f32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v15
	v_mul_f32_e32 v16, 0x4b800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v15, v15
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, 0x45800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v14, v15
	v_fmac_f32_e32 v6, v13, v14
	v_fmac_f32_e32 v9, v11, v14
	v_fmac_f32_e32 v8, v12, v14
	s_cbranch_scc1 .LBB1_5
.LBB1_6:                                ; %._crit_edge.loopexit.unr-lcssa
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB1_9
; %bb.7:                                ; %.lr.ph.epil.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_lshl_b32 s14, s14, 4
	s_mov_b32 s15, s11
	s_add_i32 s14, s14, 0
.LBB1_8:                                ; %.lr.ph.epil
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v11, s14
	s_add_i32 s15, s15, -1
	s_add_i32 s14, s14, 16
	s_cmp_lg_u32 s15, 0
	ds_load_b128 v[11:14], v11
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v12, v12, v2 :: v_dual_sub_f32 v11, v11, v1
	v_sub_f32_e32 v13, v13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v12, v12
	v_fmac_f32_e32 v15, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v13, v13
	v_add_f32_e32 v15, s2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v15, v15
	v_mul_f32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, 0x4b800000, v15
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v15, v15
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, 0x45800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v14, v15
	v_fmac_f32_e32 v9, v11, v14
	v_fmac_f32_e32 v8, v12, v14
	v_fmac_f32_e32 v6, v13, v14
	s_cbranch_scc1 .LBB1_8
.LBB1_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s10, s8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_2
	s_branch .LBB1_11
.LBB1_10:
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v9, 0
	v_mov_b32_e32 v8, 0
.LBB1_11:                               ; %._crit_edge49
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_dual_mul_f32 v0, s3, v9 :: v_dual_mul_f32 v1, s3, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mul_f32 v2, s3, v6 :: v_dual_mov_b32 v3, 0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_store_b128 v[4:5], v[0:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3accP15HIP_vector_typeIfLj4EES1_ff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z3accP15HIP_vector_typeIfLj4EES1_ff, .Lfunc_end1-_Z3accP15HIP_vector_typeIfLj4EES1_ff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4712
; NumSgprs: 18
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	a                       ; @a
	.type	a,@object
	.section	.bss,"aw",@nobits
	.globl	a
	.p2align	3, 0x0
a:
	.quad	0
	.size	a, 8

	.protected	r                       ; @r
	.type	r,@object
	.globl	r
	.p2align	3, 0x0
r:
	.quad	0
	.size	r, 8

	.protected	v                       ; @v
	.type	v,@object
	.globl	v
	.p2align	3, 0x0
v:
	.quad	0
	.size	v, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym a
	.addrsig_sym r
	.addrsig_sym v
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14leap_frog_1p_2P15HIP_vector_typeIfLj4EES1_S1_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3accP15HIP_vector_typeIfLj4EES1_ff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3accP15HIP_vector_typeIfLj4EES1_ff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     30
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
