/***
*	Ashutosh Dhar
*	Department of Electrical and Computer Engineeing
*	University of Illinois, Urbana-Champaign
*	
*/

#include <cuda.h>
#include <iostream>
#include <cstdio>

#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)

using namespace std;


__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
	
	//__shared__ double sh_start;
	//__shared__ double sh_stop;
	__shared__ long long int run_latency;
	
	unsigned int start_t, stop_t;
	//float local;	
	int load=0;	

	for(int i=0; i<DATA_SIZE; i++)
	{
		start_t = clock();
		load = data[load];
		stop_t = clock();
		__syncthreads();

		//data[load] = local + 1;
		
		run_latency += (stop_t - start_t);	
		__syncthreads();
	}


	latency[0] = (double)(run_latency)/(DATA_SIZE);
	
	
}

int main(int argc, char **argv)
{
	if(argc <2)
	{
		cerr<<"Enter iterations!";
		return -1;
	}
	
	ITERATIONS = atoi(argv[1]);
	DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;

	//double sum;
	int *data;
	data = (int*) malloc(sizeof(int)*DATA_SIZE);
	
	srand(12);	

	for(int i=0; i<DATA_SIZE; i++)
	{
		data[i] = i;//1.0*rand();
	}
	
	double *latency;

	latency = (double*) malloc((sizeof(double)) *1);
	
	double *d_latency;
	int *d_data;
	cudaError_t errorFlag = cudaSuccess;
	
	errorFlag = cudaMalloc((void**) &d_latency, (sizeof(double)*1));	

	if(errorFlag != cudaSuccess)                                                                  
        {       
                fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));                                                                                      
                exit(-1);                                                                             
        } 

	errorFlag = cudaMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));

        if(errorFlag != cudaSuccess)
        {
                fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));
                exit(-1);
        }

	errorFlag = cudaMemcpy(d_data, data,  (sizeof(int)*DATA_SIZE), cudaMemcpyHostToDevice);

        if(errorFlag != cudaSuccess)
        {
                fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));
                exit(-1);

        }


	dim3	dimBlock(THREADS_PER_SM,1,1);
	dim3 	dimGrid(BLOCKS_PER_SM,1,1);

	cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
	cudaDeviceSynchronize();

	errorFlag = cudaGetLastError();
	
	if(errorFlag != cudaSuccess) 	
	{
		fprintf(stderr, "Kernel launch error!  (error code %s)!\n", cudaGetErrorString(errorFlag));
		exit(-1);
	}	

	errorFlag = cudaMemcpy(latency, d_latency,  (sizeof(double)*1), cudaMemcpyDeviceToHost);

	if(errorFlag != cudaSuccess)                                                                  
        {       
                fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));                                                                                      
                exit(-1);                                                                             

        } 	

	
	cout<<"\nLatency\n";
        //for(int i=0; i<1; i++)
        //{
        //       sum+=latency[i+ITERATIONS] - latency[i];
        //}

	cout<<": "<< latency[0]<<endl;	

	cout<<endl;

	
	return 0;
}

	.file	"tmpxft_0028bd97_00000000-6_mem_latency.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z36__device_stub__Z13cache_latencyPdPiiPdPii
	.type	_Z36__device_stub__Z13cache_latencyPdPiiPdPii, @function
_Z36__device_stub__Z13cache_latencyPdPiiPdPii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13cache_latencyPdPii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z36__device_stub__Z13cache_latencyPdPiiPdPii, .-_Z36__device_stub__Z13cache_latencyPdPiiPdPii
	.globl	_Z13cache_latencyPdPii
	.type	_Z13cache_latencyPdPii, @function
_Z13cache_latencyPdPii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13cache_latencyPdPiiPdPii
	.cfi_endproc
.LFE3661:
	.size	_Z13cache_latencyPdPii, .-_Z13cache_latencyPdPii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Enter iterations!"
.LC1:
	.string	"Failed to alloc memory (error code %s)!\n"
.LC2:
	.string	"Failed to copyback (error code %s)!\n"
.LC3:
	.string	"Kernel launch error!  (error code %s)!\n"
.LC4:
	.string	"\nLatency\n"
.LC5:
	.string	": "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L9
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	orl	$-1, %eax
	jmp	.L8
.L9:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, ITERATIONS(%rip)
	imull	L2_CACHE_SIZE(%rip), %eax
	movl	%eax, DATA_SIZE(%rip)
	cltq
	leaq	0(,%rax,4), %rdi
	call	malloc@PLT
	movl	$12, %edi
	movq	%rax, %rbp
	call	srand@PLT
	movl	DATA_SIZE(%rip), %edx
	xorl	%eax, %eax
.L11:
	cmpl	%eax, %edx
	jle	.L24
	movl	%eax, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L11
.L24:
	movl	$8, %edi
	call	malloc@PLT
	movq	%rsp, %rdi
	movl	$8, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L21
	movslq	DATA_SIZE(%rip), %rsi
	leaq	8(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
.L21:
	call	cudaGetErrorString@PLT
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L22
.L14:
	movslq	DATA_SIZE(%rip), %rdx
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L15
.L23:
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rcx
.L22:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L15:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movl	DATA_SIZE(%rip), %edx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z36__device_stub__Z13cache_latencyPdPiiPdPii
.L16:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L17
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L22
.L17:
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L23
	leaq	_ZSt4cout(%rip), %rbp
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbp, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L8:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z13cache_latencyPdPii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13cache_latencyPdPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	DATA_SIZE
	.bss
	.align 4
	.type	DATA_SIZE, @object
	.size	DATA_SIZE, 4
DATA_SIZE:
	.zero	4
	.globl	L2_CACHE_SIZE
	.data
	.align 4
	.type	L2_CACHE_SIZE, @object
	.size	L2_CACHE_SIZE, 4
L2_CACHE_SIZE:
	.long	524288
	.globl	ITERATIONS
	.bss
	.align 4
	.type	ITERATIONS, @object
	.size	ITERATIONS, 4
ITERATIONS:
	.zero	4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/***
*	Ashutosh Dhar
*	Department of Electrical and Computer Engineeing
*	University of Illinois, Urbana-Champaign
*	
*/

#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>

#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)

using namespace std;


__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
	
	//__shared__ double sh_start;
	//__shared__ double sh_stop;
	__shared__ long long int run_latency;
	
	unsigned int start_t, stop_t;
	//float local;	
	int load=0;	

	for(int i=0; i<DATA_SIZE; i++)
	{
		start_t = clock();
		load = data[load];
		stop_t = clock();
		__syncthreads();

		//data[load] = local + 1;
		
		run_latency += (stop_t - start_t);	
		__syncthreads();
	}


	latency[0] = (double)(run_latency)/(DATA_SIZE);
	
	
}

int main(int argc, char **argv)
{
	if(argc <2)
	{
		cerr<<"Enter iterations!";
		return -1;
	}
	
	ITERATIONS = atoi(argv[1]);
	DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;

	//double sum;
	int *data;
	data = (int*) malloc(sizeof(int)*DATA_SIZE);
	
	srand(12);	

	for(int i=0; i<DATA_SIZE; i++)
	{
		data[i] = i;//1.0*rand();
	}
	
	double *latency;

	latency = (double*) malloc((sizeof(double)) *1);
	
	double *d_latency;
	int *d_data;
	hipError_t errorFlag = hipSuccess;
	
	errorFlag = hipMalloc((void**) &d_latency, (sizeof(double)*1));	

	if(errorFlag != hipSuccess)                                                                  
        {       
                fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));                                                                                      
                exit(-1);                                                                             
        } 

	errorFlag = hipMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));

        if(errorFlag != hipSuccess)
        {
                fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));
                exit(-1);
        }

	errorFlag = hipMemcpy(d_data, data,  (sizeof(int)*DATA_SIZE), hipMemcpyHostToDevice);

        if(errorFlag != hipSuccess)
        {
                fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));
                exit(-1);

        }


	dim3	dimBlock(THREADS_PER_SM,1,1);
	dim3 	dimGrid(BLOCKS_PER_SM,1,1);

	cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
	hipDeviceSynchronize();

	errorFlag = hipGetLastError();
	
	if(errorFlag != hipSuccess) 	
	{
		fprintf(stderr, "Kernel launch error!  (error code %s)!\n", hipGetErrorString(errorFlag));
		exit(-1);
	}	

	errorFlag = hipMemcpy(latency, d_latency,  (sizeof(double)*1), hipMemcpyDeviceToHost);

	if(errorFlag != hipSuccess)                                                                  
        {       
                fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));                                                                                      
                exit(-1);                                                                             

        } 	

	
	cout<<"\nLatency\n";
        //for(int i=0; i<1; i++)
        //{
        //       sum+=latency[i+ITERATIONS] - latency[i];
        //}

	cout<<": "<< latency[0]<<endl;	

	cout<<endl;

	
	return 0;
}

	.text
	.file	"mem_latency.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__cache_latencyPdPii # -- Begin function _Z28__device_stub__cache_latencyPdPii
	.type	_Z28__device_stub__cache_latencyPdPii,@function
_Z28__device_stub__cache_latencyPdPii:  # @_Z28__device_stub__cache_latencyPdPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13cache_latencyPdPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__cache_latencyPdPii, .Lfunc_end0-_Z28__device_stub__cache_latencyPdPii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	cmpl	$1, %edi
	jg	.LBB1_2
# %bb.1:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$-1, %eax
	jmp	.LBB1_17
.LBB1_2:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, ITERATIONS(%rip)
	movslq	L2_CACHE_SIZE(%rip), %rcx
	movslq	%eax, %rdi
	imulq	%rcx, %rdi
	movl	%edi, DATA_SIZE(%rip)
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	$12, %edi
	callq	srand
	movl	DATA_SIZE(%rip), %eax
	testl	%eax, %eax
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph.preheader
	xorl	%ecx, %ecx
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%r14,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
	movl	$8, %edi
	callq	malloc
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.8:
	movslq	DATA_SIZE(%rip), %rsi
	shlq	$2, %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.9:
	movq	8(%rsp), %rdi
	movslq	DATA_SIZE(%rip), %rdx
	shlq	$2, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.12:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	DATA_SIZE(%rip), %edx
	callq	_Z28__device_stub__cache_latencyPdPii
.LBB1_13:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	movq	16(%rsp), %rsi
	movl	$8, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.16:
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%rbx), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
.LBB1_17:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB1_6:
	.cfi_def_cfa_offset 48
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	jmp	.LBB1_7
.LBB1_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	jmp	.LBB1_7
.LBB1_14:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
.LBB1_7:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13cache_latencyPdPii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	ITERATIONS,@object              # @ITERATIONS
	.bss
	.globl	ITERATIONS
	.p2align	2, 0x0
ITERATIONS:
	.long	0                               # 0x0
	.size	ITERATIONS, 4

	.type	L2_CACHE_SIZE,@object           # @L2_CACHE_SIZE
	.data
	.globl	L2_CACHE_SIZE
	.p2align	2, 0x0
L2_CACHE_SIZE:
	.long	524288                          # 0x80000
	.size	L2_CACHE_SIZE, 4

	.type	DATA_SIZE,@object               # @DATA_SIZE
	.bss
	.globl	DATA_SIZE
	.p2align	2, 0x0
DATA_SIZE:
	.long	0                               # 0x0
	.size	DATA_SIZE, 4

	.type	_Z13cache_latencyPdPii,@object  # @_Z13cache_latencyPdPii
	.section	.rodata,"a",@progbits
	.globl	_Z13cache_latencyPdPii
	.p2align	3, 0x0
_Z13cache_latencyPdPii:
	.quad	_Z28__device_stub__cache_latencyPdPii
	.size	_Z13cache_latencyPdPii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter iterations!"
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to alloc memory (error code %s)!\n"
	.size	.L.str.1, 41

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to copyback (error code %s)!\n"
	.size	.L.str.2, 37

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Kernel launch error!  (error code %s)!\n"
	.size	.L.str.3, 40

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nLatency\n"
	.size	.L.str.4, 10

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	": "
	.size	.L.str.5, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13cache_latencyPdPii"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__cache_latencyPdPii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13cache_latencyPdPii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13cache_latencyPdPii  ; -- Begin function _Z13cache_latencyPdPii
	.globl	_Z13cache_latencyPdPii
	.p2align	8
	.type	_Z13cache_latencyPdPii,@function
_Z13cache_latencyPdPii:                 ; @_Z13cache_latencyPdPii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s3, s2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_getreg_b32 s5, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[1:2], v0
	s_sub_i32 s4, s5, s4
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, v1, s4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	ds_store_b64 v0, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	v_mov_b32_e32 v13, 0
	v_cvt_f64_i32_e32 v[5:6], s2
	s_load_b64 s[0:1], s[0:1], 0x0
	ds_load_b64 v[0:1], v13
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[1:2], v1
	v_cvt_f64_u32_e32 v[3:4], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[1:2], 32
	v_add_f64 v[0:1], v[0:1], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[2:3], null, v[5:6], v[5:6], v[0:1]
	v_rcp_f64_e32 v[7:8], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_div_scale_f64 v[9:10], vcc_lo, v[0:1], v[5:6], v[0:1]
	v_mul_f64 v[11:12], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], -v[2:3], v[11:12], v[9:10]
	v_div_fmas_f64 v[2:3], v[2:3], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[2:3], v[5:6], v[0:1]
	global_store_b64 v13, v[0:1], s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13cache_latencyPdPii
		.amdhsa_group_segment_fixed_size 8
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13cache_latencyPdPii, .Lfunc_end0-_Z13cache_latencyPdPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 8
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13cache_latencyPdPii
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z13cache_latencyPdPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
