// Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p4.cu -o assignment5-p4

#include <cmath>
#include <cuda.h>
#include <iostream>
#include <sys/time.h>

const uint64_t N = (1 << 12);
const uint64_t BLOCK_SIZE = (1 << 4);
const uint64_t TILE_SIZE = (1 << 5);

using namespace std;

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true) {
   if (code != cudaSuccess) {
      fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

double rtclock() {
  struct timezone Tzp;
  struct timeval Tp;
  int stat;
  stat = gettimeofday(&Tp, &Tzp);
  if (stat != 0) {
    cout << "Error return from gettimeofday: " << stat << "\n";
  }
  return (Tp.tv_sec + Tp.tv_usec * 1.0e-6);
}

__global__ void kernel1(uint64_t* A, uint64_t* B, uint64_t* C) {
  // SB: Write your code here
  uint64_t i =  blockIdx.y*blockDim.y + threadIdx.y;
  uint64_t j =  blockIdx.x*blockDim.x + threadIdx.x;
  uint64_t sum = 0;

  for (uint64_t k = 0; k < N; k++) {
    sum += A[i * N + k] * B[k * N + j];
  }

  C[i * N + j] = sum;
}

__global__ void kernel2(uint64_t* A, uint64_t* B, uint64_t* C) {
  // SB: Write your code here
  uint64_t sum = 0;

  uint64_t i = blockIdx.y*blockDim.y + threadIdx.y;
  uint64_t j = blockIdx.x*blockDim.x + threadIdx.x;

  __shared__ uint64_t A_t[TILE_SIZE][TILE_SIZE];
  __shared__ uint64_t B_t[TILE_SIZE][TILE_SIZE];

  for (uint64_t tid = 0; tid < N/blockDim.x; tid++) {
    A_t[threadIdx.y][threadIdx.x] = A[i * N + tid * blockDim.x + threadIdx.x];
    B_t[threadIdx.y][threadIdx.x] = B[(tid * blockDim.y + threadIdx.y) * N + j];
   
    __syncthreads();

    sum += A_t[threadIdx.y][0] * B_t[0][threadIdx.x]
          + A_t[threadIdx.y][1] * B_t[1][threadIdx.x]
          + A_t[threadIdx.y][2] * B_t[2][threadIdx.x]
          + A_t[threadIdx.y][3] * B_t[3][threadIdx.x]
          + A_t[threadIdx.y][4] * B_t[4][threadIdx.x]
          + A_t[threadIdx.y][5] * B_t[5][threadIdx.x]
          + A_t[threadIdx.y][6] * B_t[6][threadIdx.x]
          + A_t[threadIdx.y][7] * B_t[7][threadIdx.x]
          + A_t[threadIdx.y][8] * B_t[8][threadIdx.x]
          + A_t[threadIdx.y][9] * B_t[9][threadIdx.x]
          + A_t[threadIdx.y][10] * B_t[10][threadIdx.x]
          + A_t[threadIdx.y][11] * B_t[11][threadIdx.x]
          + A_t[threadIdx.y][12] * B_t[12][threadIdx.x]
          + A_t[threadIdx.y][13] * B_t[13][threadIdx.x]
          + A_t[threadIdx.y][14] * B_t[14][threadIdx.x]
          + A_t[threadIdx.y][15] * B_t[15][threadIdx.x]
          + A_t[threadIdx.y][16] * B_t[16][threadIdx.x]
          + A_t[threadIdx.y][17] * B_t[17][threadIdx.x]
          + A_t[threadIdx.y][18] * B_t[18][threadIdx.x]
          + A_t[threadIdx.y][19] * B_t[19][threadIdx.x]
          + A_t[threadIdx.y][20] * B_t[20][threadIdx.x]
          + A_t[threadIdx.y][21] * B_t[21][threadIdx.x]
          + A_t[threadIdx.y][22] * B_t[22][threadIdx.x]
          + A_t[threadIdx.y][23] * B_t[23][threadIdx.x]
          + A_t[threadIdx.y][24] * B_t[24][threadIdx.x]
          + A_t[threadIdx.y][25] * B_t[25][threadIdx.x]
          + A_t[threadIdx.y][26] * B_t[26][threadIdx.x]
          + A_t[threadIdx.y][27] * B_t[27][threadIdx.x]
          + A_t[threadIdx.y][28] * B_t[28][threadIdx.x]
          + A_t[threadIdx.y][29] * B_t[29][threadIdx.x]
          + A_t[threadIdx.y][30] * B_t[30][threadIdx.x]
          + A_t[threadIdx.y][31] * B_t[31][threadIdx.x];
    __syncthreads();

  }
  C[i * N + j] = sum;
}

__host__ void cpumatMul(uint64_t* A, uint64_t* B, uint64_t* C) {
  for (uint64_t i = 0; i < N; i++) {
    for (uint64_t j = 0; j < N; j++) {
      uint64_t sum = 0;
      for (uint64_t k = 0; k < N; k++) {
        sum += A[i * N + k] * B[k * N + j];
      }
      C[i * N + j] = sum;
    }
  }
}

__host__ void check_result(uint64_t* w_ref, uint64_t* w_opt) {
  for (uint64_t i = 0; i < N; i++) {
    for (uint64_t j = 0; j < N; j++) {
      if (w_ref[i * N + j] != w_opt[i * N + j]) {
        cout << "Difference found\n";
        exit(EXIT_FAILURE);
      }
    }
  }
  cout << "No differences found between base and test versions\n";
}

int main() {
  int SIZE = N * N;
  cudaEvent_t start, end;

  gpuErrchk( cudaEventCreate(&start) );
  gpuErrchk( cudaEventCreate(&end) );

  uint64_t *h_A, *h_B, *h_C1, *h_C2, *cpuResult;

  h_A = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  h_B = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  h_C1 = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  h_C2 = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  cpuResult = (uint64_t*)malloc(SIZE * sizeof(uint64_t));

  for (uint64_t i = 0; i < N; i++) {
    for (uint64_t j = 0; j < N; j++) {
      h_A[i * N + j] = random();
      h_B[i * N + j] = random();
      h_C1[i * N + j] = 0;
      h_C2[i * N + j] = 0;
      cpuResult[i * N + j] = 0;
    }
  }

  double clkbegin, clkend;
  double t;

  clkbegin = rtclock();
  // cpumatMul(h_A, h_B, cpuResult);
  clkend = rtclock();
  t = clkend - clkbegin;
  cout << "Serial Time (ms): " << t * 1000 << "\n";


  uint64_t *d_A, *d_B, *d_C1, *d_C2;
  gpuErrchk( cudaMalloc((void**)&d_A, SIZE * sizeof(uint64_t)) );
  gpuErrchk( cudaMalloc((void**)&d_B, SIZE * sizeof(uint64_t)) );
  gpuErrchk( cudaMalloc((void**)&d_C1, SIZE * sizeof(uint64_t)) );
  gpuErrchk( cudaMalloc((void**)&d_C2, SIZE * sizeof(uint64_t)) );

  dim3 threadsPerBlock1(BLOCK_SIZE, BLOCK_SIZE);
  dim3 blocksPerGrid1((N + threadsPerBlock1.x - 1)/threadsPerBlock1.x, (N + threadsPerBlock1.y - 1)/threadsPerBlock1.y);

  gpuErrchk( cudaEventRecord(start, 0) );
  gpuErrchk( cudaMemcpy(d_A, h_A, SIZE * sizeof(uint64_t), cudaMemcpyHostToDevice) );
  gpuErrchk( cudaMemcpy(d_B, h_B, SIZE * sizeof(uint64_t), cudaMemcpyHostToDevice) );
  kernel1<<<blocksPerGrid1, threadsPerBlock1>>>(d_A, d_B, d_C1);
  gpuErrchk( cudaPeekAtLastError() );
  gpuErrchk( cudaMemcpy(h_C1, d_C1, SIZE * sizeof(uint64_t), cudaMemcpyDeviceToHost) );
  gpuErrchk( cudaEventRecord(end, 0) );
  
  gpuErrchk( cudaDeviceSynchronize() );
  float kernel_time = 0;
  gpuErrchk( cudaEventElapsedTime(&kernel_time, start, end) );
  std::cout << "Kernel 1 time (ms): " << kernel_time << "\n";


  dim3 threadsPerBlock2(TILE_SIZE, TILE_SIZE);
  dim3 blocksPerGrid2((N + threadsPerBlock2.x - 1)/threadsPerBlock2.x, (N + threadsPerBlock2.y - 1)/threadsPerBlock2.y);

  gpuErrchk( cudaEventRecord(start, 0) );
  gpuErrchk( cudaMemcpy(d_A, h_A, SIZE * sizeof(uint64_t), cudaMemcpyHostToDevice) );
  gpuErrchk( cudaMemcpy(d_B, h_B, SIZE * sizeof(uint64_t), cudaMemcpyHostToDevice) );
  kernel2<<<blocksPerGrid2, threadsPerBlock2>>>(d_A, d_B, d_C2);
  gpuErrchk( cudaPeekAtLastError() );
  gpuErrchk( cudaMemcpy(h_C2, d_C2, SIZE * sizeof(uint64_t), cudaMemcpyDeviceToHost) );
  gpuErrchk( cudaEventRecord(end, 0) );

  gpuErrchk( cudaDeviceSynchronize() );
  gpuErrchk( cudaEventElapsedTime(&kernel_time, start, end) );
  std::cout << "Kernel 2 time (ms): " << kernel_time << "\n";


  gpuErrchk( cudaFree(d_A) );
  gpuErrchk( cudaFree(d_B) );
  gpuErrchk( cudaFree(d_C1) );
  gpuErrchk( cudaFree(d_C2) );

  free(h_A);
  free(h_B);

  // check_result(cpuResult, h_C1);
  // check_result(cpuResult, h_C2);
  check_result(h_C1, h_C2);

  free(cpuResult);
  free(h_C1);
  free(h_C2);

  return EXIT_SUCCESS;
}

	.file	"tmpxft_00377573_00000000-6_p4.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Error return from gettimeofday: "
.LC2:
	.string	"\n"
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv, @function
_Z7rtclockv:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	testl	%eax, %eax
	je	.L13
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L13:
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC3(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z7rtclockv, .-_Z7rtclockv
	.globl	_Z9cpumatMulPmS_S_
	.type	_Z9cpumatMulPmS_S_, @function
_Z9cpumatMulPmS_S_:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r8
	xorl	%ecx, %ecx
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
.L20:
	xorl	%eax, %eax
	leaq	(%r8,%rcx), %r12
	leaq	(%rdx,%rcx), %rbp
.L24:
	leaq	(%rsi,%rax,8), %r11
	xorl	%edi, %edi
	xorl	%r10d, %r10d
.L21:
	movq	(%r12,%rdi,8), %rbx
	imulq	(%r11), %rbx
	incq	%rdi
	addq	$32768, %r11
	addq	%rbx, %r10
	cmpq	$4096, %rdi
	jne	.L21
	movq	%r10, 0(%rbp,%rax,8)
	incq	%rax
	cmpq	$4096, %rax
	jne	.L24
	addq	$4096, %r9
	addq	$32768, %rcx
	cmpq	$16777216, %r9
	jne	.L20
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z9cpumatMulPmS_S_, .-_Z9cpumatMulPmS_S_
	.section	.rodata.str1.1
.LC4:
	.string	"Difference found\n"
.LC5:
	.string	"No differences found between base and test versions\n"
	.text
	.globl	_Z12check_resultPmS_
	.type	_Z12check_resultPmS_, @function
_Z12check_resultPmS_:
.LFB3638:
	.cfi_startproc
	endbr64
	xorl	%edx, %edx
.L28:
	leaq	0(,%rdx,8), %rax
	xorl	%ecx, %ecx
.L30:
	movq	(%rsi,%rax), %r8
	cmpq	%r8, (%rdi,%rax)
	je	.L29
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %edi
	call	exit@PLT
.L29:
	.cfi_def_cfa_offset 8
	incq	%rcx
	addq	$8, %rax
	cmpq	$4096, %rcx
	jne	.L30
	addq	$4096, %rdx
	cmpq	$16777216, %rdx
	jne	.L28
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	jmp	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	.cfi_endproc
.LFE3638:
	.size	_Z12check_resultPmS_, .-_Z12check_resultPmS_
	.globl	_Z30__device_stub__Z7kernel1PmS_S_PmS_S_
	.type	_Z30__device_stub__Z7kernel1PmS_S_PmS_S_, @function
_Z30__device_stub__Z7kernel1PmS_S_PmS_S_:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7kernel1PmS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L36:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z30__device_stub__Z7kernel1PmS_S_PmS_S_, .-_Z30__device_stub__Z7kernel1PmS_S_PmS_S_
	.globl	_Z7kernel1PmS_S_
	.type	_Z7kernel1PmS_S_, @function
_Z7kernel1PmS_S_:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7kernel1PmS_S_PmS_S_
	.cfi_endproc
.LFE3665:
	.size	_Z7kernel1PmS_S_, .-_Z7kernel1PmS_S_
	.globl	_Z30__device_stub__Z7kernel2PmS_S_PmS_S_
	.type	_Z30__device_stub__Z7kernel2PmS_S_PmS_S_, @function
_Z30__device_stub__Z7kernel2PmS_S_PmS_S_:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7kernel2PmS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L41:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z30__device_stub__Z7kernel2PmS_S_PmS_S_, .-_Z30__device_stub__Z7kernel2PmS_S_PmS_S_
	.globl	_Z7kernel2PmS_S_
	.type	_Z7kernel2PmS_S_, @function
_Z7kernel2PmS_S_:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7kernel2PmS_S_PmS_S_
	.cfi_endproc
.LFE3667:
	.size	_Z7kernel2PmS_S_, .-_Z7kernel2PmS_S_
	.section	.rodata.str1.1
.LC6:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/hritwik567/CS698L/master/assign5/submission/problem4/p4.cu"
.LC7:
	.string	"Serial Time (ms): "
.LC10:
	.string	"Kernel 1 time (ms): "
.LC11:
	.string	"Kernel 2 time (ms): "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$128, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$129, %edx
	movl	$1, %ecx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$134217728, %edi
	call	malloc@PLT
	movl	$134217728, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$134217728, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$134217728, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$134217728, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%rax, %r14
.L47:
	leaq	0(,%rdx,8), %r15
	xorl	%ecx, %ecx
.L48:
	movq	%rdx, 8(%rsp)
	movq	%rcx, (%rsp)
	call	random@PLT
	movq	%rax, 0(%r13,%r15)
	call	random@PLT
	movq	(%rsp), %rcx
	movq	8(%rsp), %rdx
	movq	%rax, (%r12,%r15)
	xorl	%eax, %eax
	incq	%rcx
	movq	%rax, 0(%rbp,%r15)
	movq	%rax, (%rbx,%r15)
	movq	%rax, (%r14,%r15)
	addq	$8, %r15
	cmpq	$4096, %rcx
	jne	.L48
	addq	$4096, %rdx
	cmpq	$16777216, %rdx
	jne	.L47
	call	_Z7rtclockv
	movsd	%xmm0, (%rsp)
	call	_Z7rtclockv
	subsd	(%rsp), %xmm0
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movsd	%xmm0, (%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rsp), %xmm0
	mulsd	.LC8(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	40(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$160, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	48(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$161, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	56(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$162, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	64(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$163, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movabsq	$1099511628032, %rax
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$168, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$169, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$170, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	84(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	92(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z30__device_stub__Z7kernel1PmS_S_PmS_S_
.L50:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$172, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	leaq	20(%rsp), %r15
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$173, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$174, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$176, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdx
	movq	%r15, %rdi
	movq	24(%rsp), %rsi
	movl	$0x00000000, 20(%rsp)
	call	cudaEventElapsedTime@PLT
	movl	$1, %ecx
	movl	$178, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	20(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movabsq	$549755814016, %rax
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$185, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$186, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$187, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	108(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	116(%rsp), %esi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movq	64(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z30__device_stub__Z7kernel2PmS_S_PmS_S_
.L51:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$189, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$190, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$191, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$193, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	%r15, %rdi
	call	cudaEventElapsedTime@PLT
	movl	$1, %ecx
	movl	$194, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	20(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$198, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$199, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$200, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$201, %edx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z12check_resultPmS_
	movq	%r14, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z7kernel2PmS_S_"
.LC13:
	.string	"_Z7kernel1PmS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3669:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7kernel2PmS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel1PmS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3669:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC8:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p4.cu -o assignment5-p4

#include <cmath>
#include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>

const uint64_t N = (1 << 12);
const uint64_t BLOCK_SIZE = (1 << 4);
const uint64_t TILE_SIZE = (1 << 5);

using namespace std;

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true) {
   if (code != hipSuccess) {
      fprintf(stderr, "GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

double rtclock() {
  struct timezone Tzp;
  struct timeval Tp;
  int stat;
  stat = gettimeofday(&Tp, &Tzp);
  if (stat != 0) {
    cout << "Error return from gettimeofday: " << stat << "\n";
  }
  return (Tp.tv_sec + Tp.tv_usec * 1.0e-6);
}

__global__ void kernel1(uint64_t* A, uint64_t* B, uint64_t* C) {
  // SB: Write your code here
  uint64_t i =  blockIdx.y*blockDim.y + threadIdx.y;
  uint64_t j =  blockIdx.x*blockDim.x + threadIdx.x;
  uint64_t sum = 0;

  for (uint64_t k = 0; k < N; k++) {
    sum += A[i * N + k] * B[k * N + j];
  }

  C[i * N + j] = sum;
}

__global__ void kernel2(uint64_t* A, uint64_t* B, uint64_t* C) {
  // SB: Write your code here
  uint64_t sum = 0;

  uint64_t i = blockIdx.y*blockDim.y + threadIdx.y;
  uint64_t j = blockIdx.x*blockDim.x + threadIdx.x;

  __shared__ uint64_t A_t[TILE_SIZE][TILE_SIZE];
  __shared__ uint64_t B_t[TILE_SIZE][TILE_SIZE];

  for (uint64_t tid = 0; tid < N/blockDim.x; tid++) {
    A_t[threadIdx.y][threadIdx.x] = A[i * N + tid * blockDim.x + threadIdx.x];
    B_t[threadIdx.y][threadIdx.x] = B[(tid * blockDim.y + threadIdx.y) * N + j];
   
    __syncthreads();

    sum += A_t[threadIdx.y][0] * B_t[0][threadIdx.x]
          + A_t[threadIdx.y][1] * B_t[1][threadIdx.x]
          + A_t[threadIdx.y][2] * B_t[2][threadIdx.x]
          + A_t[threadIdx.y][3] * B_t[3][threadIdx.x]
          + A_t[threadIdx.y][4] * B_t[4][threadIdx.x]
          + A_t[threadIdx.y][5] * B_t[5][threadIdx.x]
          + A_t[threadIdx.y][6] * B_t[6][threadIdx.x]
          + A_t[threadIdx.y][7] * B_t[7][threadIdx.x]
          + A_t[threadIdx.y][8] * B_t[8][threadIdx.x]
          + A_t[threadIdx.y][9] * B_t[9][threadIdx.x]
          + A_t[threadIdx.y][10] * B_t[10][threadIdx.x]
          + A_t[threadIdx.y][11] * B_t[11][threadIdx.x]
          + A_t[threadIdx.y][12] * B_t[12][threadIdx.x]
          + A_t[threadIdx.y][13] * B_t[13][threadIdx.x]
          + A_t[threadIdx.y][14] * B_t[14][threadIdx.x]
          + A_t[threadIdx.y][15] * B_t[15][threadIdx.x]
          + A_t[threadIdx.y][16] * B_t[16][threadIdx.x]
          + A_t[threadIdx.y][17] * B_t[17][threadIdx.x]
          + A_t[threadIdx.y][18] * B_t[18][threadIdx.x]
          + A_t[threadIdx.y][19] * B_t[19][threadIdx.x]
          + A_t[threadIdx.y][20] * B_t[20][threadIdx.x]
          + A_t[threadIdx.y][21] * B_t[21][threadIdx.x]
          + A_t[threadIdx.y][22] * B_t[22][threadIdx.x]
          + A_t[threadIdx.y][23] * B_t[23][threadIdx.x]
          + A_t[threadIdx.y][24] * B_t[24][threadIdx.x]
          + A_t[threadIdx.y][25] * B_t[25][threadIdx.x]
          + A_t[threadIdx.y][26] * B_t[26][threadIdx.x]
          + A_t[threadIdx.y][27] * B_t[27][threadIdx.x]
          + A_t[threadIdx.y][28] * B_t[28][threadIdx.x]
          + A_t[threadIdx.y][29] * B_t[29][threadIdx.x]
          + A_t[threadIdx.y][30] * B_t[30][threadIdx.x]
          + A_t[threadIdx.y][31] * B_t[31][threadIdx.x];
    __syncthreads();

  }
  C[i * N + j] = sum;
}

__host__ void cpumatMul(uint64_t* A, uint64_t* B, uint64_t* C) {
  for (uint64_t i = 0; i < N; i++) {
    for (uint64_t j = 0; j < N; j++) {
      uint64_t sum = 0;
      for (uint64_t k = 0; k < N; k++) {
        sum += A[i * N + k] * B[k * N + j];
      }
      C[i * N + j] = sum;
    }
  }
}

__host__ void check_result(uint64_t* w_ref, uint64_t* w_opt) {
  for (uint64_t i = 0; i < N; i++) {
    for (uint64_t j = 0; j < N; j++) {
      if (w_ref[i * N + j] != w_opt[i * N + j]) {
        cout << "Difference found\n";
        exit(EXIT_FAILURE);
      }
    }
  }
  cout << "No differences found between base and test versions\n";
}

int main() {
  int SIZE = N * N;
  hipEvent_t start, end;

  gpuErrchk( hipEventCreate(&start) );
  gpuErrchk( hipEventCreate(&end) );

  uint64_t *h_A, *h_B, *h_C1, *h_C2, *cpuResult;

  h_A = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  h_B = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  h_C1 = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  h_C2 = (uint64_t*)malloc(SIZE * sizeof(uint64_t));
  cpuResult = (uint64_t*)malloc(SIZE * sizeof(uint64_t));

  for (uint64_t i = 0; i < N; i++) {
    for (uint64_t j = 0; j < N; j++) {
      h_A[i * N + j] = random();
      h_B[i * N + j] = random();
      h_C1[i * N + j] = 0;
      h_C2[i * N + j] = 0;
      cpuResult[i * N + j] = 0;
    }
  }

  double clkbegin, clkend;
  double t;

  clkbegin = rtclock();
  // cpumatMul(h_A, h_B, cpuResult);
  clkend = rtclock();
  t = clkend - clkbegin;
  cout << "Serial Time (ms): " << t * 1000 << "\n";


  uint64_t *d_A, *d_B, *d_C1, *d_C2;
  gpuErrchk( hipMalloc((void**)&d_A, SIZE * sizeof(uint64_t)) );
  gpuErrchk( hipMalloc((void**)&d_B, SIZE * sizeof(uint64_t)) );
  gpuErrchk( hipMalloc((void**)&d_C1, SIZE * sizeof(uint64_t)) );
  gpuErrchk( hipMalloc((void**)&d_C2, SIZE * sizeof(uint64_t)) );

  dim3 threadsPerBlock1(BLOCK_SIZE, BLOCK_SIZE);
  dim3 blocksPerGrid1((N + threadsPerBlock1.x - 1)/threadsPerBlock1.x, (N + threadsPerBlock1.y - 1)/threadsPerBlock1.y);

  gpuErrchk( hipEventRecord(start, 0) );
  gpuErrchk( hipMemcpy(d_A, h_A, SIZE * sizeof(uint64_t), hipMemcpyHostToDevice) );
  gpuErrchk( hipMemcpy(d_B, h_B, SIZE * sizeof(uint64_t), hipMemcpyHostToDevice) );
  kernel1<<<blocksPerGrid1, threadsPerBlock1>>>(d_A, d_B, d_C1);
  gpuErrchk( hipPeekAtLastError() );
  gpuErrchk( hipMemcpy(h_C1, d_C1, SIZE * sizeof(uint64_t), hipMemcpyDeviceToHost) );
  gpuErrchk( hipEventRecord(end, 0) );
  
  gpuErrchk( hipDeviceSynchronize() );
  float kernel_time = 0;
  gpuErrchk( hipEventElapsedTime(&kernel_time, start, end) );
  std::cout << "Kernel 1 time (ms): " << kernel_time << "\n";


  dim3 threadsPerBlock2(TILE_SIZE, TILE_SIZE);
  dim3 blocksPerGrid2((N + threadsPerBlock2.x - 1)/threadsPerBlock2.x, (N + threadsPerBlock2.y - 1)/threadsPerBlock2.y);

  gpuErrchk( hipEventRecord(start, 0) );
  gpuErrchk( hipMemcpy(d_A, h_A, SIZE * sizeof(uint64_t), hipMemcpyHostToDevice) );
  gpuErrchk( hipMemcpy(d_B, h_B, SIZE * sizeof(uint64_t), hipMemcpyHostToDevice) );
  kernel2<<<blocksPerGrid2, threadsPerBlock2>>>(d_A, d_B, d_C2);
  gpuErrchk( hipPeekAtLastError() );
  gpuErrchk( hipMemcpy(h_C2, d_C2, SIZE * sizeof(uint64_t), hipMemcpyDeviceToHost) );
  gpuErrchk( hipEventRecord(end, 0) );

  gpuErrchk( hipDeviceSynchronize() );
  gpuErrchk( hipEventElapsedTime(&kernel_time, start, end) );
  std::cout << "Kernel 2 time (ms): " << kernel_time << "\n";


  gpuErrchk( hipFree(d_A) );
  gpuErrchk( hipFree(d_B) );
  gpuErrchk( hipFree(d_C1) );
  gpuErrchk( hipFree(d_C2) );

  free(h_A);
  free(h_B);

  // check_result(cpuResult, h_C1);
  // check_result(cpuResult, h_C2);
  check_result(h_C1, h_C2);

  free(cpuResult);
  free(h_C1);
  free(h_C2);

  return EXIT_SUCCESS;
}

	.text
	.file	"p4.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7rtclockv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv,@function
_Z7rtclockv:                            # @_Z7rtclockv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	8(%rsp), %rdi
	leaq	24(%rsp), %rsi
	callq	gettimeofday
	testl	%eax, %eax
	je	.LBB0_2
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB0_2:
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7rtclockv, .Lfunc_end0-_Z7rtclockv
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel1PmS_S_ # -- Begin function _Z22__device_stub__kernel1PmS_S_
	.type	_Z22__device_stub__kernel1PmS_S_,@function
_Z22__device_stub__kernel1PmS_S_:       # @_Z22__device_stub__kernel1PmS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel1PmS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__kernel1PmS_S_, .Lfunc_end1-_Z22__device_stub__kernel1PmS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel2PmS_S_ # -- Begin function _Z22__device_stub__kernel2PmS_S_
	.type	_Z22__device_stub__kernel2PmS_S_,@function
_Z22__device_stub__kernel2PmS_S_:       # @_Z22__device_stub__kernel2PmS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel2PmS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__kernel2PmS_S_, .Lfunc_end2-_Z22__device_stub__kernel2PmS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9cpumatMulPmS_S_              # -- Begin function _Z9cpumatMulPmS_S_
	.type	_Z9cpumatMulPmS_S_,@function
_Z9cpumatMulPmS_S_:                     # @_Z9cpumatMulPmS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%eax, %eax
.LBB3_1:                                # %.preheader19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
                                        #       Child Loop BB3_3 Depth 3
	movq	%rax, %rcx
	shlq	$15, %rcx
	addq	%rdx, %rcx
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB3_2:                                # %.preheader
                                        #   Parent Loop BB3_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_3 Depth 3
	movq	%r8, %r10
	xorl	%ebx, %ebx
	xorl	%r11d, %r11d
.LBB3_3:                                #   Parent Loop BB3_1 Depth=1
                                        #     Parent Loop BB3_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	(%r10), %r14
	imulq	(%rdi,%rbx,8), %r14
	addq	%r14, %r11
	incq	%rbx
	addq	$32768, %r10                    # imm = 0x8000
	cmpq	$4096, %rbx                     # imm = 0x1000
	jne	.LBB3_3
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=2
	movq	%r11, (%rcx,%r9,8)
	incq	%r9
	addq	$8, %r8
	cmpq	$4096, %r9                      # imm = 0x1000
	jne	.LBB3_2
# %bb.5:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rax
	addq	$32768, %rdi                    # imm = 0x8000
	cmpq	$4096, %rax                     # imm = 0x1000
	jne	.LBB3_1
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z9cpumatMulPmS_S_, .Lfunc_end3-_Z9cpumatMulPmS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z12check_resultPmS_            # -- Begin function _Z12check_resultPmS_
	.type	_Z12check_resultPmS_,@function
_Z12check_resultPmS_:                   # @_Z12check_resultPmS_
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	movl	$32768, %ecx                    # imm = 0x8000
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%edx, %edx
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rdi,%rdx,8), %r8
	cmpq	(%rsi,%rdx,8), %r8
	jne	.LBB4_6
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=2
	incq	%rdx
	cmpq	$4096, %rdx                     # imm = 0x1000
	jne	.LBB4_2
# %bb.4:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%rax
	addq	%rcx, %rsi
	addq	%rcx, %rdi
	cmpq	$4096, %rax                     # imm = 0x1000
	jne	.LBB4_1
# %bb.5:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$52, %edx
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l # TAILCALL
.LBB4_6:
	.cfi_def_cfa_offset 16
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	_Z12check_resultPmS_, .Lfunc_end4-_Z12check_resultPmS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB5_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit67
	movl	$134217728, %edi                # imm = 0x8000000
	callq	malloc
	movq	%rax, %r14
	movl	$134217728, %edi                # imm = 0x8000000
	callq	malloc
	movq	%rax, %r12
	movl	$134217728, %edi                # imm = 0x8000000
	callq	malloc
	movq	%rax, %r15
	movl	$134217728, %edi                # imm = 0x8000000
	callq	malloc
	movq	%rax, %rbx
	xorl	%r13d, %r13d
	movq	%r14, 88(%rsp)                  # 8-byte Spill
	movq	%r12, 72(%rsp)                  # 8-byte Spill
	movq	%r15, 96(%rsp)                  # 8-byte Spill
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	xorl	%ecx, %ecx
.LBB5_6:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_7 Depth 2
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
.LBB5_7:                                #   Parent Loop BB5_6 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	random
	movq	%rax, (%r14,%rbp,8)
	callq	random
	movq	%rax, (%r12,%rbp,8)
	movq	%r13, (%r15,%rbp,8)
	movq	%r13, (%rbx,%rbp,8)
	incq	%rbp
	cmpq	$4096, %rbp                     # imm = 0x1000
	jne	.LBB5_7
# %bb.8:                                #   in Loop: Header=BB5_6 Depth=1
	movq	16(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movl	$32768, %eax                    # imm = 0x8000
	addq	%rax, %rbx
	addq	%rax, %r15
	addq	%rax, %r12
	addq	%rax, %r14
	cmpq	$4096, %rcx                     # imm = 0x1000
	jne	.LBB5_6
# %bb.9:
	callq	_Z7rtclockv
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	callq	_Z7rtclockv
	subsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI5_0(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	32(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_10
# %bb.12:                               # %_Z9gpuAssert10hipError_tPKcib.exit69
	leaq	24(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	testl	%eax, %eax
	movq	96(%rsp), %rbx                  # 8-byte Reload
	movq	88(%rsp), %r14                  # 8-byte Reload
	movq	80(%rsp), %r15                  # 8-byte Reload
	movq	72(%rsp), %r12                  # 8-byte Reload
	jne	.LBB5_13
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKcib.exit71
	leaq	64(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_15
# %bb.16:                               # %_Z9gpuAssert10hipError_tPKcib.exit73
	leaq	56(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_17
# %bb.18:                               # %_Z9gpuAssert10hipError_tPKcib.exit75
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB5_19
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKcib.exit77
	movq	32(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit79
	movq	24(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_23
# %bb.24:                               # %_Z9gpuAssert10hipError_tPKcib.exit81
	movabsq	$1099511628032, %rdi            # imm = 0x10000000100
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_26
# %bb.25:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	64(%rsp), %rdx
	callq	_Z22__device_stub__kernel1PmS_S_
.LBB5_26:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_27
# %bb.28:                               # %_Z9gpuAssert10hipError_tPKcib.exit83
	movq	64(%rsp), %rsi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_29
# %bb.30:                               # %_Z9gpuAssert10hipError_tPKcib.exit85
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB5_31
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit87
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_33
# %bb.34:                               # %_Z9gpuAssert10hipError_tPKcib.exit89
	leaq	12(%rsp), %rdi
	movl	$0, (%rdi)
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB5_35
# %bb.36:                               # %_Z9gpuAssert10hipError_tPKcib.exit91
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	12(%rsp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB5_37
# %bb.38:                               # %_Z9gpuAssert10hipError_tPKcib.exit93
	movq	32(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_39
# %bb.40:                               # %_Z9gpuAssert10hipError_tPKcib.exit95
	movq	24(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_41
# %bb.42:                               # %_Z9gpuAssert10hipError_tPKcib.exit97
	movabsq	$549755814016, %rdi             # imm = 0x8000000080
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_44
# %bb.43:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	56(%rsp), %rdx
	callq	_Z22__device_stub__kernel2PmS_S_
.LBB5_44:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_45
# %bb.46:                               # %_Z9gpuAssert10hipError_tPKcib.exit99
	movq	56(%rsp), %rsi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_47
# %bb.48:                               # %_Z9gpuAssert10hipError_tPKcib.exit101
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB5_49
# %bb.50:                               # %_Z9gpuAssert10hipError_tPKcib.exit103
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_51
# %bb.52:                               # %_Z9gpuAssert10hipError_tPKcib.exit105
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	leaq	12(%rsp), %rdi
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB5_53
# %bb.54:                               # %_Z9gpuAssert10hipError_tPKcib.exit107
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_55
# %bb.56:                               # %_Z9gpuAssert10hipError_tPKcib.exit109
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_57
# %bb.58:                               # %_Z9gpuAssert10hipError_tPKcib.exit111
	movq	64(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_59
# %bb.60:                               # %_Z9gpuAssert10hipError_tPKcib.exit113
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_61
# %bb.62:                               # %_Z9gpuAssert10hipError_tPKcib.exit115
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_Z12check_resultPmS_
	movq	%rbx, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_1:
	.cfi_def_cfa_offset 160
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$128, %r8d
	jmp	.LBB5_2
.LBB5_4:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$129, %r8d
.LBB5_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB5_10:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$160, %r8d
	jmp	.LBB5_11
.LBB5_13:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$161, %r8d
	jmp	.LBB5_11
.LBB5_15:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$162, %r8d
	jmp	.LBB5_11
.LBB5_17:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$163, %r8d
	jmp	.LBB5_11
.LBB5_19:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$168, %r8d
	jmp	.LBB5_11
.LBB5_21:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$169, %r8d
	jmp	.LBB5_11
.LBB5_23:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$170, %r8d
	jmp	.LBB5_11
.LBB5_27:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$172, %r8d
	jmp	.LBB5_11
.LBB5_29:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$173, %r8d
	jmp	.LBB5_11
.LBB5_31:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$174, %r8d
	jmp	.LBB5_11
.LBB5_33:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$176, %r8d
	jmp	.LBB5_11
.LBB5_35:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$178, %r8d
	jmp	.LBB5_11
.LBB5_37:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$185, %r8d
	jmp	.LBB5_11
.LBB5_39:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$186, %r8d
	jmp	.LBB5_11
.LBB5_41:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$187, %r8d
	jmp	.LBB5_11
.LBB5_45:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$189, %r8d
	jmp	.LBB5_11
.LBB5_47:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$190, %r8d
	jmp	.LBB5_11
.LBB5_49:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$191, %r8d
	jmp	.LBB5_11
.LBB5_51:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$193, %r8d
	jmp	.LBB5_11
.LBB5_53:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$194, %r8d
	jmp	.LBB5_11
.LBB5_55:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$198, %r8d
	jmp	.LBB5_11
.LBB5_57:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$199, %r8d
	jmp	.LBB5_11
.LBB5_59:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$200, %r8d
	jmp	.LBB5_11
.LBB5_61:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$201, %r8d
.LBB5_11:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel1PmS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel2PmS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error return from gettimeofday: "
	.size	.L.str, 33

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	_Z7kernel1PmS_S_,@object        # @_Z7kernel1PmS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel1PmS_S_
	.p2align	3, 0x0
_Z7kernel1PmS_S_:
	.quad	_Z22__device_stub__kernel1PmS_S_
	.size	_Z7kernel1PmS_S_, 8

	.type	_Z7kernel2PmS_S_,@object        # @_Z7kernel2PmS_S_
	.globl	_Z7kernel2PmS_S_
	.p2align	3, 0x0
_Z7kernel2PmS_S_:
	.quad	_Z22__device_stub__kernel2PmS_S_
	.size	_Z7kernel2PmS_S_, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Difference found\n"
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"No differences found between base and test versions\n"
	.size	.L.str.3, 53

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/hritwik567/CS698L/master/assign5/submission/problem4/p4.hip"
	.size	.L.str.4, 122

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Serial Time (ms): "
	.size	.L.str.5, 19

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Kernel 1 time (ms): "
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Kernel 2 time (ms): "
	.size	.L.str.7, 21

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.8, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7kernel1PmS_S_"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7kernel2PmS_S_"
	.size	.L__unnamed_2, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel1PmS_S_
	.addrsig_sym _Z22__device_stub__kernel2PmS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z7kernel1PmS_S_
	.addrsig_sym _Z7kernel2PmS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel1PmS_S_        ; -- Begin function _Z7kernel1PmS_S_
	.globl	_Z7kernel1PmS_S_
	.p2align	8
	.type	_Z7kernel1PmS_S_,@function
_Z7kernel1PmS_S_:                       ; @_Z7kernel1PmS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[4:5], null, s15, s3, v[1:2]
	v_mov_b32_e32 v5, 0
	v_mad_u64_u32 v[1:2], null, s14, s2, v[0:1]
	s_mov_b64 s[2:3], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mov_b32_e32 v2, v5
	v_lshlrev_b64 v[6:7], 15, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_lshlrev_b64 v[2:3], 12, v[4:5]
	v_add_co_u32 v4, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v10, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v7, vcc_lo
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v11, vcc_lo
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	global_load_b64 v[12:13], v[4:5], off
	global_load_b64 v[14:15], v[6:7], off
	v_add_co_u32 v4, vcc_lo, 0x8000, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_cmp_eq_u64 s[2:3], 0x8000
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v15, v12, v15
	v_mul_lo_u32 v13, v13, v14
	v_mad_u64_u32 v[6:7], null, v12, v14, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v13, v7, v15
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel1PmS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel1PmS_S_, .Lfunc_end0-_Z7kernel1PmS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7kernel2PmS_S_        ; -- Begin function _Z7kernel2PmS_S_
	.globl	_Z7kernel2PmS_S_
	.p2align	8
	.type	_Z7kernel2PmS_S_,@function
_Z7kernel2PmS_S_:                       ; @_Z7kernel2PmS_S_
; %bb.0:
	s_load_b32 s9, s[0:1], 0x24
	v_bfe_u32 v7, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v11, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s9, 16
	s_and_b32 s0, s9, 0xffff
	v_mad_u64_u32 v[1:2], null, s15, s8, v[7:8]
	v_mov_b32_e32 v2, 0
	v_cmp_lt_u16_e64 s1, 0x1000, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_and_b32 vcc_lo, exec_lo, s1
	v_mad_u64_u32 v[3:4], null, s14, s0, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 12, v[1:2]
	v_mov_b32_e32 v4, v2
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_cbranch_vccnz .LBB1_3
; %bb.1:                                ; %.lr.ph
	v_cvt_f32_u32_e32 v1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s4, v5
	v_dual_mov_b32 v11, 0 :: v_dual_lshlrev_b32 v14, 3, v0
	v_rcp_iflag_f32_e32 v8, v1
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v6, vcc_lo
	v_lshlrev_b32_e32 v0, 8, v7
	v_mov_b32_e32 v12, 0
	s_and_b32 s1, 0xffff, s8
	s_mov_b64 s[4:5], 0
	s_lshl_b32 s1, s1, 15
	v_add_nc_u32_e32 v13, v0, v14
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v8, 0x45800000, v8 :: v_dual_lshlrev_b32 v15, 15, v7
	v_add_co_u32 v7, vcc_lo, v9, v14
	v_or_b32_e32 v14, 0x2000, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v16, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v10, vcc_lo
	v_add_nc_u32_e32 v18, 0x1800, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f32 v9, -v16, v1, 0x45800000
	v_cvt_u32_f32_e32 v10, v16
	v_add_co_u32 v16, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v4, vcc_lo
	v_cmp_ge_f32_e64 vcc_lo, |v9|, v1
	v_add_nc_u32_e32 v15, v14, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v16
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v17, vcc_lo
	v_add_nc_u32_e32 v16, 0x800, v14
	v_add_nc_u32_e32 v17, 0x1000, v14
	v_and_b32_e32 v1, 0xffff, v1
	s_lshl_b32 s6, s0, 3
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[19:20], v[7:8], off
	global_load_b64 v[21:22], v[9:10], off
	s_add_u32 s4, s4, 1
	v_add_co_u32 v9, vcc_lo, v9, s1
	s_addc_u32 s5, s5, 0
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	v_cmp_ge_u64_e64 s0, s[4:5], v[1:2]
	v_add_co_u32 v7, vcc_lo, v7, s6
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_waitcnt vmcnt(1)
	ds_store_b64 v13, v[19:20]
	s_waitcnt vmcnt(0)
	ds_store_b64 v15, v[21:22]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[19:22], v14 offset1:32
	ds_load_b128 v[23:26], v0
	ds_load_b128 v[27:30], v0 offset:16
	ds_load_b128 v[31:34], v0 offset:32
	ds_load_b128 v[35:38], v0 offset:48
	ds_load_2addr_b64 v[39:42], v14 offset0:64 offset1:96
	ds_load_2addr_b64 v[43:46], v14 offset0:128 offset1:160
	ds_load_2addr_b64 v[47:50], v14 offset0:192 offset1:224
	ds_load_2addr_b64 v[51:54], v16 offset1:32
	ds_load_b128 v[55:58], v0 offset:64
	ds_load_b128 v[59:62], v0 offset:80
	ds_load_2addr_b64 v[63:66], v16 offset0:64 offset1:96
	ds_load_2addr_b64 v[67:70], v16 offset0:128 offset1:160
	ds_load_b128 v[71:74], v0 offset:96
	ds_load_b128 v[75:78], v0 offset:112
	ds_load_2addr_b64 v[79:82], v16 offset0:192 offset1:224
	ds_load_2addr_b64 v[83:86], v17 offset1:32
	ds_load_b128 v[87:90], v0 offset:128
	ds_load_b128 v[91:94], v0 offset:144
	s_and_b32 vcc_lo, exec_lo, s0
	s_waitcnt lgkmcnt(17)
	v_mad_u64_u32 v[95:96], null, v19, v23, v[11:12]
	v_mul_lo_u32 v11, v19, v24
	v_mul_lo_u32 v12, v20, v23
	v_mul_lo_u32 v23, v21, v26
	v_mul_lo_u32 v24, v22, v25
	s_waitcnt lgkmcnt(13)
	v_mul_lo_u32 v26, v40, v27
	v_mul_lo_u32 v40, v42, v29
	s_waitcnt lgkmcnt(12)
	v_mul_lo_u32 v32, v43, v32
	s_waitcnt lgkmcnt(11)
	v_mul_lo_u32 v36, v47, v36
	v_add3_u32 v96, v12, v96, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v21, v25, v[95:96]
	v_mul_lo_u32 v25, v39, v28
	ds_load_2addr_b64 v[19:22], v17 offset0:64 offset1:96
	v_add3_u32 v12, v24, v12, v23
	v_mad_u64_u32 v[95:96], null, v39, v27, v[11:12]
	v_mul_lo_u32 v39, v41, v30
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v96, v26, v96, v25
	ds_load_2addr_b64 v[23:26], v17 offset0:128 offset1:160
	v_mad_u64_u32 v[11:12], null, v41, v29, v[95:96]
	ds_load_b128 v[27:30], v0 offset:160
	v_mul_lo_u32 v41, v44, v31
	v_mul_lo_u32 v44, v46, v33
	s_waitcnt lgkmcnt(2)
	v_mul_lo_u32 v20, v20, v91
	v_mul_lo_u32 v22, v22, v93
	v_add3_u32 v12, v40, v12, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[95:96], null, v43, v31, v[11:12]
	v_mul_lo_u32 v43, v45, v34
	v_add3_u32 v96, v41, v96, v32
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v24, v24, v27
	ds_load_b128 v[39:42], v0 offset:176
	v_mad_u64_u32 v[11:12], null, v45, v33, v[95:96]
	v_mul_lo_u32 v45, v48, v35
	v_mul_lo_u32 v48, v50, v37
	v_mul_lo_u32 v50, v52, v55
	v_mul_lo_u32 v52, v54, v57
	ds_load_2addr_b64 v[31:34], v17 offset0:192 offset1:224
	v_add3_u32 v12, v44, v12, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[95:96], null, v47, v35, v[11:12]
	v_mul_lo_u32 v47, v49, v38
	v_add3_u32 v96, v45, v96, v36
	ds_load_2addr_b64 v[43:46], v18 offset1:32
	v_mad_u64_u32 v[11:12], null, v49, v37, v[95:96]
	ds_load_b128 v[35:38], v0 offset:192
	v_mul_lo_u32 v49, v51, v56
	v_mul_lo_u32 v56, v64, v59
	v_mul_lo_u32 v64, v70, v73
	v_add3_u32 v12, v48, v12, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[95:96], null, v51, v55, v[11:12]
	v_mul_lo_u32 v51, v53, v58
	v_mul_lo_u32 v55, v63, v60
	v_mul_lo_u32 v60, v66, v61
	v_add3_u32 v96, v50, v96, v49
	ds_load_b128 v[47:50], v0 offset:208
	v_mad_u64_u32 v[11:12], null, v53, v57, v[95:96]
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v12, v52, v12, v51
	ds_load_2addr_b64 v[51:54], v18 offset0:64 offset1:96
	v_mad_u64_u32 v[95:96], null, v63, v59, v[11:12]
	v_mul_lo_u32 v59, v65, v62
	v_mul_lo_u32 v62, v68, v71
	v_mul_lo_u32 v63, v69, v74
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add3_u32 v96, v56, v96, v55
	ds_load_2addr_b64 v[55:58], v18 offset0:128 offset1:160
	v_mad_u64_u32 v[11:12], null, v65, v61, v[95:96]
	v_mul_lo_u32 v61, v67, v72
	v_add3_u32 v12, v60, v12, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[59:60], null, v67, v71, v[11:12]
	v_add3_u32 v60, v62, v60, v61
	v_mul_lo_u32 v61, v79, v76
	v_mul_lo_u32 v62, v80, v75
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v69, v73, v[59:60]
	v_add3_u32 v12, v64, v12, v63
	v_mul_lo_u32 v63, v81, v78
	v_mul_lo_u32 v64, v82, v77
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[59:60], null, v79, v75, v[11:12]
	v_add3_u32 v60, v62, v60, v61
	v_mul_lo_u32 v61, v83, v88
	v_mul_lo_u32 v62, v84, v87
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v81, v77, v[59:60]
	v_add3_u32 v12, v64, v12, v63
	v_mul_lo_u32 v63, v85, v90
	v_mul_lo_u32 v64, v86, v89
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[59:60], null, v83, v87, v[11:12]
	v_add3_u32 v60, v62, v60, v61
	v_mul_lo_u32 v61, v19, v92
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v85, v89, v[59:60]
	v_add3_u32 v12, v64, v12, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[59:60], null, v19, v91, v[11:12]
	v_mul_lo_u32 v19, v21, v94
	v_add3_u32 v60, v20, v60, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[11:12], null, v21, v93, v[59:60]
	v_mul_lo_u32 v21, v23, v28
	v_add3_u32 v12, v22, v12, v19
	v_mul_lo_u32 v22, v25, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[19:20], null, v23, v27, v[11:12]
	v_mul_lo_u32 v23, v26, v29
	v_add3_u32 v20, v24, v20, v21
	s_waitcnt lgkmcnt(5)
	v_mul_lo_u32 v21, v31, v40
	v_mul_lo_u32 v24, v32, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v25, v29, v[19:20]
	v_add3_u32 v12, v23, v12, v22
	v_mul_lo_u32 v22, v33, v42
	v_mul_lo_u32 v23, v34, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[19:20], null, v31, v39, v[11:12]
	v_add3_u32 v20, v24, v20, v21
	s_waitcnt lgkmcnt(3)
	v_mul_lo_u32 v21, v43, v36
	v_mul_lo_u32 v24, v44, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v33, v41, v[19:20]
	v_add3_u32 v12, v23, v12, v22
	v_mul_lo_u32 v22, v45, v38
	v_mul_lo_u32 v23, v46, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[19:20], null, v43, v35, v[11:12]
	v_add3_u32 v20, v24, v20, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v45, v37, v[19:20]
	v_add3_u32 v12, v23, v12, v22
	ds_load_b128 v[19:22], v0 offset:224
	s_waitcnt lgkmcnt(2)
	v_mul_lo_u32 v25, v51, v48
	v_mul_lo_u32 v26, v52, v47
	v_mul_lo_u32 v27, v53, v50
	v_mad_u64_u32 v[23:24], null, v51, v47, v[11:12]
	v_mul_lo_u32 v28, v54, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v24, v26, v24, v25
	v_mad_u64_u32 v[11:12], null, v53, v49, v[23:24]
	ds_load_b128 v[23:26], v0 offset:240
	s_waitcnt lgkmcnt(1)
	v_mul_lo_u32 v20, v55, v20
	v_mul_lo_u32 v33, v56, v19
	v_add3_u32 v12, v28, v12, v27
	ds_load_2addr_b64 v[27:30], v18 offset0:192 offset1:224
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_mad_u64_u32 v[31:32], null, v55, v19, v[11:12]
	v_mul_lo_u32 v19, v57, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v32, v33, v32, v20
	v_mul_lo_u32 v20, v58, v21
	v_mad_u64_u32 v[11:12], null, v57, v21, v[31:32]
	v_mul_lo_u32 v21, v27, v24
	v_mul_lo_u32 v22, v28, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v12, v20, v12, v19
	v_mad_u64_u32 v[19:20], null, v27, v23, v[11:12]
	v_mul_lo_u32 v23, v29, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v20, v22, v20, v21
	v_mul_lo_u32 v21, v30, v25
	v_mad_u64_u32 v[11:12], null, v29, v25, v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v12, v21, v12, v23
	s_cbranch_vccz .LBB1_2
.LBB1_3:                                ; %Flow98
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v4, vcc_lo
	global_store_b64 v[0:1], v[11:12], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel2PmS_S_
		.amdhsa_group_segment_fixed_size 16384
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 97
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7kernel2PmS_S_, .Lfunc_end1-_Z7kernel2PmS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1944
; NumSgprs: 18
; NumVgprs: 97
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16384 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 12
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 97
; Occupancy: 12
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel1PmS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel1PmS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 16384
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel2PmS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel2PmS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     97
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
