#include <math.h>  // for abs
#include <stdio.h>
#include <stdint.h> // for uint8_t
#include <string.h>
#include <sys/time.h>
#include <stdlib.h>

// For the CUDA runtime routines (prefixed with "cuda_")
#include <cuda_runtime.h>

//using namespace std;
#define PIXEL uint8_t

#define H 288 // height of each frame
#define W 352 // width of each frame
#define NF 200 // number of frames
#define NRF 3 // number of refernce frames
#define BS  4 // block_size
#define SR  2 // search_radius

//#define ENABLE_PRINT

//because using c not c++
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
#define MIN(x, y) (((x) < (y)) ? (x) : (y))

// time stamp function in seconds 
double getTimeStamp()
{     
    struct timeval  tv ;     
    gettimeofday( &tv, NULL ) ;     
    return (double) tv.tv_usec/1000000 + tv.tv_sec ;
} 

/////////////////////////////////////////CPU FUNCTIONS///////////////////////////////////////////////////////////////////
int generate_mv_for_block(PIXEL *currunt_frame, PIXEL *reference_frames, int yb, int xb, int h, int w, int *motion_vector_y, int *motion_vector_x, int *motion_vector_f)    
{    
    int lowest_SAD = 256 * BS * BS;// variable storing the SAD value
    int block_size = BS;
    int y = yb*BS;
    int x = xb*BS;
    // (y,x) the pixel location of the top-left corner of the block.
    
    //Search for the best matching block in the reference frame.
    //The search processes only the block is within the reference frame (not out of boundary).
    for (int ref_index = 0; ref_index < NRF; ref_index++){   
        for (int search_y_radius = MAX(y-SR,0); search_y_radius <= MIN(y+SR,H-BS) ; search_y_radius++){ 
            for (int search_x_radius = MAX(x-SR,0); search_x_radius <= MIN(x+SR,W-BS); search_x_radius++){
                //Calculate SAD of this block with the input block.
                int SAD = 0;
                for(int j =0; j < block_size; j++)
                {
                    for (int i=0; i < block_size; i++)
                    {
                        SAD += abs(currunt_frame[(y+j)*w+x+i] - reference_frames[(NRF-1-ref_index)*w*h+(search_y_radius+j)*w +search_x_radius+i]);
                    }
                }
                //If this block is better in SAD...
                if (lowest_SAD > SAD){
                    lowest_SAD = SAD; // Update SAD.
                    (*motion_vector_x) = search_x_radius - x;
                    (*motion_vector_y) = search_y_radius - y; //Update motion vector.
                    (*motion_vector_f) = ref_index + 1;
                }
                //If there is a tie in SAD keep last change
            }
        }
    }
    return 1;
}

void generate_mv_for_frames_cpu(int *motion_vector,PIXEL *luma, int h, int w){
    int nblock_x = w/BS;
    int nblock_y = h/BS;

    PIXEL   *currunt_frame  = (PIXEL *) malloc(h*w*sizeof(PIXEL)); if (currunt_frame == NULL) fprintf(stderr, "Bad malloc on currunt_frame  \n");
    PIXEL   *reference_frames= (PIXEL*) malloc(h*w*NRF*sizeof(PIXEL)); if (reference_frames == NULL) fprintf(stderr, "Bad malloc on reference_frames  \n");

    for (int f =NRF; f < NF; f++)
    {
        memcpy(currunt_frame   ,&luma[h*w*f]      ,h*w    *sizeof(PIXEL));
        memcpy(reference_frames,&luma[h*w*(f-NRF)],h*w*NRF*sizeof(PIXEL));
        for (int y = 0; y < nblock_y; y++){
            for (int x = 0; x < nblock_x; x++){
                int mvy = 0;
                int mvx = 0;
                int mvf = 1;
                generate_mv_for_block(currunt_frame, reference_frames, y, x, h, w, &mvy, &mvx, &mvf);
                motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0] = mvx;
                motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1] = mvy; 
                motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] = mvf;      
            }
        }
    }
    free(currunt_frame );
    free(reference_frames);
}

/////////////////////////////GPU FUNCTIONS///////////////////////////////////////////////////////////////
__global__ void d_generate_mv_one_frame_naive( PIXEL *currunt_frame, PIXEL *reference_frames, int *motion_vector, int h, int w)
{

    int block_size = BS;
    int nblock_x = w/BS;
    int nblock_y = h/BS;
    // (y,x) the pixel location of the top-left corner of the block.
    
    //Search for the best matching block in the reference frame.
    //The search processes only the block is within the reference frame (not out of boundary).
    for (int f =NRF; f < NF; f++){
        for (int yb = 0; yb < nblock_y; yb++){
            for (int xb = 0; xb < nblock_x; xb++){
                int lowest_SAD = 256 * BS * BS;// variable storing the SAD value
                int y = yb*BS;
                int x = xb*BS;
                for (int ref_index = 0; ref_index < NRF; ref_index++){   
                    for (int search_y_radius = MAX(y-SR,0); search_y_radius <= MIN(y+SR,H-BS) ; search_y_radius++){ 
                        for (int search_x_radius = MAX(x-SR,0); search_x_radius <= MIN(x+SR,W-BS); search_x_radius++){
                            //Calculate SAD of this block with the input block.
                            int SAD = 0;
                            for(int j =0; j < block_size; j++)
                            {
                                for (int i=0; i < block_size; i++)
                                {
                                    SAD += abs(currunt_frame[(y+j)*w+x+i] - reference_frames[(NRF-1-ref_index)*w*h+(search_y_radius+j)*w +search_x_radius+i]);
                                }
                            }
                            //If this block is better in SAD...
                            if (lowest_SAD > SAD){
                                lowest_SAD = SAD; // Update SAD.
                                motion_vector[(yb*nblock_x+xb)*3+0] = search_x_radius - x;
                                motion_vector[(yb*nblock_x+xb)*3+1] = search_y_radius - y;
                                motion_vector[(yb*nblock_x+xb)*3+2] = ref_index + 1;  
                            }
                            //If there is a tie in SAD keep last change
                        }
                    }
                }
            }
        }
    }
}


//////////////////////////////////////
__global__ void d_generate_mv_one_frame( PIXEL *currunt_frame, PIXEL *reference_frames, int *motion_vector, int h, int w)
{
    __shared__ PIXEL reference_blocks[NRF][BS+2*SR][BS+2*SR]; 
    __shared__ PIXEL currunt_block   [BS][BS]; 
    __shared__ int   sub_result      [NRF][2*SR+1][2*SR+1]; 
    
    //int nblock_y = h/BS;
    int nblock_x = w/BS;
    //cordination of upper left pixel
    int x_block   = blockIdx.x*BS;
    int y_block   = blockIdx.y*BS;
    //these are equal to the motion vector
    int ix = threadIdx.x;     
    int iy = threadIdx.y;
    int iz = threadIdx.z;
    // index to read block of data to search into from reference block
    int idx  = x_block+ix-SR;
    int idy  = y_block+iy-SR;
    // index to read block of data that needs processing
    int idxc = x_block+ix;
    int idyc = y_block+iy;
    // first all threads read the inputs required
    if ((idx >= 0 ) && (idx  < w) && (idy >=0) && (idy < h)) //&& (iy < (BS+2*SR)) && (ix < (BS+2*SR)) )
    {
        reference_blocks[iz][iy][ix] = reference_frames[h*w*(NRF-1-iz)+idy*w+idx];
    }
    else
        reference_blocks[iz][iy][ix] = 127;
    // some threads also read current frame
    if (iz == 0 && ix < BS && iy < BS)
    {
        currunt_block[iy][ix] = currunt_frame[idyc*w + idxc];
    }

    __syncthreads();
    // second add all the abs values for each direction of movement(iy, ix) over whole block
    if ((ix < 2*SR+1) && (iy < 2*SR+1))
    {
        sub_result[iz][iy][ix] = 0;
        for (int j = 0; j < BS; j++){
            for (int i =0; i < BS; i++)
            {
                sub_result[iz][iy][ix] += abs(currunt_block[j][i] - reference_blocks[iz][iy+j][ix+i]);        
            }
        }
    }

    __syncthreads();
    // third only one thread compares all SAD and selects the least one and stores motion vector
    if (ix == 0 && iy ==0 && iz == 0) // only one
    {
        int lowest_SAD = 256 * BS * BS;
        // intiallizing motion vector
        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 0 ] = 0;
        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 1 ] = 0;
        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 2 ] = 1;
        for(int z = 0; z< NRF; z++){
            for (int j = 0; j <= 2*SR; j++){
                for (int i =0; i <= 2*SR; i++)
                {
                    if (lowest_SAD > sub_result[z][j][i])
                    {
                        // found lower value so update motion vector
                        lowest_SAD = sub_result[z][j][i];
                        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 0 ] = i  - SR;
                        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 1 ] = j  - SR;
                        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 2 ] = z  + 1 ;
                    }
                }
            }
        }
    }
}
// this function invokes gpu kernels
void generate_mv_for_frames_gpu (int *h_motion_vector,PIXEL *luma, int h, int w){

    int nblock_y = h/BS;
    int nblock_x = w/BS;
    PIXEL   *currunt_frame;
    if ( cudaMalloc( (void **) &currunt_frame, h*w*sizeof(PIXEL)) != cudaSuccess ){
        fprintf(stderr, "Failed to allocate device vector for currunt_frame\n");
        //exit(EXIT_FAILURE);    
    }
    PIXEL   *reference_frames;
    if ( cudaMalloc( (void **) &reference_frames, h*w*NRF*sizeof(PIXEL)) != cudaSuccess ){
        fprintf(stderr, "Failed to allocate device vector for reference_frames\n");
        //exit(EXIT_FAILURE);    
    }
    int *d_motion_vector;
    if ( cudaMalloc( (void **) &d_motion_vector, nblock_y*nblock_x*sizeof(int)*3) != cudaSuccess ){
        fprintf(stderr, "Failed to allocate device vector for d_motion_vector\n");
    }

    for (int f =NRF; f < NF; f++)
    {
        if (cudaMemcpy( currunt_frame, &luma[h*w*f], h*w*sizeof(PIXEL), cudaMemcpyDeviceToDevice) != cudaSuccess){
            fprintf(stderr, "Failed to copy vector for currunt_frame\n");
        
        }
        if (cudaMemcpy(reference_frames, &luma[h*w*(f-NRF)] ,h*w*NRF*sizeof(PIXEL), cudaMemcpyDeviceToDevice) != cudaSuccess ) {
            fprintf(stderr, "Failed to copy vector for reference_frames\n");
        }               
        dim3 block(2*SR+BS, 2*SR+BS, NRF);      
        dim3 grid(nblock_x,nblock_y) ;
        d_generate_mv_one_frame<<<grid, block>>>( currunt_frame, reference_frames, d_motion_vector, h, w); 
        //d_generate_mv_one_frame2<<<1, 1>>>( currunt_frame, reference_frames, d_motion_vector, h, w); 
        cudaDeviceSynchronize() ;

        if (cudaMemcpy(&h_motion_vector[nblock_y*nblock_x*f*3], d_motion_vector,nblock_y*nblock_x*sizeof(int)*3, cudaMemcpyDeviceToDevice) != cudaSuccess ) {
            fprintf(stderr, "Failed to copy vector for motion_vector \n");
        }      

    }     

    cudaFree(currunt_frame );
    cudaFree(reference_frames);
    cudaFree(d_motion_vector);
}

/////////////////////////SHARED FUNCTIONS///////////////////////////////////
void reconstruct_frames(PIXEL *reconstructed,PIXEL *luma,int *motion_vector, int h, int w){
    int nblock_x = w/BS;
    int nblock_y = h/BS;
    for (int f = NRF; f < NF; f++)
    {
        for (int y = 0; y < nblock_y; y++)
        {
            for (int x = 0; x < nblock_x; x++)
            {
                int mvx = motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0];
                int mvy = motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1];
                int mvf = motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2];
                for(int j =0; j < BS; j++)
                {
                    //copy row by row (size of block)
                    memcpy(&reconstructed[f*W*H + W*(y*BS+j) + x*BS]   ,&luma[(f-mvf)*w*h + w*(mvy+y*BS+j) + mvx+x*BS], BS*sizeof(PIXEL));
                }
            }
        }
    }
}


void read_luma(FILE *fid, PIXEL *luma, PIXEL *crb, int h, int w){
    PIXEL   *temp= (PIXEL*) malloc(H*W*NF*sizeof(PIXEL)); if (temp== NULL) fprintf(stderr, "Bad malloc on temp\n");
    for (int f=0; f<NF; f++) {
        fread (&temp[H*W*f]  ,1,W*H,  fid);
        fread (&crb [W*H/2*f],1,W*H/2,fid);
        //fseek (fid,W*H/2,SEEK_CUR); //seek cb and cr
    }
    for (int f=0; f<NF; f++) {
        for ( int idh =0; idh < H; idh++){
            memcpy(&luma[h*w*f+idh*w] , &temp[H*W*f+idh*W], W*sizeof(PIXEL));
        }
    }
    free(temp);
}

void write_yuv(FILE *fid, PIXEL *reconstructed, PIXEL *crb){
    for (int f=0; f<NF; f++) {
        fwrite(&reconstructed[W*H*f]  ,1,W*H,fid);
        fwrite(&crb          [W*H/2*f],1,W*H/2,fid);
    }
}

void pad_luma(PIXEL *luma,int height,int width){
    for (int i = 0; i < height*width*NF; i++)
        luma[i] = 127;
}

//////////////////////////////////////////////////////////////////////////////

int main()
{
    // take of available refrence frames
    // CIF format
    int nblock_x = W/BS; // (W+(BS-1))/BS;
    int nblock_y = H/BS; // (H+(BS-1))/BS;
    
    int height = nblock_y*BS;
    int width  = nblock_x*BS;

    int number_frames = NF;
    ////////////////////////////////////
    FILE    *fid_in         = fopen("akiyo_cif.yuv","rb");
    FILE    *fid_out      = fopen("akiyo_cif_constructed.yuv","wb");
    FILE    *h_fid_out      = fopen("akiyo_cif_constructed_GPU.yuv","wb");
    int     *h_motion_vector; //= (int *) malloc(nblock_x*nblock_y*NF*3    *sizeof(int));   if (h_motion_vector == NULL) fprintf(stderr, "Bad malloc on h_motion_vector  \n");
    if ( cudaHostAlloc( (void**)&h_motion_vector ,nblock_x*nblock_y*NF*3*sizeof(int), cudaHostAllocWriteCombined) != cudaSuccess )
        fprintf(stderr, "Bad malloc on h_motion_vector  \n");
    PIXEL   *h_reconstructed= (PIXEL *) malloc(height*width  *NF*sizeof(PIXEL)); if (h_reconstructed == NULL) fprintf(stderr, "Bad malloc on h_reconstructed  \n");
    PIXEL   *luma          ;// = (PIXEL *) malloc(height*width*number_frames*sizeof(PIXEL)); if (luma          == NULL) fprintf(stderr, "Bad malloc on luma           \n");
    if ( cudaHostAlloc( (void**)&luma ,height*width*number_frames*sizeof(PIXEL), cudaHostAllocWriteCombined) != cudaSuccess )
        fprintf(stderr, "Bad malloc on luma  \n");

    int     *motion_vector  = (int *  ) malloc(nblock_x*nblock_y*NF*3    *sizeof(int));   if (motion_vector == NULL) fprintf(stderr, "Bad malloc on motion_vector  \n");
    PIXEL   *crb            = (PIXEL *) malloc(H*W/2*number_frames *sizeof(PIXEL)); if (crb           == NULL) fprintf(stderr, "Bad malloc on crb           \n");
    PIXEL   *reconstructed  = (PIXEL *) malloc(H*W*number_frames   *sizeof(PIXEL)); if (reconstructed == NULL) fprintf(stderr, "Bad malloc on reconstructed  \n");

    pad_luma (luma, height, width);
    read_luma(fid_in,luma,crb,height,width);
    fclose(fid_in);

    double timeStampA = getTimeStamp() ; 

    generate_mv_for_frames_cpu(motion_vector  ,luma, height, width);

    double timeStampB= getTimeStamp() ;

    generate_mv_for_frames_gpu(h_motion_vector,luma, height ,width);

    double timeStampC= getTimeStamp() ;

    int totalreads = (NRF*(BS+2*SR)*(BS+2*SR) +BS*BS)*NF*sizeof(PIXEL);   
    printf("total CPU time = %.6f\n", timeStampB - timeStampA);
    printf("total GPU time = %.6f\n", timeStampC - timeStampB);
    printf("SpeedUP   = %.3f\n", (timeStampB - timeStampA)/(timeStampC - timeStampB));   
    printf("BandWidth = %.3f\n", totalreads/(timeStampC - timeStampB)/1000);   
    #ifdef ENABLE_PRINT
    //printf("motion_vector\n");
    for (int f =NRF; f < NF; f++)
    {
        for (int y = 0; y < nblock_y; y++)
        {
            for (int x = 0; x < nblock_x; x++)
            {
                if ((motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0]-h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0] != 0) || (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1]-h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1] != 0) || (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2]-h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] != 0))
                //if ((motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0] != 0) && (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1] != 0) && (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] != 1))
                    printf("-->frame %d at y = %d and x = %d mv = (%d,%d,%d) and h_mv = (%d,%d,%d) \n", f, y*BS, x*BS, 
                              motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2]   , motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1],   motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0], 
                            h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] , h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1], h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0]);
                //else
                //    printf("frame %d at y = %d and x = %d mv = (%d,%d,%d) and h_mv = (%d,%d,%d) \n", f, y*BS, x*BS, 
                //            motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] , motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1], motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0], 
                //            h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] , h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1], h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0]);
            
            }
        }
    }
    #endif

    reconstruct_frames(reconstructed,luma,motion_vector,height,width);
    write_yuv(fid_out,reconstructed,crb);
    fclose(fid_out);
    ////////DEVICE///////////////
    reconstruct_frames(h_reconstructed,luma,h_motion_vector, height, width);
    write_yuv(h_fid_out,h_reconstructed,crb);
    fclose(h_fid_out);
    //////////////////////////////


    cudaFreeHost(luma          );
    free(reconstructed);
    free(h_reconstructed);
    free(motion_vector );
    cudaFreeHost(h_motion_vector);
    free(crb);
}
	.file	"tmpxft_00307204_00000000-6_ME_GPU.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12getTimeStampv
	.type	_Z12getTimeStampv, @function
_Z12getTimeStampv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	divsd	.LC0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12getTimeStampv, .-_Z12getTimeStampv
	.globl	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_
	.type	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_, @function
_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_:
.LFB2028:
	.cfi_startproc
	endbr64
	imull	%r9d, %r8d
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r10
	movl	%edx, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leal	0(,%rdx,4), %edx
	leal	0(,%rcx,4), %eax
	movl	$4096, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leal	(%r8,%r8), %ebp
	movl	$2, %r8d
	cmpl	%r8d, %edx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	cmovge	%edx, %r8d
	leal	-2(%r8), %ebx
	movl	%ebx, %r8d
	movl	%ebx, -56(%rsp)
	imull	%r9d, %r8d
	movslq	%r8d, %r8
	leaq	(%r10,%r8), %rbx
	movl	%esi, %r8d
	movslq	%ecx, %r10
	imull	%r9d, %r8d
	movq	%rbx, -32(%rsp)
	movslq	%r9d, %r9
	movslq	%r8d, %r8
	addq	%r10, %r8
	leaq	(%rdi,%r8,4), %rbx
	movl	$1, %r8d
	movq	%rbx, -48(%rsp)
	imull	$-4, %ecx, %ebx
	movl	$282, %ecx
	imull	$-4, %esi, %edi
	cmpl	%ecx, %edx
	cmovg	%ecx, %edx
	movl	%ebx, -36(%rsp)
	leal	2(%rdx), %esi
	movl	$2, %edx
	movl	%edi, -16(%rsp)
	cmpl	%edx, %eax
	movl	%esi, -12(%rsp)
	cmovge	%eax, %edx
	movl	%edx, -8(%rsp)
	movl	$346, %edx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	addl	$2, %eax
	movl	%eax, -4(%rsp)
.L14:
	movq	-32(%rsp), %rbx
	movslq	%ebp, %rax
	movl	-56(%rsp), %r10d
	addq	%rbx, %rax
.L7:
	cmpl	%r10d, -12(%rsp)
	jl	.L19
	movl	-16(%rsp), %ebx
	movl	-8(%rsp), %edi
	leal	(%r10,%rbx), %esi
	leal	-2(%rdi), %edx
	movl	%esi, -52(%rsp)
	movslq	%edx, %rcx
	addq	%rax, %rcx
.L8:
	cmpl	%edx, -4(%rsp)
	jl	.L20
	movl	$4, -40(%rsp)
	xorl	%ebx, %ebx
	xorl	%r11d, %r11d
.L12:
	movq	-48(%rsp), %rdi
	xorl	%esi, %esi
	leaq	(%rdi,%rbx), %r15
	leaq	(%rcx,%rbx), %rdi
	movq	%rdi, -24(%rsp)
.L9:
	movq	-24(%rsp), %r12
	movzbl	(%r15,%rsi), %edi
	movzbl	(%r12,%rsi), %r12d
	subl	%r12d, %edi
	movl	%edi, %r12d
	negl	%r12d
	cmovs	%edi, %r12d
	incq	%rsi
	addl	%r12d, %r11d
	cmpq	$4, %rsi
	jne	.L9
	addq	%r9, %rbx
	decl	-40(%rsp)
	jne	.L12
	cmpl	%r11d, %r14d
	jle	.L11
	movl	-36(%rsp), %esi
	movq	64(%rsp), %rbx
	movl	%r11d, %r14d
	movq	72(%rsp), %rdi
	addl	%edx, %esi
	movl	%esi, (%rbx)
	movq	56(%rsp), %rsi
	movl	-52(%rsp), %ebx
	movl	%ebx, (%rsi)
	movl	%r8d, (%rdi)
.L11:
	incl	%edx
	incq	%rcx
	jmp	.L8
.L20:
	incl	%r10d
	addq	%r9, %rax
	jmp	.L7
.L19:
	incl	%r8d
	subl	%r13d, %ebp
	cmpl	$4, %r8d
	jne	.L14
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$1, %eax
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_, .-_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Bad malloc on currunt_frame  \n"
.LC2:
	.string	"Bad malloc on reference_frames  \n"
	.text
	.globl	_Z26generate_mv_for_frames_cpuPiPhii
	.type	_Z26generate_mv_for_frames_cpuPiPhii, @function
_Z26generate_mv_for_frames_cpuPiPhii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movl	%edx, 28(%rsp)
	movl	%ecx, 32(%rsp)
	movl	$4, %ecx
	movl	32(%rsp), %r12d
	movq	%rdi, 48(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	32(%rsp), %eax
	cltd
	idivl	%ecx
	movl	%eax, %r14d
	movl	28(%rsp), %eax
	cltd
	idivl	%ecx
	movl	%eax, 36(%rsp)
	movl	28(%rsp), %eax
	imull	%eax, %r12d
	movslq	%r12d, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rax, (%rsp)
	testq	%rax, %rax
	jne	.L22
	movq	stderr(%rip), %rdi
	leaq	.LC1(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
.L22:
	leal	(%r12,%r12,2), %r12d
	movslq	%r12d, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, 8(%rsp)
	testq	%rax, %rax
	jne	.L23
	movq	stderr(%rip), %rdi
	leaq	.LC2(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
.L23:
	movl	36(%rsp), %r15d
	leaq	0(%rbp,%rbp,2), %rax
	movl	$197, 64(%rsp)
	movq	%rax, 40(%rsp)
	leaq	100(%rsp), %rax
	imull	%r14d, %r15d
	movq	%rax, 56(%rsp)
	leal	(%r15,%r15,2), %r13d
.L28:
	movq	40(%rsp), %rax
	movq	(%rsp), %rdi
	movq	%rbp, %rcx
	movq	%rbp, %rdx
	leaq	(%rbx,%rax), %rsi
	call	__memcpy_chk@PLT
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rcx, %rdx
	call	__memcpy_chk@PLT
	movl	%r13d, %r10d
	xorl	%edx, %edx
.L24:
	movl	36(%rsp), %eax
	cmpl	%eax, %edx
	jge	.L26
	movq	48(%rsp), %rsi
	leal	(%r10,%r10,2), %eax
	xorl	%ecx, %ecx
	cltq
	leaq	(%rsi,%rax,4), %r12
.L27:
	cmpl	%r14d, %ecx
	jge	.L33
	xorl	%eax, %eax
	movl	$1, 100(%rsp)
	addq	$12, %r12
	movl	%eax, 92(%rsp)
	movl	%eax, 96(%rsp)
	movl	%r10d, 76(%rsp)
	pushq	%rsi
	.cfi_def_cfa_offset 184
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	leaq	112(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 200
	leaq	116(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 208
	movl	64(%rsp), %r9d
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ecx, 104(%rsp)
	movl	%edx, 100(%rsp)
	call	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_
	movl	128(%rsp), %eax
	movl	104(%rsp), %ecx
	movl	%eax, -12(%r12)
	movl	124(%rsp), %eax
	incl	%ecx
	movl	%eax, -8(%r12)
	movl	132(%rsp), %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
	movl	76(%rsp), %r10d
	movl	68(%rsp), %edx
	movl	%eax, -4(%r12)
	jmp	.L27
.L33:
	incl	%edx
	addl	%r14d, %r10d
	jmp	.L24
.L26:
	addq	%rbp, %rbx
	addl	%r15d, %r13d
	decl	64(%rsp)
	jne	.L28
	movq	(%rsp), %rdi
	call	free@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	movq	8(%rsp), %rdi
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z26generate_mv_for_frames_cpuPiPhii, .-_Z26generate_mv_for_frames_cpuPiPhii
	.globl	_Z18reconstruct_framesPhS_Piii
	.type	_Z18reconstruct_framesPhS_Piii, @function
_Z18reconstruct_framesPhS_Piii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, -64(%rsp)
	movl	$4, %ecx
	movq	%rdx, -24(%rsp)
	cltd
	idivl	%ecx
	movq	%rdi, -40(%rsp)
	movq	%rsi, -32(%rsp)
	xorl	%esi, %esi
	movl	%eax, %ebp
	movl	-64(%rsp), %eax
	cltd
	idivl	%ecx
	movslq	%r8d, %rcx
	movq	%rcx, -8(%rsp)
	movl	%eax, %r13d
	movl	%eax, -60(%rsp)
	imull	%ebp, %r13d
	leal	0(%r13,%r13,2), %ebx
.L35:
	imulq	$101376, %rsi, %rdx
	leal	3(%rsi), %eax
	movl	%ebx, %r14d
	xorl	%ecx, %ecx
	movl	%eax, -52(%rsp)
	movq	-40(%rsp), %rax
	leaq	304128(%rax,%rdx), %rax
	movq	%rax, -16(%rsp)
.L41:
	movl	-60(%rsp), %eax
	cmpl	%eax, %ecx
	jge	.L38
	leal	0(,%rcx,4), %eax
	leal	(%r14,%r14,2), %edx
	xorl	%r10d, %r10d
	xorl	%r12d, %r12d
	movl	%eax, -56(%rsp)
	movq	-24(%rsp), %rax
	movslq	%edx, %rdx
	leaq	(%rax,%rdx,4), %r9
	movq	-16(%rsp), %rax
	imull	$1408, %ecx, %edx
	movslq	%edx, %rdx
	addq	%rdx, %rax
	movq	%rax, -48(%rsp)
.L39:
	cmpl	%ebp, %r12d
	jge	.L44
	movl	-56(%rsp), %edx
	addl	4(%r9), %edx
	imull	%r8d, %edx
	movslq	(%r9), %r11
	movl	-64(%rsp), %r15d
	addq	%r10, %r11
	movslq	%edx, %rdx
	addq	%r11, %rdx
	movl	-52(%rsp), %r11d
	subl	8(%r9), %r11d
	imull	%r8d, %r11d
	imull	%r15d, %r11d
	movq	-32(%rsp), %r15
	movslq	%r11d, %r11
	addq	%r11, %rdx
	xorl	%r11d, %r11d
	addq	%r15, %rdx
	movq	-48(%rsp), %r15
	addq	%r10, %r15
.L36:
	imulq	$352, %r11, %rdi
	movl	(%rdx), %eax
	incq	%r11
	movl	%eax, (%r15,%rdi)
	movq	-8(%rsp), %rax
	addq	%rax, %rdx
	cmpq	$4, %r11
	jne	.L36
	incl	%r12d
	addq	$12, %r9
	addq	$4, %r10
	jmp	.L39
.L44:
	incl	%ecx
	addl	%ebp, %r14d
	jmp	.L41
.L38:
	incq	%rsi
	addl	%r13d, %ebx
	cmpq	$197, %rsi
	jne	.L35
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z18reconstruct_framesPhS_Piii, .-_Z18reconstruct_framesPhS_Piii
	.section	.rodata.str1.1
.LC3:
	.string	"Bad malloc on temp\n"
	.text
	.globl	_Z9read_lumaP8_IO_FILEPhS1_ii
	.type	_Z9read_lumaP8_IO_FILEPhS1_ii, @function
_Z9read_lumaP8_IO_FILEPhS1_ii:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movslq	%r8d, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	movl	$20275200, %edi
	call	malloc@PLT
	movq	%rax, %r13
	testq	%rax, %rax
	jne	.L46
	movq	stderr(%rip), %rdi
	leaq	.LC3(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L46:
	leaq	20275200(%r13), %rax
	movl	$20275200, %r9d
	movq	%rax, 16(%rsp)
.L47:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %r8
	movq	%r9, %rsi
	movq	%r13, %r15
	movl	$101376, %ecx
	movl	$1, %edx
	movq	%r9, 24(%rsp)
	subq	%r9, %rdi
	call	__fread_chk@PLT
	movq	8(%rsp), %r8
	movq	%r12, %rdi
	movl	$50688, %ecx
	movl	$1, %edx
	orq	$-1, %rsi
	addq	$50688, %r12
	call	__fread_chk@PLT
	movq	24(%rsp), %r9
	subq	$101376, %r9
	jne	.L47
	imull	%r14d, %ebp
	xorl	%r9d, %r9d
	movslq	%ebp, %rbp
.L48:
	movq	%r15, %rdx
	movq	%rbx, %rax
	movl	$288, %r8d
.L49:
	movq	%rax, %rdi
	movq	%rdx, %rsi
	movl	$88, %ecx
	addq	%r14, %rax
	rep movsl
	addq	$352, %rdx
	decl	%r8d
	jne	.L49
	addl	$101376, %r9d
	addq	%rbp, %rbx
	addq	$101376, %r15
	cmpl	$20275200, %r9d
	jne	.L48
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%r13, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z9read_lumaP8_IO_FILEPhS1_ii, .-_Z9read_lumaP8_IO_FILEPhS1_ii
	.globl	_Z9write_yuvP8_IO_FILEPhS1_
	.type	_Z9write_yuvP8_IO_FILEPhS1_, @function
_Z9write_yuvP8_IO_FILEPhS1_:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	20275200(%rsi), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L55:
	movq	%rbx, %rdi
	movq	%r12, %rcx
	movl	$101376, %edx
	movl	$1, %esi
	call	fwrite@PLT
	movq	%rbp, %rdi
	movq	%r12, %rcx
	movl	$50688, %edx
	movl	$1, %esi
	addq	$101376, %rbx
	addq	$50688, %rbp
	call	fwrite@PLT
	cmpq	%r13, %rbx
	jne	.L55
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z9write_yuvP8_IO_FILEPhS1_, .-_Z9write_yuvP8_IO_FILEPhS1_
	.globl	_Z8pad_lumaPhii
	.type	_Z8pad_lumaPhii, @function
_Z8pad_lumaPhii:
.LFB2034:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	xorl	%eax, %eax
	imull	$200, %esi, %esi
.L59:
	cmpl	%eax, %esi
	jle	.L61
	movb	$127, (%rdi,%rax)
	incq	%rax
	jmp	.L59
.L61:
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z8pad_lumaPhii, .-_Z8pad_lumaPhii
	.globl	_Z55__device_stub__Z29d_generate_mv_one_frame_naivePhS_PiiiPhS_Piii
	.type	_Z55__device_stub__Z29d_generate_mv_one_frame_naivePhS_PiiiPhS_Piii, @function
_Z55__device_stub__Z29d_generate_mv_one_frame_naivePhS_PiiiPhS_Piii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z29d_generate_mv_one_frame_naivePhS_Piii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L62:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z55__device_stub__Z29d_generate_mv_one_frame_naivePhS_PiiiPhS_Piii, .-_Z55__device_stub__Z29d_generate_mv_one_frame_naivePhS_PiiiPhS_Piii
	.globl	_Z29d_generate_mv_one_frame_naivePhS_Piii
	.type	_Z29d_generate_mv_one_frame_naivePhS_Piii, @function
_Z29d_generate_mv_one_frame_naivePhS_Piii:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z29d_generate_mv_one_frame_naivePhS_PiiiPhS_Piii
	.cfi_endproc
.LFE2061:
	.size	_Z29d_generate_mv_one_frame_naivePhS_Piii, .-_Z29d_generate_mv_one_frame_naivePhS_Piii
	.globl	_Z49__device_stub__Z23d_generate_mv_one_framePhS_PiiiPhS_Piii
	.type	_Z49__device_stub__Z23d_generate_mv_one_framePhS_PiiiPhS_Piii, @function
_Z49__device_stub__Z23d_generate_mv_one_framePhS_PiiiPhS_Piii:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z23d_generate_mv_one_framePhS_Piii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L67:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z49__device_stub__Z23d_generate_mv_one_framePhS_PiiiPhS_Piii, .-_Z49__device_stub__Z23d_generate_mv_one_framePhS_PiiiPhS_Piii
	.globl	_Z23d_generate_mv_one_framePhS_Piii
	.type	_Z23d_generate_mv_one_framePhS_Piii, @function
_Z23d_generate_mv_one_framePhS_Piii:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z23d_generate_mv_one_framePhS_PiiiPhS_Piii
	.cfi_endproc
.LFE2063:
	.size	_Z23d_generate_mv_one_framePhS_Piii, .-_Z23d_generate_mv_one_framePhS_Piii
	.section	.rodata.str1.1
.LC4:
	.string	"Failed to allocate device vector for currunt_frame\n"
.LC5:
	.string	"Failed to allocate device vector for reference_frames\n"
.LC6:
	.string	"Failed to allocate device vector for d_motion_vector\n"
.LC7:
	.string	"Failed to copy vector for currunt_frame\n"
.LC8:
	.string	"Failed to copy vector for reference_frames\n"
.LC9:
	.string	"Failed to copy vector for motion_vector \n"
	.text
	.globl	_Z26generate_mv_for_frames_gpuPiPhii
	.type	_Z26generate_mv_for_frames_gpuPiPhii, @function
_Z26generate_mv_for_frames_gpuPiPhii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movl	%ecx, 40(%rsp)
	movl	$4, %ecx
	leaq	56(%rsp), %rdi
	movl	%edx, 12(%rsp)
	movl	12(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	%edx, %eax
	cltd
	idivl	%ecx
	movl	%eax, %r14d
	movl	40(%rsp), %eax
	cltd
	idivl	%ecx
	movl	%eax, %r15d
	movl	40(%rsp), %eax
	imull	%eax, %ebp
	movslq	%ebp, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L73
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L73:
	leal	0(%rbp,%rbp,2), %ebp
	leaq	64(%rsp), %rdi
	movslq	%ebp, %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L74
	movq	stderr(%rip), %rdi
	leaq	.LC5(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L74:
	movl	%r14d, %ebp
	leaq	72(%rsp), %rdi
	imull	%r15d, %ebp
	movslq	%ebp, %rax
	imulq	$12, %rax, %rax
	movq	%rax, %rsi
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L75
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L75:
	leal	0(%rbp,%rbp,2), %eax
	movl	$197, 44(%rsp)
	leal	0(%rbp,%rbp,8), %ebp
	cltq
	movslq	%ebp, %rbp
	salq	$2, %rax
	leaq	0(%r13,%rbp,4), %r13
	leaq	(%r12,%r12,2), %rbp
	movq	%rax, 32(%rsp)
.L80:
	movq	56(%rsp), %rdi
	leaq	(%rbx,%rbp), %rsi
	movl	$3, %ecx
	movq	%r12, %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L76
	movq	stderr(%rip), %rdi
	leaq	.LC7(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L76:
	movq	16(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	$3, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L77
	movq	stderr(%rip), %rdi
	leaq	.LC8(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L77:
	movl	%r15d, 92(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$3, %ecx
	movl	%r14d, 96(%rsp)
	movq	92(%rsp), %rdi
	movl	$1, %esi
	movabsq	$34359738376, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L78
	movl	40(%rsp), %r8d
	movl	12(%rsp), %ecx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z49__device_stub__Z23d_generate_mv_one_framePhS_PiiiPhS_Piii
.L78:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	%r13, %rdi
	movl	$3, %ecx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L79
	movq	stderr(%rip), %rdi
	leaq	.LC9(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L79:
	movq	32(%rsp), %rax
	addq	%r12, %rbx
	addq	%rax, %r13
	decl	44(%rsp)
	jne	.L80
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L81
	call	__stack_chk_fail@PLT
.L81:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z26generate_mv_for_frames_gpuPiPhii, .-_Z26generate_mv_for_frames_gpuPiPhii
	.section	.rodata.str1.1
.LC10:
	.string	"rb"
.LC11:
	.string	"akiyo_cif.yuv"
.LC12:
	.string	"wb"
.LC13:
	.string	"akiyo_cif_constructed.yuv"
.LC14:
	.string	"akiyo_cif_constructed_GPU.yuv"
.LC15:
	.string	"Bad malloc on h_motion_vector  \n"
.LC16:
	.string	"Bad malloc on h_reconstructed  \n"
.LC17:
	.string	"Bad malloc on luma  \n"
.LC18:
	.string	"Bad malloc on motion_vector  \n"
.LC19:
	.string	"Bad malloc on crb           \n"
.LC20:
	.string	"Bad malloc on reconstructed  \n"
.LC21:
	.string	"total CPU time = %.6f\n"
.LC22:
	.string	"total GPU time = %.6f\n"
.LC23:
	.string	"SpeedUP   = %.3f\n"
.LC26:
	.string	"BandWidth = %.3f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC10(%rip), %rsi
	leaq	.LC11(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC12(%rip), %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movq	%rbx, %rsi
	leaq	.LC13(%rip), %rdi
	movq	%rax, %r15
	call	fopen@PLT
	movq	%rbx, %rsi
	leaq	.LC14(%rip), %rdi
	movq	%rax, %r14
	call	fopen@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %edx
	movl	$15206400, %esi
	movq	%rax, 8(%rsp)
	call	cudaHostAlloc@PLT
	testl	%eax, %eax
	je	.L103
	movq	stderr(%rip), %rdi
	leaq	.LC15(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L103:
	movl	$20275200, %edi
	call	malloc@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L104
	movq	stderr(%rip), %rdi
	leaq	.LC16(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L104:
	leaq	48(%rsp), %rdi
	movl	$4, %edx
	movl	$20275200, %esi
	call	cudaHostAlloc@PLT
	testl	%eax, %eax
	je	.L105
	movq	stderr(%rip), %rdi
	leaq	.LC17(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L105:
	movl	$15206400, %edi
	call	malloc@PLT
	movq	%rax, %rbp
	testq	%rax, %rax
	jne	.L106
	movq	stderr(%rip), %rdi
	leaq	.LC18(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L106:
	movl	$10137600, %edi
	call	malloc@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L107
	movq	stderr(%rip), %rdi
	leaq	.LC19(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L107:
	movl	$20275200, %edi
	call	malloc@PLT
	movq	%rax, %r13
	testq	%rax, %rax
	jne	.L108
	movq	stderr(%rip), %rdi
	leaq	.LC20(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L108:
	movq	48(%rsp), %rdi
	movl	$352, %edx
	movl	$288, %esi
	movl	$352, %r8d
	movl	$288, %ecx
	call	_Z8pad_lumaPhii
	movq	48(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r15, %rdi
	call	_Z9read_lumaP8_IO_FILEPhS1_ii
	movq	%r15, %rdi
	call	fclose@PLT
	call	_Z12getTimeStampv
	movq	48(%rsp), %rsi
	movl	$352, %ecx
	movq	%rbp, %rdi
	movl	$288, %edx
	movsd	%xmm0, 16(%rsp)
	call	_Z26generate_mv_for_frames_cpuPiPhii
	call	_Z12getTimeStampv
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$352, %ecx
	movl	$288, %edx
	movsd	%xmm0, (%rsp)
	call	_Z26generate_mv_for_frames_gpuPiPhii
	call	_Z12getTimeStampv
	movsd	(%rsp), %xmm2
	subsd	16(%rsp), %xmm2
	movb	$1, %al
	movsd	%xmm0, 24(%rsp)
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	movaps	%xmm2, %xmm0
	movq	%xmm2, %r15
	call	__printf_chk@PLT
	movsd	24(%rsp), %xmm1
	subsd	(%rsp), %xmm1
	movb	$1, %al
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	movaps	%xmm1, %xmm0
	movsd	%xmm1, (%rsp)
	call	__printf_chk@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movq	%r15, %xmm0
	divsd	(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC26(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movsd	.LC24(%rip), %xmm0
	divsd	(%rsp), %xmm0
	divsd	.LC25(%rip), %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%r13, %rdi
	movl	$352, %r8d
	movl	$288, %ecx
	call	_Z18reconstruct_framesPhS_Piii
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movq	%r14, %rdi
	call	_Z9write_yuvP8_IO_FILEPhS1_
	movq	%r14, %rdi
	call	fclose@PLT
	movq	40(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	%r12, %rdi
	movl	$352, %r8d
	movl	$288, %ecx
	call	_Z18reconstruct_framesPhS_Piii
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	call	_Z9write_yuvP8_IO_FILEPhS1_
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	48(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L109
	call	__stack_chk_fail@PLT
.L109:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	main, .-main
	.section	.rodata.str1.1
.LC27:
	.string	"_Z23d_generate_mv_one_framePhS_Piii"
.LC28:
	.string	"_Z29d_generate_mv_one_frame_naivePhS_Piii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z23d_generate_mv_one_framePhS_Piii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z29d_generate_mv_one_frame_naivePhS_Piii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.align 8
.LC24:
	.long	0
	.long	1088704512
	.align 8
.LC25:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <math.h>  // for abs
#include <stdio.h>
#include <stdint.h> // for uint8_t
#include <string.h>
#include <sys/time.h>
#include <stdlib.h>

// For the CUDA runtime routines (prefixed with "cuda_")
#include <hip/hip_runtime.h>

//using namespace std;
#define PIXEL uint8_t

#define H 288 // height of each frame
#define W 352 // width of each frame
#define NF 200 // number of frames
#define NRF 3 // number of refernce frames
#define BS  4 // block_size
#define SR  2 // search_radius

//#define ENABLE_PRINT

//because using c not c++
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
#define MIN(x, y) (((x) < (y)) ? (x) : (y))

// time stamp function in seconds 
double getTimeStamp()
{     
    struct timeval  tv ;     
    gettimeofday( &tv, NULL ) ;     
    return (double) tv.tv_usec/1000000 + tv.tv_sec ;
} 

/////////////////////////////////////////CPU FUNCTIONS///////////////////////////////////////////////////////////////////
int generate_mv_for_block(PIXEL *currunt_frame, PIXEL *reference_frames, int yb, int xb, int h, int w, int *motion_vector_y, int *motion_vector_x, int *motion_vector_f)    
{    
    int lowest_SAD = 256 * BS * BS;// variable storing the SAD value
    int block_size = BS;
    int y = yb*BS;
    int x = xb*BS;
    // (y,x) the pixel location of the top-left corner of the block.
    
    //Search for the best matching block in the reference frame.
    //The search processes only the block is within the reference frame (not out of boundary).
    for (int ref_index = 0; ref_index < NRF; ref_index++){   
        for (int search_y_radius = MAX(y-SR,0); search_y_radius <= MIN(y+SR,H-BS) ; search_y_radius++){ 
            for (int search_x_radius = MAX(x-SR,0); search_x_radius <= MIN(x+SR,W-BS); search_x_radius++){
                //Calculate SAD of this block with the input block.
                int SAD = 0;
                for(int j =0; j < block_size; j++)
                {
                    for (int i=0; i < block_size; i++)
                    {
                        SAD += abs(currunt_frame[(y+j)*w+x+i] - reference_frames[(NRF-1-ref_index)*w*h+(search_y_radius+j)*w +search_x_radius+i]);
                    }
                }
                //If this block is better in SAD...
                if (lowest_SAD > SAD){
                    lowest_SAD = SAD; // Update SAD.
                    (*motion_vector_x) = search_x_radius - x;
                    (*motion_vector_y) = search_y_radius - y; //Update motion vector.
                    (*motion_vector_f) = ref_index + 1;
                }
                //If there is a tie in SAD keep last change
            }
        }
    }
    return 1;
}

void generate_mv_for_frames_cpu(int *motion_vector,PIXEL *luma, int h, int w){
    int nblock_x = w/BS;
    int nblock_y = h/BS;

    PIXEL   *currunt_frame  = (PIXEL *) malloc(h*w*sizeof(PIXEL)); if (currunt_frame == NULL) fprintf(stderr, "Bad malloc on currunt_frame  \n");
    PIXEL   *reference_frames= (PIXEL*) malloc(h*w*NRF*sizeof(PIXEL)); if (reference_frames == NULL) fprintf(stderr, "Bad malloc on reference_frames  \n");

    for (int f =NRF; f < NF; f++)
    {
        memcpy(currunt_frame   ,&luma[h*w*f]      ,h*w    *sizeof(PIXEL));
        memcpy(reference_frames,&luma[h*w*(f-NRF)],h*w*NRF*sizeof(PIXEL));
        for (int y = 0; y < nblock_y; y++){
            for (int x = 0; x < nblock_x; x++){
                int mvy = 0;
                int mvx = 0;
                int mvf = 1;
                generate_mv_for_block(currunt_frame, reference_frames, y, x, h, w, &mvy, &mvx, &mvf);
                motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0] = mvx;
                motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1] = mvy; 
                motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] = mvf;      
            }
        }
    }
    free(currunt_frame );
    free(reference_frames);
}

/////////////////////////////GPU FUNCTIONS///////////////////////////////////////////////////////////////
__global__ void d_generate_mv_one_frame_naive( PIXEL *currunt_frame, PIXEL *reference_frames, int *motion_vector, int h, int w)
{

    int block_size = BS;
    int nblock_x = w/BS;
    int nblock_y = h/BS;
    // (y,x) the pixel location of the top-left corner of the block.
    
    //Search for the best matching block in the reference frame.
    //The search processes only the block is within the reference frame (not out of boundary).
    for (int f =NRF; f < NF; f++){
        for (int yb = 0; yb < nblock_y; yb++){
            for (int xb = 0; xb < nblock_x; xb++){
                int lowest_SAD = 256 * BS * BS;// variable storing the SAD value
                int y = yb*BS;
                int x = xb*BS;
                for (int ref_index = 0; ref_index < NRF; ref_index++){   
                    for (int search_y_radius = MAX(y-SR,0); search_y_radius <= MIN(y+SR,H-BS) ; search_y_radius++){ 
                        for (int search_x_radius = MAX(x-SR,0); search_x_radius <= MIN(x+SR,W-BS); search_x_radius++){
                            //Calculate SAD of this block with the input block.
                            int SAD = 0;
                            for(int j =0; j < block_size; j++)
                            {
                                for (int i=0; i < block_size; i++)
                                {
                                    SAD += abs(currunt_frame[(y+j)*w+x+i] - reference_frames[(NRF-1-ref_index)*w*h+(search_y_radius+j)*w +search_x_radius+i]);
                                }
                            }
                            //If this block is better in SAD...
                            if (lowest_SAD > SAD){
                                lowest_SAD = SAD; // Update SAD.
                                motion_vector[(yb*nblock_x+xb)*3+0] = search_x_radius - x;
                                motion_vector[(yb*nblock_x+xb)*3+1] = search_y_radius - y;
                                motion_vector[(yb*nblock_x+xb)*3+2] = ref_index + 1;  
                            }
                            //If there is a tie in SAD keep last change
                        }
                    }
                }
            }
        }
    }
}


//////////////////////////////////////
__global__ void d_generate_mv_one_frame( PIXEL *currunt_frame, PIXEL *reference_frames, int *motion_vector, int h, int w)
{
    __shared__ PIXEL reference_blocks[NRF][BS+2*SR][BS+2*SR]; 
    __shared__ PIXEL currunt_block   [BS][BS]; 
    __shared__ int   sub_result      [NRF][2*SR+1][2*SR+1]; 
    
    //int nblock_y = h/BS;
    int nblock_x = w/BS;
    //cordination of upper left pixel
    int x_block   = blockIdx.x*BS;
    int y_block   = blockIdx.y*BS;
    //these are equal to the motion vector
    int ix = threadIdx.x;     
    int iy = threadIdx.y;
    int iz = threadIdx.z;
    // index to read block of data to search into from reference block
    int idx  = x_block+ix-SR;
    int idy  = y_block+iy-SR;
    // index to read block of data that needs processing
    int idxc = x_block+ix;
    int idyc = y_block+iy;
    // first all threads read the inputs required
    if ((idx >= 0 ) && (idx  < w) && (idy >=0) && (idy < h)) //&& (iy < (BS+2*SR)) && (ix < (BS+2*SR)) )
    {
        reference_blocks[iz][iy][ix] = reference_frames[h*w*(NRF-1-iz)+idy*w+idx];
    }
    else
        reference_blocks[iz][iy][ix] = 127;
    // some threads also read current frame
    if (iz == 0 && ix < BS && iy < BS)
    {
        currunt_block[iy][ix] = currunt_frame[idyc*w + idxc];
    }

    __syncthreads();
    // second add all the abs values for each direction of movement(iy, ix) over whole block
    if ((ix < 2*SR+1) && (iy < 2*SR+1))
    {
        sub_result[iz][iy][ix] = 0;
        for (int j = 0; j < BS; j++){
            for (int i =0; i < BS; i++)
            {
                sub_result[iz][iy][ix] += abs(currunt_block[j][i] - reference_blocks[iz][iy+j][ix+i]);        
            }
        }
    }

    __syncthreads();
    // third only one thread compares all SAD and selects the least one and stores motion vector
    if (ix == 0 && iy ==0 && iz == 0) // only one
    {
        int lowest_SAD = 256 * BS * BS;
        // intiallizing motion vector
        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 0 ] = 0;
        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 1 ] = 0;
        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 2 ] = 1;
        for(int z = 0; z< NRF; z++){
            for (int j = 0; j <= 2*SR; j++){
                for (int i =0; i <= 2*SR; i++)
                {
                    if (lowest_SAD > sub_result[z][j][i])
                    {
                        // found lower value so update motion vector
                        lowest_SAD = sub_result[z][j][i];
                        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 0 ] = i  - SR;
                        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 1 ] = j  - SR;
                        motion_vector[(blockIdx.y*nblock_x+blockIdx.x)*3 + 2 ] = z  + 1 ;
                    }
                }
            }
        }
    }
}
// this function invokes gpu kernels
void generate_mv_for_frames_gpu (int *h_motion_vector,PIXEL *luma, int h, int w){

    int nblock_y = h/BS;
    int nblock_x = w/BS;
    PIXEL   *currunt_frame;
    if ( hipMalloc( (void **) &currunt_frame, h*w*sizeof(PIXEL)) != hipSuccess ){
        fprintf(stderr, "Failed to allocate device vector for currunt_frame\n");
        //exit(EXIT_FAILURE);    
    }
    PIXEL   *reference_frames;
    if ( hipMalloc( (void **) &reference_frames, h*w*NRF*sizeof(PIXEL)) != hipSuccess ){
        fprintf(stderr, "Failed to allocate device vector for reference_frames\n");
        //exit(EXIT_FAILURE);    
    }
    int *d_motion_vector;
    if ( hipMalloc( (void **) &d_motion_vector, nblock_y*nblock_x*sizeof(int)*3) != hipSuccess ){
        fprintf(stderr, "Failed to allocate device vector for d_motion_vector\n");
    }

    for (int f =NRF; f < NF; f++)
    {
        if (hipMemcpy( currunt_frame, &luma[h*w*f], h*w*sizeof(PIXEL), hipMemcpyDeviceToDevice) != hipSuccess){
            fprintf(stderr, "Failed to copy vector for currunt_frame\n");
        
        }
        if (hipMemcpy(reference_frames, &luma[h*w*(f-NRF)] ,h*w*NRF*sizeof(PIXEL), hipMemcpyDeviceToDevice) != hipSuccess ) {
            fprintf(stderr, "Failed to copy vector for reference_frames\n");
        }               
        dim3 block(2*SR+BS, 2*SR+BS, NRF);      
        dim3 grid(nblock_x,nblock_y) ;
        d_generate_mv_one_frame<<<grid, block>>>( currunt_frame, reference_frames, d_motion_vector, h, w); 
        //d_generate_mv_one_frame2<<<1, 1>>>( currunt_frame, reference_frames, d_motion_vector, h, w); 
        hipDeviceSynchronize() ;

        if (hipMemcpy(&h_motion_vector[nblock_y*nblock_x*f*3], d_motion_vector,nblock_y*nblock_x*sizeof(int)*3, hipMemcpyDeviceToDevice) != hipSuccess ) {
            fprintf(stderr, "Failed to copy vector for motion_vector \n");
        }      

    }     

    hipFree(currunt_frame );
    hipFree(reference_frames);
    hipFree(d_motion_vector);
}

/////////////////////////SHARED FUNCTIONS///////////////////////////////////
void reconstruct_frames(PIXEL *reconstructed,PIXEL *luma,int *motion_vector, int h, int w){
    int nblock_x = w/BS;
    int nblock_y = h/BS;
    for (int f = NRF; f < NF; f++)
    {
        for (int y = 0; y < nblock_y; y++)
        {
            for (int x = 0; x < nblock_x; x++)
            {
                int mvx = motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0];
                int mvy = motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1];
                int mvf = motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2];
                for(int j =0; j < BS; j++)
                {
                    //copy row by row (size of block)
                    memcpy(&reconstructed[f*W*H + W*(y*BS+j) + x*BS]   ,&luma[(f-mvf)*w*h + w*(mvy+y*BS+j) + mvx+x*BS], BS*sizeof(PIXEL));
                }
            }
        }
    }
}


void read_luma(FILE *fid, PIXEL *luma, PIXEL *crb, int h, int w){
    PIXEL   *temp= (PIXEL*) malloc(H*W*NF*sizeof(PIXEL)); if (temp== NULL) fprintf(stderr, "Bad malloc on temp\n");
    for (int f=0; f<NF; f++) {
        fread (&temp[H*W*f]  ,1,W*H,  fid);
        fread (&crb [W*H/2*f],1,W*H/2,fid);
        //fseek (fid,W*H/2,SEEK_CUR); //seek cb and cr
    }
    for (int f=0; f<NF; f++) {
        for ( int idh =0; idh < H; idh++){
            memcpy(&luma[h*w*f+idh*w] , &temp[H*W*f+idh*W], W*sizeof(PIXEL));
        }
    }
    free(temp);
}

void write_yuv(FILE *fid, PIXEL *reconstructed, PIXEL *crb){
    for (int f=0; f<NF; f++) {
        fwrite(&reconstructed[W*H*f]  ,1,W*H,fid);
        fwrite(&crb          [W*H/2*f],1,W*H/2,fid);
    }
}

void pad_luma(PIXEL *luma,int height,int width){
    for (int i = 0; i < height*width*NF; i++)
        luma[i] = 127;
}

//////////////////////////////////////////////////////////////////////////////

int main()
{
    // take of available refrence frames
    // CIF format
    int nblock_x = W/BS; // (W+(BS-1))/BS;
    int nblock_y = H/BS; // (H+(BS-1))/BS;
    
    int height = nblock_y*BS;
    int width  = nblock_x*BS;

    int number_frames = NF;
    ////////////////////////////////////
    FILE    *fid_in         = fopen("akiyo_cif.yuv","rb");
    FILE    *fid_out      = fopen("akiyo_cif_constructed.yuv","wb");
    FILE    *h_fid_out      = fopen("akiyo_cif_constructed_GPU.yuv","wb");
    int     *h_motion_vector; //= (int *) malloc(nblock_x*nblock_y*NF*3    *sizeof(int));   if (h_motion_vector == NULL) fprintf(stderr, "Bad malloc on h_motion_vector  \n");
    if ( hipHostAlloc( (void**)&h_motion_vector ,nblock_x*nblock_y*NF*3*sizeof(int), hipHostMallocWriteCombined) != hipSuccess )
        fprintf(stderr, "Bad malloc on h_motion_vector  \n");
    PIXEL   *h_reconstructed= (PIXEL *) malloc(height*width  *NF*sizeof(PIXEL)); if (h_reconstructed == NULL) fprintf(stderr, "Bad malloc on h_reconstructed  \n");
    PIXEL   *luma          ;// = (PIXEL *) malloc(height*width*number_frames*sizeof(PIXEL)); if (luma          == NULL) fprintf(stderr, "Bad malloc on luma           \n");
    if ( hipHostAlloc( (void**)&luma ,height*width*number_frames*sizeof(PIXEL), hipHostMallocWriteCombined) != hipSuccess )
        fprintf(stderr, "Bad malloc on luma  \n");

    int     *motion_vector  = (int *  ) malloc(nblock_x*nblock_y*NF*3    *sizeof(int));   if (motion_vector == NULL) fprintf(stderr, "Bad malloc on motion_vector  \n");
    PIXEL   *crb            = (PIXEL *) malloc(H*W/2*number_frames *sizeof(PIXEL)); if (crb           == NULL) fprintf(stderr, "Bad malloc on crb           \n");
    PIXEL   *reconstructed  = (PIXEL *) malloc(H*W*number_frames   *sizeof(PIXEL)); if (reconstructed == NULL) fprintf(stderr, "Bad malloc on reconstructed  \n");

    pad_luma (luma, height, width);
    read_luma(fid_in,luma,crb,height,width);
    fclose(fid_in);

    double timeStampA = getTimeStamp() ; 

    generate_mv_for_frames_cpu(motion_vector  ,luma, height, width);

    double timeStampB= getTimeStamp() ;

    generate_mv_for_frames_gpu(h_motion_vector,luma, height ,width);

    double timeStampC= getTimeStamp() ;

    int totalreads = (NRF*(BS+2*SR)*(BS+2*SR) +BS*BS)*NF*sizeof(PIXEL);   
    printf("total CPU time = %.6f\n", timeStampB - timeStampA);
    printf("total GPU time = %.6f\n", timeStampC - timeStampB);
    printf("SpeedUP   = %.3f\n", (timeStampB - timeStampA)/(timeStampC - timeStampB));   
    printf("BandWidth = %.3f\n", totalreads/(timeStampC - timeStampB)/1000);   
    #ifdef ENABLE_PRINT
    //printf("motion_vector\n");
    for (int f =NRF; f < NF; f++)
    {
        for (int y = 0; y < nblock_y; y++)
        {
            for (int x = 0; x < nblock_x; x++)
            {
                if ((motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0]-h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0] != 0) || (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1]-h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1] != 0) || (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2]-h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] != 0))
                //if ((motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0] != 0) && (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1] != 0) && (motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] != 1))
                    printf("-->frame %d at y = %d and x = %d mv = (%d,%d,%d) and h_mv = (%d,%d,%d) \n", f, y*BS, x*BS, 
                              motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2]   , motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1],   motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0], 
                            h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] , h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1], h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0]);
                //else
                //    printf("frame %d at y = %d and x = %d mv = (%d,%d,%d) and h_mv = (%d,%d,%d) \n", f, y*BS, x*BS, 
                //            motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] , motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1], motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0], 
                //            h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+2] , h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+1], h_motion_vector[(nblock_y*nblock_x*f + y*nblock_x + x)*3+0]);
            
            }
        }
    }
    #endif

    reconstruct_frames(reconstructed,luma,motion_vector,height,width);
    write_yuv(fid_out,reconstructed,crb);
    fclose(fid_out);
    ////////DEVICE///////////////
    reconstruct_frames(h_reconstructed,luma,h_motion_vector, height, width);
    write_yuv(h_fid_out,h_reconstructed,crb);
    fclose(h_fid_out);
    //////////////////////////////


    hipHostFree(luma          );
    free(reconstructed);
    free(h_reconstructed);
    free(motion_vector );
    hipHostFree(h_motion_vector);
    free(crb);
}
	.text
	.file	"ME_GPU.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z12getTimeStampv
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z12getTimeStampv
	.type	_Z12getTimeStampv,@function
_Z12getTimeStampv:                      # @_Z12getTimeStampv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	8(%rbx), %xmm1
	divsd	.LCPI0_0(%rip), %xmm1
	cvtsi2sdq	(%rbx), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12getTimeStampv, .Lfunc_end0-_Z12getTimeStampv
	.cfi_endproc
                                        # -- End function
	.globl	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_ # -- Begin function _Z21generate_mv_for_blockPhS_iiiiPiS0_S0_
	.type	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_,@function
_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_: # @_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, -48(%rsp)                 # 4-byte Spill
	shll	$2, %edx
	shll	$2, %ecx
	cmpl	$3, %edx
	movl	$2, %r11d
	cmovgel	%edx, %r11d
	movl	$2, %eax
	addl	$-2, %r11d
	movl	%edx, %r10d
	orl	%eax, %r10d
	movl	$284, %r8d                      # imm = 0x11C
	cmpl	%r8d, %r10d
	cmovgel	%r8d, %r10d
	movl	%r10d, -56(%rsp)                # 4-byte Spill
	cmpl	$3, %ecx
	movl	$2, %r8d
	cmovgel	%ecx, %r8d
	addl	$-2, %r8d
	movl	%ecx, %r15d
	orl	%eax, %r15d
	movl	$348, %eax                      # imm = 0x15C
	cmpl	%eax, %r15d
	cmovgel	%eax, %r15d
	movl	%edx, -40(%rsp)                 # 4-byte Spill
	movslq	%edx, %rax
	movl	%ecx, -32(%rsp)                 # 4-byte Spill
	movslq	%ecx, %rcx
	addq	%rdi, %rcx
	movl	%r9d, -44(%rsp)                 # 4-byte Spill
	movslq	%r9d, %rdi
	imulq	%rdi, %rax
	addq	%rax, %rcx
	movl	%edi, %r13d
	movl	$4096, %r10d                    # imm = 0x1000
	xorl	%eax, %eax
	movl	%r8d, -36(%rsp)                 # 4-byte Spill
	movl	%r11d, -52(%rsp)                # 4-byte Spill
.LBB1_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
                                        #       Child Loop BB1_8 Depth 3
                                        #         Child Loop BB1_9 Depth 4
                                        #           Child Loop BB1_10 Depth 5
	cmpl	-56(%rsp), %r11d                # 4-byte Folded Reload
	jle	.LBB1_5
# %bb.2:                                # %.._crit_edge68_crit_edge
                                        #   in Loop: Header=BB1_1 Depth=1
	incl	%eax
	jmp	.LBB1_3
.LBB1_5:                                # %.lr.ph
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	$2, %r14d
	subl	%eax, %r14d
	imull	-48(%rsp), %r14d                # 4-byte Folded Reload
	incl	%eax
	movq	%rax, -24(%rsp)                 # 8-byte Spill
	addl	%r11d, %r14d
	imull	-44(%rsp), %r14d                # 4-byte Folded Reload
	addl	%r8d, %r14d
	movl	%r11d, %eax
.LBB1_6:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_8 Depth 3
                                        #         Child Loop BB1_9 Depth 4
                                        #           Child Loop BB1_10 Depth 5
	cmpl	%r15d, %r8d
	movq	%r14, -8(%rsp)                  # 8-byte Spill
	movq	%rax, -16(%rsp)                 # 8-byte Spill
	jg	.LBB1_15
# %bb.7:                                # %.preheader56.lr.ph
                                        #   in Loop: Header=BB1_6 Depth=2
                                        # kill: def $eax killed $eax killed $rax
	subl	-40(%rsp), %eax                 # 4-byte Folded Reload
	movl	%eax, -28(%rsp)                 # 4-byte Spill
	movl	%r8d, %eax
.LBB1_8:                                # %.preheader56
                                        #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_6 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB1_9 Depth 4
                                        #           Child Loop BB1_10 Depth 5
	xorl	%r11d, %r11d
	movq	%r14, %r9
	movq	%rcx, %r12
	xorl	%r8d, %r8d
.LBB1_9:                                # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_6 Depth=2
                                        #       Parent Loop BB1_8 Depth=3
                                        # =>      This Loop Header: Depth=4
                                        #           Child Loop BB1_10 Depth 5
	xorl	%ebp, %ebp
.LBB1_10:                               #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_6 Depth=2
                                        #       Parent Loop BB1_8 Depth=3
                                        #         Parent Loop BB1_9 Depth=4
                                        # =>        This Inner Loop Header: Depth=5
	movzbl	(%r12,%rbp), %ebx
	leal	(%r9,%rbp), %edx
	movslq	%edx, %rdx
	movzbl	(%rsi,%rdx), %edx
	subl	%edx, %ebx
	movl	%ebx, %edx
	negl	%edx
	cmovsl	%ebx, %edx
	movzbl	%dl, %edx
	addl	%edx, %r8d
	incq	%rbp
	cmpq	$4, %rbp
	jne	.LBB1_10
# %bb.11:                               #   in Loop: Header=BB1_9 Depth=4
	incq	%r11
	addq	%rdi, %r12
	addq	%r13, %r9
	cmpq	$4, %r11
	jne	.LBB1_9
# %bb.12:                               #   in Loop: Header=BB1_8 Depth=3
	cmpl	%r8d, %r10d
	jle	.LBB1_14
# %bb.13:                               #   in Loop: Header=BB1_8 Depth=3
	movl	%eax, %edx
	subl	-32(%rsp), %edx                 # 4-byte Folded Reload
	movq	64(%rsp), %r9
	movl	%edx, (%r9)
	movq	56(%rsp), %rdx
	movl	-28(%rsp), %r9d                 # 4-byte Reload
	movl	%r9d, (%rdx)
	movq	72(%rsp), %rdx
	movq	-24(%rsp), %r9                  # 8-byte Reload
	movl	%r9d, (%rdx)
	movl	%r8d, %r10d
.LBB1_14:                               #   in Loop: Header=BB1_8 Depth=3
	leal	1(%rax), %edx
	incq	%r14
	cmpl	%r15d, %eax
	movl	%edx, %eax
	jl	.LBB1_8
.LBB1_15:                               # %._crit_edge
                                        #   in Loop: Header=BB1_6 Depth=2
	movq	-16(%rsp), %rdx                 # 8-byte Reload
	leal	1(%rdx), %eax
	movq	-8(%rsp), %r14                  # 8-byte Reload
	addq	%r13, %r14
	cmpl	-56(%rsp), %edx                 # 4-byte Folded Reload
                                        # kill: def $eax killed $eax def $rax
	movl	-36(%rsp), %r8d                 # 4-byte Reload
	jl	.LBB1_6
# %bb.16:                               #   in Loop: Header=BB1_1 Depth=1
	movl	-52(%rsp), %r11d                # 4-byte Reload
	movq	-24(%rsp), %rax                 # 8-byte Reload
.LBB1_3:                                # %._crit_edge68
                                        #   in Loop: Header=BB1_1 Depth=1
	cmpl	$3, %eax
	jne	.LBB1_1
# %bb.4:
	movl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_, .Lfunc_end1-_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26generate_mv_for_frames_cpuPiPhii # -- Begin function _Z26generate_mv_for_frames_cpuPiPhii
	.type	_Z26generate_mv_for_frames_cpuPiPhii,@function
_Z26generate_mv_for_frames_cpuPiPhii:   # @_Z26generate_mv_for_frames_cpuPiPhii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $ecx killed $ecx def $rcx
	movl	%edx, %ebx
	movq	%rsi, 88(%rsp)                  # 8-byte Spill
	leal	3(%rcx), %r14d
	testl	%ecx, %ecx
	cmovnsl	%ecx, %r14d
	leal	3(%rbx), %ebp
	testl	%edx, %edx
	cmovnsl	%edx, %ebp
	movq	%rdi, %r12
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	movl	%ecx, %r15d
	imull	%edx, %r15d
	movslq	%r15d, %rdi
	movq	%rdi, 80(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB2_1
.LBB2_2:
	movq	%r12, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	sarl	$2, %r14d
	sarl	$2, %ebp
	leal	(%r15,%r15,2), %eax
	movslq	%eax, %rdi
	movq	%rdi, 72(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r12
	testq	%rax, %rax
	je	.LBB2_3
.LBB2_4:
	movl	%r14d, %eax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movl	%r14d, %eax
	imull	%ebp, %eax
	leal	(%rax,%rax,8), %ecx
	movl	%ecx, 16(%rsp)                  # 4-byte Spill
	leal	(%rax,%rax,2), %eax
	movl	%eax, 48(%rsp)                  # 4-byte Spill
	leal	(%r14,%r14,2), %eax
	movl	%eax, 52(%rsp)                  # 4-byte Spill
	movl	$3, %r13d
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movl	%ebp, 56(%rsp)                  # 4-byte Spill
	movq	%r12, 64(%rsp)                  # 8-byte Spill
.LBB2_5:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_7 Depth 2
                                        #       Child Loop BB2_9 Depth 3
	movq	%r13, %rsi
	movq	80(%rsp), %r15                  # 8-byte Reload
	imulq	%r15, %rsi
	movq	88(%rsp), %r14                  # 8-byte Reload
	addq	%r14, %rsi
	movq	%r15, %rdx
	callq	memcpy@PLT
	movq	%r13, 96(%rsp)                  # 8-byte Spill
	leaq	-3(%r13), %rsi
	imulq	%r15, %rsi
	addq	%r14, %rsi
	movq	%r12, %rdi
	movq	72(%rsp), %rdx                  # 8-byte Reload
	callq	memcpy@PLT
	cmpl	$4, %ebx
	movq	40(%rsp), %rcx                  # 8-byte Reload
	jl	.LBB2_11
# %bb.6:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_5 Depth=1
	xorl	%edx, %edx
	movl	16(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 4(%rsp)                   # 4-byte Spill
.LBB2_7:                                # %.preheader
                                        #   Parent Loop BB2_5 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_9 Depth 3
	cmpl	$4, %ecx
	movq	32(%rsp), %rbp                  # 8-byte Reload
	movq	24(%rsp), %r12                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movl	$0, %r8d
	leaq	20(%rsp), %r10
	leaq	8(%rsp), %r11
	leaq	12(%rsp), %r13
	jl	.LBB2_10
# %bb.8:                                # %.lr.ph
                                        #   in Loop: Header=BB2_7 Depth=2
	movl	4(%rsp), %eax                   # 4-byte Reload
	movl	%eax, %r15d
	xorl	%r14d, %r14d
	movl	%edx, 60(%rsp)                  # 4-byte Spill
.LBB2_9:                                #   Parent Loop BB2_5 Depth=1
                                        #     Parent Loop BB2_7 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%r8d, 12(%rsp)
	movl	%r8d, 8(%rsp)
	movl	$1, 20(%rsp)
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%rsi, %rbx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movq	48(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	movq	%r10, %r13
	callq	_Z21generate_mv_for_blockPhS_iiiiPiS0_S0_
	movq	136(%rsp), %r9                  # 8-byte Reload
	leaq	40(%rsp), %r11
	movq	%r13, %r10
	leaq	44(%rsp), %r13
	xorl	%r8d, %r8d
	movq	144(%rsp), %rdi                 # 8-byte Reload
	movl	92(%rsp), %edx                  # 4-byte Reload
	movq	%rbx, %rsi
	movq	72(%rsp), %rcx                  # 8-byte Reload
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	8(%rsp), %eax
	movslq	%r15d, %r15
	movl	%eax, (%r9,%r15,4)
	movl	12(%rsp), %eax
	movl	%eax, 4(%r9,%r15,4)
	movl	20(%rsp), %eax
	movl	%eax, 8(%r9,%r15,4)
	incq	%r14
	addl	$3, %r15d
	cmpq	%r14, %rdi
	jne	.LBB2_9
.LBB2_10:                               # %._crit_edge
                                        #   in Loop: Header=BB2_7 Depth=2
	incl	%edx
	movl	4(%rsp), %eax                   # 4-byte Reload
	addl	52(%rsp), %eax                  # 4-byte Folded Reload
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	movl	56(%rsp), %ebp                  # 4-byte Reload
	cmpl	%ebp, %edx
	jne	.LBB2_7
.LBB2_11:                               # %._crit_edge64
                                        #   in Loop: Header=BB2_5 Depth=1
	movq	96(%rsp), %r13                  # 8-byte Reload
	incq	%r13
	movl	48(%rsp), %eax                  # 4-byte Reload
	addl	%eax, 16(%rsp)                  # 4-byte Folded Spill
	cmpq	$200, %r13
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %r12                  # 8-byte Reload
	jne	.LBB2_5
# %bb.12:
	callq	free
	movq	%r12, %rdi
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.LBB2_1:
	.cfi_def_cfa_offset 176
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$30, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB2_2
.LBB2_3:
	movq	stderr(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$33, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB2_4
.Lfunc_end2:
	.size	_Z26generate_mv_for_frames_cpuPiPhii, .Lfunc_end2-_Z26generate_mv_for_frames_cpuPiPhii
	.cfi_endproc
                                        # -- End function
	.globl	_Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii # -- Begin function _Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii
	.type	_Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii,@function
_Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii: # @_Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29d_generate_mv_one_frame_naivePhS_Piii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii, .Lfunc_end3-_Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__d_generate_mv_one_framePhS_Piii # -- Begin function _Z38__device_stub__d_generate_mv_one_framePhS_Piii
	.type	_Z38__device_stub__d_generate_mv_one_framePhS_Piii,@function
_Z38__device_stub__d_generate_mv_one_framePhS_Piii: # @_Z38__device_stub__d_generate_mv_one_framePhS_Piii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23d_generate_mv_one_framePhS_Piii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z38__device_stub__d_generate_mv_one_framePhS_Piii, .Lfunc_end4-_Z38__device_stub__d_generate_mv_one_framePhS_Piii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26generate_mv_for_frames_gpuPiPhii # -- Begin function _Z26generate_mv_for_frames_gpuPiPhii
	.type	_Z26generate_mv_for_frames_gpuPiPhii,@function
_Z26generate_mv_for_frames_gpuPiPhii:   # @_Z26generate_mv_for_frames_gpuPiPhii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $edx killed $edx def $rdx
	movq	%rsi, %r15
	leal	3(%rdx), %r13d
	testl	%edx, %edx
	cmovnsl	%edx, %r13d
	leal	3(%rcx), %ebx
	testl	%ecx, %ecx
	cmovnsl	%ecx, %ebx
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movl	%ecx, %r14d
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	imull	%edx, %r14d
	movslq	%r14d, %rbp
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_1
.LBB5_2:
	sarl	$2, %r13d
	sarl	$2, %ebx
	leal	(%r14,%r14,2), %eax
	movslq	%eax, %rsi
	leaq	8(%rsp), %rdi
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_3
.LBB5_4:
	movl	%ebx, %r14d
	imull	%r13d, %r14d
	movslq	%r14d, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rsi
	movq	%rsp, %rdi
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_5
.LBB5_6:
	movl	%ebx, %eax
	shlq	$32, %r13
	orq	%rax, %r13
	leaq	(,%rbp,2), %rax
	addq	%rbp, %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leal	(%r14,%r14,8), %ebx
	leal	(%r14,%r14,2), %r12d
	movl	$197, %r14d
.LBB5_7:                                # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rdi
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%r15,%rax), %rsi
	movq	%rbp, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_8
.LBB5_9:                                #   in Loop: Header=BB5_7 Depth=1
	movq	8(%rsp), %rdi
	movq	%r15, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$3, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_10
.LBB5_11:                               #   in Loop: Header=BB5_7 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movabsq	$34359738376, %rdx              # imm = 0x800000008
	movl	$3, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_13
# %bb.12:                               #   in Loop: Header=BB5_7 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movq	32(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z38__device_stub__d_generate_mv_one_framePhS_Piii
.LBB5_13:                               #   in Loop: Header=BB5_7 Depth=1
	callq	hipDeviceSynchronize
	movslq	%ebx, %rax
	movq	64(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	(%rsp), %rsi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$3, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_14
.LBB5_15:                               #   in Loop: Header=BB5_7 Depth=1
	addq	%rbp, %r15
	addl	%r12d, %ebx
	decq	%r14
	jne	.LBB5_7
	jmp	.LBB5_16
.LBB5_8:                                #   in Loop: Header=BB5_7 Depth=1
	movq	stderr(%rip), %rcx
	movl	$.L.str.5, %edi
	movl	$40, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB5_9
.LBB5_10:                               #   in Loop: Header=BB5_7 Depth=1
	movq	stderr(%rip), %rcx
	movl	$.L.str.6, %edi
	movl	$43, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB5_11
.LBB5_14:                               #   in Loop: Header=BB5_7 Depth=1
	movq	stderr(%rip), %rcx
	movl	$.L.str.7, %edi
	movl	$41, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB5_15
.LBB5_16:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_1:
	.cfi_def_cfa_offset 128
	movq	stderr(%rip), %rcx
	movl	$.L.str.2, %edi
	movl	$51, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB5_2
.LBB5_3:
	movq	stderr(%rip), %rcx
	movl	$.L.str.3, %edi
	movl	$54, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB5_4
.LBB5_5:
	movq	stderr(%rip), %rcx
	movl	$.L.str.4, %edi
	movl	$53, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB5_6
.Lfunc_end5:
	.size	_Z26generate_mv_for_frames_gpuPiPhii, .Lfunc_end5-_Z26generate_mv_for_frames_gpuPiPhii
	.cfi_endproc
                                        # -- End function
	.globl	_Z18reconstruct_framesPhS_Piii  # -- Begin function _Z18reconstruct_framesPhS_Piii
	.type	_Z18reconstruct_framesPhS_Piii,@function
_Z18reconstruct_framesPhS_Piii:         # @_Z18reconstruct_framesPhS_Piii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	leal	3(%r8), %eax
	testl	%r8d, %r8d
	cmovnsl	%r8d, %eax
	movq	%rdi, -16(%rsp)                 # 8-byte Spill
	sarl	$2, %eax
	movq	%rax, -24(%rsp)                 # 8-byte Spill
	leal	3(%rcx), %eax
	testl	%ecx, %ecx
	movq	%rcx, -32(%rsp)                 # 8-byte Spill
	cmovnsl	%ecx, %eax
	sarl	$2, %eax
	movq	%rax, -40(%rsp)                 # 8-byte Spill
	movl	$3, %r9d
.LBB6_1:                                # %.preheader55
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_3 Depth 2
                                        #       Child Loop BB6_5 Depth 3
                                        #         Child Loop BB6_6 Depth 4
	cmpl	$4, -32(%rsp)                   # 4-byte Folded Reload
	jl	.LBB6_9
# %bb.2:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB6_1 Depth=1
	movq	-40(%rsp), %rax                 # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax def $rax
	imull	%r9d, %eax
	movq	%rax, -8(%rsp)                  # 8-byte Spill
	imulq	$101376, %r9, %rbx              # imm = 0x18C00
	addq	-16(%rsp), %rbx                 # 8-byte Folded Reload
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	xorl	%eax, %eax
	movq	%rax, -48(%rsp)                 # 8-byte Spill
.LBB6_3:                                # %.preheader
                                        #   Parent Loop BB6_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_5 Depth 3
                                        #         Child Loop BB6_6 Depth 4
	cmpl	$4, %r8d
	jl	.LBB6_8
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB6_3 Depth=2
	movq	-8(%rsp), %rax                  # 8-byte Reload
	movq	-48(%rsp), %rcx                 # 8-byte Reload
	leal	(%rax,%rcx), %r13d
	imull	-24(%rsp), %r13d                # 4-byte Folded Reload
	xorl	%ebp, %ebp
	xorl	%r11d, %r11d
.LBB6_5:                                #   Parent Loop BB6_1 Depth=1
                                        #     Parent Loop BB6_3 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB6_6 Depth 4
	leal	(%r11,%r13), %edi
	leal	(%rdi,%rdi,2), %edi
	movslq	%edi, %r12
	leaq	(%rbx,%r11,4), %rdi
	movl	(%rdx,%r12,4), %eax
	addl	%ebp, %eax
	movl	4(%rdx,%r12,4), %ecx
	addl	%r14d, %ecx
	movl	%r9d, %r10d
	subl	8(%rdx,%r12,4), %r10d
	imull	-32(%rsp), %r10d                # 4-byte Folded Reload
	addl	%ecx, %r10d
	imull	%r8d, %r10d
	addl	%eax, %r10d
	xorl	%r12d, %r12d
.LBB6_6:                                #   Parent Loop BB6_1 Depth=1
                                        #     Parent Loop BB6_3 Depth=2
                                        #       Parent Loop BB6_5 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	leal	(%r15,%r12), %eax
	andl	$-32, %eax
	movslq	%r10d, %r10
	movl	(%rsi,%r10), %ecx
	movl	%ecx, (%rdi,%rax)
	addq	$352, %r12                      # imm = 0x160
	addl	%r8d, %r10d
	cmpq	$1408, %r12                     # imm = 0x580
	jne	.LBB6_6
# %bb.7:                                #   in Loop: Header=BB6_5 Depth=3
	incq	%r11
	addl	$4, %ebp
	cmpq	-24(%rsp), %r11                 # 8-byte Folded Reload
	jne	.LBB6_5
.LBB6_8:                                # %._crit_edge
                                        #   in Loop: Header=BB6_3 Depth=2
	movq	-48(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	addq	$1408, %r15                     # imm = 0x580
	addl	$4, %r14d
	movq	%rcx, %rax
	movq	%rcx, -48(%rsp)                 # 8-byte Spill
	cmpq	-40(%rsp), %rcx                 # 8-byte Folded Reload
	jne	.LBB6_3
.LBB6_9:                                # %._crit_edge59
                                        #   in Loop: Header=BB6_1 Depth=1
	incq	%r9
	cmpq	$200, %r9
	jne	.LBB6_1
# %bb.10:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z18reconstruct_framesPhS_Piii, .Lfunc_end6-_Z18reconstruct_framesPhS_Piii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9read_lumaP8_IO_FILEPhS1_ii   # -- Begin function _Z9read_lumaP8_IO_FILEPhS1_ii
	.type	_Z9read_lumaP8_IO_FILEPhS1_ii,@function
_Z9read_lumaP8_IO_FILEPhS1_ii:          # @_Z9read_lumaP8_IO_FILEPhS1_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movq	%rdx, %r12
	movq	%rsi, %r14
	movq	%rdi, %r13
	movl	$20275200, %edi                 # imm = 0x1356000
	callq	malloc
	movq	%rax, %r15
	testq	%rax, %rax
	je	.LBB7_1
.LBB7_2:                                # %.preheader37
	xorl	%ebp, %ebp
.LBB7_3:                                # =>This Inner Loop Header: Depth=1
	leaq	(%r15,%rbp), %rdi
	movl	$1, %esi
	movl	$101376, %edx                   # imm = 0x18C00
	movq	%r13, %rcx
	callq	fread
	movl	$1, %esi
	movl	$50688, %edx                    # imm = 0xC600
	movq	%r12, %rdi
	movq	%r13, %rcx
	callq	fread
	addq	$50688, %r12                    # imm = 0xC600
	addq	$101376, %rbp                   # imm = 0x18C00
	cmpq	$20275200, %rbp                 # imm = 0x1356000
	jne	.LBB7_3
# %bb.4:                                # %.preheader.preheader
	movl	4(%rsp), %eax                   # 4-byte Reload
	imull	%ebx, %eax
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	xorl	%r12d, %r12d
	movq	%r15, 8(%rsp)                   # 8-byte Spill
	movq	%r15, %r13
	xorl	%ebp, %ebp
.LBB7_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_6 Depth 2
	movq	$-101376, %r15                  # imm = 0xFFFE7400
	movq	%r12, 16(%rsp)                  # 8-byte Spill
                                        # kill: def $r12d killed $r12d killed $r12 def $r12
.LBB7_6:                                #   Parent Loop BB7_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	%r12d, %r12
	leaq	(%r14,%r12), %rdi
	leaq	(%r15,%r13), %rsi
	addq	$101376, %rsi                   # imm = 0x18C00
	movl	$352, %edx                      # imm = 0x160
	callq	memcpy@PLT
	addl	%ebx, %r12d
	addq	$352, %r15                      # imm = 0x160
	jne	.LBB7_6
# %bb.7:                                #   in Loop: Header=BB7_5 Depth=1
	incq	%rbp
	addq	$101376, %r13                   # imm = 0x18C00
	movq	16(%rsp), %r12                  # 8-byte Reload
	addl	4(%rsp), %r12d                  # 4-byte Folded Reload
	cmpq	$200, %rbp
	jne	.LBB7_5
# %bb.8:
	movq	8(%rsp), %rdi                   # 8-byte Reload
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.LBB7_1:
	.cfi_def_cfa_offset 80
	movq	stderr(%rip), %rcx
	movl	$.L.str.8, %edi
	movl	$19, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB7_2
.Lfunc_end7:
	.size	_Z9read_lumaP8_IO_FILEPhS1_ii, .Lfunc_end7-_Z9read_lumaP8_IO_FILEPhS1_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9write_yuvP8_IO_FILEPhS1_     # -- Begin function _Z9write_yuvP8_IO_FILEPhS1_
	.type	_Z9write_yuvP8_IO_FILEPhS1_,@function
_Z9write_yuvP8_IO_FILEPhS1_:            # @_Z9write_yuvP8_IO_FILEPhS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	xorl	%r12d, %r12d
.LBB8_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1, %esi
	movl	$101376, %edx                   # imm = 0x18C00
	movq	%r14, %rdi
	movq	%r15, %rcx
	callq	fwrite
	leaq	(%rbx,%r12), %rdi
	movl	$1, %esi
	movl	$50688, %edx                    # imm = 0xC600
	movq	%r15, %rcx
	callq	fwrite
	addq	$50688, %r12                    # imm = 0xC600
	addq	$101376, %r14                   # imm = 0x18C00
	cmpq	$10137600, %r12                 # imm = 0x9AB000
	jne	.LBB8_1
# %bb.2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z9write_yuvP8_IO_FILEPhS1_, .Lfunc_end8-_Z9write_yuvP8_IO_FILEPhS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8pad_lumaPhii                 # -- Begin function _Z8pad_lumaPhii
	.type	_Z8pad_lumaPhii,@function
_Z8pad_lumaPhii:                        # @_Z8pad_lumaPhii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	imull	$200, %esi, %eax
	testl	%eax, %eax
	jle	.LBB9_1
# %bb.2:                                # %.lr.ph.preheader
	movl	%eax, %edx
	movl	$127, %esi
	jmp	memset@PLT                      # TAILCALL
.LBB9_1:                                # %._crit_edge
	retq
.Lfunc_end9:
	.size	_Z8pad_lumaPhii, .Lfunc_end9-_Z8pad_lumaPhii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI10_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI10_1:
	.quad	0x40e4500000000000              # double 41600
.LCPI10_2:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$.L.str.11, %edi
	movl	$.L.str.12, %esi
	callq	fopen
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$.L.str.13, %edi
	movl	$.L.str.12, %esi
	callq	fopen
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	leaq	24(%rsp), %rdi
	movl	$15206400, %esi                 # imm = 0xE80800
	movl	$4, %edx
	callq	hipHostAlloc
	testl	%eax, %eax
	jne	.LBB10_1
.LBB10_2:
	movl	$20275200, %edi                 # imm = 0x1356000
	callq	malloc
	movq	%rax, %r15
	testq	%rax, %rax
	je	.LBB10_3
.LBB10_4:
	movq	%rsp, %rdi
	movl	$20275200, %esi                 # imm = 0x1356000
	movl	$4, %edx
	callq	hipHostAlloc
	testl	%eax, %eax
	jne	.LBB10_5
.LBB10_6:
	movl	$15206400, %edi                 # imm = 0xE80800
	callq	malloc
	movq	%rax, %r12
	testq	%rax, %rax
	je	.LBB10_7
.LBB10_8:
	movl	$10137600, %edi                 # imm = 0x9AB000
	callq	malloc
	movq	%rax, %r13
	testq	%rax, %rax
	je	.LBB10_9
.LBB10_10:
	movl	$20275200, %edi                 # imm = 0x1356000
	callq	malloc
	movq	%rax, %rbp
	testq	%rax, %rax
	je	.LBB10_11
.LBB10_12:
	movq	(%rsp), %r14
	movl	$20275200, %edx                 # imm = 0x1356000
	movq	%r14, %rdi
	movl	$127, %esi
	callq	memset@PLT
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$288, %ecx                      # imm = 0x120
	movl	$352, %r8d                      # imm = 0x160
	callq	_Z9read_lumaP8_IO_FILEPhS1_ii
	movq	%rbx, %rdi
	callq	fclose
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	8(%rbx), %xmm0
	divsd	.LCPI10_0(%rip), %xmm0
	cvtsi2sdq	(%rbx), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movq	%r12, %rdi
	movl	$288, %edx                      # imm = 0x120
	movl	$352, %ecx                      # imm = 0x160
	callq	_Z26generate_mv_for_frames_cpuPiPhii
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%rbx), %xmm1
	divsd	.LCPI10_0(%rip), %xmm0
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movq	24(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$288, %edx                      # imm = 0x120
	movl	$352, %ecx                      # imm = 0x160
	callq	_Z26generate_mv_for_frames_gpuPiPhii
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%rbx), %xmm1
	divsd	.LCPI10_0(%rip), %xmm0
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	subsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$.L.str.20, %edi
	movb	$1, %al
	callq	printf
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$.L.str.21, %edi
	movb	$1, %al
	callq	printf
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.22, %edi
	movb	$1, %al
	callq	printf
	movsd	.LCPI10_1(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	divsd	.LCPI10_2(%rip), %xmm0
	movl	$.L.str.23, %edi
	movb	$1, %al
	callq	printf
	movq	(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%r12, %rdx
	movl	$288, %ecx                      # imm = 0x120
	movl	$352, %r8d                      # imm = 0x160
	callq	_Z18reconstruct_framesPhS_Piii
	movq	40(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	movq	%r13, %rdx
	callq	_Z9write_yuvP8_IO_FILEPhS1_
	movq	%rbx, %rdi
	callq	fclose
	movq	(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	%r15, %rdi
	movl	$288, %ecx                      # imm = 0x120
	movl	$352, %r8d                      # imm = 0x160
	callq	_Z18reconstruct_framesPhS_Piii
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	callq	_Z9write_yuvP8_IO_FILEPhS1_
	movq	%rbx, %rdi
	callq	fclose
	movq	(%rsp), %rdi
	callq	hipHostFree
	movq	%rbp, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	%r13, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB10_1:
	.cfi_def_cfa_offset 128
	movq	stderr(%rip), %rcx
	movl	$.L.str.14, %edi
	movl	$32, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB10_2
.LBB10_3:
	movq	stderr(%rip), %rcx
	movl	$.L.str.15, %edi
	movl	$32, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB10_4
.LBB10_5:
	movq	stderr(%rip), %rcx
	movl	$.L.str.16, %edi
	movl	$21, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB10_6
.LBB10_7:
	movq	stderr(%rip), %rcx
	movl	$.L.str.17, %edi
	movl	$30, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB10_8
.LBB10_9:
	movq	stderr(%rip), %rcx
	movl	$.L.str.18, %edi
	movl	$29, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB10_10
.LBB10_11:
	movq	stderr(%rip), %rcx
	movl	$.L.str.19, %edi
	movl	$30, %esi
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB10_12
.Lfunc_end10:
	.size	main, .Lfunc_end10-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z29d_generate_mv_one_frame_naivePhS_Piii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23d_generate_mv_one_framePhS_Piii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Bad malloc on currunt_frame  \n"
	.size	.L.str, 31

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Bad malloc on reference_frames  \n"
	.size	.L.str.1, 34

	.type	_Z29d_generate_mv_one_frame_naivePhS_Piii,@object # @_Z29d_generate_mv_one_frame_naivePhS_Piii
	.section	.rodata,"a",@progbits
	.globl	_Z29d_generate_mv_one_frame_naivePhS_Piii
	.p2align	3, 0x0
_Z29d_generate_mv_one_frame_naivePhS_Piii:
	.quad	_Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii
	.size	_Z29d_generate_mv_one_frame_naivePhS_Piii, 8

	.type	_Z23d_generate_mv_one_framePhS_Piii,@object # @_Z23d_generate_mv_one_framePhS_Piii
	.globl	_Z23d_generate_mv_one_framePhS_Piii
	.p2align	3, 0x0
_Z23d_generate_mv_one_framePhS_Piii:
	.quad	_Z38__device_stub__d_generate_mv_one_framePhS_Piii
	.size	_Z23d_generate_mv_one_framePhS_Piii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Failed to allocate device vector for currunt_frame\n"
	.size	.L.str.2, 52

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device vector for reference_frames\n"
	.size	.L.str.3, 55

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device vector for d_motion_vector\n"
	.size	.L.str.4, 54

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to copy vector for currunt_frame\n"
	.size	.L.str.5, 41

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to copy vector for reference_frames\n"
	.size	.L.str.6, 44

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to copy vector for motion_vector \n"
	.size	.L.str.7, 42

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Bad malloc on temp\n"
	.size	.L.str.8, 20

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"akiyo_cif.yuv"
	.size	.L.str.9, 14

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"rb"
	.size	.L.str.10, 3

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"akiyo_cif_constructed.yuv"
	.size	.L.str.11, 26

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"wb"
	.size	.L.str.12, 3

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"akiyo_cif_constructed_GPU.yuv"
	.size	.L.str.13, 30

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Bad malloc on h_motion_vector  \n"
	.size	.L.str.14, 33

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Bad malloc on h_reconstructed  \n"
	.size	.L.str.15, 33

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Bad malloc on luma  \n"
	.size	.L.str.16, 22

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Bad malloc on motion_vector  \n"
	.size	.L.str.17, 31

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Bad malloc on crb           \n"
	.size	.L.str.18, 30

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Bad malloc on reconstructed  \n"
	.size	.L.str.19, 31

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"total CPU time = %.6f\n"
	.size	.L.str.20, 23

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"total GPU time = %.6f\n"
	.size	.L.str.21, 23

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"SpeedUP   = %.3f\n"
	.size	.L.str.22, 18

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"BandWidth = %.3f\n"
	.size	.L.str.23, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z29d_generate_mv_one_frame_naivePhS_Piii"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z23d_generate_mv_one_framePhS_Piii"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z44__device_stub__d_generate_mv_one_frame_naivePhS_Piii
	.addrsig_sym _Z38__device_stub__d_generate_mv_one_framePhS_Piii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z29d_generate_mv_one_frame_naivePhS_Piii
	.addrsig_sym _Z23d_generate_mv_one_framePhS_Piii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z29d_generate_mv_one_frame_naivePhS_Piii ; -- Begin function _Z29d_generate_mv_one_frame_naivePhS_Piii
	.globl	_Z29d_generate_mv_one_frame_naivePhS_Piii
	.p2align	8
	.type	_Z29d_generate_mv_one_frame_naivePhS_Piii,@function
_Z29d_generate_mv_one_frame_naivePhS_Piii: ; @_Z29d_generate_mv_one_frame_naivePhS_Piii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mov_b32 s26, 3
	s_mov_b32 s13, 0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s0, s11, 31
	s_ashr_i32 s1, s10, 31
	s_lshr_b32 s0, s0, 30
	s_lshr_b32 s1, s1, 30
	s_add_i32 s0, s11, s0
	s_add_i32 s1, s10, s1
	s_ashr_i32 s24, s0, 2
	s_ashr_i32 s25, s1, 2
	s_cmp_gt_i32 s10, 3
	s_cselect_b32 s0, -1, 0
	s_cmp_gt_i32 s11, 3
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_cselect_b32 s0, -1, 0
	s_lshl_b32 s27, s11, 2
	v_cndmask_b32_e64 v1, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
	v_cmp_ne_u32_e64 s1, 1, v1
.LBB0_1:                                ; %.preheader84
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;           Child Loop BB0_8 Depth 5
                                        ;             Child Loop BB0_10 Depth 6
                                        ;               Child Loop BB0_11 Depth 7
                                        ;                 Child Loop BB0_12 Depth 8
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_26
; %bb.2:                                ; %.preheader83.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s28, 0
	s_mov_b32 s29, 0
	s_mov_b32 s30, 0
.LBB0_3:                                ; %.preheader83
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;           Child Loop BB0_8 Depth 5
                                        ;             Child Loop BB0_10 Depth 6
                                        ;               Child Loop BB0_11 Depth 7
                                        ;                 Child Loop BB0_12 Depth 8
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_25
; %bb.4:                                ; %.lr.ph101
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_lshl_b32 s31, s30, 2
	s_max_i32 s36, s28, 2
	s_max_i32 s33, s31, 2
	s_or_b32 s2, s31, 2
	s_add_i32 s33, s33, -2
	s_min_u32 s34, s2, 0x11c
	s_mul_i32 s35, s30, s24
	s_cmp_le_u32 s33, s34
	s_mov_b32 s37, 0
	s_cselect_b32 s2, -1, 0
	s_add_i32 s36, s36, -2
	s_and_b32 s2, exec_lo, s2
	s_mov_b32 s38, s29
	s_mov_b32 s39, 0
.LBB0_5:                                ;   Parent Loop BB0_1 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;           Child Loop BB0_8 Depth 5
                                        ;             Child Loop BB0_10 Depth 6
                                        ;               Child Loop BB0_11 Depth 7
                                        ;                 Child Loop BB0_12 Depth 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s40, s39, 2
	s_max_i32 s43, s37, 2
	s_max_i32 s41, s40, 2
	s_or_b32 s3, s40, 2
	s_add_i32 s41, s41, -2
	s_min_u32 s42, s3, 0x15c
	s_movk_i32 s44, 0x1000
	s_cmp_le_u32 s41, s42
	s_mov_b32 s45, 0
	s_cselect_b32 s3, -1, 0
	s_add_i32 s12, s39, s35
	v_cndmask_b32_e64 v1, 0, 1, s3
	s_mul_i32 s12, s12, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[14:15], s[12:13], 2
	v_cmp_ne_u32_e64 s3, 1, v1
	s_add_u32 s14, s8, s14
	s_addc_u32 s15, s9, s15
	s_add_i32 s43, s43, -2
.LBB0_6:                                ;   Parent Loop BB0_1 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_8 Depth 5
                                        ;             Child Loop BB0_10 Depth 6
                                        ;               Child Loop BB0_11 Depth 7
                                        ;                 Child Loop BB0_12 Depth 8
	s_mov_b32 s16, -1
	s_mov_b32 vcc_lo, s2
                                        ; implicit-def: $sgpr12
                                        ; implicit-def: $sgpr46
	s_cbranch_vccz .LBB0_21
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_6 Depth=4
	s_sub_i32 s12, 2, s45
	s_add_i32 s46, s45, 1
	s_mul_i32 s12, s12, s10
	s_mov_b32 s47, s33
	s_add_i32 s12, s36, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s12, s11, s12
	s_add_i32 s12, s43, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b64 s[16:17], s[12:13]
	s_mov_b32 s12, s44
.LBB0_8:                                ;   Parent Loop BB0_1 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ;         Parent Loop BB0_6 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB0_10 Depth 6
                                        ;               Child Loop BB0_11 Depth 7
                                        ;                 Child Loop BB0_12 Depth 8
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_18
; %bb.9:                                ; %.preheader82.lr.ph
                                        ;   in Loop: Header=BB0_8 Depth=5
	s_sub_i32 s48, s47, s31
	s_mov_b64 s[18:19], s[16:17]
	s_mov_b32 s49, s41
.LBB0_10:                               ; %.preheader82
                                        ;   Parent Loop BB0_1 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ;         Parent Loop BB0_6 Depth=4
                                        ;           Parent Loop BB0_8 Depth=5
                                        ; =>          This Loop Header: Depth=6
                                        ;               Child Loop BB0_11 Depth 7
                                        ;                 Child Loop BB0_12 Depth 8
	s_mov_b32 s51, 0
	s_mov_b64 s[20:21], s[18:19]
	s_mov_b32 s52, s38
	s_mov_b32 s50, 0
.LBB0_11:                               ; %.preheader
                                        ;   Parent Loop BB0_1 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ;         Parent Loop BB0_6 Depth=4
                                        ;           Parent Loop BB0_8 Depth=5
                                        ;             Parent Loop BB0_10 Depth=6
                                        ; =>            This Loop Header: Depth=7
                                        ;                 Child Loop BB0_12 Depth 8
	s_add_u32 s53, s4, s52
	s_addc_u32 s54, s5, 0
	s_mov_b64 s[22:23], 0
.LBB0_12:                               ;   Parent Loop BB0_1 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ;         Parent Loop BB0_6 Depth=4
                                        ;           Parent Loop BB0_8 Depth=5
                                        ;             Parent Loop BB0_10 Depth=6
                                        ;               Parent Loop BB0_11 Depth=7
                                        ; =>              This Inner Loop Header: Depth=8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s56, s53, s22
	s_addc_u32 s57, s54, s23
	s_add_i32 s55, s20, s22
	s_ashr_i32 s59, s55, 31
	s_add_u32 s58, s6, s55
	s_addc_u32 s59, s7, s59
	s_clause 0x1
	global_load_u8 v1, v0, s[56:57]
	global_load_u8 v2, v0, s[58:59]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s55, v1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s56, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s55, s55, s56
	s_abs_i32 s55, s55
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s50, s55, s50
	s_add_u32 s22, s22, 1
	s_addc_u32 s23, s23, 0
	s_cmp_eq_u32 s22, 4
	s_cbranch_scc0 .LBB0_12
; %bb.13:                               ;   in Loop: Header=BB0_11 Depth=7
	s_add_i32 s51, s51, 1
	s_add_i32 s52, s52, s11
	s_add_u32 s20, s20, s11
	s_addc_u32 s21, s21, 0
	s_cmp_eq_u32 s51, 4
	s_cbranch_scc0 .LBB0_11
; %bb.14:                               ;   in Loop: Header=BB0_10 Depth=6
	s_cmp_gt_i32 s12, s50
	s_cbranch_scc0 .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_10 Depth=6
	s_sub_i32 s12, s49, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s48 :: v_dual_mov_b32 v1, s12
	v_mov_b32_e32 v3, s46
	s_mov_b32 s12, s50
	global_store_b96 v0, v[1:3], s[14:15]
.LBB0_16:                               ;   in Loop: Header=BB0_10 Depth=6
	s_add_i32 s20, s49, 1
	s_add_u32 s18, s18, 1
	s_addc_u32 s19, s19, 0
	s_cmp_ge_u32 s49, s42
	s_cbranch_scc1 .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_10 Depth=6
	s_mov_b32 s49, s20
	s_branch .LBB0_10
.LBB0_18:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_8 Depth=5
	s_add_i32 s18, s47, 1
	s_add_u32 s16, s16, s11
	s_addc_u32 s17, s17, 0
	s_cmp_ge_u32 s47, s34
	s_cbranch_scc1 .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_8 Depth=5
	s_mov_b32 s47, s18
	s_branch .LBB0_8
.LBB0_20:                               ; %Flow146
                                        ;   in Loop: Header=BB0_6 Depth=4
	s_mov_b32 s16, 0
.LBB0_21:                               ; %Flow147
                                        ;   in Loop: Header=BB0_6 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_23
; %bb.22:                               ; %.._crit_edge96_crit_edge
                                        ;   in Loop: Header=BB0_6 Depth=4
	s_add_i32 s46, s45, 1
	s_mov_b32 s12, s44
.LBB0_23:                               ; %._crit_edge96
                                        ;   in Loop: Header=BB0_6 Depth=4
	s_cmp_eq_u32 s46, 3
	s_mov_b32 s45, s46
	s_mov_b32 s44, s12
	s_cbranch_scc0 .LBB0_6
; %bb.24:                               ;   in Loop: Header=BB0_5 Depth=3
	s_add_i32 s39, s39, 1
	s_add_i32 s38, s38, 4
	s_add_i32 s37, s37, 4
	s_cmp_eq_u32 s39, s24
	s_cbranch_scc0 .LBB0_5
.LBB0_25:                               ; %._crit_edge102
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_add_i32 s30, s30, 1
	s_add_i32 s29, s29, s27
	s_add_i32 s28, s28, 4
	s_cmp_eq_u32 s30, s25
	s_cbranch_scc0 .LBB0_3
.LBB0_26:                               ; %._crit_edge104
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s26, s26, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s26, 0xc8
	s_cbranch_scc0 .LBB0_1
; %bb.27:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29d_generate_mv_one_frame_naivePhS_Piii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 60
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z29d_generate_mv_one_frame_naivePhS_Piii, .Lfunc_end0-_Z29d_generate_mv_one_frame_naivePhS_Piii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 728
; NumSgprs: 62
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 62
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23d_generate_mv_one_framePhS_Piii ; -- Begin function _Z23d_generate_mv_one_framePhS_Piii
	.globl	_Z23d_generate_mv_one_framePhS_Piii
	.p2align	8
	.type	_Z23d_generate_mv_one_framePhS_Piii,@function
_Z23d_generate_mv_one_framePhS_Piii:    ; @_Z23d_generate_mv_one_framePhS_Piii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	v_bfe_u32 v3, v0, 20, 10
	v_mov_b32_e32 v7, 0x7f
	s_mov_b32 s2, exec_lo
	v_lshl_add_u32 v1, s14, 2, v4
	v_lshl_add_u32 v6, s15, 2, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 1, v1
	s_cbranch_execz .LBB1_4
; %bb.1:
	v_dual_mov_b32 v7, 0x7f :: v_dual_add_nc_u32 v0, -2, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, -2, v6
	v_cmp_lt_i32_e64 s1, 1, v6
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s11, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, s10, v2
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_sub_nc_u32_e32 v9, 2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v9, s10, v[2:3]
	v_mad_u64_u32 v[8:9], null, v7, s11, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v0, 31, v8
	v_add_co_u32 v7, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v0, vcc_lo
	global_load_u8 v7, v[7:8], off
.LBB1_3:                                ; %Flow186
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_4:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v0, v4, v5
	v_lshlrev_b32_e32 v2, 3, v5
	v_lshlrev_b32_e32 v8, 6, v3
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_cmp_gt_u32_e64 s0, 4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v8, v8, v2, v4
	s_and_b32 s1, vcc_lo, s0
	s_waitcnt vmcnt(0)
	ds_store_b8 v8, v7 offset:304
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_6
; %bb.5:
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[7:8], null, v6, s11, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v7
	v_add_co_u32 v6, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	global_load_u8 v1, v[6:7], off
	v_lshl_add_u32 v6, v5, 2, v4
	s_waitcnt vmcnt(0)
	ds_store_b8 v6, v1 offset:496
.LBB1_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_max_u32_e32 v1, v4, v5
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 5, v1
	s_cbranch_execz .LBB1_12
; %bb.7:
	v_lshl_add_u32 v1, v3, 6, v4
	s_mov_b32 s1, 0
	s_movk_i32 s2, 0x1f0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v2, v1, v2, 0x130
	v_mov_b32_e32 v1, 0
.LBB1_8:                                ; %.preheader116
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_9 Depth 2
	s_mov_b32 s3, 0
.LBB1_9:                                ;   Parent Loop BB1_8 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s4, s2, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v7, s4 :: v_dual_add_nc_u32 v6, s3, v2
	s_add_i32 s3, s3, 1
	ds_load_u8 v6, v6
	ds_load_u8 v7, v7
	s_cmp_eq_u32 s3, 4
	s_waitcnt lgkmcnt(0)
	v_sub_nc_u32_e32 v6, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, 0, v6
	v_max_i32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v6, v1
	s_cbranch_scc0 .LBB1_9
; %bb.10:                               ;   in Loop: Header=BB1_8 Depth=1
	v_add_nc_u32_e32 v2, 8, v2
	s_add_i32 s1, s1, 1
	s_add_i32 s2, s2, 4
	s_cmp_eq_u32 s1, 4
	s_cbranch_scc0 .LBB1_8
; %bb.11:                               ; %.loopexit117
	v_lshlrev_b32_e32 v2, 2, v4
	v_mul_u32_u24_e32 v4, 20, v5
	v_mul_u32_u24_e32 v5, 0x64, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v2, v5, v4, v2
	ds_store_b32 v2, v1
.LBB1_12:                               ; %Flow185
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v0, v0, v3
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_21
; %bb.13:
	s_ashr_i32 s0, s11, 31
	s_mov_b32 s5, s1
	s_lshr_b32 s0, s0, 30
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x1000
	s_add_i32 s0, s11, s0
	v_mov_b32_e32 v2, 1
	s_ashr_i32 s0, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s15
	s_add_i32 s0, s0, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, 3
	s_lshl_b64 s[2:3], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	s_add_i32 s4, s0, 1
	s_lshl_b64 s[4:5], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s4, s8, s4
	s_addc_u32 s5, s9, s5
	s_add_i32 s0, s0, 2
	s_lshl_b64 s[6:7], s[0:1], 2
	s_mov_b32 s0, 0
	s_add_u32 s6, s8, s6
	s_addc_u32 s7, s9, s7
	s_clause 0x2
	global_store_b32 v0, v0, s[2:3]
	global_store_b32 v0, v0, s[4:5]
	global_store_b32 v0, v2, s[6:7]
.LBB1_14:                               ; %.preheader115
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_15 Depth 2
                                        ;       Child Loop BB1_16 Depth 3
	s_add_i32 s0, s0, 1
	s_mov_b32 s8, 0
	s_mov_b32 s9, s1
.LBB1_15:                               ; %.preheader
                                        ;   Parent Loop BB1_14 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_16 Depth 3
	s_mov_b32 s10, -2
	s_add_i32 s11, s8, -2
	s_mov_b32 s12, s9
.LBB1_16:                               ;   Parent Loop BB1_14 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s12
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v1, v2
	s_cbranch_vccnz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_16 Depth=3
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v4, s11
	v_mov_b32_e32 v1, v2
	v_mov_b32_e32 v5, s0
	s_clause 0x2
	global_store_b32 v0, v3, s[2:3]
	global_store_b32 v0, v4, s[4:5]
	global_store_b32 v0, v5, s[6:7]
.LBB1_18:                               ;   in Loop: Header=BB1_16 Depth=3
	s_add_i32 s10, s10, 1
	s_add_i32 s12, s12, 4
	s_cmp_eq_u32 s10, 3
	s_cbranch_scc0 .LBB1_16
; %bb.19:                               ;   in Loop: Header=BB1_15 Depth=2
	s_add_i32 s8, s8, 1
	s_add_i32 s9, s9, 20
	s_cmp_eq_u32 s8, 5
	s_cbranch_scc0 .LBB1_15
; %bb.20:                               ;   in Loop: Header=BB1_14 Depth=1
	s_addk_i32 s1, 0x64
	s_cmp_eq_u32 s0, 3
	s_cbranch_scc0 .LBB1_14
.LBB1_21:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23d_generate_mv_one_framePhS_Piii
		.amdhsa_group_segment_fixed_size 512
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z23d_generate_mv_one_framePhS_Piii, .Lfunc_end1-_Z23d_generate_mv_one_framePhS_Piii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 864
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 512 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z29d_generate_mv_one_frame_naivePhS_Piii
    .private_segment_fixed_size: 0
    .sgpr_count:     62
    .sgpr_spill_count: 0
    .symbol:         _Z29d_generate_mv_one_frame_naivePhS_Piii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 512
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23d_generate_mv_one_framePhS_Piii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23d_generate_mv_one_framePhS_Piii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
