#include <cuda.h>
#include <stdio.h>

#define NUM 4

__global__
void clzKernel(int *uA, int *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __clz(uA[tid]); 
}

__global__
void ffsKernel(int *uA, int *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __ffs(uA[tid]); 
}

__global__
void popcKernel(unsigned *uA, unsigned *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __popc(uA[tid]); 
}

__global__
void brevKernel(unsigned *uA, unsigned *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __brev(uA[tid]); 
}

__global__
void bytePermKernel(unsigned *uA, unsigned *uB, 
                    unsigned *uC, unsigned *uD) {
  unsigned tid = threadIdx.x;
  uD[tid] = __byte_perm(uA[tid], uB[tid], uC[tid]); 
}

int main(int argv, char **argc) {
  int hA[NUM] = {1, 2, 3, 4};
  int hB[NUM] = {1, 2, 3, 4};

  int *dA, *dB;
  cudaMalloc((void**)&dA, sizeof(int)*NUM);
  cudaMalloc((void**)&dB, sizeof(int)*NUM);

  cudaMemcpy(dA, hA, sizeof(int)*NUM, cudaMemcpyHostToDevice);
  cudaMemcpy(dB, hB, sizeof(int)*NUM, cudaMemcpyHostToDevice);

  clzKernel<<<1, NUM>>>(dA, dB);

  cudaMemcpy(hB, dB, sizeof(int)*NUM, cudaMemcpyDeviceToHost);
 
  printf("After clz intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("hB[%u]: %d\n", i, hB[i]);
  } 

  ffsKernel<<<1, NUM>>>(dA, dB);

  cudaMemcpy(hB, dB, sizeof(int)*NUM, cudaMemcpyDeviceToHost);
 
  printf("After ffs intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("hB[%u]: %d\n", i, hB[i]);
  } 

  unsigned huA[NUM] = {1, 2, 3, 4};
  unsigned huB[NUM] = {1, 2, 3, 4};
  unsigned huC[NUM] = {1, 2, 3, 4};
  unsigned huD[NUM] = {1, 2, 3, 4};

  unsigned *duA, *duB, *duC, *duD;

  cudaMalloc((void**)&duA, sizeof(unsigned)*NUM);
  cudaMalloc((void**)&duB, sizeof(unsigned)*NUM);
  cudaMalloc((void**)&duC, sizeof(unsigned)*NUM);
  cudaMalloc((void**)&duD, sizeof(unsigned)*NUM);

  cudaMemcpy(duA, huA, sizeof(unsigned)*NUM, cudaMemcpyHostToDevice);
  cudaMemcpy(duB, huB, sizeof(unsigned)*NUM, cudaMemcpyHostToDevice);
  cudaMemcpy(duC, huC, sizeof(unsigned)*NUM, cudaMemcpyHostToDevice);
  cudaMemcpy(duD, huD, sizeof(unsigned)*NUM, cudaMemcpyHostToDevice);

  popcKernel<<<1, NUM>>>(duA, duB); 

  cudaMemcpy(huB, duB, sizeof(unsigned)*NUM, cudaMemcpyDeviceToHost);
 
  printf("After popc intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("huB[%u]: %u\n", i, huB[i]);
  } 

  brevKernel<<<1, NUM>>>(duA, duB); 

  cudaMemcpy(huB, duB, sizeof(unsigned)*NUM, cudaMemcpyDeviceToHost);
 
  printf("After brev intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("huB[%u]: %u\n", i, huB[i]);
  } 

  bytePermKernel<<<1, NUM>>>(duA, duB, duC, duD); 

  cudaMemcpy(huD, duD, sizeof(unsigned)*NUM, cudaMemcpyDeviceToHost);
 
  printf("After bytePerm intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("huD[%u]: %u\n", i, huD[i]);
  } 

  cudaFree(dA);
  cudaFree(dB);

  cudaFree(duA);
  cudaFree(duB);
  cudaFree(duC);
  cudaFree(duD);
}

	.file	"tmpxft_00389f93_00000000-6_bitwise.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z9clzKernelPiS_PiS_
	.type	_Z30__device_stub__Z9clzKernelPiS_PiS_, @function
_Z30__device_stub__Z9clzKernelPiS_PiS_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9clzKernelPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z30__device_stub__Z9clzKernelPiS_PiS_, .-_Z30__device_stub__Z9clzKernelPiS_PiS_
	.globl	_Z9clzKernelPiS_
	.type	_Z9clzKernelPiS_, @function
_Z9clzKernelPiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9clzKernelPiS_PiS_
	.cfi_endproc
.LFE2053:
	.size	_Z9clzKernelPiS_, .-_Z9clzKernelPiS_
	.globl	_Z30__device_stub__Z9ffsKernelPiS_PiS_
	.type	_Z30__device_stub__Z9ffsKernelPiS_PiS_, @function
_Z30__device_stub__Z9ffsKernelPiS_PiS_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9ffsKernelPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z30__device_stub__Z9ffsKernelPiS_PiS_, .-_Z30__device_stub__Z9ffsKernelPiS_PiS_
	.globl	_Z9ffsKernelPiS_
	.type	_Z9ffsKernelPiS_, @function
_Z9ffsKernelPiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9ffsKernelPiS_PiS_
	.cfi_endproc
.LFE2055:
	.size	_Z9ffsKernelPiS_, .-_Z9ffsKernelPiS_
	.globl	_Z32__device_stub__Z10popcKernelPjS_PjS_
	.type	_Z32__device_stub__Z10popcKernelPjS_PjS_, @function
_Z32__device_stub__Z10popcKernelPjS_PjS_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10popcKernelPjS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L13:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z32__device_stub__Z10popcKernelPjS_PjS_, .-_Z32__device_stub__Z10popcKernelPjS_PjS_
	.globl	_Z10popcKernelPjS_
	.type	_Z10popcKernelPjS_, @function
_Z10popcKernelPjS_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10popcKernelPjS_PjS_
	.cfi_endproc
.LFE2057:
	.size	_Z10popcKernelPjS_, .-_Z10popcKernelPjS_
	.globl	_Z32__device_stub__Z10brevKernelPjS_PjS_
	.type	_Z32__device_stub__Z10brevKernelPjS_PjS_, @function
_Z32__device_stub__Z10brevKernelPjS_PjS_:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10brevKernelPjS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L18:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z32__device_stub__Z10brevKernelPjS_PjS_, .-_Z32__device_stub__Z10brevKernelPjS_PjS_
	.globl	_Z10brevKernelPjS_
	.type	_Z10brevKernelPjS_, @function
_Z10brevKernelPjS_:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10brevKernelPjS_PjS_
	.cfi_endproc
.LFE2059:
	.size	_Z10brevKernelPjS_, .-_Z10brevKernelPjS_
	.globl	_Z40__device_stub__Z14bytePermKernelPjS_S_S_PjS_S_S_
	.type	_Z40__device_stub__Z14bytePermKernelPjS_S_S_PjS_S_S_, @function
_Z40__device_stub__Z14bytePermKernelPjS_S_S_PjS_S_S_:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14bytePermKernelPjS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z40__device_stub__Z14bytePermKernelPjS_S_S_PjS_S_S_, .-_Z40__device_stub__Z14bytePermKernelPjS_S_S_PjS_S_S_
	.globl	_Z14bytePermKernelPjS_S_S_
	.type	_Z14bytePermKernelPjS_S_S_, @function
_Z14bytePermKernelPjS_S_S_:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z14bytePermKernelPjS_S_S_PjS_S_S_
	.cfi_endproc
.LFE2061:
	.size	_Z14bytePermKernelPjS_S_S_, .-_Z14bytePermKernelPjS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"After clz intrinsic: \n"
.LC1:
	.string	"hB[%u]: %d\n"
.LC2:
	.string	"After ffs intrinsic: \n"
.LC3:
	.string	"After popc intrinsic: \n"
.LC4:
	.string	"huB[%u]: %u\n"
.LC5:
	.string	"After brev intrinsic: \n"
.LC6:
	.string	"After bytePerm intrinsic: \n"
.LC7:
	.string	"huD[%u]: %u\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$16, %esi
	movabsq	$8589934593, %rdx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$184, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	movq	%rdx, 72(%rsp)
	leaq	88(%rsp), %rbp
	movabsq	$17179869187, %rax
	movq	%rdx, 88(%rsp)
	movq	%rax, 80(%rsp)
	movq	%rax, 96(%rsp)
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	leaq	72(%rsp), %rsi
	movl	$1, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z9clzKernelPiS_PiS_
.L29:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$16, %edx
	leaq	.LC1(%rip), %r12
	call	cudaMemcpy@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L30:
	movl	0(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L30
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 68(%rsp)
	movq	%rdx, 60(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z9ffsKernelPiS_PiS_
.L31:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L32:
	movl	0(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L32
	leaq	16(%rsp), %rdi
	movl	$16, %esi
	movabsq	$8589934593, %rdx
	movabsq	$17179869187, %rax
	movq	%rdx, 104(%rsp)
	leaq	120(%rsp), %rbp
	leaq	152(%rsp), %r12
	movq	%rdx, 120(%rsp)
	movq	%rdx, 136(%rsp)
	movq	%rdx, 152(%rsp)
	movq	%rax, 112(%rsp)
	movq	%rax, 128(%rsp)
	movq	%rax, 144(%rsp)
	movq	%rax, 160(%rsp)
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	leaq	104(%rsp), %rsi
	movl	$1, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	leaq	136(%rsp), %rsi
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z32__device_stub__Z10popcKernelPjS_PjS_
.L33:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$16, %edx
	leaq	.LC4(%rip), %r13
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L34:
	movl	0(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L34
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 68(%rsp)
	movq	%rdx, 60(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z32__device_stub__Z10brevKernelPjS_PjS_
.L35:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L36:
	movl	0(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L36
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 68(%rsp)
	movq	%rdx, 60(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z40__device_stub__Z14bytePermKernelPjS_S_S_PjS_S_S_
.L37:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	xorl	%ebx, %ebx
	movl	$16, %edx
	leaq	.LC7(%rip), %rbp
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L38:
	movl	(%r12,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L38
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$184, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z14bytePermKernelPjS_S_S_"
.LC9:
	.string	"_Z10brevKernelPjS_"
.LC10:
	.string	"_Z10popcKernelPjS_"
.LC11:
	.string	"_Z9ffsKernelPiS_"
.LC12:
	.string	"_Z9clzKernelPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14bytePermKernelPjS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10brevKernelPjS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10popcKernelPjS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9ffsKernelPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9clzKernelPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>

#define NUM 4

__global__
void clzKernel(int *uA, int *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __clz(uA[tid]); 
}

__global__
void ffsKernel(int *uA, int *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __ffs(uA[tid]); 
}

__global__
void popcKernel(unsigned *uA, unsigned *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __popc(uA[tid]); 
}

__global__
void brevKernel(unsigned *uA, unsigned *uB) {
  unsigned tid = threadIdx.x;
  uB[tid] = __brev(uA[tid]); 
}

__global__
void bytePermKernel(unsigned *uA, unsigned *uB, 
                    unsigned *uC, unsigned *uD) {
  unsigned tid = threadIdx.x;
  uD[tid] = __byte_perm(uA[tid], uB[tid], uC[tid]); 
}

int main(int argv, char **argc) {
  int hA[NUM] = {1, 2, 3, 4};
  int hB[NUM] = {1, 2, 3, 4};

  int *dA, *dB;
  hipMalloc((void**)&dA, sizeof(int)*NUM);
  hipMalloc((void**)&dB, sizeof(int)*NUM);

  hipMemcpy(dA, hA, sizeof(int)*NUM, hipMemcpyHostToDevice);
  hipMemcpy(dB, hB, sizeof(int)*NUM, hipMemcpyHostToDevice);

  clzKernel<<<1, NUM>>>(dA, dB);

  hipMemcpy(hB, dB, sizeof(int)*NUM, hipMemcpyDeviceToHost);
 
  printf("After clz intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("hB[%u]: %d\n", i, hB[i]);
  } 

  ffsKernel<<<1, NUM>>>(dA, dB);

  hipMemcpy(hB, dB, sizeof(int)*NUM, hipMemcpyDeviceToHost);
 
  printf("After ffs intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("hB[%u]: %d\n", i, hB[i]);
  } 

  unsigned huA[NUM] = {1, 2, 3, 4};
  unsigned huB[NUM] = {1, 2, 3, 4};
  unsigned huC[NUM] = {1, 2, 3, 4};
  unsigned huD[NUM] = {1, 2, 3, 4};

  unsigned *duA, *duB, *duC, *duD;

  hipMalloc((void**)&duA, sizeof(unsigned)*NUM);
  hipMalloc((void**)&duB, sizeof(unsigned)*NUM);
  hipMalloc((void**)&duC, sizeof(unsigned)*NUM);
  hipMalloc((void**)&duD, sizeof(unsigned)*NUM);

  hipMemcpy(duA, huA, sizeof(unsigned)*NUM, hipMemcpyHostToDevice);
  hipMemcpy(duB, huB, sizeof(unsigned)*NUM, hipMemcpyHostToDevice);
  hipMemcpy(duC, huC, sizeof(unsigned)*NUM, hipMemcpyHostToDevice);
  hipMemcpy(duD, huD, sizeof(unsigned)*NUM, hipMemcpyHostToDevice);

  popcKernel<<<1, NUM>>>(duA, duB); 

  hipMemcpy(huB, duB, sizeof(unsigned)*NUM, hipMemcpyDeviceToHost);
 
  printf("After popc intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("huB[%u]: %u\n", i, huB[i]);
  } 

  brevKernel<<<1, NUM>>>(duA, duB); 

  hipMemcpy(huB, duB, sizeof(unsigned)*NUM, hipMemcpyDeviceToHost);
 
  printf("After brev intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("huB[%u]: %u\n", i, huB[i]);
  } 

  bytePermKernel<<<1, NUM>>>(duA, duB, duC, duD); 

  hipMemcpy(huD, duD, sizeof(unsigned)*NUM, hipMemcpyDeviceToHost);
 
  printf("After bytePerm intrinsic: \n");
  for (unsigned i = 0; i < NUM; i++) {
    printf("huD[%u]: %u\n", i, huD[i]);
  } 

  hipFree(dA);
  hipFree(dB);

  hipFree(duA);
  hipFree(duB);
  hipFree(duC);
  hipFree(duD);
}

	.text
	.file	"bitwise.hip"
	.globl	_Z24__device_stub__clzKernelPiS_ # -- Begin function _Z24__device_stub__clzKernelPiS_
	.type	_Z24__device_stub__clzKernelPiS_,@function
_Z24__device_stub__clzKernelPiS_:       # @_Z24__device_stub__clzKernelPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9clzKernelPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__clzKernelPiS_, .Lfunc_end0-_Z24__device_stub__clzKernelPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__ffsKernelPiS_ # -- Begin function _Z24__device_stub__ffsKernelPiS_
	.type	_Z24__device_stub__ffsKernelPiS_,@function
_Z24__device_stub__ffsKernelPiS_:       # @_Z24__device_stub__ffsKernelPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9ffsKernelPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__ffsKernelPiS_, .Lfunc_end1-_Z24__device_stub__ffsKernelPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__popcKernelPjS_ # -- Begin function _Z25__device_stub__popcKernelPjS_
	.type	_Z25__device_stub__popcKernelPjS_,@function
_Z25__device_stub__popcKernelPjS_:      # @_Z25__device_stub__popcKernelPjS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10popcKernelPjS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__popcKernelPjS_, .Lfunc_end2-_Z25__device_stub__popcKernelPjS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__brevKernelPjS_ # -- Begin function _Z25__device_stub__brevKernelPjS_
	.type	_Z25__device_stub__brevKernelPjS_,@function
_Z25__device_stub__brevKernelPjS_:      # @_Z25__device_stub__brevKernelPjS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10brevKernelPjS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__brevKernelPjS_, .Lfunc_end3-_Z25__device_stub__brevKernelPjS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__bytePermKernelPjS_S_S_ # -- Begin function _Z29__device_stub__bytePermKernelPjS_S_S_
	.type	_Z29__device_stub__bytePermKernelPjS_S_S_,@function
_Z29__device_stub__bytePermKernelPjS_S_S_: # @_Z29__device_stub__bytePermKernelPjS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14bytePermKernelPjS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z29__device_stub__bytePermKernelPjS_S_S_, .Lfunc_end4-_Z29__device_stub__bytePermKernelPjS_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	4                               # 0x4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967297, %r13               # imm = 0x100000001
	movaps	.LCPI5_0(%rip), %xmm0           # xmm0 = [1,2,3,4]
	leaq	144(%rsp), %r14
	movaps	%xmm0, (%r14)
	leaq	64(%rsp), %rbx
	movaps	%xmm0, (%rbx)
	leaq	32(%rsp), %r15
	movl	$16, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r12
	movl	$16, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$16, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$16, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	3(%r13), %r14
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z24__device_stub__clzKernelPiS_
.LBB5_2:
	movq	8(%rsp), %rsi
	leaq	64(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB5_3:                                # =>This Inner Loop Header: Depth=1
	movl	64(%rsp,%rbx,4), %edx
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB5_3
# %bb.4:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z24__device_stub__ffsKernelPiS_
.LBB5_6:
	movq	%r14, 104(%rsp)                 # 8-byte Spill
	movq	8(%rsp), %rsi
	leaq	64(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB5_7:                                # =>This Inner Loop Header: Depth=1
	movl	64(%rsp,%rbx,4), %edx
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB5_7
# %bb.8:
	leaq	128(%rsp), %rbp
	movaps	.LCPI5_0(%rip), %xmm0           # xmm0 = [1,2,3,4]
	movaps	%xmm0, (%rbp)
	leaq	48(%rsp), %r13
	movaps	%xmm0, (%r13)
	leaq	112(%rsp), %rax
	movaps	%xmm0, (%rax)
	leaq	80(%rsp), %rax
	movaps	%xmm0, (%rax)
	leaq	16(%rsp), %r12
	movl	$16, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	%rsp, %r14
	movl	$16, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r15
	movl	$16, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rbx
	movl	$16, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$16, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$16, %edx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$16, %edx
	leaq	112(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movl	$16, %edx
	leaq	80(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %r14               # imm = 0x100000001
	movq	%r14, %rdi
	movl	$1, %esi
	movq	104(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_10
# %bb.9:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z25__device_stub__popcKernelPjS_
.LBB5_10:
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB5_11:                               # =>This Inner Loop Header: Depth=1
	movl	48(%rsp,%rbx,4), %edx
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB5_11
# %bb.12:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_14
# %bb.13:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z25__device_stub__brevKernelPjS_
.LBB5_14:
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB5_15:                               # =>This Inner Loop Header: Depth=1
	movl	48(%rsp,%rbx,4), %edx
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB5_15
# %bb.16:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.17:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rcx
	callq	_Z29__device_stub__bytePermKernelPjS_S_S_
.LBB5_18:
	movq	24(%rsp), %rsi
	leaq	80(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB5_19:                               # =>This Inner Loop Header: Depth=1
	movl	80(%rsp,%rbx,4), %edx
	movl	$.L.str.7, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB5_19
# %bb.20:
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9clzKernelPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9ffsKernelPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10popcKernelPjS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10brevKernelPjS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14bytePermKernelPjS_S_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9clzKernelPiS_,@object        # @_Z9clzKernelPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z9clzKernelPiS_
	.p2align	3, 0x0
_Z9clzKernelPiS_:
	.quad	_Z24__device_stub__clzKernelPiS_
	.size	_Z9clzKernelPiS_, 8

	.type	_Z9ffsKernelPiS_,@object        # @_Z9ffsKernelPiS_
	.globl	_Z9ffsKernelPiS_
	.p2align	3, 0x0
_Z9ffsKernelPiS_:
	.quad	_Z24__device_stub__ffsKernelPiS_
	.size	_Z9ffsKernelPiS_, 8

	.type	_Z10popcKernelPjS_,@object      # @_Z10popcKernelPjS_
	.globl	_Z10popcKernelPjS_
	.p2align	3, 0x0
_Z10popcKernelPjS_:
	.quad	_Z25__device_stub__popcKernelPjS_
	.size	_Z10popcKernelPjS_, 8

	.type	_Z10brevKernelPjS_,@object      # @_Z10brevKernelPjS_
	.globl	_Z10brevKernelPjS_
	.p2align	3, 0x0
_Z10brevKernelPjS_:
	.quad	_Z25__device_stub__brevKernelPjS_
	.size	_Z10brevKernelPjS_, 8

	.type	_Z14bytePermKernelPjS_S_S_,@object # @_Z14bytePermKernelPjS_S_S_
	.globl	_Z14bytePermKernelPjS_S_S_
	.p2align	3, 0x0
_Z14bytePermKernelPjS_S_S_:
	.quad	_Z29__device_stub__bytePermKernelPjS_S_S_
	.size	_Z14bytePermKernelPjS_S_S_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"hB[%u]: %d\n"
	.size	.L.str.1, 12

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"huB[%u]: %u\n"
	.size	.L.str.4, 13

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"huD[%u]: %u\n"
	.size	.L.str.7, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9clzKernelPiS_"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9ffsKernelPiS_"
	.size	.L__unnamed_2, 17

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10popcKernelPjS_"
	.size	.L__unnamed_3, 19

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z10brevKernelPjS_"
	.size	.L__unnamed_4, 19

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z14bytePermKernelPjS_S_S_"
	.size	.L__unnamed_5, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"After clz intrinsic: "
	.size	.Lstr, 22

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"After ffs intrinsic: "
	.size	.Lstr.1, 22

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"After popc intrinsic: "
	.size	.Lstr.2, 23

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"After brev intrinsic: "
	.size	.Lstr.3, 23

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"After bytePerm intrinsic: "
	.size	.Lstr.4, 27

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__clzKernelPiS_
	.addrsig_sym _Z24__device_stub__ffsKernelPiS_
	.addrsig_sym _Z25__device_stub__popcKernelPjS_
	.addrsig_sym _Z25__device_stub__brevKernelPjS_
	.addrsig_sym _Z29__device_stub__bytePermKernelPjS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9clzKernelPiS_
	.addrsig_sym _Z9ffsKernelPiS_
	.addrsig_sym _Z10popcKernelPjS_
	.addrsig_sym _Z10brevKernelPjS_
	.addrsig_sym _Z14bytePermKernelPjS_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9clzKernelPiS_        ; -- Begin function _Z9clzKernelPiS_
	.globl	_Z9clzKernelPiS_
	.p2align	8
	.type	_Z9clzKernelPiS_,@function
_Z9clzKernelPiS_:                       ; @_Z9clzKernelPiS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_clz_i32_u32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_min_u32_e32 v1, 32, v1
	global_store_b32 v0, v1, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9clzKernelPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9clzKernelPiS_, .Lfunc_end0-_Z9clzKernelPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 60
; NumSgprs: 4
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9ffsKernelPiS_        ; -- Begin function _Z9ffsKernelPiS_
	.globl	_Z9ffsKernelPiS_
	.p2align	8
	.type	_Z9ffsKernelPiS_,@function
_Z9ffsKernelPiS_:                       ; @_Z9ffsKernelPiS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_ctz_i32_b32_e32 v2, v1
	v_cmp_ne_u32_e32 vcc_lo, 0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 1, v2
	v_cndmask_b32_e32 v1, 0, v2, vcc_lo
	global_store_b32 v0, v1, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9ffsKernelPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 4
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9ffsKernelPiS_, .Lfunc_end1-_Z9ffsKernelPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 68
; NumSgprs: 6
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 6
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10popcKernelPjS_      ; -- Begin function _Z10popcKernelPjS_
	.globl	_Z10popcKernelPjS_
	.p2align	8
	.type	_Z10popcKernelPjS_,@function
_Z10popcKernelPjS_:                     ; @_Z10popcKernelPjS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_bcnt_u32_b32 v1, v1, 0
	global_store_b32 v0, v1, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10popcKernelPjS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10popcKernelPjS_, .Lfunc_end2-_Z10popcKernelPjS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 56
; NumSgprs: 4
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10brevKernelPjS_      ; -- Begin function _Z10brevKernelPjS_
	.globl	_Z10brevKernelPjS_
	.p2align	8
	.type	_Z10brevKernelPjS_,@function
_Z10brevKernelPjS_:                     ; @_Z10brevKernelPjS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_bfrev_b32_e32 v1, v1
	global_store_b32 v0, v1, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10brevKernelPjS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z10brevKernelPjS_, .Lfunc_end3-_Z10brevKernelPjS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 52
; NumSgprs: 4
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14bytePermKernelPjS_S_S_ ; -- Begin function _Z14bytePermKernelPjS_S_S_
	.globl	_Z14bytePermKernelPjS_S_S_
	.p2align	8
	.type	_Z14bytePermKernelPjS_S_S_,@function
_Z14bytePermKernelPjS_S_S_:             ; @_Z14bytePermKernelPjS_S_S_
; %bb.0:
	s_load_b256 s[4:11], s[2:3], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x4
	v_bfe_u32 v6, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b32_e32 v4, 2, v3
	s_waitcnt lgkmcnt(0)
	s_clause 0x2
	global_load_b32 v5, v4, s[8:9]
	global_load_b32 v1, v4, s[4:5]
	global_load_b32 v2, v4, s[6:7]
	s_lshr_b32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s1
	v_mul_lo_u32 v3, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v3, v6, s1, v3
	v_add_lshl_u32 v0, v3, v0, 3
	s_waitcnt vmcnt(2)
	v_lshrrev_b32_e32 v3, 4, v5
	v_lshrrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v7, 12, v5
	v_and_or_b32 v5, v5, 7, v0
	s_waitcnt vmcnt(0)
	ds_store_b64 v0, v[1:2]
	v_and_or_b32 v3, v3, 7, v0
	v_and_or_b32 v6, v6, 7, v0
	v_and_or_b32 v7, v7, 7, v0
	ds_load_u8 v0, v5
	ds_load_u8 v1, v3
	ds_load_u8 v2, v6
	ds_load_u8 v3, v7
	s_waitcnt lgkmcnt(2)
	v_lshl_or_b32 v0, v1, 8, v0
	s_waitcnt lgkmcnt(1)
	v_lshlrev_b32_e32 v1, 16, v2
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b32_e32 v2, 24, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v0, v0, v1, v2
	global_store_b32 v4, v0, s[10:11]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14bytePermKernelPjS_S_S_
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 12
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z14bytePermKernelPjS_S_S_, .Lfunc_end4-_Z14bytePermKernelPjS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 12
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 12
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9clzKernelPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z9clzKernelPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9ffsKernelPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     6
    .sgpr_spill_count: 0
    .symbol:         _Z9ffsKernelPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10popcKernelPjS_
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z10popcKernelPjS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10brevKernelPjS_
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z10brevKernelPjS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14bytePermKernelPjS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     12
    .sgpr_spill_count: 0
    .symbol:         _Z14bytePermKernelPjS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
