#include <stdio.h>
#include <ctime>
#include <cassert>
#include <cmath>
#include <utility>
#include <vector>
#include <algorithm> 
#include <cstdlib>
#include <memory>
#include <iostream>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

float __device__ rad2deg(float radians)
{
    return radians * 180.0 / M_PI;
}

float __device__ deg2rad(float degrees)
{
    return degrees * M_PI / 180.0;
}

float __device__ xy2theta(const float & _x, const float & _y )
{
    if ( _x >= 0 & _y >= 0) 
        return (180/M_PI) * atan(_y / _x);

    else if ( _x < 0 & _y >= 0) 
        return 180 - ( (180/M_PI) * atan(_y / (-_x)) );

    else if ( _x < 0 & _y < 0) 
        return 180 + ( (180/M_PI) * atan(_y / _x) );

    else if ( _x >= 0 & _y < 0)
        return 360 - ( (180/M_PI) * atan((-_y) / _x) );
} // xy2theta


// convert pointcloud to grid map
void __global__ point2gridmap(float* point, int* ring, int* sector, int* height, int d_size, int max_length, int max_height, int num_ring, int num_sector, int num_height) 
{
    int gid = threadIdx.x + blockDim.x*blockIdx.x;
    
    if(gid >= d_size) return;

    float gap_ring, gap_sector, gap_height;

    gap_ring = (float)max_length / (float)num_ring;
    gap_sector = 360.0/(float)num_sector;
    gap_height = 2.0 * (float)max_height / (float)num_height;

    float x, y, z;
    x = point[gid];
    y = point[gid + d_size];
    z = point[gid + 2 * d_size];
    
    if(x == 0.0)
        x = 0.0001;
    if(y == 0.0)
        y = 0.0001;
    if(z == 0.0)
        z = 0.0001;

    float theta = xy2theta(x, y);
    float faraway = sqrt(pow(x,2) + pow(y,2));

    int idx_ring = floor(faraway / gap_ring);
    int idx_sector = floor(theta / gap_sector);
    int idx_height = floor((z + (float)max_height) / gap_height);

    if(idx_ring >= num_ring)
       idx_ring = num_ring - 1;

    height[gid] = idx_height;
    ring[gid] = idx_ring;
    sector[gid] = idx_sector;

    __syncthreads();  
}


	.file	"tmpxft_00313344_00000000-6_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4820:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4820:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7rad2degf
	.type	_Z7rad2degf, @function
_Z7rad2degf:
.LFB4815:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4815:
	.size	_Z7rad2degf, .-_Z7rad2degf
	.globl	_Z7deg2radf
	.type	_Z7deg2radf, @function
_Z7deg2radf:
.LFB5484:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z7rad2degf
	.cfi_endproc
.LFE5484:
	.size	_Z7deg2radf, .-_Z7deg2radf
	.globl	_Z8xy2thetaRKfS0_
	.type	_Z8xy2thetaRKfS0_, @function
_Z8xy2thetaRKfS0_:
.LFB4817:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4817:
	.size	_Z8xy2thetaRKfS0_, .-_Z8xy2thetaRKfS0_
	.globl	_Z47__device_stub__Z13point2gridmapPfPiS0_S0_iiiiiiPfPiS0_S0_iiiiii
	.type	_Z47__device_stub__Z13point2gridmapPfPiS0_S0_iiiiiiPfPiS0_S0_iiiiii, @function
_Z47__device_stub__Z13point2gridmapPfPiS0_S0_iiiiiiPfPiS0_S0_iiiiii:
.LFB4842:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z13point2gridmapPfPiS0_S0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L8:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4842:
	.size	_Z47__device_stub__Z13point2gridmapPfPiS0_S0_iiiiiiPfPiS0_S0_iiiiii, .-_Z47__device_stub__Z13point2gridmapPfPiS0_S0_iiiiiiPfPiS0_S0_iiiiii
	.globl	_Z13point2gridmapPfPiS0_S0_iiiiii
	.type	_Z13point2gridmapPfPiS0_S0_iiiiii, @function
_Z13point2gridmapPfPiS0_S0_iiiiii:
.LFB4843:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z13point2gridmapPfPiS0_S0_iiiiiiPfPiS0_S0_iiiiii
	.cfi_endproc
.LFE4843:
	.size	_Z13point2gridmapPfPiS0_S0_iiiiii, .-_Z13point2gridmapPfPiS0_S0_iiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13point2gridmapPfPiS0_S0_iiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4845:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13point2gridmapPfPiS0_S0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4845:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <ctime>
#include <cassert>
#include <cmath>
#include <utility>
#include <vector>
#include <algorithm> 
#include <cstdlib>
#include <memory>
#include <iostream>
#include "hip/hip_runtime.h"


float __device__ rad2deg(float radians)
{
    return radians * 180.0 / M_PI;
}

float __device__ deg2rad(float degrees)
{
    return degrees * M_PI / 180.0;
}

float __device__ xy2theta(const float & _x, const float & _y )
{
    if ( _x >= 0 & _y >= 0) 
        return (180/M_PI) * atan(_y / _x);

    else if ( _x < 0 & _y >= 0) 
        return 180 - ( (180/M_PI) * atan(_y / (-_x)) );

    else if ( _x < 0 & _y < 0) 
        return 180 + ( (180/M_PI) * atan(_y / _x) );

    else if ( _x >= 0 & _y < 0)
        return 360 - ( (180/M_PI) * atan((-_y) / _x) );
} // xy2theta


// convert pointcloud to grid map
void __global__ point2gridmap(float* point, int* ring, int* sector, int* height, int d_size, int max_length, int max_height, int num_ring, int num_sector, int num_height) 
{
    int gid = threadIdx.x + blockDim.x*blockIdx.x;
    
    if(gid >= d_size) return;

    float gap_ring, gap_sector, gap_height;

    gap_ring = (float)max_length / (float)num_ring;
    gap_sector = 360.0/(float)num_sector;
    gap_height = 2.0 * (float)max_height / (float)num_height;

    float x, y, z;
    x = point[gid];
    y = point[gid + d_size];
    z = point[gid + 2 * d_size];
    
    if(x == 0.0)
        x = 0.0001;
    if(y == 0.0)
        y = 0.0001;
    if(z == 0.0)
        z = 0.0001;

    float theta = xy2theta(x, y);
    float faraway = sqrt(pow(x,2) + pow(y,2));

    int idx_ring = floor(faraway / gap_ring);
    int idx_sector = floor(theta / gap_sector);
    int idx_height = floor((z + (float)max_height) / gap_height);

    if(idx_ring >= num_ring)
       idx_ring = num_ring - 1;

    height[gid] = idx_height;
    ring[gid] = idx_ring;
    sector[gid] = idx_sector;

    __syncthreads();  
}


	.text
	.file	"kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii # -- Begin function _Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii
	.type	_Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii,@function
_Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii: # @_Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13point2gridmapPfPiS0_S0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii, .Lfunc_end0-_Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13point2gridmapPfPiS0_S0_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13point2gridmapPfPiS0_S0_iiiiii,@object # @_Z13point2gridmapPfPiS0_S0_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z13point2gridmapPfPiS0_S0_iiiiii
	.p2align	3, 0x0
_Z13point2gridmapPfPiS0_S0_iiiiii:
	.quad	_Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii
	.size	_Z13point2gridmapPfPiS0_S0_iiiiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13point2gridmapPfPiS0_S0_iiiiii"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__point2gridmapPfPiS0_S0_iiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13point2gridmapPfPiS0_S0_iiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13point2gridmapPfPiS0_S0_iiiiii ; -- Begin function _Z13point2gridmapPfPiS0_S0_iiiiii
	.globl	_Z13point2gridmapPfPiS0_S0_iiiiii
	.p2align	8
	.type	_Z13point2gridmapPfPiS0_S0_iiiiii,@function
_Z13point2gridmapPfPiS0_S0_iiiiii:      ; @_Z13point2gridmapPfPiS0_S0_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[16:19], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s16, v2
	s_cbranch_execz .LBB0_14
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_ashr_i32 s3, s16, 31
	s_mov_b32 s2, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add3_u32 v2, s16, s16, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
	s_load_b64 s[2:3], s[0:1], 0x30
	s_clause 0x1
	global_load_b32 v7, v[3:4], off
	global_load_b32 v5, v[5:6], off
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v4, v[2:3], off
	s_waitcnt vmcnt(2)
	v_cmp_neq_f32_e32 vcc_lo, 0, v7
	v_cndmask_b32_e32 v6, 0x38d1b717, v7, vcc_lo
	s_waitcnt vmcnt(1)
	v_cmp_neq_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e32 v5, 0x38d1b717, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_le_f32_e32 vcc_lo, 0, v6
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_cmp_le_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v7, v2
	v_and_b32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
                                        ; implicit-def: $vgpr2_vgpr3
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_div_scale_f32 v2, null, v6, v6, v5
	s_mov_b32 s1, 0x3b2d2a58
	s_mov_b32 s4, 0x1a63c1f8
	s_mov_b32 s5, 0x404ca5dc
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v7, v3
	v_div_scale_f32 v7, vcc_lo, v5, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v3
	v_fma_f32 v9, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v3
	v_fma_f32 v2, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v8
	v_div_fixup_f32 v2, v2, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e64 v3, |v2|
	v_cmp_gt_f32_e64 vcc_lo, |v2|, 1.0
	s_waitcnt_depctr 0xfff
	v_cndmask_b32_e64 v3, |v2|, v3, vcc_lo
	v_mul_f32_e32 v7, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, s1, v7, 0xbc7a590c
	v_fmaak_f32 v8, v7, v8, 0x3d29fb3f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbd97d4d7
	v_fmaak_f32 v8, v7, v8, 0x3dd931b2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbe1160e6
	v_fmaak_f32 v8, v7, v8, 0x3e4cb8bf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbeaaaa62
	v_mul_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v3, v7
	v_sub_f32_e32 v7, 0x3fc90fdb, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
                                        ; implicit-def: $vgpr7
	v_bfi_b32 v2, 0x7fffffff, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[2:3], v2
	v_mul_f64 v[2:3], v[2:3], s[4:5]
.LBB0_3:                                ; %Flow83
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_13
; %bb.4:
	v_cmp_gt_f32_e32 vcc_lo, 0, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v7, v8
	v_and_b32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
                                        ; implicit-def: $vgpr2_vgpr3
	s_and_saveexec_b32 s1, vcc_lo
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_div_scale_f32 v2, null, -v6, -v6, v5
	s_mov_b32 s4, 0x3b2d2a58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v7, v3
	v_div_scale_f32 v7, vcc_lo, v5, -v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v3
	v_fma_f32 v9, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v3
	v_fma_f32 v2, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v8
	v_div_fixup_f32 v2, v2, -v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e64 v3, |v2|
	v_cmp_gt_f32_e64 vcc_lo, |v2|, 1.0
	s_waitcnt_depctr 0xfff
	v_cndmask_b32_e64 v3, |v2|, v3, vcc_lo
	v_mul_f32_e32 v7, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, s4, v7, 0xbc7a590c
	s_mov_b32 s4, 0x1a63c1f8
	s_mov_b32 s5, 0xc04ca5dc
	v_fmaak_f32 v8, v7, v8, 0x3d29fb3f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbd97d4d7
	v_fmaak_f32 v8, v7, v8, 0x3dd931b2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbe1160e6
	v_fmaak_f32 v8, v7, v8, 0x3e4cb8bf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbeaaaa62
	v_mul_f32_e32 v7, v7, v8
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v3, v7
	v_sub_f32_e32 v7, 0x3fc90fdb, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	v_bfi_b32 v2, 0x7fffffff, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[2:3], v2
	v_fma_f64 v[2:3], v[2:3], s[4:5], 0x40668000
.LBB0_6:                                ; %Flow81
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_12
; %bb.7:
	v_cmp_gt_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v8
	v_and_b32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
                                        ; implicit-def: $vgpr2_vgpr3
	s_and_saveexec_b32 s4, vcc_lo
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_div_scale_f32 v2, null, v6, v6, v5
	s_mov_b32 s5, 0x3b2d2a58
	s_mov_b32 s12, 0x1a63c1f8
	s_mov_b32 s13, 0x404ca5dc
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v7, v3
	v_div_scale_f32 v7, vcc_lo, v5, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v3
	v_fma_f32 v9, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v3
	v_fma_f32 v2, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v8
	v_div_fixup_f32 v2, v2, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e64 v3, |v2|
	v_cmp_gt_f32_e64 vcc_lo, |v2|, 1.0
	s_waitcnt_depctr 0xfff
	v_cndmask_b32_e64 v3, |v2|, v3, vcc_lo
	v_mul_f32_e32 v7, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, s5, v7, 0xbc7a590c
	v_fmaak_f32 v8, v7, v8, 0x3d29fb3f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbd97d4d7
	v_fmaak_f32 v8, v7, v8, 0x3dd931b2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbe1160e6
	v_fmaak_f32 v8, v7, v8, 0x3e4cb8bf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbeaaaa62
	v_mul_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v3, v7
	v_sub_f32_e32 v7, 0x3fc90fdb, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	v_bfi_b32 v2, 0x7fffffff, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[2:3], v2
	v_fma_f64 v[2:3], v[2:3], s[12:13], 0x40668000
.LBB0_9:                                ; %Flow
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_div_scale_f32 v2, null, v6, v6, -v5
	s_mov_b32 s5, 0x3b2d2a58
	s_mov_b32 s12, 0x1a63c1f8
	s_mov_b32 s13, 0xc04ca5dc
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v7, v3
	v_div_scale_f32 v7, vcc_lo, -v5, v6, -v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v3
	v_fma_f32 v9, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v3
	v_fma_f32 v2, -v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v8
	v_div_fixup_f32 v2, v2, v6, -v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e64 v3, |v2|
	v_cmp_gt_f32_e64 vcc_lo, |v2|, 1.0
	s_waitcnt_depctr 0xfff
	v_cndmask_b32_e64 v3, |v2|, v3, vcc_lo
	v_mul_f32_e32 v7, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, s5, v7, 0xbc7a590c
	v_fmaak_f32 v8, v7, v8, 0x3d29fb3f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbd97d4d7
	v_fmaak_f32 v8, v7, v8, 0x3dd931b2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbe1160e6
	v_fmaak_f32 v8, v7, v8, 0x3e4cb8bf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v7, v8, 0xbeaaaa62
	v_mul_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v3, v7
	v_sub_f32_e32 v7, 0x3fc90fdb, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	v_bfi_b32 v2, 0x7fffffff, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[2:3], v2
	v_fma_f64 v[2:3], v[2:3], s[12:13], 0x40768000
.LBB0_11:                               ; %Flow80
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_12:                               ; %Flow82
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_13:                               ; %_Z8xy2thetaRKfS0_.exit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_cvt_f32_i32_e32 v7, s18
	v_frexp_mant_f32_e64 v12, |v6|
	v_frexp_mant_f32_e64 v13, |v5|
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v10, s3
	s_mov_b32 s1, 0x3e76c4e1
	v_cvt_f64_f32_e32 v[8:9], v7
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v12
	v_cmp_gt_f32_e64 s0, 0x3f2aaaab, v13
	v_cvt_f64_f32_e32 v[10:11], v10
	v_frexp_exp_i32_f32_e32 v32, v6
	v_cndmask_b32_e64 v14, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, 0, 1, s0
	v_subrev_co_ci_u32_e32 v32, vcc_lo, 0, v32, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f32 v12, v12, v14
	v_ldexp_f32 v13, v13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v14, 1.0, v12 :: v_dual_add_f32 v15, 1.0, v13
	v_dual_add_f32 v18, -1.0, v12 :: v_dual_add_f32 v19, -1.0, v13
	v_rcp_f32_e32 v16, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v17, v15
	v_dual_add_f32 v21, -1.0, v14 :: v_dual_add_f32 v24, -1.0, v15
	v_dual_sub_f32 v21, v12, v21 :: v_dual_sub_f32 v24, v13, v24
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v20, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v22, v19, v17 :: v_dual_mul_f32 v23, v14, v20
	v_mul_f32_e32 v25, v15, v22
	v_add_f64 v[8:9], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v14, v20, v14, -v23
	v_fma_f32 v15, v22, v15, -v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v14, v20, v21 :: v_dual_fmac_f32 v15, v22, v24
	v_dual_add_f32 v21, v23, v14 :: v_dual_add_f32 v24, v25, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v26, v18, v21 :: v_dual_sub_f32 v23, v21, v23
	v_sub_f32_e32 v27, v19, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v25, v24, v25 :: v_dual_sub_f32 v18, v18, v26
	v_sub_f32_e32 v14, v23, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v19, v19, v27 :: v_dual_sub_f32 v18, v18, v21
	v_dual_sub_f32 v15, v25, v15 :: v_dual_add_f32 v14, v14, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v19, v19, v24 :: v_dual_add_f32 v14, v26, v14
	v_div_scale_f64 v[12:13], null, v[10:11], v[10:11], v[8:9]
	v_dual_add_f32 v15, v15, v19 :: v_dual_mul_f32 v16, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v18, v27, v15
	v_dual_mul_f32 v17, v17, v18 :: v_dual_add_f32 v18, v20, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v19, v22, v17
	v_dual_sub_f32 v20, v18, v20 :: v_dual_mul_f32 v23, v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v21, v18, v18 :: v_dual_sub_f32 v20, v16, v20
	v_fma_f32 v25, v19, v19, -v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v24, v18, v18, -v21
	v_add_f32_e32 v16, v20, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v18, v16
	v_rcp_f64_e32 v[14:15], v[12:13]
	v_add_f32_e32 v26, v21, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v16, s1, v26, 0x3e91f4c4
	v_dual_sub_f32 v22, v19, v22 :: v_dual_fmaak_f32 v29, v26, v16, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v22, v17, v22
	v_add_f32_e32 v17, v22, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v19, v17
	v_add_f32_e32 v27, v23, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v23, v27, v23
	v_dual_sub_f32 v21, v26, v21 :: v_dual_fmaak_f32 v28, s1, v27, 0x3e91f4c4
	v_sub_f32_e32 v23, v25, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_dual_sub_f32 v21, v24, v21 :: v_dual_fmaak_f32 v28, v27, v28, 0x3ecccdef
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v24, v27, v28
	v_fma_f32 v25, v27, v28, -v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v30, v26, v29 :: v_dual_fmac_f32 v25, v23, v28
	v_fma_f32 v31, v26, v29, -v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v31, v21, v29
	v_dual_mul_f32 v33, v18, v26 :: v_dual_add_f32 v34, v24, v25
	v_frexp_exp_i32_f32_e32 v29, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v28, v30, v31
	v_fma_f32 v37, v26, v18, -v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v35, v19, v27 :: v_dual_add_f32 v38, 0x3f2aaaaa, v34
	v_subrev_co_ci_u32_e64 v29, vcc_lo, 0, v29, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v37, v26, v20
	v_sub_f32_e32 v24, v34, v24
	v_sub_f32_e32 v30, v28, v30
	v_fma_f32 v39, v27, v19, -v35
	v_ldexp_f32 v20, v20, 1
	v_fmac_f32_e32 v37, v21, v18
	v_dual_sub_f32 v24, v25, v24 :: v_dual_add_f32 v25, 0xbf2aaaaa, v38
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v39, v27, v22 :: v_dual_add_f32 v36, 0x3f2aaaaa, v28
	v_sub_f32_e32 v30, v31, v30
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_dual_sub_f32 v17, v34, v25 :: v_dual_add_f32 v16, 0x31739010, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v31, 0xbf2aaaaa, v36
	v_dual_add_f32 v30, 0x31739010, v30 :: v_dual_fmac_f32 v39, v23, v19
	v_add_f32_e32 v23, v33, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v16, v16, v17
	v_sub_f32_e32 v28, v28, v31
	v_cvt_f32_i32_e32 v21, v32
	v_add_f32_e32 v27, v35, v39
	v_cvt_f32_i32_e32 v25, v29
	v_ldexp_f32 v19, v19, 1
	v_add_f32_e32 v24, v30, v28
	v_ldexp_f32 v22, v22, 1
	v_ldexp_f32 v18, v18, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v17, v36, v24
	v_dual_add_f32 v26, v38, v16 :: v_dual_mul_f32 v29, v23, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v31, v38, v26
	v_mul_f32_e32 v32, v27, v26
	v_sub_f32_e32 v28, v36, v17
	v_add_f32_e32 v16, v16, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v31, v27, v26, -v32
	v_fmac_f32_e32 v31, v27, v16
	v_sub_f32_e32 v30, v23, v33
	v_dual_sub_f32 v33, v27, v35 :: v_dual_add_f32 v24, v24, v28
	v_mul_f32_e32 v27, 0x3f317218, v25
	v_fma_f32 v28, v23, v17, -v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v28, v23, v24
	v_sub_f32_e32 v24, v39, v33
	v_mul_f32_e32 v23, 0x3f317218, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v31, v24, v26
	v_sub_f32_e32 v30, v37, v30
	v_fma_f32 v26, 0x3f317218, v25, -v27
	v_dual_add_f32 v33, v32, v31 :: v_dual_fmac_f32 v28, v30, v17
	v_fma_f32 v30, 0x3f317218, v21, -v23
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v35, v19, v33 :: v_dual_add_f32 v24, v29, v28
	v_sub_f32_e32 v32, v33, v32
	v_dual_fmac_f32 v30, 0xb102e308, v21 :: v_dual_sub_f32 v19, v35, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v29, v24, v29
	v_dual_sub_f32 v19, v33, v19 :: v_dual_sub_f32 v28, v28, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v29, v31, v32
	v_add_f32_e32 v21, v22, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v34, v18, v24 :: v_dual_add_f32 v21, v21, v19
	v_sub_f32_e32 v18, v34, v18
	v_add_f32_e32 v20, v20, v28
	v_add_f32_e32 v22, v23, v30
	v_fmac_f32_e32 v26, 0xb102e308, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v18, v24, v18
	v_add_f32_e32 v20, v20, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v18, v22, v23 :: v_dual_add_f32 v23, v35, v21
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_dual_add_f32 v25, v34, v20 :: v_dual_sub_f32 v32, v23, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v31, v25, v34
	v_dual_sub_f32 v21, v21, v32 :: v_dual_add_f32 v24, v27, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v19, v24, v27
	v_add_f32_e32 v27, v22, v25
	v_dual_add_f32 v29, v24, v23 :: v_dual_sub_f32 v28, v30, v18
	v_sub_f32_e32 v20, v20, v31
	v_sub_f32_e32 v30, v27, v22
	v_sub_f32_e32 v26, v26, v19
	v_div_scale_f64 v[18:19], s0, v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v25, v25, v30
	v_sub_f32_e32 v17, v27, v30
	v_dual_sub_f32 v17, v22, v17 :: v_dual_sub_f32 v16, v29, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v17, v25, v17 :: v_dual_add_f32 v22, v28, v20
	v_add_f32_e32 v17, v22, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v31, v27, v17 :: v_dual_sub_f32 v30, v29, v16
	v_sub_f32_e32 v27, v31, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v16, v23, v16 :: v_dual_sub_f32 v23, v24, v30
	v_dual_add_f32 v24, v26, v21 :: v_dual_sub_f32 v17, v17, v27
	v_cvt_f32_i32_e32 v27, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v30, v24, v26
	v_sub_f32_e32 v21, v21, v30
	v_dual_sub_f32 v25, v22, v28 :: v_dual_add_f32 v16, v16, v23
	v_cvt_f32_i32_e32 v23, s17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v22, v22, v25
	v_sub_f32_e32 v20, v20, v25
	v_add_f32_e32 v16, v24, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v22, v28, v22 :: v_dual_add_f32 v25, v29, v16
	v_sub_f32_e32 v24, v24, v30
	v_add_f32_e32 v20, v20, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v24, v26, v24
	v_cvt_f32_i32_e32 v26, s19
	v_dual_add_f32 v20, v20, v17 :: v_dual_add_f32 v21, v21, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v24, null, v26, v26, v23
	v_add_f32_e32 v28, v31, v20
	v_sub_f32_e32 v22, v25, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v30, v24
	v_add_f32_e32 v33, v28, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v22, v16, v22
	v_mul_f64 v[16:17], v[18:19], v[14:15]
	v_dual_sub_f32 v31, v28, v31 :: v_dual_mul_f32 v34, 0, v28
	v_cmp_class_f32_e64 s2, v33, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v21, v21, v22
	v_div_scale_f32 v22, null, v27, v27, 0x43b40000
	v_sub_f32_e32 v20, v20, v31
	v_div_scale_f32 v31, s1, 0x43b40000, v27, 0x43b40000
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v29, v25, v21
	v_rcp_f32_e32 v32, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v34, 2.0, v20
	v_div_scale_f32 v20, vcc_lo, v23, v26, v23
	v_sub_f32_e32 v25, v29, v25
	v_mul_f32_e32 v36, 0, v29
	v_add_f32_e32 v35, v29, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v21, v21, v25
	v_fmac_f32_e32 v36, 2.0, v21
	v_fma_f32 v21, -v24, v30, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v30, v21, v30
	v_fma_f64 v[12:13], -v[12:13], v[16:17], v[18:19]
	v_mul_f32_e32 v19, v20, v30
	v_fma_f32 v25, v28, 2.0, -v33
	v_fma_f32 v28, v29, 2.0, -v35
	v_fma_f32 v29, -v22, v32, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v39, -v24, v19, v20
	v_dual_add_f32 v25, v25, v34 :: v_dual_add_f32 v28, v28, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v32, v29, v32 :: v_dual_fmac_f32 v19, v39, v30
	v_dual_add_f32 v34, v33, v25 :: v_dual_add_f32 v21, v35, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v36, v31, v32
	v_fma_f32 v20, -v24, v19, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v29, v34, v33, s2
	v_cmp_class_f32_e64 s2, v35, 0x204
	v_fma_f32 v40, -v22, v36, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v19, v20, v30, v19
	s_mov_b32 vcc_lo, s1
	v_cndmask_b32_e64 v18, v21, v35, s2
	v_cmp_eq_f32_e64 s2, 0x42b17218, v29
	v_fmac_f32_e32 v36, v40, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v37, 0, 0x37000000, s2
	v_cmp_eq_f32_e64 s2, 0x42b17218, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v22, -v22, v36, v31
	v_sub_f32_e32 v41, v29, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v38, 0, 0x37000000, s2
	v_div_fmas_f32 v22, v22, v32, v36
	s_mov_b32 vcc_lo, s0
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v6|
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v39, 0x3fb8aa3b, v41 :: v_dual_sub_f32 v42, v18, v38
	v_div_fmas_f64 v[12:13], v[12:13], v[14:15], v[16:17]
	v_sub_f32_e32 v14, v34, v33
	v_sub_f32_e32 v16, v21, v35
	v_fma_f32 v24, 0x3fb8aa3b, v41, -v39
	v_mul_f32_e32 v40, 0x3fb8aa3b, v42
	v_rndne_f32_e32 v31, v39
	v_sub_f32_e32 v14, v25, v14
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v29|
	v_fmac_f32_e32 v24, 0x32a5705f, v41
	v_fma_f32 v43, 0x3fb8aa3b, v42, -v40
	v_rndne_f32_e32 v44, v40
	v_sub_f32_e32 v20, v39, v31
	v_sub_f32_e32 v16, v28, v16
	v_cndmask_b32_e32 v14, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v43, 0x32a5705f, v42 :: v_dual_sub_f32 v30, v40, v44
	v_add_f32_e32 v20, v20, v24
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v18|
	v_cvt_i32_f32_e32 v21, v44
	v_add_f32_e32 v14, v37, v14
	v_add_f32_e32 v24, v30, v43
	v_exp_f32_e32 v15, v20
	v_cvt_i32_f32_e32 v20, v31
	v_cndmask_b32_e32 v16, 0, v16, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v41
	v_exp_f32_e32 v17, v24
	s_add_i32 s2, s19, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f32_e32 v16, v38, v16
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v15, v15, v20
	v_ldexp_f32 v17, v17, v21
	v_cndmask_b32_e32 v15, 0, v15, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v42
	v_div_fixup_f64 v[8:9], v[12:13], v[10:11], v[8:9]
	v_cvt_f32_f64_e32 v10, v[2:3]
	v_cndmask_b32_e32 v17, 0, v17, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v41
	v_cndmask_b32_e32 v15, 0x7f800000, v15, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f32 v14, v15, v14, v15
	v_cndmask_b32_e32 v17, 0x7f800000, v17, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v15
	v_fma_f32 v16, v17, v16, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v14, v14, v15, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v17
	v_cndmask_b32_e64 v6, 0x7f800000, |v14|, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v15, v16, v17, vcc_lo
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v5|
	v_cndmask_b32_e64 v5, 0x7f800000, |v15|, s0
	v_cvt_f32_f64_e32 v8, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v6, v5
	v_mul_f32_e32 v6, 0x4f800000, v5
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_sqrt_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v2, -1, v6
	v_add_nc_u32_e32 v3, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, -v2, v6, v5
	v_fma_f32 v9, -v3, v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v11
	v_cndmask_b32_e64 v2, v6, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v9
	v_cndmask_b32_e64 v2, v2, v3, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, 0x37800000, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v5, 0x260
	v_div_fixup_f32 v3, v19, v26, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, 0, v4
	v_div_fixup_f32 v5, v22, v27, 0x43b40000
	v_div_scale_f32 v6, null, v3, v3, v2
	v_cndmask_b32_e32 v4, 0x38d1b717, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v9, null, v5, v5, v10
	v_div_scale_f32 v16, vcc_lo, v2, v3, v2
	v_add_f32_e32 v4, v4, v7
	v_rcp_f32_e32 v7, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v11, v9
	v_div_scale_f32 v12, null, v8, v8, v4
	v_div_scale_f32 v18, s1, v4, v8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v13, v12
	v_fma_f32 v14, -v6, v7, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v9, v11, 1.0
	v_fmac_f32_e32 v7, v14, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v11, v15, v11
	v_div_scale_f32 v14, s0, v10, v5, v10
	v_fma_f32 v17, -v12, v13, 1.0
	v_mul_f32_e32 v15, v16, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, v17, v13
	v_fma_f32 v19, -v6, v15, v16
	v_mul_f32_e32 v17, v14, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v20, v18, v13 :: v_dual_fmac_f32 v15, v19, v7
	v_fma_f32 v21, -v9, v17, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v19, -v12, v20, v18
	v_fma_f32 v6, -v6, v15, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v17, v21, v11 :: v_dual_fmac_f32 v20, v19, v13
	v_div_fmas_f32 v6, v6, v7, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v9, -v9, v17, v14
	s_mov_b32 vcc_lo, s0
	v_fma_f32 v7, -v12, v20, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v6, v6, v3, v2
	v_div_fmas_f32 v9, v9, v11, v17
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v7, v7, v13, v20
	v_floor_f32_e32 v6, v6
	v_add_co_u32 v2, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fixup_f32 v7, v7, v8, v4
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_cvt_i32_f32_e32 v6, v6
	v_div_fixup_f32 v9, v9, v5, v10
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_floor_f32_e32 v7, v7
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s19, v6
	v_floor_f32_e32 v8, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_i32_f32_e32 v7, v7
	v_cndmask_b32_e32 v6, s2, v6, vcc_lo
	v_cvt_i32_f32_e32 v8, v8
	global_store_b32 v[2:3], v7, off
	global_store_b32 v[4:5], v6, off
	global_store_b32 v[0:1], v8, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB0_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13point2gridmapPfPiS0_S0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 45
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13point2gridmapPfPiS0_S0_iiiiii, .Lfunc_end0-_Z13point2gridmapPfPiS0_S0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4168
; NumSgprs: 22
; NumVgprs: 45
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 45
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13point2gridmapPfPiS0_S0_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z13point2gridmapPfPiS0_S0_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     45
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
