﻿#include <iostream>
#include <vector>
#include <complex>
#include <cuComplex.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

// Функция освобождения памяти GPU (device_pointer_input — указатель на входное поле, device_pointer_output — на выходное поле (результат), device_pointer_x1 — на вектор x, device_pointer_x2 — на вектор y, device_pointer_x3 — на вектор u или z, device_pointer_x4 — на вектор v, device_pointer_parameters — на вектор параметров преобразования, device_pointer_dimension — на вектор размерностей, device_pointer_progress — на атомарную переменную прогресса процесса)
void freeGPUMemory(cuDoubleComplex* device_pointer_input, cuDoubleComplex* device_pointer_output, double* device_pointer_x1, double* device_pointer_x2, double* device_pointer_x3, double* device_pointer_x4, double* device_pointer_parameters, int* device_pointer_dimension, int* device_pointer_progress) {
    cudaFree(device_pointer_input);
    cudaFree(device_pointer_output);
    cudaFree(device_pointer_x1);
    cudaFree(device_pointer_x2);
    cudaFree(device_pointer_x3);
    cudaFree(device_pointer_x4);
    cudaFree(device_pointer_parameters);
    cudaFree(device_pointer_dimension);
    cudaFree(device_pointer_progress);
}

// Сложение двух CUDA double комплексных чисел (left — число слева, right — справа)
__device__ cuDoubleComplex operator+(const cuDoubleComplex& left, const cuDoubleComplex& right) {
    return cuCadd(left, right);
}

// Сложение двух CUDA double комплексных чисел с присвоением (left — переменная до знака "=", right — после)
__device__ cuDoubleComplex operator+=(cuDoubleComplex& left, const cuDoubleComplex& right) {
    left = left + right;
    return left;
}

// Перемножение двух CUDA double комплексных чисел (left — число слева, right — справа)
__device__ cuDoubleComplex operator*(const cuDoubleComplex& left, const cuDoubleComplex& right) {
    return cuCmul(left, right);
}

// Умножение CUDA double комплексного числа на вещественное double число (left — комплексное CUDA число, right — вещественное double число)
__device__ cuDoubleComplex operator*(const cuDoubleComplex& left, const double& right) {
    return cuCmul(left, make_cuDoubleComplex(right, 0));
}

// Умножение вещественного double числа на CUDA double комплексное число (left — вещественное double число, right — комплексное CUDA число)
__device__ cuDoubleComplex operator*(const double& left, const cuDoubleComplex& right) {
    return cuCmul(make_cuDoubleComplex(left, 0), right);
}

// Экспонента, принимающая в качестве аргумента CUDA double комплексное число
__device__ cuDoubleComplex exp(const cuDoubleComplex& value) {
    return exp(value.x) * make_cuDoubleComplex(cos(value.y), sin(value.y));
}

// Нахождение оптимального количества нитей в блоке (N — количество точек по одной оси)
int getNumberThreads(int N) {
    auto result = static_cast<int>(round(sqrt(N)));
    while (((N % result) != 0) || (result * result > 1024)) {
        result--;
    }
    return result;
}

// Функция отображения прогресса выполнения преобразования (now — сколько сейчас выполнено операций, max — общее кол-во операций)
__device__ void processing(int now, int max) {
    double percent;
    if (now == max) {
        percent = 100.;
    }
    else {
        percent = trunc(10000. * (static_cast<double>(now) / max)) / 100;
    }
    printf("\rВыполнено %2.2f%", percent);
}

// Обобщенное ядро вычисления интеграла Коллинза (output — массив результата (выходное поле), input — входное поле, x1 — вектор x, x2 — вектор y, x3 — вектор u или z, x4 — вектор v, parameters — массив параметров преобразования, dimension — массив размерностей, progress — атомарная переменная прогресса процесса вычисления интеграла Коллинза, transformType (вид преобразования: 0 — дробное преобразование Фурье, 1 — преобразование Френеля, 2 — другое (с заданной определенной ABCD матрицей)), OxyCrossSection (выбранное сечение: 1 — сечение в плоскости Ouv (поперечное), 0 — сечение в плоскости Ovz (продольное)))
__global__ void collinsKernel(cuDoubleComplex* output, const cuDoubleComplex* input, const double* x1, const double* x2, const double* x3, const double* x4, const double* parameters, const int* dimension, int* progress, int transformType, bool OxyCrossSection)
{
    auto pi = 3.14159265358979323846;
    auto q = blockIdx.x * blockDim.x + threadIdx.x;
    auto p = blockIdx.y * blockDim.y + threadIdx.y;
    auto hx = x1[1] - x1[0];
    auto hy = x2[0] - x2[1];
    auto wavelength = parameters[0];
    auto z = OxyCrossSection ? parameters[1] : x3[q];
    auto u = OxyCrossSection ? x3[q] : parameters[1];
    auto f = !transformType ? parameters[2] : 0;
    auto k = 2 * pi / wavelength;
    auto n1 = dimension[0];
    auto n2 = dimension[1];
    auto n3 = OxyCrossSection ? dimension[1] : dimension[2];
    auto A = 0.0;
    auto B = 0.0;
    auto D = 0.0;
    switch (transformType) {
    case 0:
        A = cos(pi * z / (2 * f));
        B = f * sin(pi * z / (2 * f));
        D = cos(pi * z / (2 * f));
        break;
    case 1:
        A = 1.;
        B = z;
        D = 1.;
        break;
    default:
        A = OxyCrossSection ? parameters[1] : parameters[2];
        B = OxyCrossSection ? parameters[2] : parameters[3];
        D = OxyCrossSection ? parameters[3] : parameters[4];
    }
    auto value = make_cuDoubleComplex(0, 0);
    for (auto i = 0; i < n1; i++) {
        for (auto j = 0; j < n1; j++) {
            auto arg = (k / (2 * B)) * (A * (x2[i] * x2[i] + x1[j] * x1[j]) - 2 * (x2[i] * x4[p] + x1[j] * u) + D * (x4[p] * x4[p] + u * u));
            value += input[i * n1 + j] * exp(make_cuDoubleComplex(0, arg));
        }
    }
    atomicAdd(progress, 1);
    processing(*progress, n2 * n3);
    output[p * n3 + q] = make_cuDoubleComplex(0, -(k / (2 * pi * B))) * value * hx * hy;
}

std::vector<std::vector<std::complex<double>>> calculateCollinsCUDA(const std::vector<std::vector<std::complex<double>>>& input, const std::vector<double>& x1, const std::vector<double>& x2, const std::vector<double>& x3, const std::vector<double>& x4, const std::vector<double>& parameters, const std::vector<int>& dimension, int transformType)
{
    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaError_t cudaStatus = cudaSetDevice(0);
    if (cudaStatus != cudaSuccess) {
        throw std::runtime_error("cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
    }

    bool OxyCrossSection = dimension.size() == 3 ? false : true;

    // Allocate GPU buffers for vectors.

    auto n1 = dimension.at(0);
    auto n2 = dimension.at(1);
    auto n3 = OxyCrossSection ? dimension.at(1) : dimension.at(2);

    auto device_output = new cuDoubleComplex[n2 * n3];
    cuDoubleComplex* device_pointer_output = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_output, static_cast<unsigned long long>(n2) * n3 * sizeof(cuDoubleComplex));
    
    auto device_input = new cuDoubleComplex[input.size() * input.at(0).size()];
    for (auto i = 0; i < input.size(); i++) {
        for (auto j = 0; j < input.at(0).size(); j++) {
            device_input[i * n1 + j] = make_cuDoubleComplex(input.at(i).at(j).real(), input.at(i).at(j).imag());
        }
    }
    cuDoubleComplex* device_pointer_input = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_input, static_cast<unsigned long long>(n1) * n1 * sizeof(cuDoubleComplex));
    cudaStatus = cudaMemcpy(device_pointer_input, device_input, static_cast<unsigned long long>(n1) * n1 * sizeof(cuDoubleComplex), cudaMemcpyHostToDevice);
    delete[] device_input;
    
    double* device_pointer_x1 = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_x1, n1 * sizeof(double));
    cudaStatus = cudaMemcpy(device_pointer_x1, x1.data(), n1 * sizeof(double), cudaMemcpyHostToDevice);

    double* device_pointer_x2 = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_x2, n1 * sizeof(double));
    cudaStatus = cudaMemcpy(device_pointer_x2, x2.data(), n1 * sizeof(double), cudaMemcpyHostToDevice);

    double* device_pointer_x3 = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_x3, n3 * sizeof(double));
    cudaStatus = cudaMemcpy(device_pointer_x3, x3.data(), n3 * sizeof(double), cudaMemcpyHostToDevice);

    double* device_pointer_x4 = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_x4, n2 * sizeof(double));
    cudaStatus = cudaMemcpy(device_pointer_x4, x4.data(), n2 * sizeof(double), cudaMemcpyHostToDevice);

    double* device_pointer_parameters = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_parameters, parameters.size() * sizeof(double));
    cudaStatus = cudaMemcpy(device_pointer_parameters, parameters.data(), parameters.size() * sizeof(double), cudaMemcpyHostToDevice);

    int* device_pointer_dimension = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_dimension, dimension.size() * sizeof(int));
    cudaStatus = cudaMemcpy(device_pointer_dimension, dimension.data(), dimension.size() * sizeof(int), cudaMemcpyHostToDevice);
    
    int* device_pointer_progress = 0;
    cudaStatus = cudaMalloc((void**)&device_pointer_progress, sizeof(int));

    // Launch a kernel on the GPU with one thread for each element.
    dim3 threadsPerBlock(getNumberThreads(n3), getNumberThreads(n2));
    dim3 numBlocks(n3 / threadsPerBlock.x, n2 / threadsPerBlock.y);
    collinsKernel<<<numBlocks, threadsPerBlock>>>(device_pointer_output, device_pointer_input, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress, transformType, OxyCrossSection);
    
    // Check for any errors launching the kernel
    cudaStatus = cudaGetLastError();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "\ncollinsKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
        freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);
        throw std::runtime_error("Запуск ядра CUDA не удался!");
    }

    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = cudaDeviceSynchronize();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "\ncudaDeviceSynchronize returned error code %d after launching collinsKernel!\n", cudaStatus);
        freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);
        throw std::runtime_error("Синхронизация данных между хостом и устройством завершилась неудачей!");
    }

    std::cout << "\rВыполнено 100.00%" << std::endl;

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = cudaMemcpy(device_output, device_pointer_output, static_cast<unsigned long long>(n2) * n3 * sizeof(cuDoubleComplex), cudaMemcpyDeviceToHost);
    if (cudaStatus != cudaSuccess) {
        freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);
        throw std::runtime_error("Копирование результата в ОЗУ завершилось неудачей!");
    }

    freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = cudaDeviceReset();
    if (cudaStatus != cudaSuccess) {
        throw std::runtime_error("cudaDeviceReset failed!");
    }

    std::vector<std::vector<std::complex<double>>> result;
    result.reserve(x4.size());
    for (auto i = 0; i < x4.size(); i++) {
        auto row = std::vector<std::complex<double>>();
        row.reserve(x4.size());
        for (auto j = 0; j < x3.size(); j++) {
            row.emplace_back(std::complex<double>(device_output[i * n3 + j].x, device_output[i * n3 + j].y));
        }
        result.emplace_back(row);
    }
    delete[] device_output;

    return result;
}
	.file	"tmpxft_0027a7d2_00000000-6_cuCollins.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4360:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4360:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.isra.0:
.LFB5252:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L3
	movabsq	$576460752303423487, %rax
	cmpq	%rdi, %rax
	jnb	.L4
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$1152921504606846975, %rax
	cmpq	%rdi, %rax
	jnb	.L5
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L5:
	call	_ZSt17__throw_bad_allocv@PLT
.L4:
	.cfi_def_cfa_offset 8
	salq	$4, %rdi
	jmp	_Znwm@PLT
.L3:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5252:
	.size	_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.isra.0
	.align 2
	.type	_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.isra.0:
.LFB5255:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L11
	movabsq	$384307168202282325, %rax
	cmpq	%rdi, %rax
	jnb	.L12
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564650, %rax
	cmpq	%rdi, %rax
	jnb	.L13
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L13:
	call	_ZSt17__throw_bad_allocv@PLT
.L12:
	.cfi_def_cfa_offset 8
	imulq	$24, %rdi, %rdi
	jmp	_Znwm@PLT
.L11:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5255:
	.size	_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.isra.0
	.globl	_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_
	.type	_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_, @function
_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_:
.LFB4322:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r9, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	88(%rsp), %rax
	movq	80(%rsp), %r15
	movq	%rax, (%rsp)
	movq	96(%rsp), %rax
	movq	%rax, 8(%rsp)
	call	cudaFree@PLT
	movq	%r14, %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	cudaFree@PLT
	movq	%r15, %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE4322:
	.size	_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_, .-_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_
	.globl	_ZplRK7double2S1_
	.type	_ZplRK7double2S1_, @function
_ZplRK7double2S1_:
.LFB4323:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4323:
	.size	_ZplRK7double2S1_, .-_ZplRK7double2S1_
	.globl	_ZpLR7double2RKS_
	.type	_ZpLR7double2RKS_, @function
_ZpLR7double2RKS_:
.LFB5245:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE5245:
	.size	_ZpLR7double2RKS_, .-_ZpLR7double2RKS_
	.globl	_ZmlRK7double2S1_
	.type	_ZmlRK7double2S1_, @function
_ZmlRK7double2S1_:
.LFB5247:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE5247:
	.size	_ZmlRK7double2S1_, .-_ZmlRK7double2S1_
	.globl	_ZmlRK7double2RKd
	.type	_ZmlRK7double2RKd, @function
_ZmlRK7double2RKd:
.LFB5249:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE5249:
	.size	_ZmlRK7double2RKd, .-_ZmlRK7double2RKd
	.globl	_ZmlRKdRK7double2
	.type	_ZmlRKdRK7double2, @function
_ZmlRKdRK7double2:
.LFB5251:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE5251:
	.size	_ZmlRKdRK7double2, .-_ZmlRKdRK7double2
	.globl	_Z3expRK7double2
	.type	_Z3expRK7double2, @function
_Z3expRK7double2:
.LFB4328:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4328:
	.size	_Z3expRK7double2, .-_Z3expRK7double2
	.globl	_Z16getNumberThreadsi
	.type	_Z16getNumberThreadsi, @function
_Z16getNumberThreadsi:
.LFB4329:
	.cfi_startproc
	endbr64
	cvtsi2sdl	%edi, %xmm0
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	call	sqrt@PLT
	call	round@PLT
	cvttsd2sil	%xmm0, %ecx
.L32:
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L35
.L33:
	decl	%ecx
	jmp	.L32
.L35:
	movl	%ecx, %eax
	imull	%ecx, %eax
	cmpl	$1024, %eax
	jg	.L33
	movl	%ecx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4329:
	.size	_Z16getNumberThreadsi, .-_Z16getNumberThreadsi
	.globl	_Z10processingii
	.type	_Z10processingii, @function
_Z10processingii:
.LFB4330:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4330:
	.size	_Z10processingii, .-_Z10processingii
	.globl	_Z66__device_stub__Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiibP7double2PKS_PKdS4_S4_S4_S4_PKiPiib
	.type	_Z66__device_stub__Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiibP7double2PKS_PKdS4_S4_S4_S4_PKiPiib, @function
_Z66__device_stub__Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiibP7double2PKS_PKdS4_S4_S4_S4_PKiPiib:
.LFB4382:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	256(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	272(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movl	288(%rsp), %eax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movb	%al, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	88(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 272
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L38:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4382:
	.size	_Z66__device_stub__Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiibP7double2PKS_PKdS4_S4_S4_S4_PKiPiib, .-_Z66__device_stub__Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiibP7double2PKS_PKdS4_S4_S4_S4_PKiPiib
	.globl	_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib
	.type	_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib, @function
_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib:
.LFB4383:
	.cfi_startproc
	endbr64
	movzbl	40(%rsp), %eax
	movl	%eax, 40(%rsp)
	jmp	_Z66__device_stub__Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiibP7double2PKS_PKdS4_S4_S4_S4_PKiPiib
	.cfi_endproc
.LFE4383:
	.size	_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib, .-_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4385:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiib(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4385:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNKSt6vectorIiSaIiEE2atEm.str1.1,"aMS",@progbits,1
.LC1:
	.string	"vector::_M_range_check: __n (which is %zu) >= this->size() (which is %zu)"
	.section	.text._ZNKSt6vectorIiSaIiEE2atEm,"axG",@progbits,_ZNKSt6vectorIiSaIiEE2atEm,comdat
	.align 2
	.weak	_ZNKSt6vectorIiSaIiEE2atEm
	.type	_ZNKSt6vectorIiSaIiEE2atEm, @function
_ZNKSt6vectorIiSaIiEE2atEm:
.LFB4687:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	8(%rdi), %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	cmpq	%rdx, %rsi
	jb	.L46
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	_ZSt24__throw_out_of_range_fmtPKcz@PLT
.L46:
	.cfi_def_cfa_offset 8
	leaq	(%rax,%rsi,4), %rax
	ret
	.cfi_endproc
.LFE4687:
	.size	_ZNKSt6vectorIiSaIiEE2atEm, .-_ZNKSt6vectorIiSaIiEE2atEm
	.section	.text._ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm,"axG",@progbits,_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm,comdat
	.align 2
	.weak	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm
	.type	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm, @function
_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm:
.LFB4689:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	8(%rdi), %rdx
	movabsq	$-6148914691236517205, %rcx
	subq	%rax, %rdx
	sarq	$3, %rdx
	imulq	%rcx, %rdx
	cmpq	%rdx, %rsi
	jb	.L51
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	_ZSt24__throw_out_of_range_fmtPKcz@PLT
.L51:
	.cfi_def_cfa_offset 8
	imulq	$24, %rsi, %rsi
	addq	%rsi, %rax
	ret
	.cfi_endproc
.LFE4689:
	.size	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm, .-_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm
	.section	.text._ZNKSt6vectorISt7complexIdESaIS1_EE2atEm,"axG",@progbits,_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm,comdat
	.align 2
	.weak	_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm
	.type	_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm, @function
_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm:
.LFB4691:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	8(%rdi), %rdx
	subq	%rax, %rdx
	sarq	$4, %rdx
	cmpq	%rdx, %rsi
	jb	.L56
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	_ZSt24__throw_out_of_range_fmtPKcz@PLT
.L56:
	.cfi_def_cfa_offset 8
	salq	$4, %rsi
	addq	%rsi, %rax
	ret
	.cfi_endproc
.LFE4691:
	.size	_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm, .-_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm
	.section	.text._ZNSt6vectorISt7complexIdESaIS1_EED2Ev,"axG",@progbits,_ZNSt6vectorISt7complexIdESaIS1_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorISt7complexIdESaIS1_EED2Ev
	.type	_ZNSt6vectorISt7complexIdESaIS1_EED2Ev, @function
_ZNSt6vectorISt7complexIdESaIS1_EED2Ev:
.LFB4725:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L60
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L60:
	ret
	.cfi_endproc
.LFE4725:
	.size	_ZNSt6vectorISt7complexIdESaIS1_EED2Ev, .-_ZNSt6vectorISt7complexIdESaIS1_EED2Ev
	.weak	_ZNSt6vectorISt7complexIdESaIS1_EED1Ev
	.set	_ZNSt6vectorISt7complexIdESaIS1_EED1Ev,_ZNSt6vectorISt7complexIdESaIS1_EED2Ev
	.text
	.type	_ZSt14__relocate_a_1IPSt6vectorISt7complexIdESaIS2_EES5_SaIS4_EET0_T_S8_S7_RT1_.isra.0, @function
_ZSt14__relocate_a_1IPSt6vectorISt7complexIdESaIS2_EES5_SaIS4_EET0_T_S8_S7_RT1_.isra.0:
.LFB5265:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
.L63:
	cmpq	%r12, %rbx
	je	.L66
	movq	(%rbx), %rax
	movq	%rbx, %rdi
	addq	$24, %rbp
	addq	$24, %rbx
	movq	%rax, -24(%rbp)
	movq	-16(%rbx), %rax
	movq	%rax, -16(%rbp)
	movq	-8(%rbx), %rax
	movq	%rax, -8(%rbp)
	xorl	%eax, %eax
	movq	%rax, -8(%rbx)
	movq	%rax, -16(%rbx)
	movq	%rax, -24(%rbx)
	call	_ZNSt6vectorISt7complexIdESaIS1_EED1Ev
	jmp	.L63
.L66:
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5265:
	.size	_ZSt14__relocate_a_1IPSt6vectorISt7complexIdESaIS2_EES5_SaIS4_EET0_T_S8_S7_RT1_.isra.0, .-_ZSt14__relocate_a_1IPSt6vectorISt7complexIdESaIS2_EES5_SaIS4_EET0_T_S8_S7_RT1_.isra.0
	.section	.text._ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_,"axG",@progbits,_ZNSt6vectorISt7complexIdESaIS1_EEC5ERKS3_,comdat
	.align 2
	.weak	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
	.type	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_, @function
_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_:
.LFB5144:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	8(%rsi), %r12
	movq	%rdi, %rbx
	subq	(%rsi), %r12
	movq	%rax, (%rdi)
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	movq	%r12, %rdi
	sarq	$4, %rdi
	call	_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.isra.0
	xorl	%edx, %edx
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	movq	0(%rbp), %rsi
	movq	8(%rbp), %rcx
	subq	%rsi, %rcx
.L68:
	cmpq	%rdx, %rcx
	je	.L71
	movsd	(%rsi,%rdx), %xmm0
	movsd	%xmm0, (%rax,%rdx)
	movsd	8(%rsi,%rdx), %xmm0
	movsd	%xmm0, 8(%rax,%rdx)
	addq	$16, %rdx
	jmp	.L68
.L71:
	addq	%rcx, %rax
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5144:
	.size	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_, .-_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
	.weak	_ZNSt6vectorISt7complexIdESaIS1_EEC1ERKS3_
	.set	_ZNSt6vectorISt7complexIdESaIS1_EEC1ERKS3_,_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
	.section	.rodata._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_.str1.1,"aMS",@progbits,1
.LC2:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.type	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_, @function
_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_:
.LFB4928:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4928
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	movq	%rdx, %rsi
	movabsq	$-6148914691236517205, %rdx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movabsq	$384307168202282325, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %r15
	movq	(%rdi), %r13
	movq	%r15, %rax
	subq	%r13, %rax
	sarq	$3, %rax
	imulq	%rdx, %rax
	cmpq	%rbx, %rax
	jne	.L73
	leaq	.LC2(%rip), %rdi
.LEHB0:
	call	_ZSt20__throw_length_errorPKc@PLT
.L73:
	cmpq	%r13, %r15
	movl	$1, %edx
	movq	%rdi, %r12
	cmovne	%rax, %rdx
	addq	%rdx, %rax
	jc	.L77
	movabsq	$384307168202282325, %rbx
	cmpq	%rbx, %rax
	cmovbe	%rax, %rbx
.L77:
	movq	%r14, %rax
	movq	%rbx, %rdi
	movq	%rsi, 8(%rsp)
	subq	%r13, %rax
	movq	%rax, (%rsp)
	call	_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.isra.0
.LEHE0:
	movq	8(%rsp), %rsi
	movq	%rax, %rbp
	movq	(%rsp), %rax
	addq	%rbp, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
.LEHB1:
	call	_ZNSt6vectorISt7complexIdESaIS1_EEC1ERKS3_
.LEHE1:
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movq	%r13, %rdi
	call	_ZSt14__relocate_a_1IPSt6vectorISt7complexIdESaIS2_EES5_SaIS4_EET0_T_S8_S7_RT1_.isra.0
	movq	%r14, %rdi
	movq	%r15, %rsi
	leaq	24(%rax), %rdx
	call	_ZSt14__relocate_a_1IPSt6vectorISt7complexIdESaIS2_EES5_SaIS4_EET0_T_S8_S7_RT1_.isra.0
	movq	%rax, %r14
	testq	%r13, %r13
	je	.L78
	movq	16(%r12), %rsi
	movq	%r13, %rdi
	subq	%r13, %rsi
	call	_ZdlPvm@PLT
.L78:
	imulq	$24, %rbx, %rbx
	movq	%rbp, (%r12)
	movq	%r14, 8(%r12)
	addq	%rbp, %rbx
	movq	%rbx, 16(%r12)
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
.L85:
	.cfi_restore_state
	endbr64
	movq	%rax, %rdi
.L79:
	call	__cxa_begin_catch@PLT
	testq	%rbp, %rbp
	jne	.L80
	movq	(%rsp), %rdi
	call	_ZNSt6vectorISt7complexIdESaIS1_EED1Ev
.L82:
.LEHB2:
	call	__cxa_rethrow@PLT
.LEHE2:
.L86:
	endbr64
	movq	%rax, %rbx
.L81:
	call	__cxa_end_catch@PLT
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L80:
	imulq	$24, %rbx, %rsi
	movq	%rbp, %rdi
	call	_ZdlPvm@PLT
	jmp	.L82
	.cfi_endproc
.LFE4928:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"aG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.align 4
.LLSDA4928:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT4928-.LLSDATTD4928
.LLSDATTD4928:
	.byte	0x1
	.uleb128 .LLSDACSE4928-.LLSDACSB4928
.LLSDACSB4928:
	.uleb128 .LEHB0-.LFB4928
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4928
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L85-.LFB4928
	.uleb128 0x1
	.uleb128 .LEHB2-.LFB4928
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L86-.LFB4928
	.uleb128 0
	.uleb128 .LEHB3-.LFB4928
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4928:
	.byte	0x1
	.byte	0
	.align 4
	.long	0

.LLSDATT4928:
	.section	.text._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.size	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_, .-_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.section	.rodata.str1.1
.LC3:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC4:
	.string	"\ncollinsKernel launch failed: %s\n"
.LC5:
	.string	"\320\227\320\260\320\277\321\203\321\201\320\272 \321\217\320\264\321\200\320\260 CUDA \320\275\320\265 \321\203\320\264\320\260\320\273\321\201\321\217!"
.LC6:
	.string	"\ncudaDeviceSynchronize returned error code %d after launching collinsKernel!\n"
.LC7:
	.string	"\320\241\320\270\320\275\321\205\321\200\320\276\320\275\320\270\320\267\320\260\321\206\320\270\321\217 \320\264\320\260\320\275\320\275\321\213\321\205 \320\274\320\265\320\266\320\264\321\203 \321\205\320\276\321\201\321\202\320\276\320\274 \320\270 \321\203\321\201\321\202\321\200\320\276\320\271\321\201\321\202\320\262\320\276\320\274 \320\267\320\260\320\262\320\265\321\200\321\210\320\270\320\273\320\260\321\201\321\214 \320\275\320\265\321\203\320\264\320\260\321\207\320\265\320\271!"
.LC8:
	.string	"\r\320\222\321\213\320\277\320\276\320\273\320\275\320\265\320\275\320\276 100.00%"
.LC9:
	.string	"\320\232\320\276\320\277\320\270\321\200\320\276\320\262\320\260\320\275\320\270\320\265 \321\200\320\265\320\267\321\203\320\273\321\214\321\202\320\260\321\202\320\260 \320\262 \320\236\320\227\320\243 \320\267\320\260\320\262\320\265\321\200\321\210\320\270\320\273\320\276\321\201\321\214 \320\275\320\265\321\203\320\264\320\260\321\207\320\265\320\271!"
.LC10:
	.string	"cudaDeviceReset failed!"
.LC11:
	.string	"vector::reserve"
	.text
	.globl	_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi
	.type	_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi, @function
_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi:
.LFB4331:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4331
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	xorl	%edi, %edi
	subq	$264, %rsp
	.cfi_def_cfa_offset 320
	movq	%rdx, 104(%rsp)
	movq	320(%rsp), %r15
	movq	%rcx, 112(%rsp)
	movq	328(%rsp), %rbp
	movq	%r8, 56(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
.LEHB4:
	call	cudaSetDevice@PLT
.LEHE4:
	movl	%eax, 32(%rsp)
	testl	%eax, %eax
	je	.L93
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB5:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE5:
	jmp	.L178
.L93:
	xorl	%esi, %esi
	movq	8(%rbp), %rax
	movq	%rbp, %rdi
	subq	0(%rbp), %rax
	movq	%rax, 96(%rsp)
.LEHB6:
	call	_ZNKSt6vectorIiSaIiEE2atEm
	movl	$1, %esi
	movq	%rbp, %rdi
	movl	(%rax), %eax
	movl	%eax, 92(%rsp)
	call	_ZNKSt6vectorIiSaIiEE2atEm
	cmpq	$12, 96(%rsp)
	movl	$1, %esi
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	jne	.L176
	movl	$2, %esi
.L176:
	movabsq	$576460752303423487, %r14
	movq	%rbp, %rdi
	call	_ZNKSt6vectorIiSaIiEE2atEm
	movl	(%rax), %eax
	movl	%eax, 88(%rsp)
	movl	16(%rsp), %eax
	movl	88(%rsp), %edi
	imull	%eax, %edi
	movslq	%edi, %rdi
	cmpq	%rdi, %r14
	jb	.L97
	salq	$4, %rdi
	call	_Znam@PLT
	xorl	%esi, %esi
	leaq	128(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movslq	16(%rsp), %rax
	movq	%rsi, 128(%rsp)
	movq	%rax, 64(%rsp)
	movslq	88(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	64(%rsp), %rax
	movq	72(%rsp), %rcx
	imulq	%rcx, %rax
	salq	$4, %rax
	movq	%rax, %rsi
	movq	%rax, 80(%rsp)
	call	cudaMalloc@PLT
	movq	8(%r12), %r13
	subq	(%r12), %r13
	xorl	%esi, %esi
	movabsq	$-6148914691236517205, %rax
	movq	%r12, %rdi
	sarq	$3, %r13
	imulq	%rax, %r13
	call	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm
	movq	8(%rax), %rdi
	subq	(%rax), %rdi
	sarq	$4, %rdi
	imulq	%r13, %rdi
	cmpq	%rdi, %r14
	jnb	.L98
.L97:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L174
	call	__cxa_throw_bad_array_new_length@PLT
.L98:
	salq	$4, %rdi
	call	_Znam@PLT
	xorl	%ecx, %ecx
	movq	%rax, 48(%rsp)
	movq	%rcx, 24(%rsp)
.L100:
	movabsq	$-6148914691236517205, %rcx
	movq	8(%r12), %rax
	subq	(%r12), %rax
	sarq	$3, %rax
	imulq	%rcx, %rax
	cmpq	%rax, 24(%rsp)
	jnb	.L102
	movslq	32(%rsp), %r13
	movq	48(%rsp), %rax
	xorl	%r14d, %r14d
	salq	$4, %r13
	addq	%rax, %r13
.L103:
	xorl	%esi, %esi
	movq	%r12, %rdi
	call	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm
	movq	8(%rax), %rdx
	subq	(%rax), %rdx
	movq	%rdx, %rax
	sarq	$4, %rax
	cmpq	%rax, %r14
	jnb	.L180
	movq	24(%rsp), %rsi
	movq	%r12, %rdi
	addq	$16, %r13
	call	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm
	movq	24(%rsp), %rsi
	movq	%r12, %rdi
	movsd	8(%rax), %xmm0
	movsd	%xmm0, 120(%rsp)
	call	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm
	movq	%r14, %rsi
	incq	%r14
	movq	%rax, %rdi
	call	_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm
	movsd	120(%rsp), %xmm0
	movsd	(%rax), %xmm1
	movsd	%xmm0, -8(%r13)
	movsd	%xmm1, -16(%r13)
	jmp	.L103
.L180:
	movl	92(%rsp), %ecx
	incq	24(%rsp)
	addl	%ecx, 32(%rsp)
	jmp	.L100
.L102:
	movslq	92(%rsp), %r12
	xorl	%r13d, %r13d
	leaq	136(%rsp), %rdi
	xorl	%r14d, %r14d
	movq	%r13, 136(%rsp)
	movq	%r12, %r13
	imulq	%r12, %r13
	salq	$3, %r12
	salq	$4, %r13
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	%r13, %rdx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rsi
	leaq	144(%rsp), %rdi
	movq	%r14, 144(%rsp)
	call	cudaMalloc@PLT
	movq	104(%rsp), %rax
	movq	%r12, %rdx
	movq	144(%rsp), %rdi
	movl	$1, %ecx
	movq	(%rax), %rsi
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movq	%r12, %rsi
	leaq	152(%rsp), %rdi
	movq	%rax, 152(%rsp)
	call	cudaMalloc@PLT
	movq	112(%rsp), %rax
	movq	%r12, %rdx
	movq	152(%rsp), %rdi
	movl	$1, %ecx
	movq	(%rax), %rsi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %r12
	xorl	%eax, %eax
	leaq	160(%rsp), %rdi
	movq	%rax, 160(%rsp)
	salq	$3, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rax
	movq	%r12, %rdx
	movq	160(%rsp), %rdi
	movl	$1, %ecx
	movq	(%rax), %rsi
	call	cudaMemcpy@PLT
	movq	64(%rsp), %r12
	xorl	%eax, %eax
	leaq	168(%rsp), %rdi
	movq	%rax, 168(%rsp)
	salq	$3, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rax
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	168(%rsp), %rdi
	movq	(%rax), %rsi
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movq	8(%r15), %rsi
	subq	(%r15), %rsi
	leaq	176(%rsp), %rdi
	movq	%rax, 176(%rsp)
	call	cudaMalloc@PLT
	movq	(%r15), %rsi
	movq	8(%r15), %rdx
	movl	$1, %ecx
	movq	176(%rsp), %rdi
	subq	%rsi, %rdx
	call	cudaMemcpy@PLT
	movq	8(%rbp), %rsi
	xorl	%eax, %eax
	subq	0(%rbp), %rsi
	leaq	184(%rsp), %rdi
	movq	%rax, 184(%rsp)
	call	cudaMalloc@PLT
	movq	0(%rbp), %rsi
	movq	8(%rbp), %rdx
	movl	$1, %ecx
	movq	184(%rsp), %rdi
	subq	%rsi, %rdx
	call	cudaMemcpy@PLT
	xorl	%edx, %edx
	movl	$4, %esi
	leaq	192(%rsp), %rdi
	movq	%rdx, 192(%rsp)
	call	cudaMalloc@PLT
	movl	16(%rsp), %edi
	call	_Z16getNumberThreadsi
	movl	88(%rsp), %edi
	movl	%eax, %ebp
	call	_Z16getNumberThreadsi
	xorl	%edx, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, %ecx
	movl	88(%rsp), %eax
	movl	%ebp, 204(%rsp)
	movl	$1, %esi
	movl	%ecx, 200(%rsp)
	divl	%ecx
	movl	$1, 208(%rsp)
	movl	$1, 220(%rsp)
	xorl	%edx, %edx
	movl	$1, %ecx
	movl	%eax, 212(%rsp)
	movl	16(%rsp), %eax
	divl	%ebp
	movq	200(%rsp), %rdx
	movl	%eax, 216(%rsp)
	movq	212(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L104
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 328
	cmpq	$12, 104(%rsp)
	setne	%al
	pushq	%rax
	.cfi_def_cfa_offset 336
	movl	352(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 344
	pushq	216(%rsp)
	.cfi_def_cfa_offset 352
	pushq	216(%rsp)
	.cfi_def_cfa_offset 360
	pushq	216(%rsp)
	.cfi_def_cfa_offset 368
	movq	216(%rsp), %r9
	movq	208(%rsp), %r8
	movq	200(%rsp), %rcx
	movq	192(%rsp), %rdx
	movq	184(%rsp), %rsi
	movq	176(%rsp), %rdi
	call	_Z66__device_stub__Z13collinsKernelP7double2PKS_PKdS4_S4_S4_S4_PKiPiibP7double2PKS_PKdS4_S4_S4_S4_PKiPiib
	addq	$48, %rsp
	.cfi_def_cfa_offset 320
.L104:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L105
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	pushq	%rbp
	.cfi_def_cfa_offset 328
	pushq	200(%rsp)
	.cfi_def_cfa_offset 336
	pushq	200(%rsp)
	.cfi_def_cfa_offset 344
	pushq	200(%rsp)
	.cfi_def_cfa_offset 352
	movq	160(%rsp), %rsi
	movq	200(%rsp), %r9
	movq	192(%rsp), %r8
	movq	184(%rsp), %rcx
	movq	176(%rsp), %rdx
	movq	168(%rsp), %rdi
	call	_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_
.LEHE6:
	movl	$16, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
	call	__cxa_allocate_exception@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB7:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE7:
	jmp	.L178
.L105:
.LEHB8:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ecx
	testl	%eax, %eax
	je	.L107
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	pushq	%rbx
	.cfi_def_cfa_offset 328
	pushq	200(%rsp)
	.cfi_def_cfa_offset 336
	pushq	200(%rsp)
	.cfi_def_cfa_offset 344
	pushq	200(%rsp)
	.cfi_def_cfa_offset 352
	movq	160(%rsp), %rsi
	movq	200(%rsp), %r9
	movq	192(%rsp), %r8
	movq	184(%rsp), %rcx
	movq	176(%rsp), %rdx
	movq	168(%rsp), %rdi
	call	_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_
.LEHE8:
	movl	$16, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
	call	__cxa_allocate_exception@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB9:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE9:
	jmp	.L178
.L107:
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB10:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	80(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	$2, %ecx
	movq	128(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	136(%rsp), %rdi
	movq	144(%rsp), %rdx
	testl	%eax, %eax
	movq	152(%rsp), %rcx
	movq	160(%rsp), %r8
	movq	168(%rsp), %r9
	movq	128(%rsp), %rsi
	je	.L109
	pushq	%r11
	.cfi_def_cfa_offset 328
	pushq	200(%rsp)
	.cfi_def_cfa_offset 336
	pushq	200(%rsp)
	.cfi_def_cfa_offset 344
	pushq	200(%rsp)
	.cfi_def_cfa_offset 352
	call	_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_
.LEHE10:
	movl	$16, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
	call	__cxa_allocate_exception@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB11:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE11:
	jmp	.L178
.L109:
	pushq	%r10
	.cfi_def_cfa_offset 328
	pushq	200(%rsp)
	.cfi_def_cfa_offset 336
	pushq	200(%rsp)
	.cfi_def_cfa_offset 344
	pushq	200(%rsp)
	.cfi_def_cfa_offset 352
.LEHB12:
	call	_Z13freeGPUMemoryP7double2S0_PdS1_S1_S1_S1_PiS2_
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
	call	cudaDeviceReset@PLT
.LEHE12:
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L111
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB13:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE13:
.L178:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L174
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB14:
	call	__cxa_throw@PLT
.LEHE14:
.L111:
	movq	8(%rsp), %rax
	xorl	%esi, %esi
	movq	%rsi, (%rbx)
	movq	8(%rax), %rbp
	subq	(%rax), %rbp
	movq	%rsi, 8(%rbx)
	movabsq	$3074457345618258600, %rax
	movq	%rsi, 16(%rbx)
	cmpq	%rbp, %rax
	jnb	.L113
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L174
	leaq	.LC11(%rip), %rdi
.LEHB15:
	call	_ZSt20__throw_length_errorPKc@PLT
.L113:
	testq	%rbp, %rbp
	je	.L115
	sarq	$3, %rbp
	movq	%rbp, %rdi
	call	_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.isra.0
.LEHE15:
	movq	(%rbx), %rdi
	movq	8(%rbx), %rsi
	movq	%rax, %rdx
	movq	%rax, %r12
	call	_ZSt14__relocate_a_1IPSt6vectorISt7complexIdESaIS2_EES5_SaIS4_EET0_T_S8_S7_RT1_.isra.0
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.L116
	movq	16(%rbx), %rsi
	subq	%rdi, %rsi
	call	_ZdlPvm@PLT
.L116:
	imulq	$24, %rbp, %rbp
	movq	%r12, (%rbx)
	movq	%r12, 8(%rbx)
	addq	%rbp, %r12
	movq	%r12, 16(%rbx)
.L115:
	xorl	%ecx, %ecx
	movq	%rcx, 32(%rsp)
.L117:
	movq	8(%rsp), %rax
	movq	8(%rsp), %rcx
	movq	8(%rax), %rax
	subq	(%rcx), %rax
	movq	%rax, %rbp
	sarq	$3, %rbp
	cmpq	%rbp, 32(%rsp)
	jnb	.L181
	movabsq	$4611686018427387896, %rcx
	xorl	%edx, %edx
	movq	%rdx, 224(%rsp)
	movq	%rdx, 232(%rsp)
	movq	%rdx, 240(%rsp)
	cmpq	%rax, %rcx
	jnb	.L118
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L174
	leaq	.LC11(%rip), %rdi
.LEHB16:
	call	_ZSt20__throw_length_errorPKc@PLT
.L118:
	movq	%rbp, %rdi
	call	_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.isra.0
	salq	$4, %rbp
	movq	%rax, 224(%rsp)
	movslq	%r14d, %r12
	movq	%rax, 232(%rsp)
	addq	%rbp, %rax
	salq	$4, %r12
	movq	%rax, 240(%rsp)
	movq	40(%rsp), %rax
	addq	%rax, %r12
	xorl	%eax, %eax
	movq	%rax, 72(%rsp)
.L120:
	movq	56(%rsp), %rax
	movq	56(%rsp), %rcx
	movq	8(%rax), %rax
	subq	(%rcx), %rax
	sarq	$3, %rax
	cmpq	%rax, 72(%rsp)
	jnb	.L182
	movsd	(%r12), %xmm2
	movsd	8(%r12), %xmm3
	movq	240(%rsp), %rax
	movq	232(%rsp), %rbp
	movsd	%xmm2, 48(%rsp)
	movq	%rax, 24(%rsp)
	movsd	%xmm3, 64(%rsp)
	cmpq	%rax, %rbp
	je	.L121
	movsd	%xmm2, 0(%rbp)
	addq	$16, %rbp
	movsd	%xmm3, -8(%rbp)
	movq	%rbp, 232(%rsp)
	jmp	.L122
.L121:
	movq	224(%rsp), %r13
	movq	%rbp, %r15
	movabsq	$576460752303423487, %rcx
	subq	%r13, %r15
	movq	%r15, %rax
	sarq	$4, %rax
	cmpq	%rcx, %rax
	jne	.L123
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L174
	leaq	.LC2(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L123:
	cmpq	%r13, %rbp
	movl	$1, %edx
	movabsq	$576460752303423487, %rcx
	cmovne	%rax, %rdx
	movq	%rcx, 16(%rsp)
	addq	%rdx, %rax
	jc	.L128
	movq	%rcx, %rdx
	cmpq	%rcx, %rax
	cmovbe	%rax, %rdx
	movq	%rdx, 16(%rsp)
.L128:
	movq	16(%rsp), %rdi
	call	_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.isra.0
	movsd	48(%rsp), %xmm6
	movsd	64(%rsp), %xmm7
	movq	%rax, %rcx
	movq	%r13, %rdx
	movsd	%xmm6, (%rax,%r15)
	movsd	%xmm7, 8(%rax,%r15)
.L129:
	addq	$16, %rcx
	cmpq	%rdx, %rbp
	je	.L183
	movsd	(%rdx), %xmm0
	addq	$16, %rdx
	movsd	%xmm0, -16(%rcx)
	movsd	-8(%rdx), %xmm0
	movsd	%xmm0, -8(%rcx)
	jmp	.L129
.L183:
	subq	%r13, %rbp
	leaq	16(%rax,%rbp), %rbp
	testq	%r13, %r13
	je	.L131
	movq	24(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rax, 48(%rsp)
	subq	%r13, %rsi
	call	_ZdlPvm@PLT
	movq	48(%rsp), %rax
.L131:
	movq	16(%rsp), %rdx
	movq	%rax, 224(%rsp)
	movq	%rbp, 232(%rsp)
	salq	$4, %rdx
	addq	%rdx, %rax
	movq	%rax, 240(%rsp)
.L122:
	incq	72(%rsp)
	addq	$16, %r12
	jmp	.L120
.L182:
	movq	8(%rbx), %rdi
	cmpq	16(%rbx), %rdi
	leaq	224(%rsp), %rbp
	je	.L133
	movq	%rbp, %rsi
	call	_ZNSt6vectorISt7complexIdESaIS1_EEC1ERKS3_
	addq	$24, 8(%rbx)
	jmp	.L134
.L133:
	movq	%rdi, %rsi
	movq	%rbp, %rdx
	movq	%rbx, %rdi
	call	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
.LEHE16:
.L134:
	movq	%rbp, %rdi
	call	_ZNSt6vectorISt7complexIdESaIS1_EED1Ev
	movl	88(%rsp), %eax
	incq	32(%rsp)
	addl	%eax, %r14d
	jmp	.L117
.L181:
	movq	40(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L152
	jmp	.L174
.L155:
	endbr64
	jmp	.L179
.L156:
	endbr64
	jmp	.L179
.L157:
	endbr64
	jmp	.L179
.L158:
	endbr64
	jmp	.L179
.L159:
	endbr64
.L179:
	movq	%rax, %rbp
.L144:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	jmp	.L150
.L161:
	endbr64
	movq	%rax, %rbp
.L146:
	leaq	224(%rsp), %rdi
	call	_ZNSt6vectorISt7complexIdESaIS1_EED1Ev
	jmp	.L147
.L160:
	endbr64
	movq	%rax, %rbp
.L147:
	movq	8(%rbx), %r13
	movq	(%rbx), %r12
.L148:
	cmpq	%r12, %r13
	je	.L184
	movq	%r12, %rdi
	addq	$24, %r12
	call	_ZNSt6vectorISt7complexIdESaIS1_EED1Ev
	jmp	.L148
.L184:
	movq	(%rbx), %rdi
	movq	16(%rbx), %rsi
	subq	%rdi, %rsi
	testq	%rdi, %rdi
	je	.L150
	call	_ZdlPvm@PLT
.L150:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L174
	movq	%rbp, %rdi
.LEHB17:
	call	_Unwind_Resume@PLT
.LEHE17:
.L174:
	call	__stack_chk_fail@PLT
.L152:
	addq	$264, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4331:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4331:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4331-.LLSDACSB4331
.LLSDACSB4331:
	.uleb128 .LEHB4-.LFB4331
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB5-.LFB4331
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L155-.LFB4331
	.uleb128 0
	.uleb128 .LEHB6-.LFB4331
	.uleb128 .LEHE6-.LEHB6
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB7-.LFB4331
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L156-.LFB4331
	.uleb128 0
	.uleb128 .LEHB8-.LFB4331
	.uleb128 .LEHE8-.LEHB8
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB9-.LFB4331
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L157-.LFB4331
	.uleb128 0
	.uleb128 .LEHB10-.LFB4331
	.uleb128 .LEHE10-.LEHB10
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB11-.LFB4331
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L158-.LFB4331
	.uleb128 0
	.uleb128 .LEHB12-.LFB4331
	.uleb128 .LEHE12-.LEHB12
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB13-.LFB4331
	.uleb128 .LEHE13-.LEHB13
	.uleb128 .L159-.LFB4331
	.uleb128 0
	.uleb128 .LEHB14-.LFB4331
	.uleb128 .LEHE14-.LEHB14
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB15-.LFB4331
	.uleb128 .LEHE15-.LEHB15
	.uleb128 .L160-.LFB4331
	.uleb128 0
	.uleb128 .LEHB16-.LFB4331
	.uleb128 .LEHE16-.LEHB16
	.uleb128 .L161-.LFB4331
	.uleb128 0
	.uleb128 .LEHB17-.LFB4331
	.uleb128 .LEHE17-.LEHB17
	.uleb128 0
	.uleb128 0
.LLSDACSE4331:
	.text
	.size	_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi, .-_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

﻿#include <iostream>
#include <vector>
#include <complex>
#include <hip/hip_complex.h>
#include "hip/hip_runtime.h"


// Функция освобождения памяти GPU (device_pointer_input — указатель на входное поле, device_pointer_output — на выходное поле (результат), device_pointer_x1 — на вектор x, device_pointer_x2 — на вектор y, device_pointer_x3 — на вектор u или z, device_pointer_x4 — на вектор v, device_pointer_parameters — на вектор параметров преобразования, device_pointer_dimension — на вектор размерностей, device_pointer_progress — на атомарную переменную прогресса процесса)
void freeGPUMemory(hipDoubleComplex* device_pointer_input, hipDoubleComplex* device_pointer_output, double* device_pointer_x1, double* device_pointer_x2, double* device_pointer_x3, double* device_pointer_x4, double* device_pointer_parameters, int* device_pointer_dimension, int* device_pointer_progress) {
    hipFree(device_pointer_input);
    hipFree(device_pointer_output);
    hipFree(device_pointer_x1);
    hipFree(device_pointer_x2);
    hipFree(device_pointer_x3);
    hipFree(device_pointer_x4);
    hipFree(device_pointer_parameters);
    hipFree(device_pointer_dimension);
    hipFree(device_pointer_progress);
}

// Сложение двух CUDA double комплексных чисел (left — число слева, right — справа)
__device__ hipDoubleComplex operator+(const hipDoubleComplex& left, const hipDoubleComplex& right) {
    return hipCadd(left, right);
}

// Сложение двух CUDA double комплексных чисел с присвоением (left — переменная до знака "=", right — после)
__device__ hipDoubleComplex operator+=(hipDoubleComplex& left, const hipDoubleComplex& right) {
    left = left + right;
    return left;
}

// Перемножение двух CUDA double комплексных чисел (left — число слева, right — справа)
__device__ hipDoubleComplex operator*(const hipDoubleComplex& left, const hipDoubleComplex& right) {
    return hipCmul(left, right);
}

// Умножение CUDA double комплексного числа на вещественное double число (left — комплексное CUDA число, right — вещественное double число)
__device__ hipDoubleComplex operator*(const hipDoubleComplex& left, const double& right) {
    return hipCmul(left, make_hipDoubleComplex(right, 0));
}

// Умножение вещественного double числа на CUDA double комплексное число (left — вещественное double число, right — комплексное CUDA число)
__device__ hipDoubleComplex operator*(const double& left, const hipDoubleComplex& right) {
    return hipCmul(make_hipDoubleComplex(left, 0), right);
}

// Экспонента, принимающая в качестве аргумента CUDA double комплексное число
__device__ hipDoubleComplex exp(const hipDoubleComplex& value) {
    return exp(value.x) * make_hipDoubleComplex(cos(value.y), sin(value.y));
}

// Нахождение оптимального количества нитей в блоке (N — количество точек по одной оси)
int getNumberThreads(int N) {
    auto result = static_cast<int>(round(sqrt(N)));
    while (((N % result) != 0) || (result * result > 1024)) {
        result--;
    }
    return result;
}

// Функция отображения прогресса выполнения преобразования (now — сколько сейчас выполнено операций, max — общее кол-во операций)
__device__ void processing(int now, int max) {
    double percent;
    if (now == max) {
        percent = 100.;
    }
    else {
        percent = trunc(10000. * (static_cast<double>(now) / max)) / 100;
    }
    printf("\rВыполнено %2.2f%", percent);
}

// Обобщенное ядро вычисления интеграла Коллинза (output — массив результата (выходное поле), input — входное поле, x1 — вектор x, x2 — вектор y, x3 — вектор u или z, x4 — вектор v, parameters — массив параметров преобразования, dimension — массив размерностей, progress — атомарная переменная прогресса процесса вычисления интеграла Коллинза, transformType (вид преобразования: 0 — дробное преобразование Фурье, 1 — преобразование Френеля, 2 — другое (с заданной определенной ABCD матрицей)), OxyCrossSection (выбранное сечение: 1 — сечение в плоскости Ouv (поперечное), 0 — сечение в плоскости Ovz (продольное)))
__global__ void collinsKernel(hipDoubleComplex* output, const hipDoubleComplex* input, const double* x1, const double* x2, const double* x3, const double* x4, const double* parameters, const int* dimension, int* progress, int transformType, bool OxyCrossSection)
{
    auto pi = 3.14159265358979323846;
    auto q = blockIdx.x * blockDim.x + threadIdx.x;
    auto p = blockIdx.y * blockDim.y + threadIdx.y;
    auto hx = x1[1] - x1[0];
    auto hy = x2[0] - x2[1];
    auto wavelength = parameters[0];
    auto z = OxyCrossSection ? parameters[1] : x3[q];
    auto u = OxyCrossSection ? x3[q] : parameters[1];
    auto f = !transformType ? parameters[2] : 0;
    auto k = 2 * pi / wavelength;
    auto n1 = dimension[0];
    auto n2 = dimension[1];
    auto n3 = OxyCrossSection ? dimension[1] : dimension[2];
    auto A = 0.0;
    auto B = 0.0;
    auto D = 0.0;
    switch (transformType) {
    case 0:
        A = cos(pi * z / (2 * f));
        B = f * sin(pi * z / (2 * f));
        D = cos(pi * z / (2 * f));
        break;
    case 1:
        A = 1.;
        B = z;
        D = 1.;
        break;
    default:
        A = OxyCrossSection ? parameters[1] : parameters[2];
        B = OxyCrossSection ? parameters[2] : parameters[3];
        D = OxyCrossSection ? parameters[3] : parameters[4];
    }
    auto value = make_hipDoubleComplex(0, 0);
    for (auto i = 0; i < n1; i++) {
        for (auto j = 0; j < n1; j++) {
            auto arg = (k / (2 * B)) * (A * (x2[i] * x2[i] + x1[j] * x1[j]) - 2 * (x2[i] * x4[p] + x1[j] * u) + D * (x4[p] * x4[p] + u * u));
            value += input[i * n1 + j] * exp(make_hipDoubleComplex(0, arg));
        }
    }
    atomicAdd(progress, 1);
    processing(*progress, n2 * n3);
    output[p * n3 + q] = make_hipDoubleComplex(0, -(k / (2 * pi * B))) * value * hx * hy;
}

std::vector<std::vector<std::complex<double>>> calculateCollinsCUDA(const std::vector<std::vector<std::complex<double>>>& input, const std::vector<double>& x1, const std::vector<double>& x2, const std::vector<double>& x3, const std::vector<double>& x4, const std::vector<double>& parameters, const std::vector<int>& dimension, int transformType)
{
    // Choose which GPU to run on, change this on a multi-GPU system.
    hipError_t cudaStatus = hipSetDevice(0);
    if (cudaStatus != hipSuccess) {
        throw std::runtime_error("hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
    }

    bool OxyCrossSection = dimension.size() == 3 ? false : true;

    // Allocate GPU buffers for vectors.

    auto n1 = dimension.at(0);
    auto n2 = dimension.at(1);
    auto n3 = OxyCrossSection ? dimension.at(1) : dimension.at(2);

    auto device_output = new hipDoubleComplex[n2 * n3];
    hipDoubleComplex* device_pointer_output = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_output, static_cast<unsigned long long>(n2) * n3 * sizeof(hipDoubleComplex));
    
    auto device_input = new hipDoubleComplex[input.size() * input.at(0).size()];
    for (auto i = 0; i < input.size(); i++) {
        for (auto j = 0; j < input.at(0).size(); j++) {
            device_input[i * n1 + j] = make_hipDoubleComplex(input.at(i).at(j).real(), input.at(i).at(j).imag());
        }
    }
    hipDoubleComplex* device_pointer_input = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_input, static_cast<unsigned long long>(n1) * n1 * sizeof(hipDoubleComplex));
    cudaStatus = hipMemcpy(device_pointer_input, device_input, static_cast<unsigned long long>(n1) * n1 * sizeof(hipDoubleComplex), hipMemcpyHostToDevice);
    delete[] device_input;
    
    double* device_pointer_x1 = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_x1, n1 * sizeof(double));
    cudaStatus = hipMemcpy(device_pointer_x1, x1.data(), n1 * sizeof(double), hipMemcpyHostToDevice);

    double* device_pointer_x2 = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_x2, n1 * sizeof(double));
    cudaStatus = hipMemcpy(device_pointer_x2, x2.data(), n1 * sizeof(double), hipMemcpyHostToDevice);

    double* device_pointer_x3 = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_x3, n3 * sizeof(double));
    cudaStatus = hipMemcpy(device_pointer_x3, x3.data(), n3 * sizeof(double), hipMemcpyHostToDevice);

    double* device_pointer_x4 = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_x4, n2 * sizeof(double));
    cudaStatus = hipMemcpy(device_pointer_x4, x4.data(), n2 * sizeof(double), hipMemcpyHostToDevice);

    double* device_pointer_parameters = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_parameters, parameters.size() * sizeof(double));
    cudaStatus = hipMemcpy(device_pointer_parameters, parameters.data(), parameters.size() * sizeof(double), hipMemcpyHostToDevice);

    int* device_pointer_dimension = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_dimension, dimension.size() * sizeof(int));
    cudaStatus = hipMemcpy(device_pointer_dimension, dimension.data(), dimension.size() * sizeof(int), hipMemcpyHostToDevice);
    
    int* device_pointer_progress = 0;
    cudaStatus = hipMalloc((void**)&device_pointer_progress, sizeof(int));

    // Launch a kernel on the GPU with one thread for each element.
    dim3 threadsPerBlock(getNumberThreads(n3), getNumberThreads(n2));
    dim3 numBlocks(n3 / threadsPerBlock.x, n2 / threadsPerBlock.y);
    collinsKernel<<<numBlocks, threadsPerBlock>>>(device_pointer_output, device_pointer_input, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress, transformType, OxyCrossSection);
    
    // Check for any errors launching the kernel
    cudaStatus = hipGetLastError();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "\ncollinsKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
        freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);
        throw std::runtime_error("Запуск ядра CUDA не удался!");
    }

    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = hipDeviceSynchronize();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "\nhipDeviceSynchronize returned error code %d after launching collinsKernel!\n", cudaStatus);
        freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);
        throw std::runtime_error("Синхронизация данных между хостом и устройством завершилась неудачей!");
    }

    std::cout << "\rВыполнено 100.00%" << std::endl;

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = hipMemcpy(device_output, device_pointer_output, static_cast<unsigned long long>(n2) * n3 * sizeof(hipDoubleComplex), hipMemcpyDeviceToHost);
    if (cudaStatus != hipSuccess) {
        freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);
        throw std::runtime_error("Копирование результата в ОЗУ завершилось неудачей!");
    }

    freeGPUMemory(device_pointer_input, device_pointer_output, device_pointer_x1, device_pointer_x2, device_pointer_x3, device_pointer_x4, device_pointer_parameters, device_pointer_dimension, device_pointer_progress);

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = hipDeviceReset();
    if (cudaStatus != hipSuccess) {
        throw std::runtime_error("hipDeviceReset failed!");
    }

    std::vector<std::vector<std::complex<double>>> result;
    result.reserve(x4.size());
    for (auto i = 0; i < x4.size(); i++) {
        auto row = std::vector<std::complex<double>>();
        row.reserve(x4.size());
        for (auto j = 0; j < x3.size(); j++) {
            row.emplace_back(std::complex<double>(device_output[i * n3 + j].x, device_output[i * n3 + j].y));
        }
        result.emplace_back(row);
    }
    delete[] device_output;

    return result;
}
	.text
	.file	"cuCollins.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_ # -- Begin function _Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_
	.type	_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_,@function
_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_: # @_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r15
	movq	%r8, %r12
	movq	%rcx, %r13
	movq	%rdx, %rbp
	movq	%rsi, %rbx
	movq	96(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	88(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	80(%rsp), %r14
	callq	hipFree
	movq	%rbx, %rdi
	callq	hipFree
	movq	%rbp, %rdi
	callq	hipFree
	movq	%r13, %rdi
	callq	hipFree
	movq	%r12, %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	hipFree
	movq	16(%rsp), %rdi                  # 8-byte Reload
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end0:
	.size	_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_, .Lfunc_end0-_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_
	.cfi_endproc
                                        # -- End function
	.globl	_Z16getNumberThreadsi           # -- Begin function _Z16getNumberThreadsi
	.type	_Z16getNumberThreadsi,@function
_Z16getNumberThreadsi:                  # @_Z16getNumberThreadsi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	cvtsi2sd	%edi, %xmm0
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB1_2
# %bb.1:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB1_3
.LBB1_2:                                # %call.sqrt
	callq	sqrt
.LBB1_3:                                # %.split
	callq	round@PLT
	cvttsd2si	%xmm0, %eax
.LBB1_4:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %ecx
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	leal	-1(%rcx), %eax
	testl	%edx, %edx
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=1
	imull	%ecx, %ecx
	cmpl	$1024, %ecx                     # imm = 0x400
	ja	.LBB1_4
# %bb.6:
	incl	%eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z16getNumberThreadsi, .Lfunc_end1-_Z16getNumberThreadsi
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib # -- Begin function _Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.type	_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib,@function
_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib: # @_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movb	288(%rsp), %al
	leaq	72(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	15(%rsp), %r9
	movb	%al, (%r9)
	leaq	112(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	movq	%r9, 80(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib, .Lfunc_end2-_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi
.LCPI3_0:
	.zero	16
	.text
	.globl	_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi
	.type	_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi,@function
_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi: # @_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r12
	movq	%r8, %r15
	movq	%rcx, %r14
	movq	%rdx, %r13
	movq	%rsi, %rbx
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB3_50
# %bb.1:
	movq	248(%rsp), %rcx
	movq	(%rcx), %rax
	movq	8(%rcx), %rsi
	movq	%rsi, %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	subq	%rax, %rsi
	je	.LBB3_52
# %bb.2:                                # %_ZNKSt6vectorIiSaIiEE2atEm.exit
	movq	%r12, 88(%rsp)                  # 8-byte Spill
	movq	%r13, 152(%rsp)                 # 8-byte Spill
	movq	%r14, 160(%rsp)                 # 8-byte Spill
	cmpq	$1, %rdx
	jbe	.LBB3_53
# %bb.3:                                # %_ZNKSt6vectorIiSaIiEE2atEm.exit118
	movslq	(%rax), %r12
	xorl	%ecx, %ecx
	movq	%rsi, 128(%rsp)                 # 8-byte Spill
	cmpq	$12, %rsi
	sete	%cl
	movslq	4(%rax), %r13
	movslq	4(%rax,%rcx,4), %rax
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	imulq	%r13, %rax
	movq	%rax, %r14
	shlq	$4, %r14
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	.cfi_escape 0x2e, 0x00
	callq	_Znam
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	%rsp, %rdi
	movq	$0, (%rdi)
	.cfi_escape 0x2e, 0x00
	movq	%r14, 136(%rsp)                 # 8-byte Spill
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rbp
	movq	8(%rbx), %rax
	movq	%rax, %rcx
	subq	%rbp, %rcx
	sarq	$3, %rcx
	movabsq	$-6148914691236517205, %rbx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rcx, %rbx
	cmpq	%rbp, %rax
	je	.LBB3_54
# %bb.4:                                # %_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm.exit127.preheader.preheader
	movq	8(%rbp), %rax
	subq	(%rbp), %rax
	sarq	$4, %rax
	imulq	%rbx, %rax
	movq	%rax, %rcx
	shrq	$60, %rcx
	shlq	$4, %rax
	xorl	%r14d, %r14d
	negq	%rcx
	movl	$0, %edi
	sbbq	%rdi, %rdi
	orq	%rax, %rdi
	.cfi_escape 0x2e, 0x00
	callq	_Znam
	cmpq	$1, %rbx
	adcq	$0, %rbx
	movq	(%rbp), %rdx
	movq	8(%rbp), %rdi
	movq	%r12, %r11
	shlq	$4, %r11
	movq	%rax, %rcx
.LBB3_5:                                # %_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm.exit127.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_7 Depth 2
	cmpq	%rdx, %rdi
	movq	%rdx, %rdi
	je	.LBB3_9
# %bb.6:                                # %_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm.exit129.lr.ph
                                        #   in Loop: Header=BB3_5 Depth=1
	leaq	(%r14,%r14,2), %rdx
	leaq	(,%rdx,8), %r8
	addq	%rbp, %r8
	movl	$8, %r9d
	xorl	%esi, %esi
.LBB3_7:                                # %_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm.exit129
                                        #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r8), %rdi
	movq	8(%r8), %rdx
	subq	%rdi, %rdx
	sarq	$4, %rdx
	cmpq	%rsi, %rdx
	jbe	.LBB3_48
# %bb.8:                                # %_ZNKSt6vectorISt7complexIdESaIS1_EE2atEm.exit134
                                        #   in Loop: Header=BB3_7 Depth=2
	movups	-8(%rdi,%r9), %xmm0
	movaps	%xmm0, -8(%rcx,%r9)
	incq	%rsi
	movq	(%rbp), %rdx
	movq	8(%rbp), %rdi
	movq	%rdi, %r10
	subq	%rdx, %r10
	sarq	$4, %r10
	addq	$16, %r9
	cmpq	%rsi, %r10
	ja	.LBB3_7
.LBB3_9:                                # %_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE2atEm.exit127._crit_edge
                                        #   in Loop: Header=BB3_5 Depth=1
	incq	%r14
	addq	%r11, %rcx
	cmpq	%rbx, %r14
	jne	.LBB3_5
# %bb.10:                               # %._crit_edge
	xorl	%ecx, %ecx
	leaq	72(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%r12, %rbp
	imulq	%r12, %rbp
	shlq	$4, %rbp
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	movq	%r12, %r14
	movq	%rax, %r12
	callq	hipMalloc
	movq	(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	callq	_ZdaPv
	leaq	64(%rsp), %rbx
	xorl	%r12d, %r12d
	movq	%r12, (%rbx)
	shlq	$3, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	152(%rsp), %rax                 # 8-byte Reload
	movq	(%rax), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rbx
	movq	%r12, (%rbx)
	xorl	%r12d, %r12d
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	160(%rsp), %rax                 # 8-byte Reload
	movq	(%rax), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rbx
	movq	%r12, (%rbx)
	movq	144(%rsp), %r14                 # 8-byte Reload
	leaq	(,%r14,8), %rbp
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	(%r15), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rbx
	movq	%r12, (%rbx)
	leaq	(,%r13,8), %rbp
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	88(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdx
	movq	%r14, %rbp
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rbx
	movq	%r12, (%rbx)
	movq	240(%rsp), %r14
	movq	8(%r14), %rsi
	subq	(%r14), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	(%r14), %rsi
	movq	8(%r14), %rdx
	subq	%rsi, %rdx
	.cfi_escape 0x2e, 0x00
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rbx
	movq	%r12, (%rbx)
	movq	248(%rsp), %r14
	movq	8(%r14), %rsi
	subq	(%r14), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	(%r14), %rsi
	movq	8(%r14), %rdx
	subq	%rsi, %rdx
	.cfi_escape 0x2e, 0x00
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rdi
	movq	%r12, (%rdi)
	.cfi_escape 0x2e, 0x00
	movl	$4, %esi
	callq	hipMalloc
	cvtsi2sd	%ebp, %xmm0
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB3_12
# %bb.11:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB3_13
.LBB3_12:                               # %call.sqrt
	.cfi_escape 0x2e, 0x00
	callq	sqrt
.LBB3_13:                               # %._crit_edge.split
	.cfi_escape 0x2e, 0x00
	callq	round@PLT
	cvttsd2si	%xmm0, %ebx
.LBB3_14:                               # =>This Inner Loop Header: Depth=1
	movl	%ebx, %ecx
	movl	%ebp, %eax
	cltd
	idivl	%ebx
	leal	-1(%rcx), %ebx
	testl	%edx, %edx
	jne	.LBB3_14
# %bb.15:                               #   in Loop: Header=BB3_14 Depth=1
	imull	%ecx, %ecx
	cmpl	$1024, %ecx                     # imm = 0x400
	ja	.LBB3_14
# %bb.16:                               # %_Z16getNumberThreadsi.exit
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r13d, %xmm0
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB3_18
# %bb.17:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB3_19
.LBB3_18:                               # %call.sqrt199
	.cfi_escape 0x2e, 0x00
	callq	sqrt
.LBB3_19:                               # %_Z16getNumberThreadsi.exit.split
	.cfi_escape 0x2e, 0x00
	callq	round@PLT
	cvttsd2si	%xmm0, %esi
	incl	%ebx
.LBB3_20:                               # =>This Inner Loop Header: Depth=1
	movl	%esi, %ecx
	movl	%r13d, %eax
	cltd
	idivl	%esi
	leal	-1(%rcx), %esi
	testl	%edx, %edx
	jne	.LBB3_20
# %bb.21:                               #   in Loop: Header=BB3_20 Depth=1
	imull	%ecx, %ecx
	cmpl	$1024, %ecx                     # imm = 0x400
	ja	.LBB3_20
# %bb.22:                               # %_Z16getNumberThreadsi.exit125
	movl	%ebx, %eax
	incl	%esi
	movq	%rsi, %rcx
	shlq	$32, %rcx
	orq	%rax, %rcx
	movl	%ebp, %eax
	xorl	%edx, %edx
	divl	%ebx
	movl	%eax, %edi
	movl	%r13d, %eax
	xorl	%edx, %edx
	divl	%esi
                                        # kill: def $eax killed $eax def $rax
	shlq	$32, %rax
	orq	%rax, %rdi
	.cfi_escape 0x2e, 0x00
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_24
# %bb.23:
	xorl	%eax, %eax
	cmpq	$12, 128(%rsp)                  # 8-byte Folded Reload
	setne	%al
	movq	(%rsp), %rdi
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	40(%rsp), %r9
	.cfi_escape 0x2e, 0x30
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB3_24:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_43
# %bb.25:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_45
# %bb.26:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	.cfi_escape 0x2e, 0x00
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rsi
	.cfi_escape 0x2e, 0x00
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movq	136(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %ebx
	movq	72(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	40(%rsp), %r9
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	testl	%ebx, %ebx
	jne	.LBB3_55
# %bb.27:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceReset
	testl	%eax, %eax
	movq	88(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB3_57
# %bb.28:
	xorpd	%xmm0, %xmm0
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movupd	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	movq	8(%rbx), %rsi
	subq	(%rbx), %rsi
	sarq	$3, %rsi
.Ltmp15:
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm
.Ltmp16:
# %bb.29:                               # %.preheader139
	movq	8(%rbx), %rsi
	subq	(%rbx), %rsi
	je	.LBB3_42
# %bb.30:                               # %.lr.ph147
	sarq	$3, %rsi
	movq	80(%rsp), %r12                  # 8-byte Reload
	addq	$8, %r12
	shlq	$4, %rbp
	xorl	%r14d, %r14d
.LBB3_31:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_34 Depth 2
	movq	%rbp, %rbx
	xorpd	%xmm0, %xmm0
	movapd	%xmm0, 96(%rsp)
	movq	$0, 112(%rsp)
.Ltmp18:
	.cfi_escape 0x2e, 0x00
	leaq	96(%rsp), %rdi
	callq	_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm
.Ltmp19:
# %bb.32:                               # %.preheader
                                        #   in Loop: Header=BB3_31 Depth=1
	movq	8(%r15), %rax
	cmpq	(%r15), %rax
	je	.LBB3_38
# %bb.33:                               # %.lr.ph
                                        #   in Loop: Header=BB3_31 Depth=1
	movq	%r12, %rbp
	xorl	%r13d, %r13d
.LBB3_34:                               #   Parent Loop BB3_31 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movapd	-8(%rbp), %xmm0
	movupd	%xmm0, 168(%rsp)
	movq	104(%rsp), %rsi
	cmpq	112(%rsp), %rsi
	je	.LBB3_36
# %bb.35:                               #   in Loop: Header=BB3_34 Depth=2
	movupd	168(%rsp), %xmm0
	movupd	%xmm0, (%rsi)
	addq	$16, 104(%rsp)
	jmp	.LBB3_37
.LBB3_36:                               #   in Loop: Header=BB3_34 Depth=2
.Ltmp20:
	.cfi_escape 0x2e, 0x00
	leaq	96(%rsp), %rdi
	leaq	168(%rsp), %rdx
	callq	_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
.Ltmp21:
.LBB3_37:                               # %_ZNSt6vectorISt7complexIdESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_.exit
                                        #   in Loop: Header=BB3_34 Depth=2
	movq	8(%r15), %rax
	subq	(%r15), %rax
	incq	%r13
	sarq	$3, %rax
	addq	$16, %rbp
	cmpq	%r13, %rax
	ja	.LBB3_34
.LBB3_38:                               # %._crit_edge145
                                        #   in Loop: Header=BB3_31 Depth=1
.Ltmp23:
	.cfi_escape 0x2e, 0x00
	movq	8(%rsp), %rdi                   # 8-byte Reload
	leaq	96(%rsp), %rsi
	callq	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_
.Ltmp24:
# %bb.39:                               #   in Loop: Header=BB3_31 Depth=1
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	movq	%rbx, %rbp
	je	.LBB3_41
# %bb.40:                               #   in Loop: Header=BB3_31 Depth=1
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB3_41:                               # %_ZNSt6vectorISt7complexIdESaIS1_EED2Ev.exit
                                        #   in Loop: Header=BB3_31 Depth=1
	movq	88(%rsp), %rax                  # 8-byte Reload
	movq	8(%rax), %rsi
	subq	(%rax), %rsi
	incq	%r14
	sarq	$3, %rsi
	addq	%rbp, %r12
	cmpq	%r14, %rsi
	ja	.LBB3_31
.LBB3_42:                               # %._crit_edge148
	.cfi_escape 0x2e, 0x00
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	8(%rsp), %rax                   # 8-byte Reload
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_43:
	.cfi_def_cfa_offset 240
	movq	stderr(%rip), %rbx
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movq	72(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	40(%rsp), %r9
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp3:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp4:
# %bb.44:
	.cfi_escape 0x2e, 0x00
	jmp	.LBB3_47
.LBB3_45:
	movq	stderr(%rip), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	movq	72(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	40(%rsp), %r9
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z13freeGPUMemoryP15HIP_vector_typeIdLj2EES1_PdS2_S2_S2_S2_PiS3_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp6:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.4, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp7:
# %bb.46:
	.cfi_escape 0x2e, 0x00
.LBB3_47:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%r14, %rdi
	callq	__cxa_throw
.LBB3_48:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.8, %edi
.LBB3_49:
	xorl	%eax, %eax
	callq	_ZSt24__throw_out_of_range_fmtPKcz
.LBB3_50:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp0:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp1:
# %bb.51:
	.cfi_escape 0x2e, 0x00
	jmp	.LBB3_47
.LBB3_52:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.8, %edi
	xorl	%esi, %esi
	jmp	.LBB3_49
.LBB3_53:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.8, %edi
	movl	$1, %esi
	jmp	.LBB3_49
.LBB3_54:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.8, %edi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	jmp	.LBB3_49
.LBB3_55:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp9:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.6, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp10:
# %bb.56:
	.cfi_escape 0x2e, 0x00
	jmp	.LBB3_47
.LBB3_57:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp12:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.7, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp13:
# %bb.58:
	.cfi_escape 0x2e, 0x00
	jmp	.LBB3_47
.LBB3_59:
.Ltmp14:
	jmp	.LBB3_70
.LBB3_60:
.Ltmp11:
	jmp	.LBB3_70
.LBB3_61:
.Ltmp2:
	jmp	.LBB3_70
.LBB3_62:
.Ltmp17:
	movq	%rax, %rbx
	jmp	.LBB3_67
.LBB3_63:
.Ltmp25:
	jmp	.LBB3_65
.LBB3_64:
.Ltmp22:
.LBB3_65:
	movq	%rax, %rbx
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_67
# %bb.66:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB3_67:
	.cfi_escape 0x2e, 0x00
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev
	jmp	.LBB3_71
.LBB3_68:
.Ltmp8:
	jmp	.LBB3_70
.LBB3_69:
.Ltmp5:
.LBB3_70:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	__cxa_free_exception
.LBB3_71:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi, .Lfunc_end3-_Z20calculateCollinsCUDARKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EERKS_IdSaIdEESB_SB_SB_SB_RKS_IiSaIiEEi
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp15-.Lfunc_begin0          #   Call between .Lfunc_begin0 and .Ltmp15
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 2 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp19-.Ltmp18                #   Call between .Ltmp18 and .Ltmp19
	.uleb128 .Ltmp25-.Lfunc_begin0          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp21-.Ltmp20                #   Call between .Ltmp20 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin0          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp24-.Ltmp23                #   Call between .Ltmp23 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin0          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp3-.Ltmp24                 #   Call between .Ltmp24 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 7 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 8 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 9 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 10 <<
	.uleb128 .Ltmp0-.Ltmp7                  #   Call between .Ltmp7 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 11 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 12 <<
	.uleb128 .Ltmp9-.Ltmp1                  #   Call between .Ltmp1 and .Ltmp9
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 13 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp10-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp12-.Ltmp10                #   Call between .Ltmp10 and .Ltmp12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Lfunc_end3-.Ltmp13            #   Call between .Ltmp13 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm,"axG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm,comdat
	.weak	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm # -- Begin function _ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm,@function
_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm: # @_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movabsq	$384307168202282326, %rax       # imm = 0x555555555555556
	cmpq	%rax, %rsi
	jae	.LBB4_10
# %bb.1:
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	movq	16(%rdi), %rax
	subq	%r12, %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rcx
	cmpq	%rsi, %rcx
	jae	.LBB4_9
# %bb.2:                                # %_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.exit
	movq	8(%rbx), %r13
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv
	movq	%rax, %r15
	movq	(%rbx), %rdi
	movq	8(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB4_6
# %bb.3:                                # %.lr.ph.i.i.i.preheader
	xorl	%ecx, %ecx
	xorps	%xmm0, %xmm0
.LBB4_4:                                # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rdi,%rcx), %rdx
	addq	$24, %rdx
	movq	-24(%rdx), %rsi
	movq	%rsi, (%r15,%rcx)
	movq	-16(%rdx), %rsi
	movq	%rsi, 8(%r15,%rcx)
	movq	-8(%rdx), %rsi
	movq	%rsi, 16(%r15,%rcx)
	movups	%xmm0, -24(%rdx)
	movq	$0, -8(%rdx)
	addq	$24, %rcx
	cmpq	%rax, %rdx
	jne	.LBB4_4
# %bb.5:                                # %_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE11_S_relocateEPS3_S6_S6_RS4_.exitthread-pre-split
	movq	(%rbx), %rdi
.LBB4_6:                                # %_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE11_S_relocateEPS3_S6_S6_RS4_.exit
	subq	%r12, %r13
	testq	%rdi, %rdi
	je	.LBB4_8
# %bb.7:
	callq	_ZdlPv
.LBB4_8:                                # %_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE13_M_deallocateEPS4_m.exit
	movq	%r15, (%rbx)
	addq	%r15, %r13
	movq	%r13, 8(%rbx)
	leaq	(%r14,%r14,2), %rax
	leaq	(%r15,%rax,8), %rax
	movq	%rax, 16(%rbx)
.LBB4_9:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB4_10:
	.cfi_def_cfa_offset 48
	movl	$.L.str.9, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end4:
	.size	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm, .Lfunc_end4-_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE7reserveEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm,"axG",@progbits,_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm,comdat
	.weak	_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm # -- Begin function _ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm,@function
_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm: # @_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$59, %rax
	jne	.LBB5_10
# %bb.1:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	(%rdi), %r13
	movq	16(%rdi), %rax
	subq	%r13, %rax
	sarq	$4, %rax
	cmpq	%rsi, %rax
	jae	.LBB5_9
# %bb.2:                                # %_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.exit
	movq	8(%r14), %r12
	movq	%r14, %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv
	movq	%rax, %r15
	movq	(%r14), %rdi
	movq	8(%r14), %rax
	cmpq	%rax, %rdi
	je	.LBB5_6
# %bb.3:                                # %.lr.ph.i.i.i.preheader
	movq	%r15, %rcx
.LBB5_4:                                # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movups	(%rdi), %xmm0
	movups	%xmm0, (%rcx)
	addq	$16, %rdi
	addq	$16, %rcx
	cmpq	%rax, %rdi
	jne	.LBB5_4
# %bb.5:                                # %_ZNSt6vectorISt7complexIdESaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exitthread-pre-split
	movq	(%r14), %rdi
.LBB5_6:                                # %_ZNSt6vectorISt7complexIdESaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit
	subq	%r13, %r12
	testq	%rdi, %rdi
	je	.LBB5_8
# %bb.7:
	callq	_ZdlPv
.LBB5_8:                                # %_ZNSt12_Vector_baseISt7complexIdESaIS1_EE13_M_deallocateEPS1_m.exit
	movq	%r15, (%r14)
	addq	%r15, %r12
	movq	%r12, 8(%r14)
	shlq	$4, %rbx
	addq	%r15, %rbx
	movq	%rbx, 16(%r14)
.LBB5_9:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB5_10:
	.cfi_def_cfa_offset 48
	movl	$.L.str.9, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end5:
	.size	_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm, .Lfunc_end5-_ZNSt6vectorISt7complexIdESaIS1_EE7reserveEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_,"axG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_,comdat
	.weak	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_ # -- Begin function _ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_,@function
_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_: # @_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB6_2
# %bb.1:
	movq	%rsi, %rdi
	movq	%rdx, %rsi
	callq	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
	movq	8(%rbx), %rax
	addq	$24, %rax
	movq	%rax, 8(%rbx)
	jmp	.LBB6_3
.LBB6_2:
	movq	%rbx, %rdi
	callq	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	movq	8(%rbx), %rax
.LBB6_3:
	addq	$-24, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_, .Lfunc_end6-_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12emplace_backIJRS3_EEES7_DpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev,"axG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev,comdat
	.weak	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev # -- Begin function _ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev,@function
_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev: # @_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	(%rdi), %rbx
	movq	8(%rdi), %r15
	cmpq	%r15, %rbx
	je	.LBB7_6
# %bb.1:                                # %.lr.ph.i.i.i.preheader
	movq	%rdi, %r14
.LBB7_2:                                # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB7_4
# %bb.3:                                #   in Loop: Header=BB7_2 Depth=1
	callq	_ZdlPv
.LBB7_4:                                # %_ZSt8_DestroyISt6vectorISt7complexIdESaIS2_EEEvPT_.exit.i.i.i
                                        #   in Loop: Header=BB7_2 Depth=1
	addq	$24, %rbx
	cmpq	%r15, %rbx
	jne	.LBB7_2
# %bb.5:                                # %_ZSt8_DestroyIPSt6vectorISt7complexIdESaIS2_EES4_EvT_S6_RSaIT0_E.exitthread-pre-split
	movq	(%r14), %rbx
.LBB7_6:                                # %_ZSt8_DestroyIPSt6vectorISt7complexIdESaIS2_EES4_EvT_S6_RSaIT0_E.exit
	testq	%rbx, %rbx
	je	.LBB7_7
# %bb.8:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.LBB7_7:                                # %_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EED2Ev.exit
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev, .Lfunc_end7-_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end8:
	.size	__clang_call_terminate, .Lfunc_end8-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv,@function
_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv: # @_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$384307168202282326, %rax       # imm = 0x555555555555556
	cmpq	%rax, %rsi
	jae	.LBB9_1
# %bb.3:
	shlq	$3, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB9_1:
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jb	.LBB9_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB9_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end9:
	.size	_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv, .Lfunc_end9-_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv,@function
_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv: # @_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$59, %rax
	jne	.LBB10_1
# %bb.3:
	shlq	$4, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB10_1:
	.cfi_def_cfa_offset 16
	shrq	$60, %rsi
	je	.LBB10_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB10_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end10:
	.size	_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv, .Lfunc_end10-_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,"axG",@progbits,_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,comdat
	.weak	_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_ # -- Begin function _ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,@function
_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_: # @_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.10, %edx
	callq	_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc
	movq	%rax, %r14
	movq	(%rbx), %rdi
	movq	8(%rbx), %rbp
	movq	%r15, %r13
	subq	%rdi, %r13
	sarq	$4, %r13
	testq	%rax, %rax
	je	.LBB11_1
# %bb.2:
	movq	%rdi, %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv
	movq	%r12, %rdi
	movq	%rax, %r12
	jmp	.LBB11_3
.LBB11_1:
	xorl	%r12d, %r12d
.LBB11_3:                               # %_ZNSt12_Vector_baseISt7complexIdESaIS1_EE11_M_allocateEm.exit
	shlq	$4, %r13
	movq	(%rsp), %rax                    # 8-byte Reload
	movups	(%rax), %xmm0
	movups	%xmm0, (%r12,%r13)
	movq	%r12, %r13
	cmpq	%r15, %rdi
	je	.LBB11_6
# %bb.4:                                # %.lr.ph.i.i.i.preheader
	movq	%r12, %r13
	movq	%rdi, %rax
.LBB11_5:                               # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movups	(%rax), %xmm0
	movups	%xmm0, (%r13)
	addq	$16, %rax
	addq	$16, %r13
	cmpq	%r15, %rax
	jne	.LBB11_5
.LBB11_6:                               # %_ZNSt6vectorISt7complexIdESaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit
	addq	$16, %r13
	cmpq	%r15, %rbp
	je	.LBB11_8
.LBB11_7:                               # %.lr.ph.i.i.i17
                                        # =>This Inner Loop Header: Depth=1
	movups	(%r15), %xmm0
	movups	%xmm0, (%r13)
	addq	$16, %r15
	addq	$16, %r13
	cmpq	%rbp, %r15
	jne	.LBB11_7
.LBB11_8:                               # %_ZNSt6vectorISt7complexIdESaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit22
	testq	%rdi, %rdi
	je	.LBB11_10
# %bb.9:
	callq	_ZdlPv
.LBB11_10:                              # %_ZNSt12_Vector_baseISt7complexIdESaIS1_EE13_M_deallocateEPS1_m.exit
	movq	%r12, (%rbx)
	movq	%r13, 8(%rbx)
	shlq	$4, %r14
	addq	%r12, %r14
	movq	%r14, 16(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, .Lfunc_end11-_ZNSt6vectorISt7complexIdESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$576460752303423487, %rcx       # imm = 0x7FFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$4, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB12_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB12_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end12:
	.size	_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc, .Lfunc_end12-_ZNKSt6vectorISt7complexIdESaIS1_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.weak	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_ # -- Begin function _ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,@function
_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_: # @_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.10, %edx
	callq	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc
	movq	%rax, %rsi
	movq	(%rbx), %r12
	movq	8(%rbx), %rbp
	movq	%r13, %rax
	subq	%r12, %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %r14     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %r14
	testq	%rsi, %rsi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	je	.LBB13_1
# %bb.2:
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt6vectorISt7complexIdESaIS2_EEE8allocateEmPKv
	movq	%rax, %r15
	jmp	.LBB13_3
.LBB13_1:
	xorl	%r15d, %r15d
.LBB13_3:                               # %_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE11_M_allocateEm.exit
	leaq	(%r14,%r14,2), %rax
	leaq	(%r15,%rax,8), %r14
.Ltmp26:
	movq	%r14, %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
.Ltmp27:
# %bb.4:                                # %_ZNSt16allocator_traitsISaISt6vectorISt7complexIdESaIS2_EEEE9constructIS4_JRS4_EEEvRS5_PT_DpOT0_.exit
	movq	%r15, %r14
	cmpq	%r13, %r12
	je	.LBB13_7
# %bb.5:                                # %.lr.ph.i.i.i.preheader
	xorps	%xmm0, %xmm0
	movq	%r15, %r14
	movq	%r12, %rax
.LBB13_6:                               # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rax), %rcx
	movq	%rcx, (%r14)
	movq	8(%rax), %rcx
	movq	%rcx, 8(%r14)
	movq	16(%rax), %rcx
	movq	%rcx, 16(%r14)
	movups	%xmm0, (%rax)
	movq	$0, 16(%rax)
	addq	$24, %r14
	addq	$24, %rax
	cmpq	%r13, %rax
	jne	.LBB13_6
.LBB13_7:                               # %_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE11_S_relocateEPS3_S6_S6_RS4_.exit
	addq	$24, %r14
	cmpq	%r13, %rbp
	je	.LBB13_10
# %bb.8:                                # %.lr.ph.i.i.i27.preheader
	xorps	%xmm0, %xmm0
.LBB13_9:                               # %.lr.ph.i.i.i27
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r13), %rax
	movq	%rax, (%r14)
	movq	8(%r13), %rax
	movq	%rax, 8(%r14)
	movq	16(%r13), %rax
	movq	%rax, 16(%r14)
	movups	%xmm0, (%r13)
	movq	$0, 16(%r13)
	addq	$24, %r14
	addq	$24, %r13
	cmpq	%rbp, %r13
	jne	.LBB13_9
.LBB13_10:                              # %_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE11_S_relocateEPS3_S6_S6_RS4_.exit32
	testq	%r12, %r12
	je	.LBB13_12
# %bb.11:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB13_12:                              # %_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE13_M_deallocateEPS4_m.exit
	movq	%r15, (%rbx)
	movq	%r14, 8(%rbx)
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	(%r15,%rax,8), %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB13_13:
	.cfi_def_cfa_offset 80
.Ltmp28:
	movq	%rax, %rdi
	callq	__cxa_begin_catch
	testq	%r15, %r15
	jne	.LBB13_15
# %bb.14:
	movq	(%r14), %r15
	testq	%r15, %r15
	je	.LBB13_16
.LBB13_15:                              # %_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE13_M_deallocateEPS4_m.exit35.sink.split
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB13_16:                              # %_ZNSt12_Vector_baseISt6vectorISt7complexIdESaIS2_EESaIS4_EE13_M_deallocateEPS4_m.exit35
.Ltmp29:
	callq	__cxa_rethrow
.Ltmp30:
# %bb.20:
.LBB13_17:
.Ltmp31:
	movq	%rax, %rbx
.Ltmp32:
	callq	__cxa_end_catch
.Ltmp33:
# %bb.18:
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB13_19:
.Ltmp34:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end13:
	.size	_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_, .Lfunc_end13-_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.cfi_endproc
	.section	.gcc_except_table._ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"aG",@progbits,_ZNSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE17_M_realloc_insertIJRS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.p2align	2, 0x0
GCC_except_table13:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp26-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp26
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp27-.Ltmp26                #   Call between .Ltmp26 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin1          #     jumps to .Ltmp28
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp27-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp29-.Ltmp27                #   Call between .Ltmp27 and .Ltmp29
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp30-.Ltmp29                #   Call between .Ltmp29 and .Ltmp30
	.uleb128 .Ltmp31-.Lfunc_begin1          #     jumps to .Ltmp31
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp33-.Ltmp32                #   Call between .Ltmp32 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin1          #     jumps to .Ltmp34
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp33-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Lfunc_end13-.Ltmp33           #   Call between .Ltmp33 and .Lfunc_end13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_,"axG",@progbits,_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_,comdat
	.weak	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_ # -- Begin function _ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
	.p2align	1, 0x90
	.type	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_,@function
_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_: # @_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	8(%rsi), %rax
	movq	(%rsi), %rcx
	movq	%rax, %r15
	subq	%rcx, %r15
	sarq	$4, %r15
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	cmpq	%rcx, %rax
	je	.LBB14_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt7complexIdEE8allocateEmPKv
	jmp	.LBB14_3
.LBB14_1:
	xorl	%eax, %eax
.LBB14_3:
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	shlq	$4, %r15
	addq	%rax, %r15
	movq	%r15, 16(%rbx)
	movq	(%r14), %rcx
	movq	8(%r14), %rdx
.LBB14_5:                               # %.lr.ph.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rdx, %rcx
	je	.LBB14_6
# %bb.4:                                # %.lr.ph.i.i.i.i
                                        #   in Loop: Header=BB14_5 Depth=1
	movups	(%rcx), %xmm0
	movups	%xmm0, (%rax)
	addq	$16, %rcx
	addq	$16, %rax
	jmp	.LBB14_5
.LBB14_6:                               # %_ZSt22__uninitialized_copy_aIN9__gnu_cxx17__normal_iteratorIPKSt7complexIdESt6vectorIS3_SaIS3_EEEEPS3_S3_ET0_T_SC_SB_RSaIT1_E.exit
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_, .Lfunc_end14-_ZNSt6vectorISt7complexIdESaIS1_EEC2ERKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$384307168202282325, %rcx       # imm = 0x555555555555555
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %rdi     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB15_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB15_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end15:
	.size	_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc, .Lfunc_end15-_ZNKSt6vectorIS_ISt7complexIdESaIS1_EESaIS3_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB16_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB16_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end16:
	.size	__hip_module_ctor, .Lfunc_end16-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB17_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB17_2:
	retq
.Lfunc_end17:
	.size	__hip_module_dtor, .Lfunc_end17-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib,@object # @_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.section	.rodata,"a",@progbits
	.globl	_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.p2align	3, 0x0
_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib:
	.quad	_Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.size	_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str, 64

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\ncollinsKernel launch failed: %s\n"
	.size	.L.str.1, 34

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\320\227\320\260\320\277\321\203\321\201\320\272 \321\217\320\264\321\200\320\260 CUDA \320\275\320\265 \321\203\320\264\320\260\320\273\321\201\321\217!"
	.size	.L.str.2, 46

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\nhipDeviceSynchronize returned error code %d after launching collinsKernel!\n"
	.size	.L.str.3, 77

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\320\241\320\270\320\275\321\205\321\200\320\276\320\275\320\270\320\267\320\260\321\206\320\270\321\217 \320\264\320\260\320\275\320\275\321\213\321\205 \320\274\320\265\320\266\320\264\321\203 \321\205\320\276\321\201\321\202\320\276\320\274 \320\270 \321\203\321\201\321\202\321\200\320\276\320\271\321\201\321\202\320\262\320\276\320\274 \320\267\320\260\320\262\320\265\321\200\321\210\320\270\320\273\320\260\321\201\321\214 \320\275\320\265\321\203\320\264\320\260\321\207\320\265\320\271!"
	.size	.L.str.4, 131

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\r\320\222\321\213\320\277\320\276\320\273\320\275\320\265\320\275\320\276 100.00%"
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\320\232\320\276\320\277\320\270\321\200\320\276\320\262\320\260\320\275\320\270\320\265 \321\200\320\265\320\267\321\203\320\273\321\214\321\202\320\260\321\202\320\260 \320\262 \320\236\320\227\320\243 \320\267\320\260\320\262\320\265\321\200\321\210\320\270\320\273\320\276\321\201\321\214 \320\275\320\265\321\203\320\264\320\260\321\207\320\265\320\271!"
	.size	.L.str.6, 95

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"hipDeviceReset failed!"
	.size	.L.str.7, 23

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"vector::_M_range_check: __n (which is %zu) >= this->size() (which is %zu)"
	.size	.L.str.8, 74

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"vector::reserve"
	.size	.L.str.9, 16

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.10, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib"
	.size	.L__unnamed_1, 70

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.addrsig_sym _ZTISt13runtime_error
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib ; -- Begin function _Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.globl	_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
	.p2align	8
	.type	_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib,@function
_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib: ; @_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
; %bb.0:
	s_clause 0x2
	s_load_b64 s[36:37], s[0:1], 0x48
	s_load_b32 s40, s[0:1], 0x5c
	s_load_b512 s[16:31], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	s_mov_b64 s[34:35], 0
	s_waitcnt lgkmcnt(0)
	s_bitcmp1_b32 s37, 0
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s2, -1
	s_add_u32 s12, s0, 0x50
	s_addc_u32 s13, s1, 0
	s_and_b32 s4, s40, 0xffff
	v_mad_u64_u32 v[28:29], null, s14, s4, v[1:2]
	v_mov_b32_e32 v29, 0
	s_add_u32 s4, s28, 8
	s_addc_u32 s5, s29, 0
	s_cmp_lg_u32 s36, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 3, v[28:29]
	v_add_co_u32 v3, vcc_lo, s24, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s25, v2, vcc_lo
	v_cndmask_b32_e64 v1, v3, s4, s2
	v_cndmask_b32_e64 v3, s4, v3, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v4, s5, s2
	v_cndmask_b32_e64 v4, s5, v4, s2
	global_load_b64 v[5:6], v[1:2], off
	global_load_b64 v[1:2], v[3:4], off
	s_cbranch_scc1 .LBB0_2
; %bb.1:
	s_load_b64 s[34:35], s[28:29], 0x10
.LBB0_2:
	s_load_b64 s[24:25], s[30:31], 0x0
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s33, s25
	s_cbranch_vccnz .LBB0_4
; %bb.3:
	s_load_b32 s33, s[30:31], 0x8
.LBB0_4:
	s_load_b128 s[8:11], s[20:21], 0x0
	s_load_b128 s[4:7], s[22:23], 0x0
	s_load_b64 s[30:31], s[28:29], 0x0
	s_cmp_lt_i32 s36, 1
	s_mov_b32 s3, 0
	s_cbranch_scc1 .LBB0_6
; %bb.5:                                ; %LeafBlock441
	s_cmp_lg_u32 s36, 1
	s_mov_b32 s37, 0
	s_mov_b64 s[38:39], 1.0
	s_cselect_b32 s14, -1, 0
	s_branch .LBB0_7
.LBB0_6:
	s_mov_b32 s37, -1
	s_mov_b32 s14, 0
                                        ; implicit-def: $sgpr38_sgpr39
.LBB0_7:                                ; %Flow545
	s_and_not1_b32 vcc_lo, exec_lo, s37
	s_cbranch_vccnz .LBB0_9
; %bb.8:                                ; %LeafBlock
	s_cmp_lg_u32 s36, 0
	s_mov_b32 s3, -1
	s_cselect_b32 s14, -1, 0
                                        ; implicit-def: $sgpr38_sgpr39
.LBB0_9:                                ; %Flow546
	s_waitcnt vmcnt(1)
	v_dual_mov_b32 v30, v6 :: v_dual_mov_b32 v29, v5
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_mov_b64 s[36:37], s[38:39]
	s_cbranch_vccnz .LBB0_11
; %bb.10:
	s_and_b32 s3, s2, exec_lo
	s_cselect_b32 s3, 8, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_u32 s36, s28, s3
	s_addc_u32 s37, s29, 0
	s_and_b32 s3, s2, exec_lo
	s_cselect_b32 s3, 16, 24
	s_add_u32 s38, s28, s3
	s_addc_u32 s39, s29, 0
	s_and_b32 s2, s2, exec_lo
	s_cselect_b32 s14, 24, 32
	s_load_b64 s[2:3], s[38:39], 0x0
	s_add_u32 s28, s28, s14
	s_addc_u32 s29, s29, 0
	s_clause 0x1
	s_load_b64 s[38:39], s[36:37], 0x0
	s_load_b64 s[36:37], s[28:29], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v30, s3 :: v_dual_mov_b32 v29, s2
	s_mov_b32 s3, 0
.LBB0_11:                               ; %Flow547
	v_dual_mov_b32 v3, s38 :: v_dual_mov_b32 v4, s39
	v_dual_mov_b32 v11, s36 :: v_dual_mov_b32 v12, s37
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_25
; %bb.12:
	s_mov_b32 s29, 0x400921fb
	s_mov_b32 s28, 0x54442d18
	v_add_f64 v[3:4], s[34:35], s[34:35]
	v_mul_f64 v[5:6], v[5:6], s[28:29]
                                        ; implicit-def: $vgpr25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[7:8], null, v[3:4], v[3:4], v[5:6]
	v_div_scale_f64 v[13:14], vcc_lo, v[5:6], v[3:4], v[5:6]
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], -v[7:8], v[11:12], v[13:14]
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[3:4], v[7:8], v[3:4], v[5:6]
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[3:4]|
	v_trig_preop_f64 v[17:18], |v[3:4]|, 0
	v_trig_preop_f64 v[13:14], |v[3:4]|, 1
	v_ldexp_f64 v[19:20], |v[3:4]|, 0xffffff80
	v_trig_preop_f64 v[9:10], |v[3:4]|, 2
	v_and_b32_e32 v27, 0x7fffffff, v4
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s2
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v35, 0
	s_mov_b32 s29, 0x3ff921fb
	s_mov_b32 s36, 0x33145c07
	s_mov_b32 s37, 0x3c91a626
	v_cndmask_b32_e32 v6, v27, v20, vcc_lo
	v_cndmask_b32_e32 v5, v3, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[7:8], v[17:18], v[5:6]
	v_mul_f64 v[11:12], v[13:14], v[5:6]
	v_fma_f64 v[15:16], v[17:18], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[33:34], v[13:14], v[5:6], -v[11:12]
	v_add_f64 v[21:22], v[11:12], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[21:22], -v[11:12]
	v_add_f64 v[29:30], v[7:8], v[21:22]
	v_add_f64 v[25:26], v[21:22], -v[23:24]
	v_add_f64 v[15:16], v[15:16], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[23:24], v[29:30], -2
	v_add_f64 v[7:8], v[29:30], -v[7:8]
	v_add_f64 v[11:12], v[11:12], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[23:24]|
	v_add_f64 v[7:8], v[21:22], -v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[15:16], v[11:12]
	v_fract_f64_e32 v[15:16], v[23:24]
	v_dual_cndmask_b32 v16, 0, v16 :: v_dual_cndmask_b32 v15, 0, v15
	v_mul_f64 v[31:32], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[15:16], v[15:16], 2
	v_add_f64 v[25:26], v[31:32], v[33:34]
	v_fma_f64 v[5:6], v[9:10], v[5:6], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[25:26], v[11:12]
	v_add_f64 v[23:24], v[7:8], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[23:24], v[15:16]
	v_add_f64 v[7:8], v[23:24], -v[7:8]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[29:30]
	v_add_f64 v[29:30], v[25:26], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[21:22], -v[7:8]
	v_cndmask_b32_e64 v36, 0, 0x40100000, vcc_lo
	v_add_f64 v[40:41], v[25:26], -v[29:30]
	v_add_f64 v[29:30], v[33:34], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[15:16], v[35:36]
	v_add_f64 v[36:37], v[21:22], -v[25:26]
	v_add_f64 v[33:34], v[31:32], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[23:24], v[15:16]
	v_add_f64 v[42:43], v[21:22], -v[36:37]
	v_add_f64 v[11:12], v[11:12], -v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[29:30], v[33:34]
	v_cvt_i32_f64_e32 v38, v[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[42:43]
	v_cvt_f64_i32_e32 v[36:37], v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[25:26]
	v_add_f64 v[15:16], v[15:16], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[29:30], v[11:12]
	v_add_f64 v[29:30], v[23:24], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[11:12]
	v_add_f64 v[11:12], v[29:30], -v[15:16]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[7:8], v[5:6]
	v_add_f64 v[7:8], v[23:24], -v[11:12]
	v_cndmask_b32_e64 v36, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v25, s2, 0, v38, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[29:30], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[7:8], v[5:6]
	v_mul_f64 v[15:16], v[11:12], s[28:29]
	v_add_f64 v[7:8], v[11:12], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[11:12], s[28:29], -v[15:16]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[11:12], s[36:37], v[21:22]
	v_fma_f64 v[7:8], v[5:6], s[28:29], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[15:16], v[7:8]
	v_add_f64 v[11:12], v[5:6], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
.LBB0_14:                               ; %Flow544
	s_and_not1_saveexec_b32 s2, s14
	s_cbranch_execz .LBB0_16
; %bb.15:
	s_mov_b32 s28, 0x6dc9c883
	s_mov_b32 s29, 0x3fe45f30
	s_mov_b32 s37, 0xbc91a626
	v_mul_f64 v[5:6], |v[3:4]|, s[28:29]
	s_mov_b32 s28, 0x54442d18
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s36, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[11:12], v[5:6]
	v_fma_f64 v[5:6], v[11:12], s[28:29], |v[3:4]|
	v_mul_f64 v[7:8], v[11:12], s[36:37]
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s29, 0xb97b839a
	v_cvt_i32_f64_e32 v25, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[11:12], s[36:37], v[5:6]
	v_add_f64 v[15:16], v[5:6], v[7:8]
	s_mov_b32 s37, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_fma_f64 v[7:8], v[11:12], s[36:37], v[7:8]
	v_add_f64 v[5:6], v[15:16], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[11:12], s[28:29], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[21:22], v[7:8]
	v_add_f64 v[15:16], v[5:6], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[15:16]
.LBB0_16:                               ; %_ZL3cosd.exit
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr11_vgpr12
                                        ; implicit-def: $vgpr15_vgpr16
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s2
	s_cbranch_execz .LBB0_18
; %bb.17:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v41, 0
	s_mov_b32 s28, 0x54442d18
	s_mov_b32 s29, 0x3ff921fb
	s_mov_b32 s36, 0x33145c07
	s_mov_b32 s37, 0x3c91a626
	v_cndmask_b32_e32 v12, v27, v20, vcc_lo
	v_cndmask_b32_e32 v11, v3, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[15:16], v[17:18], v[11:12]
	v_mul_f64 v[21:22], v[13:14], v[11:12]
	v_fma_f64 v[23:24], v[17:18], v[11:12], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[13:14], v[11:12], -v[21:22]
	v_add_f64 v[29:30], v[21:22], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[29:30], -v[21:22]
	v_add_f64 v[35:36], v[15:16], v[29:30]
	v_add_f64 v[33:34], v[29:30], -v[31:32]
	v_add_f64 v[23:24], v[23:24], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[31:32], v[35:36], -2
	v_add_f64 v[15:16], v[35:36], -v[15:16]
	v_add_f64 v[21:22], v[21:22], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[31:32]|
	v_add_f64 v[15:16], v[29:30], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[23:24], v[21:22]
	v_fract_f64_e32 v[23:24], v[31:32]
	v_dual_cndmask_b32 v24, 0, v24 :: v_dual_cndmask_b32 v23, 0, v23
	v_mul_f64 v[37:38], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[23:24], v[23:24], 2
	v_add_f64 v[33:34], v[37:38], v[39:40]
	v_fma_f64 v[11:12], v[9:10], v[11:12], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[33:34], v[21:22]
	v_add_f64 v[31:32], v[15:16], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[31:32], v[23:24]
	v_add_f64 v[15:16], v[31:32], -v[15:16]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[35:36]
	v_add_f64 v[35:36], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[29:30], -v[15:16]
	v_cndmask_b32_e64 v42, 0, 0x40100000, vcc_lo
	v_add_f64 v[46:47], v[33:34], -v[35:36]
	v_add_f64 v[35:36], v[39:40], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], v[41:42]
	v_add_f64 v[42:43], v[29:30], -v[33:34]
	v_add_f64 v[39:40], v[37:38], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[31:32], v[23:24]
	v_add_f64 v[48:49], v[29:30], -v[42:43]
	v_add_f64 v[21:22], v[21:22], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[35:36], v[39:40]
	v_cvt_i32_f64_e32 v26, v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], -v[48:49]
	v_cvt_f64_i32_e32 v[42:43], v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], v[33:34]
	v_add_f64 v[23:24], v[23:24], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[35:36], v[21:22]
	v_add_f64 v[33:34], v[31:32], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[21:22]
	v_add_f64 v[21:22], v[33:34], -v[23:24]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[15:16], v[11:12]
	v_add_f64 v[15:16], v[31:32], -v[21:22]
	v_cndmask_b32_e64 v42, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v26, s2, 0, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], v[15:16]
	v_add_f64 v[15:16], v[33:34], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[15:16], v[11:12]
	v_mul_f64 v[23:24], v[21:22], s[28:29]
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[21:22], s[28:29], -v[23:24]
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[21:22], s[36:37], v[29:30]
	v_fma_f64 v[15:16], v[11:12], s[28:29], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[23:24], v[15:16]
	v_add_f64 v[21:22], v[11:12], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], -v[21:22]
.LBB0_18:                               ; %Flow543
	s_and_not1_saveexec_b32 s2, s14
	s_cbranch_execz .LBB0_20
; %bb.19:
	s_mov_b32 s28, 0x6dc9c883
	s_mov_b32 s29, 0x3fe45f30
	s_mov_b32 s37, 0xbc91a626
	v_mul_f64 v[11:12], |v[3:4]|, s[28:29]
	s_mov_b32 s28, 0x54442d18
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s36, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[21:22], v[11:12]
	v_fma_f64 v[11:12], v[21:22], s[28:29], |v[3:4]|
	v_mul_f64 v[15:16], v[21:22], s[36:37]
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s29, 0xb97b839a
	v_cvt_i32_f64_e32 v26, v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[29:30], v[21:22], s[36:37], v[11:12]
	v_add_f64 v[23:24], v[11:12], v[15:16]
	s_mov_b32 s37, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[23:24]
	v_add_f64 v[23:24], v[23:24], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[15:16]
	v_fma_f64 v[15:16], v[21:22], s[36:37], v[15:16]
	v_add_f64 v[11:12], v[23:24], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	v_fma_f64 v[15:16], v[21:22], s[28:29], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[29:30], v[15:16]
	v_add_f64 v[23:24], v[11:12], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], -v[23:24]
.LBB0_20:                               ; %_ZL3sind.exit
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr31
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $vgpr23_vgpr24
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB0_22
; %bb.21:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v39, 0
	s_mov_b32 s28, 0x54442d18
	s_mov_b32 s29, 0x3ff921fb
	s_mov_b32 s36, 0x33145c07
	s_mov_b32 s37, 0x3c91a626
	v_cndmask_b32_e32 v20, v27, v20, vcc_lo
	v_cndmask_b32_e32 v19, v3, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[21:22], v[17:18], v[19:20]
	v_mul_f64 v[23:24], v[13:14], v[19:20]
	v_fma_f64 v[17:18], v[17:18], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[13:14], v[19:20], -v[23:24]
	v_add_f64 v[29:30], v[23:24], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[29:30], -v[23:24]
	v_add_f64 v[35:36], v[21:22], v[29:30]
	v_add_f64 v[33:34], v[29:30], -v[31:32]
	v_add_f64 v[17:18], v[17:18], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[31:32], v[35:36], -2
	v_add_f64 v[21:22], v[35:36], -v[21:22]
	v_add_f64 v[23:24], v[23:24], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[31:32]|
	v_add_f64 v[21:22], v[29:30], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], v[23:24]
	v_fract_f64_e32 v[23:24], v[31:32]
	v_dual_cndmask_b32 v24, 0, v24 :: v_dual_cndmask_b32 v23, 0, v23
	v_mul_f64 v[37:38], v[9:10], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[23:24], v[23:24], 2
	v_add_f64 v[33:34], v[37:38], v[13:14]
	v_fma_f64 v[9:10], v[9:10], v[19:20], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[33:34], v[17:18]
	v_add_f64 v[31:32], v[21:22], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[31:32], v[23:24]
	v_add_f64 v[19:20], v[31:32], -v[21:22]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[35:36]
	v_add_f64 v[35:36], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[29:30], -v[19:20]
	v_cndmask_b32_e64 v40, 0, 0x40100000, vcc_lo
	v_add_f64 v[44:45], v[33:34], -v[35:36]
	v_add_f64 v[13:14], v[13:14], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], v[39:40]
	v_add_f64 v[40:41], v[29:30], -v[33:34]
	v_add_f64 v[35:36], v[37:38], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[31:32], v[23:24]
	v_add_f64 v[46:47], v[29:30], -v[40:41]
	v_add_f64 v[17:18], v[17:18], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[13:14], v[35:36]
	v_cvt_i32_f64_e32 v27, v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], -v[46:47]
	v_cvt_f64_i32_e32 v[40:41], v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[33:34]
	v_add_f64 v[23:24], v[23:24], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[17:18]
	v_add_f64 v[17:18], v[31:32], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_add_f64 v[13:14], v[17:18], -v[23:24]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[19:20], v[9:10]
	v_add_f64 v[13:14], v[31:32], -v[13:14]
	v_cndmask_b32_e64 v40, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v31, s2, 0, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_add_f64 v[13:14], v[17:18], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[13:14], v[9:10]
	v_mul_f64 v[19:20], v[17:18], s[28:29]
	v_add_f64 v[13:14], v[17:18], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[17:18], s[28:29], -v[19:20]
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[17:18], s[36:37], v[21:22]
	v_fma_f64 v[9:10], v[9:10], s[28:29], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[19:20], v[9:10]
	v_add_f64 v[13:14], v[21:22], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[23:24], v[9:10], -v[13:14]
.LBB0_22:                               ; %Flow542
	s_and_not1_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_24
; %bb.23:
	s_mov_b32 s28, 0x6dc9c883
	s_mov_b32 s29, 0x3fe45f30
	s_mov_b32 s37, 0xbc91a626
	v_mul_f64 v[9:10], |v[3:4]|, s[28:29]
	s_mov_b32 s28, 0x54442d18
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s36, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[9:10]
	v_fma_f64 v[13:14], v[9:10], s[28:29], |v[3:4]|
	v_mul_f64 v[17:18], v[9:10], s[36:37]
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s29, 0xb97b839a
	v_cvt_i32_f64_e32 v31, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[9:10], s[36:37], v[13:14]
	v_add_f64 v[19:20], v[13:14], v[17:18]
	s_mov_b32 s37, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[13:14], -v[19:20]
	v_add_f64 v[19:20], v[19:20], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[17:18]
	v_fma_f64 v[17:18], v[9:10], s[36:37], v[17:18]
	v_add_f64 v[13:14], v[19:20], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[17:18]
	v_fma_f64 v[13:14], v[9:10], s[28:29], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[23:24], v[13:14]
	v_add_f64 v[17:18], v[21:22], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[23:24], v[13:14], -v[17:18]
.LBB0_24:                               ; %_ZL3cosd.exit133
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[9:10], v[11:12], v[11:12]
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s28, 0xf9a43bb8
	s_mov_b32 s3, 0xbe5ae600
	s_mov_b32 s29, 0x3de5e0b2
	v_mul_f64 v[17:18], v[5:6], v[5:6]
	v_mul_f64 v[19:20], v[21:22], v[21:22]
	s_mov_b32 s36, 0x9037ab78
	s_mov_b32 s38, 0x46cc5e42
	s_mov_b32 s42, 0x796cde01
	s_mov_b32 s37, 0x3e21eeb6
	s_mov_b32 s39, 0xbda907db
	s_mov_b32 s43, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[48:49], v[15:16], 0.5
	v_mul_f64 v[58:59], v[23:24], 0.5
	v_fma_f64 v[13:14], v[9:10], s[28:29], s[2:3]
	v_fma_f64 v[29:30], v[9:10], s[38:39], s[36:37]
	v_mul_f64 v[32:33], v[9:10], 0.5
	v_mul_f64 v[50:51], v[11:12], -v[9:10]
	v_mul_f64 v[66:67], v[9:10], v[9:10]
	v_fma_f64 v[34:35], v[17:18], s[28:29], s[2:3]
	v_fma_f64 v[36:37], v[19:20], s[28:29], s[2:3]
	s_mov_b32 s2, 0xa17f65f6
	s_mov_b32 s28, 0x19e83e5c
	s_mov_b32 s3, 0xbe927e4f
	s_mov_b32 s29, 0xbf2a01a0
	v_fma_f64 v[40:41], v[17:18], s[38:39], s[36:37]
	v_fma_f64 v[44:45], v[19:20], s[38:39], s[36:37]
	s_mov_b32 s36, 0x19f4ec90
	s_mov_b32 s38, 0x11110bb3
	s_mov_b32 s37, 0x3efa01a0
	s_mov_b32 s39, 0x3f811111
	v_mul_f64 v[42:43], v[17:18], 0.5
	v_mul_f64 v[46:47], v[19:20], 0.5
	v_mul_f64 v[62:63], v[21:22], -v[19:20]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[42:43]
	v_fma_f64 v[29:30], v[9:10], v[29:30], s[2:3]
	v_add_f64 v[38:39], -v[32:33], 1.0
	v_fma_f64 v[34:35], v[17:18], v[34:35], s[42:43]
	v_fma_f64 v[36:37], v[19:20], v[36:37], s[42:43]
	v_fma_f64 v[40:41], v[17:18], v[40:41], s[2:3]
	v_fma_f64 v[44:45], v[19:20], v[44:45], s[2:3]
	s_mov_b32 s2, 0x16c16967
	s_mov_b32 s3, 0xbf56c16c
	v_add_f64 v[54:55], -v[42:43], 1.0
	v_add_f64 v[56:57], -v[46:47], 1.0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[28:29]
	v_fma_f64 v[29:30], v[9:10], v[29:30], s[36:37]
	v_add_f64 v[52:53], -v[38:39], 1.0
	v_fma_f64 v[34:35], v[17:18], v[34:35], s[28:29]
	v_fma_f64 v[36:37], v[19:20], v[36:37], s[28:29]
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s29, 0x3fa55555
	v_fma_f64 v[40:41], v[17:18], v[40:41], s[36:37]
	v_fma_f64 v[44:45], v[19:20], v[44:45], s[36:37]
	v_add_f64 v[60:61], -v[54:55], 1.0
	v_add_f64 v[64:65], -v[56:57], 1.0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[38:39]
	v_fma_f64 v[29:30], v[9:10], v[29:30], s[2:3]
	v_add_f64 v[32:33], v[52:53], -v[32:33]
	v_mul_f64 v[52:53], v[5:6], -v[17:18]
	v_fma_f64 v[34:35], v[17:18], v[34:35], s[38:39]
	v_fma_f64 v[36:37], v[19:20], v[36:37], s[38:39]
	v_fma_f64 v[13:14], v[50:51], v[13:14], v[48:49]
	v_mul_f64 v[48:49], v[7:8], 0.5
	v_fma_f64 v[29:30], v[9:10], v[29:30], s[28:29]
	v_fma_f64 v[32:33], v[11:12], -v[15:16], v[32:33]
	v_fma_f64 v[36:37], v[62:63], v[36:37], v[58:59]
	v_fma_f64 v[9:10], v[9:10], v[13:14], -v[15:16]
	v_fma_f64 v[13:14], v[52:53], v[34:35], v[48:49]
	v_fma_f64 v[15:16], v[17:18], v[40:41], s[2:3]
	v_fma_f64 v[40:41], v[19:20], v[44:45], s[2:3]
	s_mov_b32 s3, 0xbfc55555
	s_mov_b32 s2, s28
	v_add_f64 v[34:35], v[60:61], -v[42:43]
	v_add_f64 v[42:43], v[64:65], -v[46:47]
	v_fma_f64 v[29:30], v[66:67], v[29:30], v[32:33]
	v_mul_f64 v[32:33], v[17:18], v[17:18]
	v_fma_f64 v[9:10], v[50:51], s[2:3], v[9:10]
	v_fma_f64 v[13:14], v[17:18], v[13:14], -v[7:8]
	v_fma_f64 v[15:16], v[17:18], v[15:16], s[28:29]
	v_fma_f64 v[17:18], v[19:20], v[36:37], -v[23:24]
	v_fma_f64 v[7:8], v[5:6], -v[7:8], v[34:35]
	v_mul_f64 v[34:35], v[19:20], v[19:20]
	v_fma_f64 v[19:20], v[19:20], v[40:41], s[28:29]
	v_fma_f64 v[23:24], v[21:22], -v[23:24], v[42:43]
	v_add_f64 v[29:30], v[38:39], v[29:30]
	v_add_f64 v[9:10], v[11:12], -v[9:10]
	v_fma_f64 v[11:12], v[52:53], s[2:3], v[13:14]
	v_fma_f64 v[13:14], v[62:63], s[2:3], v[17:18]
	v_cmp_class_f64_e64 s2, v[3:4], 0x1f8
	v_lshlrev_b32_e32 v3, 30, v26
	v_fma_f64 v[7:8], v[32:33], v[15:16], v[7:8]
	v_fma_f64 v[15:16], v[34:35], v[19:20], v[23:24]
	v_add_f64 v[5:6], v[5:6], -v[11:12]
	v_add_f64 v[11:12], v[21:22], -v[13:14]
	v_xor_b32_e32 v13, v3, v4
	v_add_f64 v[7:8], v[54:55], v[7:8]
	v_add_f64 v[3:4], v[56:57], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_and_b32_e32 v13, 0x80000000, v13
	v_xor_b32_e32 v6, 0x80000000, v6
	v_and_b32_e32 v17, 1, v26
	v_cmp_eq_u32_e32 vcc_lo, 0, v17
	v_dual_cndmask_b32 v9, v29, v9 :: v_dual_cndmask_b32 v10, v30, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, 0, v9, s2
	v_xor_b32_e32 v10, v10, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, 0x7ff80000, v10, s2
	v_mul_f64 v[29:30], s[34:35], v[9:10]
	v_and_b32_e32 v9, 1, v25
	v_and_b32_e32 v10, 1, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	v_xor_b32_e32 v9, 0x80000000, v12
	v_cmp_eq_u32_e64 s3, 0, v10
	v_lshlrev_b32_e32 v10, 30, v31
	v_cndmask_b32_e32 v5, v5, v7, vcc_lo
	v_dual_cndmask_b32 v6, v6, v8 :: v_dual_lshlrev_b32 v7, 30, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v11, v3, s3
	v_cndmask_b32_e64 v3, v9, v4, s3
	v_and_b32_e32 v4, 0x80000000, v10
	v_and_b32_e32 v7, 0x80000000, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, v8, s2
	v_xor_b32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v7, v3, v4
	v_cndmask_b32_e64 v3, 0, v5, s2
	v_cndmask_b32_e64 v4, 0x7ff80000, v6, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v12, 0x7ff80000, v7, s2
.LBB0_25:
	s_mov_b32 s29, 0x401921fb
	s_mov_b32 s28, 0x54442d18
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[5:6], null, s[30:31], s[30:31], s[28:29]
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_lshr_b32 s2, s40, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v35, v37
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[31:32], null, s15, s2, v[0:1]
	v_mov_b32_e32 v36, v38
	s_cmp_lt_i32 s24, 1
	v_rcp_f64_e32 v[7:8], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_div_scale_f64 v[9:10], vcc_lo, s[28:29], s[30:31], s[28:29]
	v_mul_f64 v[13:14], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], -v[5:6], v[13:14], v[9:10]
	v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[33:34], v[5:6], s[30:31], s[28:29]
	s_cbranch_scc1 .LBB0_38
; %bb.26:                               ; %.preheader.lr.ph
	v_mov_b32_e32 v5, 0
	v_mov_b32_e32 v35, 0
	v_mov_b32_e32 v36, 0
	v_add_f64 v[9:10], v[29:30], v[29:30]
	s_mov_b32 s15, 0
	v_mov_b32_e32 v32, v5
	s_mov_b32 s36, 0x6dc9c883
	v_dual_mov_b32 v38, v36 :: v_dual_mov_b32 v37, v35
	s_mov_b32 s38, 0x33145c00
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[31:32]
	s_mov_b32 s40, 0x252049c0
	s_mov_b32 s42, 0x9037ab78
	s_mov_b32 s44, 0x46cc5e42
	s_mov_b32 s46, 0xa17f65f6
	s_mov_b32 s48, 0x19f4ec90
	v_add_co_u32 v6, vcc_lo, s26, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s27, v7, vcc_lo
	s_mov_b32 s50, 0x16c16967
	s_mov_b32 s52, 0x55555555
	s_mov_b32 s54, 0xb42fdfa7
	global_load_b64 v[7:8], v[6:7], off
	s_mov_b32 s56, 0xf9a43bb8
	s_mov_b32 s58, 0x796cde01
	s_mov_b32 s60, 0x19e83e5c
	s_mov_b32 s62, 0x11110bb3
	s_mov_b32 s27, 0x3ff921fb
	s_mov_b32 s31, 0x3c91a626
	s_mov_b32 s34, 0x33145c07
	s_mov_b32 s37, 0x3fe45f30
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s39, 0xbc91a626
	s_mov_b32 s41, 0xb97b839a
	s_mov_b32 s43, 0x3e21eeb6
	s_mov_b32 s45, 0xbda907db
	s_mov_b32 s47, 0xbe927e4f
	s_mov_b32 s49, 0x3efa01a0
	s_mov_b32 s51, 0xbf56c16c
	s_mov_b32 s53, 0x3fa55555
	v_div_scale_f64 v[13:14], null, v[9:10], v[9:10], v[33:34]
	v_div_scale_f64 v[19:20], vcc_lo, v[33:34], v[9:10], v[33:34]
	s_mov_b32 s55, 0xbe5ae600
	s_mov_b32 s57, 0x3de5e0b2
	s_mov_b32 s59, 0x3ec71de3
	s_mov_b32 s61, 0xbf2a01a0
	s_mov_b32 s63, 0x3f811111
	s_mov_b32 s65, 0xbfc55555
	s_mov_b32 s70, 0
	s_mov_b32 s66, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[15:16], v[13:14]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], v[19:20], v[15:16]
	v_fma_f64 v[13:14], -v[13:14], v[17:18], v[19:20]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[19:20], v[7:8], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[13:14], v[13:14], v[15:16], v[17:18]
	v_fma_f64 v[15:16], v[1:2], v[1:2], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[9:10], v[13:14], v[9:10], v[33:34]
	v_mul_f64 v[11:12], v[11:12], v[15:16]
.LBB0_27:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_28 Depth 2
	s_mov_b32 s67, s15
	s_mov_b64 s[68:69], s[20:21]
	s_lshl_b64 s[2:3], s[66:67], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s22, s2
	s_addc_u32 s3, s23, s3
	s_load_b64 s[2:3], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[13:14], s[2:3], s[2:3]
	v_mul_f64 v[15:16], s[2:3], v[7:8]
.LBB0_28:                               ;   Parent Loop BB0_27 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_load_b64 s[2:3], s[68:69], 0x0
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr21_vgpr22
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[1:2], s[2:3], v[15:16]
	v_fma_f64 v[19:20], s[2:3], s[2:3], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], v[17:18]
	v_fma_f64 v[17:18], v[3:4], v[19:20], -v[17:18]
                                        ; implicit-def: $vgpr19_vgpr20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[11:12], v[17:18]
	v_mul_f64 v[17:18], v[9:10], v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[17:18]|
	v_trig_preop_f64 v[39:40], |v[17:18]|, 0
	v_trig_preop_f64 v[25:26], |v[17:18]|, 1
	v_ldexp_f64 v[41:42], |v[17:18]|, 0xffffff80
	v_trig_preop_f64 v[23:24], |v[17:18]|, 2
	v_and_b32_e32 v32, 0x7fffffff, v18
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s2
	s_cbranch_execz .LBB0_30
; %bb.29:                               ;   in Loop: Header=BB0_28 Depth=2
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[17:18]|
	s_mov_b32 s26, s28
	s_mov_b32 s35, s31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v20, v32, v42 :: v_dual_cndmask_b32 v19, v17, v41
	v_mul_f64 v[21:22], v[39:40], v[19:20]
	v_mul_f64 v[43:44], v[25:26], v[19:20]
	v_mul_f64 v[55:56], v[23:24], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[39:40], v[19:20], -v[21:22]
	v_fma_f64 v[57:58], v[25:26], v[19:20], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[23:24], v[19:20], -v[55:56]
	v_add_f64 v[47:48], v[43:44], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[47:48], -v[43:44]
	v_add_f64 v[53:54], v[21:22], v[47:48]
	v_add_f64 v[51:52], v[47:48], -v[49:50]
	v_add_f64 v[45:46], v[45:46], -v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[49:50], v[53:54], -2
	v_add_f64 v[21:22], v[53:54], -v[21:22]
	v_add_f64 v[43:44], v[43:44], -v[51:52]
	v_add_f64 v[51:52], v[55:56], v[57:58]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[49:50]|
	v_add_f64 v[21:22], v[47:48], -v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[45:46], v[43:44]
	v_fract_f64_e32 v[45:46], v[49:50]
	v_add_f64 v[47:48], v[51:52], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v46, 0, v46 :: v_dual_cndmask_b32 v45, 0, v45
	v_ldexp_f64 v[45:46], v[45:46], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[21:22], v[47:48]
	v_add_f64 v[59:60], v[47:48], -v[51:52]
	v_add_f64 v[53:54], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[65:66], v[47:48], -v[59:60]
	v_add_f64 v[43:44], v[43:44], -v[59:60]
	v_add_f64 v[21:22], v[49:50], -v[21:22]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[53:54]
	v_add_f64 v[53:54], v[51:52], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[47:48], -v[21:22]
	v_cndmask_b32_e64 v6, 0, 0x40100000, vcc_lo
	v_add_f64 v[63:64], v[51:52], -v[53:54]
	v_add_f64 v[53:54], v[57:58], -v[53:54]
	v_add_f64 v[51:52], v[51:52], -v[65:66]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[45:46], v[45:46], v[5:6]
	v_add_f64 v[57:58], v[55:56], -v[63:64]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[43:44], v[51:52]
	v_add_f64 v[61:62], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[57:58]
	v_cvt_i32_f64_e32 v0, v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[53:54], v[43:44]
	v_cvt_f64_i32_e32 v[59:60], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[43:44]
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[21:22], v[19:20]
	v_add_f64 v[51:52], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[51:52], -v[45:46]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[51:52]
	v_add_f64 v[21:22], v[49:50], -v[43:44]
	v_cndmask_b32_e64 v6, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v0, s2, 0, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_add_f64 v[21:22], v[51:52], -v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[21:22], v[19:20]
	v_mul_f64 v[45:46], v[43:44], s[26:27]
	v_add_f64 v[21:22], v[43:44], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], s[26:27], -v[45:46]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[43:44], s[34:35], v[47:48]
	v_fma_f64 v[21:22], v[19:20], s[26:27], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[45:46], v[21:22]
	v_add_f64 v[43:44], v[19:20], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[43:44]
.LBB0_30:                               ; %Flow538
                                        ;   in Loop: Header=BB0_28 Depth=2
	s_and_not1_saveexec_b32 s2, s14
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_28 Depth=2
	v_mul_f64 v[19:20], |v[17:18]|, s[36:37]
	s_mov_b32 s30, s38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[43:44], v[19:20]
	v_fma_f64 v[19:20], v[43:44], s[28:29], |v[17:18]|
	v_mul_f64 v[21:22], v[43:44], s[38:39]
	v_cvt_i32_f64_e32 v0, v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[43:44], s[38:39], v[19:20]
	v_add_f64 v[45:46], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], -v[45:46]
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_fma_f64 v[21:22], v[43:44], s[30:31], v[21:22]
	v_add_f64 v[19:20], v[45:46], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	v_fma_f64 v[21:22], v[43:44], s[40:41], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[47:48], v[21:22]
	v_add_f64 v[45:46], v[19:20], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[45:46]
.LBB0_32:                               ; %_ZL3cosd.exit.i
                                        ;   in Loop: Header=BB0_28 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr45_vgpr46
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_28 Depth=2
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[17:18]|
	s_mov_b32 s26, s28
	s_mov_b32 s35, s31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v42, v32, v42 :: v_dual_cndmask_b32 v41, v17, v41
	v_mul_f64 v[43:44], v[39:40], v[41:42]
	v_mul_f64 v[45:46], v[25:26], v[41:42]
	v_mul_f64 v[55:56], v[23:24], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], v[39:40], v[41:42], -v[43:44]
	v_fma_f64 v[25:26], v[25:26], v[41:42], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[23:24], v[41:42], -v[55:56]
	v_add_f64 v[47:48], v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[47:48], -v[45:46]
	v_add_f64 v[53:54], v[43:44], v[47:48]
	v_add_f64 v[51:52], v[47:48], -v[49:50]
	v_add_f64 v[39:40], v[39:40], -v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[49:50], v[53:54], -2
	v_add_f64 v[43:44], v[53:54], -v[43:44]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	v_add_f64 v[51:52], v[55:56], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[49:50]|
	v_add_f64 v[43:44], v[47:48], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[45:46]
	v_fract_f64_e32 v[45:46], v[49:50]
	v_add_f64 v[47:48], v[51:52], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v46, 0, v46 :: v_dual_cndmask_b32 v45, 0, v45
	v_ldexp_f64 v[45:46], v[45:46], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[43:44], v[47:48]
	v_add_f64 v[57:58], v[47:48], -v[51:52]
	v_add_f64 v[53:54], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[63:64], v[47:48], -v[57:58]
	v_add_f64 v[39:40], v[39:40], -v[57:58]
	v_add_f64 v[41:42], v[49:50], -v[43:44]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[53:54]
	v_add_f64 v[53:54], v[51:52], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[47:48], -v[41:42]
	v_cndmask_b32_e64 v6, 0, 0x40100000, vcc_lo
	v_add_f64 v[61:62], v[51:52], -v[53:54]
	v_add_f64 v[25:26], v[25:26], -v[53:54]
	v_add_f64 v[51:52], v[51:52], -v[63:64]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[45:46], v[45:46], v[5:6]
	v_add_f64 v[53:54], v[55:56], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], v[51:52]
	v_add_f64 v[59:60], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[53:54]
	v_cvt_i32_f64_e32 v6, v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[39:40]
	v_cvt_f64_i32_e32 v[57:58], v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[45:46], v[45:46], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[41:42], v[23:24]
	v_add_f64 v[39:40], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[39:40], -v[45:46]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[39:40]
	v_add_f64 v[25:26], v[49:50], -v[25:26]
	v_add_co_ci_u32_e64 v27, s2, 0, v6, vcc_lo
	v_cndmask_b32_e64 v6, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[39:40], -v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[25:26], v[23:24]
	v_mul_f64 v[41:42], v[39:40], s[26:27]
	v_add_f64 v[25:26], v[39:40], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], v[39:40], s[26:27], -v[41:42]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[39:40], s[34:35], v[43:44]
	v_fma_f64 v[23:24], v[23:24], s[26:27], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[41:42], v[23:24]
	v_add_f64 v[25:26], v[43:44], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[23:24], -v[25:26]
.LBB0_34:                               ; %Flow537
                                        ;   in Loop: Header=BB0_28 Depth=2
	s_and_not1_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_28 Depth=2
	v_mul_f64 v[23:24], |v[17:18]|, s[36:37]
	s_mov_b32 s30, s38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_fma_f64 v[25:26], v[23:24], s[28:29], |v[17:18]|
	v_mul_f64 v[39:40], v[23:24], s[38:39]
	v_cvt_i32_f64_e32 v27, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[23:24], s[38:39], v[25:26]
	v_add_f64 v[41:42], v[25:26], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[41:42]
	v_add_f64 v[41:42], v[41:42], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[39:40]
	v_fma_f64 v[39:40], v[23:24], s[30:31], v[39:40]
	v_add_f64 v[25:26], v[41:42], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[39:40]
	v_fma_f64 v[25:26], v[23:24], s[40:41], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[45:46], v[25:26]
	v_add_f64 v[39:40], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[25:26], -v[39:40]
.LBB0_36:                               ; %_Z3expRK15HIP_vector_typeIdLj2EE.exit
                                        ;   in Loop: Header=BB0_28 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[23:24], v[19:20], v[19:20]
	v_mul_f64 v[25:26], v[43:44], v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[59:60], v[21:22], 0.5
	v_mul_f64 v[65:66], v[45:46], 0.5
	s_mov_b32 s64, s52
	v_cmp_class_f64_e64 s2, v[17:18], 0x1f8
	v_and_b32_e32 v6, 1, v0
	v_lshlrev_b32_e32 v0, 30, v0
	s_add_i32 s14, s70, s67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_and_b32_e32 v0, 0x80000000, v0
	v_fma_f64 v[39:40], v[23:24], s[56:57], s[54:55]
	v_fma_f64 v[41:42], v[25:26], s[56:57], s[54:55]
	v_fma_f64 v[47:48], v[23:24], s[44:45], s[42:43]
	v_mul_f64 v[49:50], v[23:24], 0.5
	v_fma_f64 v[51:52], v[25:26], s[44:45], s[42:43]
	v_mul_f64 v[53:54], v[25:26], 0.5
	v_mul_f64 v[61:62], v[19:20], -v[23:24]
	v_mul_f64 v[67:68], v[43:44], -v[25:26]
	v_fma_f64 v[39:40], v[23:24], v[39:40], s[58:59]
	v_fma_f64 v[41:42], v[25:26], v[41:42], s[58:59]
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[46:47]
	v_add_f64 v[55:56], -v[49:50], 1.0
	v_fma_f64 v[51:52], v[25:26], v[51:52], s[46:47]
	v_add_f64 v[57:58], -v[53:54], 1.0
	v_fma_f64 v[39:40], v[23:24], v[39:40], s[60:61]
	v_fma_f64 v[41:42], v[25:26], v[41:42], s[60:61]
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[48:49]
	v_add_f64 v[63:64], -v[55:56], 1.0
	v_fma_f64 v[51:52], v[25:26], v[51:52], s[48:49]
	v_add_f64 v[69:70], -v[57:58], 1.0
	v_fma_f64 v[39:40], v[23:24], v[39:40], s[62:63]
	v_fma_f64 v[41:42], v[25:26], v[41:42], s[62:63]
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[50:51]
	v_add_f64 v[49:50], v[63:64], -v[49:50]
	v_fma_f64 v[51:52], v[25:26], v[51:52], s[50:51]
	v_add_f64 v[53:54], v[69:70], -v[53:54]
	v_fma_f64 v[39:40], v[61:62], v[39:40], v[59:60]
	v_fma_f64 v[41:42], v[67:68], v[41:42], v[65:66]
	v_mul_f64 v[59:60], v[23:24], v[23:24]
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[52:53]
	v_fma_f64 v[49:50], v[19:20], -v[21:22], v[49:50]
	v_fma_f64 v[21:22], v[23:24], v[39:40], -v[21:22]
	v_mul_f64 v[23:24], v[25:26], v[25:26]
	v_fma_f64 v[39:40], v[25:26], v[51:52], s[52:53]
	v_fma_f64 v[51:52], v[43:44], -v[45:46], v[53:54]
	v_fma_f64 v[25:26], v[25:26], v[41:42], -v[45:46]
	v_fma_f64 v[41:42], v[59:60], v[47:48], v[49:50]
	v_fma_f64 v[21:22], v[61:62], s[64:65], v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[23:24], v[23:24], v[39:40], v[51:52]
	v_fma_f64 v[25:26], v[67:68], s[64:65], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[55:56], v[41:42]
	v_lshlrev_b32_e32 v17, 30, v27
	v_xor_b32_e32 v17, v17, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v17, 0x80000000, v17
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	v_add_f64 v[21:22], v[57:58], v[23:24]
	v_add_f64 v[23:24], v[43:44], -v[25:26]
	v_cndmask_b32_e32 v6, v19, v39, vcc_lo
	v_and_b32_e32 v19, 1, v27
	v_xor_b32_e32 v18, 0x80000000, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s3, 0, v19
	v_cndmask_b32_e32 v18, v18, v40, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v20, v22, v24, s3
	v_cndmask_b32_e64 v19, v21, v23, s3
	v_xor_b32_e32 v0, v18, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v20, v20, v17
	v_cndmask_b32_e64 v17, 0, v6, s2
	v_cndmask_b32_e64 v18, 0x7ff80000, v0, s2
	v_cndmask_b32_e64 v19, 0, v19, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v20, 0x7ff80000, v20, s2
	s_lshl_b64 s[2:3], s[14:15], 4
	s_add_u32 s2, s18, s2
	s_addc_u32 s3, s19, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[21:22], v[17:18], 0, v[19:20]
	v_fma_f64 v[17:18], 0x80000000, v[19:20], v[17:18]
	s_load_b128 s[72:75], s[2:3], 0x0
	s_add_i32 s67, s67, 1
	s_add_u32 s68, s68, 8
	s_addc_u32 s69, s69, 0
	s_cmp_eq_u32 s24, s67
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[19:20], s[74:75], v[21:22]
	v_mul_f64 v[23:24], s[74:75], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], s[72:73], v[17:18], -v[19:20]
	v_fma_f64 v[19:20], s[72:73], v[21:22], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[35:36], v[17:18]
	v_add_f64 v[37:38], v[37:38], v[19:20]
	s_cbranch_scc0 .LBB0_28
; %bb.37:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_27 Depth=1
	s_add_i32 s66, s66, 1
	s_add_i32 s70, s70, s24
	s_cmp_eq_u32 s66, s24
	s_cbranch_scc0 .LBB0_27
.LBB0_38:                               ; %._crit_edge184
	s_load_b64 s[0:1], s[0:1], 0x40
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v0, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_40
; %bb.39:
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s3
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v0, v1, s[0:1]
.LBB0_40:
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v39, 0
	v_mov_b32_e32 v40, 0x40590000
	s_waitcnt lgkmcnt(0)
	global_load_b32 v0, v0, s[0:1]
	s_mul_i32 s0, s33, s25
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, s0, v0
	s_cbranch_vccnz .LBB0_42
; %bb.41:
	v_cvt_f64_i32_e32 v[0:1], v0
	v_cvt_f64_i32_e32 v[2:3], s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], v[0:1]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[2:3], v[0:1]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[4:5], v[2:3], v[0:1]
	v_mul_f64 v[0:1], 0x40c38800, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f64_e32 v[0:1], v[0:1]
	v_div_scale_f64 v[2:3], null, 0x40590000, 0x40590000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_div_scale_f64 v[6:7], vcc_lo, v[0:1], 0x40590000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[6:7], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
	v_div_fixup_f64 v[39:40], v[2:3], 0x40590000, v[0:1]
.LBB0_42:
	s_load_b64 s[2:3], s[12:13], 0x50
	v_mbcnt_lo_u32_b32 v41, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v41
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_48
; %bb.43:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[5:6], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB0_47
; %bb.44:                               ; %.preheader3.i.i.i.i.preheader
	s_mov_b32 s13, 0
.LBB0_45:                               ; %.preheader3.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[10:11], v0, s[2:3]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_45
; %bb.46:                               ; %Flow532
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_47:                               ; %Flow534
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_48:                               ; %.loopexit4.i.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s12, v6
	v_readfirstlane_b32 s13, v7
	s_mov_b32 s20, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[2:3] offset:40
	global_load_b128 v[0:3], v5, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s14, v8
	v_readfirstlane_b32 s15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[12:13], s[14:15]
	s_mul_i32 s1, s15, 24
	s_mul_hi_u32 s18, s14, 24
	s_mul_i32 s19, s14, 24
	s_and_saveexec_b32 s21, s0
	s_cbranch_execz .LBB0_50
; %bb.49:
	s_add_i32 s22, s18, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s19
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v1, vcc_lo
	v_dual_mov_b32 v6, s20 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB0_50:
	s_or_b32 exec_lo, exec_lo, s21
	s_lshl_b64 s[14:15], s[14:15], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s14
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s20 :: v_dual_mov_b32 v13, s23
	v_dual_mov_b32 v11, s21 :: v_dual_mov_b32 v12, s22
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_57
; %bb.51:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s15, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v12, s13
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s13, v3
	v_and_b32_e32 v2, s12, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB0_53
.LBB0_52:                               ; %.preheader1.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s13
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s20, vcc_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_52
.LBB0_53:                               ; %Flow530
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v5, 0
	s_mov_b32 s20, exec_lo
	s_mov_b32 s15, exec_lo
	v_mbcnt_lo_u32_b32 v4, s20, 0
	global_load_b64 v[2:3], v5, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_55
; %bb.54:
	s_bcnt1_i32_b32 s20, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s20
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB0_55:
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB0_57
; %bb.56:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s15, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s15, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_57:                               ; %Flow531
	s_or_b32 exec_lo, exec_lo, s14
	s_add_i32 s18, s18, s1
	v_add_co_u32 v0, vcc_lo, v0, s19
	v_add_co_ci_u32_e32 v1, vcc_lo, s18, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_58:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_60
; %bb.59:                               ;   in Loop: Header=BB0_58 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_60:                               ;   in Loop: Header=BB0_58 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_62
; %bb.61:                               ;   in Loop: Header=BB0_58 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_63
.LBB0_62:                               ;   in Loop: Header=BB0_58 Depth=1
	s_mov_b32 s1, -1
.LBB0_63:                               ; %Flow525
                                        ;   in Loop: Header=BB0_58 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_58
; %bb.64:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_68
; %bb.65:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_68
; %bb.66:                               ; %.preheader.i.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_67:                               ; %.preheader.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_67
.LBB0_68:                               ; %__ockl_printf_begin.exit.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, .str@rel32@lo+4
	s_addc_u32 s13, s13, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[12:13], 0
	s_cbranch_scc0 .LBB0_154
; %bb.69:
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v43, 0 :: v_dual_and_b32 v32, 2, v0
	v_dual_mov_b32 v3, v1 :: v_dual_and_b32 v2, -3, v0
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	s_mov_b64 s[14:15], 27
.LBB0_70:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_73 Depth 2
                                        ;     Child Loop BB0_80 Depth 2
                                        ;     Child Loop BB0_88 Depth 2
                                        ;     Child Loop BB0_96 Depth 2
                                        ;     Child Loop BB0_104 Depth 2
                                        ;     Child Loop BB0_112 Depth 2
                                        ;     Child Loop BB0_120 Depth 2
                                        ;     Child Loop BB0_128 Depth 2
                                        ;     Child Loop BB0_136 Depth 2
                                        ;     Child Loop BB0_142 Depth 2
                                        ;     Child Loop BB0_151 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u64_e64 s0, s[14:15], 56
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $sgpr25
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s18, s14, 56
	s_cselect_b32 s19, s15, 0
	s_cmp_gt_u32 s18, 7
	s_mov_b32 s0, -1
	s_cbranch_scc1 .LBB0_75
; %bb.71:                               ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v10, 0
	v_mov_b32_e32 v11, 0
	s_cmp_eq_u32 s18, 0
	s_cbranch_scc1 .LBB0_74
; %bb.72:                               ; %.preheader31.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_lshl_b64 s[0:1], s[18:19], 3
	s_mov_b64 s[20:21], 0
	s_mov_b64 s[22:23], s[12:13]
.LBB0_73:                               ; %.preheader31.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v4, v43, s[22:23]
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v42, 0xffff, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], s20, v[42:43]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_add_u32 s22, s22, 1
	s_addc_u32 s23, s23, 0
	s_cmp_lg_u32 s0, s20
	v_or_b32_e32 v10, v4, v10
	v_or_b32_e32 v11, v5, v11
	s_cbranch_scc1 .LBB0_73
.LBB0_74:                               ; %Flow501
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s25, 0
.LBB0_75:                               ; %Flow503
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[0:1], s[12:13]
	s_cbranch_vccnz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[10:11], v43, s[12:13]
	s_add_i32 s25, s18, -8
	s_add_u32 s0, s12, 8
	s_addc_u32 s1, s13, 0
.LBB0_77:                               ; %.loopexit32.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_cmp_gt_u32 s25, 7
	s_cbranch_scc1 .LBB0_82
; %bb.78:                               ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	s_cmp_eq_u32 s25, 0
	s_cbranch_scc1 .LBB0_81
; %bb.79:                               ; %.preheader29.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b64 s[20:21], 0
	s_mov_b64 s[22:23], 0
.LBB0_80:                               ; %.preheader29.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s22
	s_addc_u32 s27, s1, s23
	s_add_u32 s22, s22, 1
	global_load_u8 v4, v43, s[26:27]
	s_addc_u32 s23, s23, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v42, 0xffff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], s20, v[42:43]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s25, s22
	v_or_b32_e32 v12, v4, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v13, v5, v13
	s_cbranch_scc1 .LBB0_80
.LBB0_81:                               ; %Flow496
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, 0
	s_mov_b32 s24, 0
	s_branch .LBB0_83
.LBB0_82:                               ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, -1
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $sgpr24
.LBB0_83:                               ; %Flow498
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_85
; %bb.84:                               ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[12:13], v43, s[0:1]
	s_add_i32 s24, s25, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_85:                               ; %.loopexit30.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_cmp_gt_u32 s24, 7
	s_cbranch_scc1 .LBB0_90
; %bb.86:                               ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_cmp_eq_u32 s24, 0
	s_cbranch_scc1 .LBB0_89
; %bb.87:                               ; %.preheader27.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b64 s[20:21], 0
	s_mov_b64 s[22:23], 0
.LBB0_88:                               ; %.preheader27.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s22
	s_addc_u32 s27, s1, s23
	s_add_u32 s22, s22, 1
	global_load_u8 v4, v43, s[26:27]
	s_addc_u32 s23, s23, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v42, 0xffff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], s20, v[42:43]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s24, s22
	v_or_b32_e32 v14, v4, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v5, v15
	s_cbranch_scc1 .LBB0_88
.LBB0_89:                               ; %Flow491
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, 0
	s_mov_b32 s25, 0
	s_branch .LBB0_91
.LBB0_90:                               ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, -1
                                        ; implicit-def: $sgpr25
.LBB0_91:                               ; %Flow493
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_93
; %bb.92:                               ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[14:15], v43, s[0:1]
	s_add_i32 s25, s24, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_93:                               ; %.loopexit28.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_cmp_gt_u32 s25, 7
	s_cbranch_scc1 .LBB0_98
; %bb.94:                               ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_cmp_eq_u32 s25, 0
	s_cbranch_scc1 .LBB0_97
; %bb.95:                               ; %.preheader25.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b64 s[20:21], 0
	s_mov_b64 s[22:23], 0
.LBB0_96:                               ; %.preheader25.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s22
	s_addc_u32 s27, s1, s23
	s_add_u32 s22, s22, 1
	global_load_u8 v4, v43, s[26:27]
	s_addc_u32 s23, s23, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v42, 0xffff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], s20, v[42:43]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s25, s22
	v_or_b32_e32 v16, v4, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v5, v17
	s_cbranch_scc1 .LBB0_96
.LBB0_97:                               ; %Flow486
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, 0
	s_mov_b32 s24, 0
	s_branch .LBB0_99
.LBB0_98:                               ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, -1
                                        ; implicit-def: $vgpr16_vgpr17
                                        ; implicit-def: $sgpr24
.LBB0_99:                               ; %Flow488
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_101
; %bb.100:                              ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[16:17], v43, s[0:1]
	s_add_i32 s24, s25, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_101:                              ; %.loopexit26.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_cmp_gt_u32 s24, 7
	s_cbranch_scc1 .LBB0_106
; %bb.102:                              ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_cmp_eq_u32 s24, 0
	s_cbranch_scc1 .LBB0_105
; %bb.103:                              ; %.preheader23.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b64 s[20:21], 0
	s_mov_b64 s[22:23], 0
.LBB0_104:                              ; %.preheader23.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s22
	s_addc_u32 s27, s1, s23
	s_add_u32 s22, s22, 1
	global_load_u8 v4, v43, s[26:27]
	s_addc_u32 s23, s23, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v42, 0xffff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], s20, v[42:43]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s24, s22
	v_or_b32_e32 v18, v4, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v5, v19
	s_cbranch_scc1 .LBB0_104
.LBB0_105:                              ; %Flow481
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, 0
	s_mov_b32 s25, 0
	s_branch .LBB0_107
.LBB0_106:                              ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, -1
                                        ; implicit-def: $sgpr25
.LBB0_107:                              ; %Flow483
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[18:19], v43, s[0:1]
	s_add_i32 s25, s24, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_109:                              ; %.loopexit24.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_cmp_gt_u32 s25, 7
	s_cbranch_scc1 .LBB0_114
; %bb.110:                              ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_cmp_eq_u32 s25, 0
	s_cbranch_scc1 .LBB0_113
; %bb.111:                              ; %.preheader21.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b64 s[20:21], 0
	s_mov_b64 s[22:23], 0
.LBB0_112:                              ; %.preheader21.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s22
	s_addc_u32 s27, s1, s23
	s_add_u32 s22, s22, 1
	global_load_u8 v4, v43, s[26:27]
	s_addc_u32 s23, s23, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v42, 0xffff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], s20, v[42:43]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s25, s22
	v_or_b32_e32 v20, v4, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v5, v21
	s_cbranch_scc1 .LBB0_112
.LBB0_113:                              ; %Flow476
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, 0
	s_mov_b32 s24, 0
	s_branch .LBB0_115
.LBB0_114:                              ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, -1
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $sgpr24
.LBB0_115:                              ; %Flow478
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_117
; %bb.116:                              ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[20:21], v43, s[0:1]
	s_add_i32 s24, s25, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_117:                              ; %.loopexit22.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_cmp_gt_u32 s24, 7
	s_cbranch_scc1 .LBB0_122
; %bb.118:                              ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_cmp_eq_u32 s24, 0
	s_cbranch_scc1 .LBB0_121
; %bb.119:                              ; %.preheader.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b64 s[20:21], 0
	s_mov_b64 s[22:23], s[0:1]
.LBB0_120:                              ; %.preheader.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v4, v43, s[22:23]
	s_add_i32 s24, s24, -1
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v42, 0xffff, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], s20, v[42:43]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_add_u32 s22, s22, 1
	s_addc_u32 s23, s23, 0
	s_cmp_lg_u32 s24, 0
	v_or_b32_e32 v22, v4, v22
	v_or_b32_e32 v23, v5, v23
	s_cbranch_scc1 .LBB0_120
.LBB0_121:                              ; %Flow471
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, 0
	s_branch .LBB0_123
.LBB0_122:                              ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s20, -1
.LBB0_123:                              ; %Flow473
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_125
; %bb.124:                              ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[22:23], v43, s[0:1]
.LBB0_125:                              ; %.loopexit.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	v_mov_b32_e32 v42, v41
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v42
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_131
; %bb.126:                              ;   in Loop: Header=BB0_70 Depth=1
	global_load_b64 v[26:27], v43, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v43, s[2:3] offset:40
	global_load_b64 v[8:9], v43, s[2:3]
	s_mov_b32 s20, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v5, v5, v27
	v_and_b32_e32 v4, v4, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, v5, 24
	v_mul_hi_u32 v24, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v24, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[24:25], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v43, v[24:27], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[26:27]
	s_cbranch_execz .LBB0_130
; %bb.127:                              ; %.preheader3.i.i19.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s21, 0
.LBB0_128:                              ; %.preheader3.i.i19.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[8:9], v43, s[2:3] offset:40
	global_load_b64 v[24:25], v43, s[2:3]
	v_dual_mov_b32 v27, v5 :: v_dual_mov_b32 v26, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v8, v8, v26
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[24:25]
	v_and_b32_e32 v24, v9, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v24, 24, v[5:6]
	v_mov_b32_e32 v5, v8
	global_load_b64 v[24:25], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v43, v[24:27], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[26:27]
	s_or_b32 s21, vcc_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB0_128
; %bb.129:                              ; %Flow466
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
.LBB0_130:                              ; %Flow468
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB0_131:                              ; %.loopexit4.i.i14.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v43, s[2:3] offset:40
	global_load_b128 v[24:27], v43, s[2:3]
	v_readfirstlane_b32 s20, v4
	v_readfirstlane_b32 s21, v5
	s_mov_b32 s26, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s22, v8
	v_readfirstlane_b32 s23, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[22:23], s[20:21], s[22:23]
	s_mul_i32 s1, s23, 24
	s_mul_hi_u32 s24, s22, 24
	s_mul_i32 s25, s22, 24
	s_and_saveexec_b32 s27, s0
	s_cbranch_execz .LBB0_133
; %bb.132:                              ;   in Loop: Header=BB0_70 Depth=1
	s_add_i32 s28, s24, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v24, s25
	v_add_co_ci_u32_e32 v9, vcc_lo, s28, v25, vcc_lo
	v_dual_mov_b32 v4, s26 :: v_dual_mov_b32 v5, v43
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB0_133:                              ;   in Loop: Header=BB0_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_cmp_gt_u64_e64 vcc_lo, s[14:15], 56
	v_or_b32_e32 v4, 0, v3
	v_or_b32_e32 v5, v2, v32
	s_lshl_b64 s[22:23], s[22:23], 12
	s_lshl_b32 s26, s18, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s26, s26, 28
	v_dual_cndmask_b32 v9, v4, v3 :: v_dual_cndmask_b32 v4, v5, v2
	v_lshlrev_b64 v[2:3], 6, v[42:43]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v26, s22
	v_add_co_ci_u32_e32 v27, vcc_lo, s23, v27, vcc_lo
	s_and_b32 s26, s26, 0x1e0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, v5, v2
	v_and_or_b32 v8, 0xffffff1f, v4, s26
	v_add_co_ci_u32_e32 v27, vcc_lo, v27, v3, vcc_lo
	s_clause 0x3
	global_store_b128 v[26:27], v[8:11], off
	global_store_b128 v[26:27], v[12:15], off offset:16
	global_store_b128 v[26:27], v[16:19], off offset:32
	global_store_b128 v[26:27], v[20:23], off offset:48
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB0_141
; %bb.134:                              ;   in Loop: Header=BB0_70 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v43, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v43, s[2:3] offset:40
	v_dual_mov_b32 v10, s20 :: v_dual_mov_b32 v11, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s26, v2
	v_readfirstlane_b32 s27, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[26:27], s[26:27], s[20:21]
	s_mul_i32 s23, s27, 24
	s_mul_hi_u32 s27, s26, 24
	s_mul_i32 s26, s26, 24
	s_add_i32 s27, s27, s23
	v_add_co_u32 v8, vcc_lo, v24, s26
	v_add_co_ci_u32_e32 v9, vcc_lo, s27, v25, vcc_lo
	s_mov_b32 s23, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v43, v[10:13], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB0_137
; %bb.135:                              ; %.preheader1.i.i17.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s26, 0
.LBB0_136:                              ; %.preheader1.i.i17.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s20 :: v_dual_mov_b32 v3, s21
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v43, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s26, vcc_lo, s26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB0_136
.LBB0_137:                              ; %Flow464
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	global_load_b64 v[2:3], v43, s[2:3] offset:16
	s_mov_b32 s26, exec_lo
	s_mov_b32 s23, exec_lo
	v_mbcnt_lo_u32_b32 v4, s26, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_139
; %bb.138:                              ;   in Loop: Header=BB0_70 Depth=1
	s_bcnt1_i32_b32 s26, s26
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v42, s26
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[42:43], off offset:8
.LBB0_139:                              ;   in Loop: Header=BB0_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB0_141
; %bb.140:                              ;   in Loop: Header=BB0_70 Depth=1
	global_load_b32 v42, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s23, v42
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[42:43], off
	s_and_b32 m0, s23, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_141:                              ; %Flow465
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_add_i32 s24, s24, s1
	v_add_co_u32 v2, vcc_lo, v24, s25
	v_add_co_ci_u32_e32 v3, vcc_lo, s24, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, 20
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
.LBB0_142:                              ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v4, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_144
; %bb.143:                              ;   in Loop: Header=BB0_142 Depth=2
	global_load_b32 v4, v[2:3], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v4, 1, v4
.LBB0_144:                              ;   in Loop: Header=BB0_142 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v4
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_146
; %bb.145:                              ;   in Loop: Header=BB0_142 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_147
.LBB0_146:                              ;   in Loop: Header=BB0_142 Depth=2
	s_mov_b32 s1, -1
.LBB0_147:                              ; %Flow459
                                        ;   in Loop: Header=BB0_142 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_142
; %bb.148:                              ;   in Loop: Header=BB0_70 Depth=1
	global_load_b128 v[2:5], v[26:27], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_152
; %bb.149:                              ;   in Loop: Header=BB0_70 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v43, s[2:3] offset:40
	global_load_b64 v[12:13], v43, s[2:3] offset:24 glc
	global_load_b64 v[10:11], v43, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v14, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v14, s20
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9]
	v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v8, v8, v14
	v_and_b32_e32 v5, v9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v8, v4
	v_mul_hi_u32 v14, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v10, v4
	v_mov_b32_e32 v10, v12
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v14, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo
	v_mov_b32_e32 v11, v13
	global_store_b64 v[4:5], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v43, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_152
; %bb.150:                              ; %.preheader.i.i16.i.i.preheader
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_mov_b32 s0, 0
.LBB0_151:                              ; %.preheader.i.i16.i.i
                                        ;   Parent Loop BB0_70 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v43, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11]
	v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_151
.LBB0_152:                              ; %__ockl_hostcall_preview.exit20.i.i
                                        ;   in Loop: Header=BB0_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_sub_u32 s14, s14, s18
	s_subb_u32 s15, s15, s19
	s_add_u32 s12, s12, s18
	s_addc_u32 s13, s13, s19
	s_cmp_lg_u64 s[14:15], 0
	s_cbranch_scc1 .LBB0_70
; %bb.153:                              ; %Flow504
	s_mov_b32 s0, 0
	s_branch .LBB0_155
.LBB0_154:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_155:                              ; %Flow519
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_184
; %bb.156:
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, v41
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_162
; %bb.157:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s12, exec_lo
	global_load_b64 v[6:7], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB0_161
; %bb.158:                              ; %.preheader3.i.i.i11.i.preheader
	s_mov_b32 s13, 0
.LBB0_159:                              ; %.preheader3.i.i.i11.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_159
; %bb.160:                              ; %Flow516
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_161:                              ; %Flow518
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_162:                              ; %.loopexit4.i.i.i6.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s12, v8
	v_readfirstlane_b32 s13, v9
	s_mov_b32 s20, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s14, v10
	v_readfirstlane_b32 s15, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[12:13], s[14:15]
	s_mul_i32 s1, s15, 24
	s_mul_hi_u32 s18, s14, 24
	s_mul_i32 s19, s14, 24
	s_and_saveexec_b32 s21, s0
	s_cbranch_execz .LBB0_164
; %bb.163:
	s_add_i32 s22, s18, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s19
	v_add_co_ci_u32_e32 v13, vcc_lo, s22, v5, vcc_lo
	v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, v3
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB0_164:
	s_or_b32 exec_lo, exec_lo, s21
	s_lshl_b64 s[14:15], s[14:15], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s14
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v7, vcc_lo
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v11, s23
	v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v10, s22
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_172
; %bb.165:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s12
	v_mov_b32_e32 v12, s13
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v0
	v_readfirstlane_b32 s21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[20:21], s[20:21], s[12:13]
	s_mul_i32 s15, s21, 24
	s_mul_hi_u32 s21, s20, 24
	s_mul_i32 s20, s20, 24
	s_add_i32 s21, s21, s15
	v_add_co_u32 v8, vcc_lo, v4, s20
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v5, vcc_lo
	s_mov_b32 s15, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_168
; %bb.166:                              ; %.preheader1.i.i.i9.i.preheader
	s_mov_b32 s20, 0
.LBB0_167:                              ; %.preheader1.i.i.i9.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s13
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s20, vcc_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_167
.LBB0_168:                              ; %Flow514
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v3, 0
	s_mov_b32 s20, exec_lo
	s_mov_b32 s15, exec_lo
	v_mbcnt_lo_u32_b32 v2, s20, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_170
; %bb.169:
	s_bcnt1_i32_b32 s20, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s20
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_170:
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_172
; %bb.171:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s15, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s15, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_172:                              ; %Flow515
	s_or_b32 exec_lo, exec_lo, s14
	s_add_i32 s18, s18, s1
	v_add_co_u32 v0, vcc_lo, v4, s19
	v_add_co_ci_u32_e32 v1, vcc_lo, s18, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_173:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_175
; %bb.174:                              ;   in Loop: Header=BB0_173 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_175:                              ;   in Loop: Header=BB0_173 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_177
; %bb.176:                              ;   in Loop: Header=BB0_173 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_178
.LBB0_177:                              ;   in Loop: Header=BB0_173 Depth=1
	s_mov_b32 s1, -1
.LBB0_178:                              ; %Flow509
                                        ;   in Loop: Header=BB0_173 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_173
; %bb.179:
	global_load_b128 v[2:5], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_183
; %bb.180:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v11, s12
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	v_dual_cndmask_b32 v5, v5, v12 :: v_dual_cndmask_b32 v4, v4, v11
	v_and_b32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v4, v0
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v0, 24
	v_mul_lo_u32 v0, v0, 24
	v_add_nc_u32_e32 v1, v11, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v6, v0
	v_mov_b32_e32 v6, v9
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	v_mov_b32_e32 v7, v10
	global_store_b64 v[0:1], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v8, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_183
; %bb.181:                              ; %.preheader.i.i.i8.i.preheader
	s_mov_b32 s0, 0
.LBB0_182:                              ; %.preheader.i.i.i8.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[0:1], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[6:7]
	v_dual_mov_b32 v6, v9 :: v_dual_mov_b32 v7, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_182
.LBB0_183:                              ; %__ockl_hostcall_preview.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_184:                              ; %__ockl_printf_append_string_n.exit.i
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v41
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v41
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_190
; %bb.185:
	v_mov_b32_e32 v4, 0
	s_mov_b32 s12, exec_lo
	global_load_b64 v[7:8], v4, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v4, s[2:3] offset:40
	global_load_b64 v[5:6], v4, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v0, v0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v9, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v9, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v5, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo
	global_load_b64 v[5:6], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[7:8]
	s_cbranch_execz .LBB0_189
; %bb.186:                              ; %.preheader3.i.i.i18.i.preheader
	s_mov_b32 s13, 0
.LBB0_187:                              ; %.preheader3.i.i.i18.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[5:6], v4, s[2:3] offset:40
	global_load_b64 v[9:10], v4, s[2:3]
	v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v7, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v5, 24, v[9:10]
	v_and_b32_e32 v9, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v9, 24, v[1:2]
	v_mov_b32_e32 v1, v5
	global_load_b64 v[5:6], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[7:8]
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_187
; %bb.188:                              ; %Flow452
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_189:                              ; %Flow454
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_190:                              ; %.loopexit4.i.i.i12.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v42, 0
	v_readfirstlane_b32 s12, v0
	v_readfirstlane_b32 s13, v1
	s_mov_b32 s20, exec_lo
	s_clause 0x1
	global_load_b64 v[4:5], v42, s[2:3] offset:40
	global_load_b128 v[6:9], v42, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s14, v4
	v_readfirstlane_b32 s15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[12:13], s[14:15]
	s_mul_i32 s1, s15, 24
	s_mul_hi_u32 s18, s14, 24
	s_mul_i32 s19, s14, 24
	s_and_saveexec_b32 s21, s0
	s_cbranch_execz .LBB0_192
; %bb.191:
	s_add_i32 s22, s18, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s19
	v_add_co_ci_u32_e32 v1, vcc_lo, s22, v7, vcc_lo
	v_dual_mov_b32 v10, s20 :: v_dual_mov_b32 v11, v42
	v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[0:1], v[10:13], off offset:8
.LBB0_192:
	s_or_b32 exec_lo, exec_lo, s21
	s_lshl_b64 s[14:15], s[14:15], 12
	v_lshlrev_b64 v[0:1], 6, v[41:42]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, s14
	v_add_co_ci_u32_e32 v5, vcc_lo, s15, v9, vcc_lo
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_and_or_b32 v2, 0xffffff1d, v2, 34
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	v_dual_mov_b32 v4, v39 :: v_dual_mov_b32 v5, v40
	v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
	v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
	s_clause 0x3
	global_store_b128 v[0:1], v[2:5], off
	global_store_b128 v[0:1], v[8:11], off offset:16
	global_store_b128 v[0:1], v[8:11], off offset:32
	global_store_b128 v[0:1], v[8:11], off offset:48
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_200
; %bb.193:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s12
	v_mov_b32_e32 v10, s13
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v0
	v_readfirstlane_b32 s21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[20:21], s[20:21], s[12:13]
	s_mul_i32 s15, s21, 24
	s_mul_hi_u32 s21, s20, 24
	s_mul_i32 s20, s20, 24
	s_add_i32 s21, s21, s15
	v_add_co_u32 v4, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v7, vcc_lo
	s_mov_b32 s15, exec_lo
	global_store_b64 v[4:5], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB0_196
; %bb.194:                              ; %.preheader1.i.i.i16.i.preheader
	s_mov_b32 s20, 0
.LBB0_195:                              ; %.preheader1.i.i.i16.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s13
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s20, vcc_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_195
.LBB0_196:                              ; %Flow450
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v3, 0
	s_mov_b32 s20, exec_lo
	s_mov_b32 s15, exec_lo
	v_mbcnt_lo_u32_b32 v2, s20, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_198
; %bb.197:
	s_bcnt1_i32_b32 s20, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s20
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_198:
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_200
; %bb.199:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s15, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s15, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_200:                              ; %Flow451
	s_or_b32 exec_lo, exec_lo, s14
	s_add_i32 s18, s18, s1
	v_add_co_u32 v0, vcc_lo, v6, s19
	v_add_co_ci_u32_e32 v1, vcc_lo, s18, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_201:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_203
; %bb.202:                              ;   in Loop: Header=BB0_201 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_203:                              ;   in Loop: Header=BB0_201 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_205
; %bb.204:                              ;   in Loop: Header=BB0_201 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_206
.LBB0_205:                              ;   in Loop: Header=BB0_201 Depth=1
	s_mov_b32 s1, -1
.LBB0_206:                              ; %Flow445
                                        ;   in Loop: Header=BB0_201 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_201
; %bb.207:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_211
; %bb.208:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_211
; %bb.209:                              ; %.preheader.i.i.i15.i.preheader
	s_mov_b32 s0, 0
.LBB0_210:                              ; %.preheader.i.i.i15.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_210
.LBB0_211:                              ; %_Z10processingii.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s0, 0x54442d18
	s_mov_b32 s1, 0xc01921fb
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[29:30], s[0:1]
	v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], v[33:34]
	v_div_scale_f64 v[8:9], vcc_lo, v[33:34], v[0:1], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[6:7]
	v_mul_f64 v[4:5], v[37:38], 0
	v_div_fixup_f64 v[0:1], v[2:3], v[0:1], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[2:3], v[0:1], v[37:38]
	v_fma_f64 v[0:1], v[0:1], v[35:36], v[4:5]
	v_add_f64 v[4:5], s[10:11], -s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], v[35:36], 0, -v[2:3]
	v_mul_f64 v[8:9], v[0:1], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[2:3], 0
	v_fma_f64 v[6:7], v[4:5], v[0:1], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[0:1], v[4:5], v[2:3], -v[8:9]
	v_add_f64 v[2:3], s[4:5], -s[6:7]
	v_mul_f64 v[4:5], v[6:7], 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[0:1], 0
	v_fma_f64 v[0:1], v[2:3], v[0:1], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[6:7], v[8:9]
	v_mad_u64_u32 v[4:5], null, s33, v31, v[28:29]
	v_mov_b32_e32 v5, 0
	v_lshlrev_b64 v[4:5], 4, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s16, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s17, v5, vcc_lo
	global_store_b128 v[4:5], v[0:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 71
		.amdhsa_next_free_sgpr 76
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib, .Lfunc_end0-_Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 14912
; NumSgprs: 78
; NumVgprs: 71
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 9
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 78
; NumVGPRsForWavesPerEU: 71
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"\r\320\222\321\213\320\277\320\276\320\273\320\275\320\265\320\275\320\276 %2.2f%"
	.size	.str, 27

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         76
        .size:           1
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         98
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         100
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         102
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib
    .private_segment_fixed_size: 0
    .sgpr_count:     78
    .sgpr_spill_count: 0
    .symbol:         _Z13collinsKernelP15HIP_vector_typeIdLj2EEPKS0_PKdS5_S5_S5_S5_PKiPiib.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     71
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
