#include <stdio.h>      /* printf, scanf, puts, NULL */
#include <stdlib.h>     /* srand, rand */
#include <time.h>       /* time */
#include <iostream>

// From: https://a248.e.akamai.net/f/862/5658/3/developer.download.nvidia.com/assets/cuda/files/reduction.pdf

template<unsigned int blockSize>
__device__ void warpReduce(volatile double *sdata, unsigned int tid){
  if (blockSize >= 64) { sdata[tid] += sdata[tid + 32] ; }
  if (blockSize >= 32) { sdata[tid] += sdata[tid + 16] ; }
  if (blockSize >= 16) { sdata[tid] += sdata[tid + 8]; }
  if (blockSize >= 8) { sdata[tid] += sdata[tid + 4]; }
  if (blockSize >= 4) {sdata[tid] += sdata[tid + 2]; }
  if (blockSize >= 2) {sdata[tid] += sdata[tid + 1]; }
}
template <unsigned int blockSize> __global__ void reduce6( double *g_idata,
    double *g_odata, unsigned int n) {
  extern __shared__ double sdata[];
  unsigned int tid = threadIdx.x;
  unsigned int i = blockIdx.x*(blockSize*2) + tid ;
  unsigned int gridSize = blockSize*2*gridDim.x;
  sdata[tid] = 0;

  while (i < n) {
    sdata[tid] += g_idata[i] + g_idata[i + blockSize]; i += gridSize;
  }
  __syncthreads();
  if ( blockSize >= 512) { if ( tid < 256) { sdata[tid] += sdata[tid + 256]; } __syncthreads(); }

  if ( blockSize >= 256) { if ( tid < 128) { sdata[tid] += sdata[tid + 128]; } __syncthreads(); }

  if ( blockSize >= 128) { if ( tid < 64) { sdata[tid] += sdata[tid + 64]; } __syncthreads(); }

  if (tid < 32) {
    warpReduce<blockSize>(sdata,tid);


  }
  __syncthreads();

  if (tid == 0) {g_odata[blockIdx.x] = sdata[0]; }
}


int main() {
  for (int t = 0; t <= 4; t++) {
    for (int iter = 1; iter <= 15; iter++) {
      for (int bl = 1; bl <= 4; bl*=2) {

        printf("Iter %d, Blocks %d",t,bl);
        int blocks = 32*bl;
        int threads = 1024;
        int arraySize = 3200*1024*iter;
        int smemSize = threads * sizeof(double);
        int arrayBytes = arraySize * sizeof(double);

        printf("=====\n");
        printf("Input Size = %d\n",arraySize);

        double *h_in, *h_out;     // host arrays
        h_in = (double*) malloc(arrayBytes);
        double *d_in, *d_out; //device arrays
        h_out = (double*) malloc(smemSize);

        for (int i = 0; i < threads; i++) h_out[i] = 0;

        double result = 0;
        for (int i = 0; i < arraySize; i++) {
          h_in[i] = i;
          result += i;
        }

        cudaEvent_t start, stop, startT, stopT;
        float time,full;
        cudaEventCreate(&start);
        cudaEventCreate(&startT);
        cudaEventCreate(&stop);
        cudaEventCreate(&stopT);

        //allocate memory on device and copy
        cudaEventRecord(startT,0);
        cudaMalloc((void**)&d_in, arrayBytes);
        cudaMalloc((void**)&d_out, smemSize);

        cudaMemcpy(d_in, h_in, arrayBytes, cudaMemcpyHostToDevice);
        cudaEventRecord(start,0);
        reduce6<512><<<blocks,threads,smemSize>>>(d_in,d_out,arraySize);
        cudaDeviceSynchronize();
        cudaEventRecord(stop, 0);
        cudaEventSynchronize(stop);
        cudaMemcpy(h_out, d_out, smemSize, cudaMemcpyDeviceToHost);

        double res = 0;
        for (int i = 0; i < blocks;i++){
          res += h_out[i];
        }
        cudaEventRecord(stopT,0);
        cudaEventSynchronize(stopT);

        std::cout << "Device Result is: " << h_out[0] << std::endl;
        std::cout << "Host Result is: " << result << std::endl;
        std::cout << "Result is: " << res << std::endl;
        printf("Result correct? %s\n", res == result ? "true" : "false");
        cudaEventElapsedTime(&time, start, stop);
        cudaEventElapsedTime(&full, startT, stopT);
        printf ("Time for the kernel: %f ms\n", time);
        printf ("Time Full: %f ms\n", full);

        free(h_in);
        free(h_out);
        cudaFree(d_in);
        cudaFree(d_out);
      }
    }
  }
}

	.file	"tmpxft_002c1928_00000000-6_reduce.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL39__device_stub__Z7reduce6ILj512EEvPdS0_jPdS_j, @function
_ZL39__device_stub__Z7reduce6ILj512EEvPdS0_jPdS_j:
.LFB3663:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7reduce6ILj512EEvPdS0_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_ZL39__device_stub__Z7reduce6ILj512EEvPdS0_jPdS_j, .-_ZL39__device_stub__Z7reduce6ILj512EEvPdS0_jPdS_j
	.section	.text._Z7reduce6ILj512EEvPdS0_j,"axG",@progbits,_Z7reduce6ILj512EEvPdS0_j,comdat
	.weak	_Z7reduce6ILj512EEvPdS0_j
	.type	_Z7reduce6ILj512EEvPdS0_j, @function
_Z7reduce6ILj512EEvPdS0_j:
.LFB3966:
	.cfi_startproc
	endbr64
	jmp	_ZL39__device_stub__Z7reduce6ILj512EEvPdS0_jPdS_j
	.cfi_endproc
.LFE3966:
	.size	_Z7reduce6ILj512EEvPdS0_j, .-_Z7reduce6ILj512EEvPdS0_j
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"true"
.LC2:
	.string	"false"
.LC3:
	.string	"Iter %d, Blocks %d"
.LC4:
	.string	"=====\n"
.LC5:
	.string	"Input Size = %d\n"
.LC6:
	.string	"Device Result is: "
.LC7:
	.string	"Host Result is: "
.LC8:
	.string	"Result is: "
.LC9:
	.string	"Result correct? %s\n"
.LC10:
	.string	"Time for the kernel: %f ms\n"
.LC11:
	.string	"Time Full: %f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
.L9:
	movq	$26214400, 8(%rsp)
	movl	$3276800, %ebp
.L19:
	movl	$3, 20(%rsp)
	movl	$1, %r14d
.L16:
	movl	%r14d, %ecx
	movl	%r13d, %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	movl	%r14d, %r15d
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	sall	$5, %r15d
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movl	%ebp, %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	malloc@PLT
	movl	$8192, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movq	$0x000000000, (%rsp)
	movl	$2048, %ecx
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	rep stosl
	xorl	%eax, %eax
.L10:
	cvtsi2sdl	%eax, %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	addsd	(%rsp), %xmm0
	incq	%rax
	movsd	%xmm0, (%rsp)
	cmpl	%eax, %ebp
	jg	.L10
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r15d, 80(%rsp)
	movl	$4194305, %edx
	movabsq	$4294967297, %rax
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	salq	$10, %rdx
	xorl	%r9d, %r9d
	movl	88(%rsp), %esi
	movl	$8192, %r8d
	movl	$1, %ecx
	movq	%rdx, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ebp, %edx
	call	_ZL39__device_stub__Z7reduce6ILj512EEvPdS0_jPdS_j
.L11:
	call	cudaDeviceSynchronize@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$8192, %edx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L12:
	cmpl	%eax, %r15d
	jle	.L26
	addsd	(%rbx,%rax,8), %xmm1
	incq	%rax
	jmp	.L12
.L26:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	movsd	%xmm1, 24(%rsp)
	leaq	_ZSt4cout(%rip), %r15
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	leaq	.LC6(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC8(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm1
	movq	%rax, %rdi
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movsd	24(%rsp), %xmm1
	ucomisd	(%rsp), %xmm1
	jp	.L21
	leaq	.LC1(%rip), %rdx
	je	.L14
.L21:
	leaq	.LC2(%rip), %rdx
.L14:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addl	%r14d, %r14d
	call	__printf_chk@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	92(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	80(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC11(%rip), %rsi
	cvtss2sd	92(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	decl	20(%rsp)
	jne	.L16
	addq	$26214400, 8(%rsp)
	addl	$3276800, %ebp
	cmpl	$52428800, %ebp
	jne	.L19
	incl	%r13d
	cmpl	$5, %r13d
	jne	.L9
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z7reduce6ILj512EEvPdS0_j"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7reduce6ILj512EEvPdS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>      /* printf, scanf, puts, NULL */
#include <stdlib.h>     /* srand, rand */
#include <time.h>       /* time */
#include <iostream>

// From: https://a248.e.akamai.net/f/862/5658/3/developer.download.nvidia.com/assets/cuda/files/reduction.pdf

template<unsigned int blockSize>
__device__ void warpReduce(volatile double *sdata, unsigned int tid){
  if (blockSize >= 64) { sdata[tid] += sdata[tid + 32] ; }
  if (blockSize >= 32) { sdata[tid] += sdata[tid + 16] ; }
  if (blockSize >= 16) { sdata[tid] += sdata[tid + 8]; }
  if (blockSize >= 8) { sdata[tid] += sdata[tid + 4]; }
  if (blockSize >= 4) {sdata[tid] += sdata[tid + 2]; }
  if (blockSize >= 2) {sdata[tid] += sdata[tid + 1]; }
}
template <unsigned int blockSize> __global__ void reduce6( double *g_idata,
    double *g_odata, unsigned int n) {
  extern __shared__ double sdata[];
  unsigned int tid = threadIdx.x;
  unsigned int i = blockIdx.x*(blockSize*2) + tid ;
  unsigned int gridSize = blockSize*2*gridDim.x;
  sdata[tid] = 0;

  while (i < n) {
    sdata[tid] += g_idata[i] + g_idata[i + blockSize]; i += gridSize;
  }
  __syncthreads();
  if ( blockSize >= 512) { if ( tid < 256) { sdata[tid] += sdata[tid + 256]; } __syncthreads(); }

  if ( blockSize >= 256) { if ( tid < 128) { sdata[tid] += sdata[tid + 128]; } __syncthreads(); }

  if ( blockSize >= 128) { if ( tid < 64) { sdata[tid] += sdata[tid + 64]; } __syncthreads(); }

  if (tid < 32) {
    warpReduce<blockSize>(sdata,tid);


  }
  __syncthreads();

  if (tid == 0) {g_odata[blockIdx.x] = sdata[0]; }
}


int main() {
  for (int t = 0; t <= 4; t++) {
    for (int iter = 1; iter <= 15; iter++) {
      for (int bl = 1; bl <= 4; bl*=2) {

        printf("Iter %d, Blocks %d",t,bl);
        int blocks = 32*bl;
        int threads = 1024;
        int arraySize = 3200*1024*iter;
        int smemSize = threads * sizeof(double);
        int arrayBytes = arraySize * sizeof(double);

        printf("=====\n");
        printf("Input Size = %d\n",arraySize);

        double *h_in, *h_out;     // host arrays
        h_in = (double*) malloc(arrayBytes);
        double *d_in, *d_out; //device arrays
        h_out = (double*) malloc(smemSize);

        for (int i = 0; i < threads; i++) h_out[i] = 0;

        double result = 0;
        for (int i = 0; i < arraySize; i++) {
          h_in[i] = i;
          result += i;
        }

        hipEvent_t start, stop, startT, stopT;
        float time,full;
        hipEventCreate(&start);
        hipEventCreate(&startT);
        hipEventCreate(&stop);
        hipEventCreate(&stopT);

        //allocate memory on device and copy
        hipEventRecord(startT,0);
        hipMalloc((void**)&d_in, arrayBytes);
        hipMalloc((void**)&d_out, smemSize);

        hipMemcpy(d_in, h_in, arrayBytes, hipMemcpyHostToDevice);
        hipEventRecord(start,0);
        reduce6<512><<<blocks,threads,smemSize>>>(d_in,d_out,arraySize);
        hipDeviceSynchronize();
        hipEventRecord(stop, 0);
        hipEventSynchronize(stop);
        hipMemcpy(h_out, d_out, smemSize, hipMemcpyDeviceToHost);

        double res = 0;
        for (int i = 0; i < blocks;i++){
          res += h_out[i];
        }
        hipEventRecord(stopT,0);
        hipEventSynchronize(stopT);

        std::cout << "Device Result is: " << h_out[0] << std::endl;
        std::cout << "Host Result is: " << result << std::endl;
        std::cout << "Result is: " << res << std::endl;
        printf("Result correct? %s\n", res == result ? "true" : "false");
        hipEventElapsedTime(&time, start, stop);
        hipEventElapsedTime(&full, startT, stopT);
        printf ("Time for the kernel: %f ms\n", time);
        printf ("Time Full: %f ms\n", full);

        free(h_in);
        free(h_out);
        hipFree(d_in);
        hipFree(d_out);
      }
    }
  }
}

	.text
	.file	"reduce.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967296, %rax               # imm = 0x100000000
	addq	$1024, %rax                     # imm = 0x400
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movl	$0, 8(%rsp)                     # 4-byte Folded Spill
.LBB0_1:                                # %.preheader65
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
                                        #       Child Loop BB0_3 Depth 3
                                        #         Child Loop BB0_4 Depth 4
                                        #         Child Loop BB0_8 Depth 4
	movl	$3276800, %ebp                  # imm = 0x320000
	movl	$1, %eax
.LBB0_2:                                # %.preheader64
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_3 Depth 3
                                        #         Child Loop BB0_4 Depth 4
                                        #         Child Loop BB0_8 Depth 4
	imulq	$26214400, %rax, %r13           # imm = 0x1900000
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	imull	$3276800, %eax, %eax            # imm = 0x320000
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movl	$1, %r12d
.LBB0_3:                                # %.preheader.preheader
                                        #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_2 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB0_4 Depth 4
                                        #         Child Loop BB0_8 Depth 4
	movl	$.L.str, %edi
	movl	8(%rsp), %esi                   # 4-byte Reload
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.L.str.2, %edi
	movl	12(%rsp), %esi                  # 4-byte Reload
	xorl	%eax, %eax
	callq	printf
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	$1, %edi
	movl	$8192, %esi                     # imm = 0x2000
	callq	calloc@PLT
	movq	%rax, %rbx
	xorpd	%xmm1, %xmm1
	xorl	%eax, %eax
.LBB0_4:                                # %.preheader
                                        #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_2 Depth=2
                                        #       Parent Loop BB0_3 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%r15,%rax,8)
	addsd	%xmm0, %xmm1
	incq	%rax
	cmpq	%rax, %rbp
	jne	.LBB0_4
# %bb.5:                                #   in Loop: Header=BB0_3 Depth=3
	movsd	%xmm1, 64(%rsp)                 # 8-byte Spill
	movl	%r12d, %r14d
	shll	$5, %r14d
	leaq	80(%rsp), %rdi
	callq	hipEventCreate
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movl	$8192, %esi                     # imm = 0x2000
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	movq	40(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r14
	movl	$8192, %r8d                     # imm = 0x2000
	movq	%r14, %rdi
	movl	$1, %esi
	movq	96(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_7
# %bb.6:                                #   in Loop: Header=BB0_3 Depth=3
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	12(%rsp), %edx                  # 4-byte Reload
	callq	_Z22__device_stub__reduce6ILj512EEvPdS0_j
.LBB0_7:                                #   in Loop: Header=BB0_3 Depth=3
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%r12d, %eax
	shlq	$8, %rax
	xorpd	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB0_8:                                #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_2 Depth=2
                                        #       Parent Loop BB0_3 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	addsd	(%rbx,%rcx), %xmm0
	addq	$8, %rcx
	cmpq	%rcx, %rax
	jne	.LBB0_8
# %bb.9:                                #   in Loop: Header=BB0_3 Depth=3
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%rbx), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	64(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %eax
	cmovneq	%rax, %rsi
	cmovpq	%rax, %rsi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	80(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	52(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	72(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	48(%rsp), %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	52(%rsp), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	48(%rsp), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	movq	%r15, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	leal	(%r12,%r12), %eax
	cmpl	$3, %r12d
	movl	%eax, %r12d
	jb	.LBB0_3
# %bb.10:                               #   in Loop: Header=BB0_2 Depth=2
	movq	88(%rsp), %rax                  # 8-byte Reload
	incq	%rax
	addq	$3276800, %rbp                  # imm = 0x320000
	cmpq	$16, %rax
	jne	.LBB0_2
# %bb.11:                               #   in Loop: Header=BB0_1 Depth=1
	movl	8(%rsp), %eax                   # 4-byte Reload
	incl	%eax
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	cmpl	$5, %eax
	jne	.LBB0_1
# %bb.12:
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22__device_stub__reduce6ILj512EEvPdS0_j,"axG",@progbits,_Z22__device_stub__reduce6ILj512EEvPdS0_j,comdat
	.weak	_Z22__device_stub__reduce6ILj512EEvPdS0_j # -- Begin function _Z22__device_stub__reduce6ILj512EEvPdS0_j
	.type	_Z22__device_stub__reduce6ILj512EEvPdS0_j,@function
_Z22__device_stub__reduce6ILj512EEvPdS0_j: # @_Z22__device_stub__reduce6ILj512EEvPdS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce6ILj512EEvPdS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__reduce6ILj512EEvPdS0_j, .Lfunc_end1-_Z22__device_stub__reduce6ILj512EEvPdS0_j
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce6ILj512EEvPdS0_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Iter %d, Blocks %d"
	.size	.L.str, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Input Size = %d\n"
	.size	.L.str.2, 17

	.type	_Z7reduce6ILj512EEvPdS0_j,@object # @_Z7reduce6ILj512EEvPdS0_j
	.section	.rodata._Z7reduce6ILj512EEvPdS0_j,"aG",@progbits,_Z7reduce6ILj512EEvPdS0_j,comdat
	.weak	_Z7reduce6ILj512EEvPdS0_j
	.p2align	3, 0x0
_Z7reduce6ILj512EEvPdS0_j:
	.quad	_Z22__device_stub__reduce6ILj512EEvPdS0_j
	.size	_Z7reduce6ILj512EEvPdS0_j, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Device Result is: "
	.size	.L.str.3, 19

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Host Result is: "
	.size	.L.str.4, 17

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Result is: "
	.size	.L.str.5, 12

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Result correct? %s\n"
	.size	.L.str.6, 20

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"true"
	.size	.L.str.7, 5

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"false"
	.size	.L.str.8, 6

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Time for the kernel: %f ms\n"
	.size	.L.str.9, 28

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Time Full: %f ms\n"
	.size	.L.str.10, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7reduce6ILj512EEvPdS0_j"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"====="
	.size	.Lstr, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__reduce6ILj512EEvPdS0_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7reduce6ILj512EEvPdS0_j
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z7reduce6ILj512EEvPdS0_j,"axG",@progbits,_Z7reduce6ILj512EEvPdS0_j,comdat
	.protected	_Z7reduce6ILj512EEvPdS0_j ; -- Begin function _Z7reduce6ILj512EEvPdS0_j
	.globl	_Z7reduce6ILj512EEvPdS0_j
	.p2align	8
	.type	_Z7reduce6ILj512EEvPdS0_j,@function
_Z7reduce6ILj512EEvPdS0_j:              ; @_Z7reduce6ILj512EEvPdS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, s15
	v_lshl_add_u32 v5, v0, 3, 0
	v_lshl_or_b32 v1, s2, 10, v0
	s_mov_b32 s9, 0
	v_mov_b32_e32 v3, v2
	v_mov_b32_e32 v4, v2
	s_mov_b32 s8, exec_lo
	ds_store_b64 v5, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x18
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s0, s0, 10
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v7, v2 :: v_dual_add_nc_u32 v6, 0x200, v1
	v_lshlrev_b64 v[8:9], 3, v[1:2]
	v_add_nc_u32_e32 v1, s0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	s_clause 0x1
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[6:7], v[6:7], off
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
; %bb.3:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s9
	ds_store_b64 v5, v[3:4]
.LBB0_4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB0_6
; %bb.5:
	ds_load_b64 v[1:2], v5 offset:2048
	ds_load_b64 v[3:4], v5
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v5, v[1:2]
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB0_8
; %bb.7:
	ds_load_b64 v[1:2], v5 offset:1024
	ds_load_b64 v[3:4], v5
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v5, v[1:2]
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	ds_load_b64 v[1:2], v5 offset:512
	ds_load_b64 v[3:4], v5
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v5, v[1:2]
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_add_nc_u32_e32 v1, 0x100, v5
	v_cmp_ne_u32_e64 s0, -1, v5
	s_mov_b64 s[4:5], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e64 v2, 0, s5, s0
	v_cndmask_b32_e32 v3, 0, v1, vcc_lo
	v_cndmask_b32_e64 v4, 0, s5, vcc_lo
	v_cndmask_b32_e64 v1, 0, v5, s0
	flat_load_b64 v[3:4], v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 0x80, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 64, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 32, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 16, v5
	v_add_nc_u32_e32 v5, 8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v5
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_cndmask_b32_e64 v6, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[5:6] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[5:6], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[5:6]
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[0:1], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce6ILj512EEvPdS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z7reduce6ILj512EEvPdS0_j,"axG",@progbits,_Z7reduce6ILj512EEvPdS0_j,comdat
.Lfunc_end0:
	.size	_Z7reduce6ILj512EEvPdS0_j, .Lfunc_end0-_Z7reduce6ILj512EEvPdS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1040
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym sdata
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce6ILj512EEvPdS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce6ILj512EEvPdS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
