#include<fstream>
#include<iostream>
#include<vector>
#include<ctime>
#include<cmath>

using namespace std;

int N;

vector<float> readVector(ifstream &fin)
{
    
    //fin.open();

    int n;
    int c;
    fin>>n;

    vector<float> result;
    for (int i=0;i<n;i++){
        fin>>c;
        result.push_back(c);        
    }
    N=n;
    return result;
}

__global__ void add(float*a, float*b, float*c) {
    c[blockIdx.x] = sinf(cosf(sinf(a[blockIdx.x]))) + sinf(cosf(sinf(b[blockIdx.x])));
}

void doIt(float* sample,ofstream &fout){
    clock_t begin=clock();

    float *a,*b,*c;  //host variables
    float *d_a, *d_b, *d_c; //device variables
    int size=N*sizeof(float);

    cudaMalloc((void**)&d_a, size);
    cudaMalloc((void**)&d_b, size);
    cudaMalloc((void**)&d_c, size);

    //a = (int *)malloc(size);
    a=sample;

    //b = (int *)malloc(size);
    b=sample;

    c = (float *)malloc(size);

    cudaMemcpy(d_a, a, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, b, size, cudaMemcpyHostToDevice);

    //launch kernel for N blocks
    add<<<N,1>>>(d_a,d_b,d_c);
    
    cudaMemcpy(c, d_c, size, cudaMemcpyDeviceToHost);

    cudaDeviceSynchronize();
    cudaError_t error=cudaGetLastError();

    if(error!=cudaSuccess){
        printf("Error: %s\n",cudaGetErrorString(error));
    }

    /*for (int i=0;i<N;i++)
    {
        std::cout<<a[i]<<"+"<<b[i]<<"="<<c[i]<<std::endl;
    }
    */
   
    //free(a);
    //free(b);
    free(c);
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);

    clock_t end=clock();
    double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
    cout<<". Elapsed time: "<<elapsed_secs<<endl;
    fout<<"{"<<N<<", "<<elapsed_secs<<"},";
}



int main(int argc, char ** argv)
{
    cout<<"file name: "<<argv[1]<<endl;
    cout<<"Sample count: "<<argv[2]<<endl;
    string fileName=argv[1];
    int sample_count=stoi(argv[2]);
    //cout<<"Sample count: "<<sample_count<<endl;
    vector<float> sample;

    ifstream fin(fileName);
    ofstream fout("result.txt");


    for (int i=0;i<sample_count;i++){
        cout<<"Sample №"<<i;
        sample=readVector(fin);
        doIt(&sample[0],fout);
        
    }
    fout.close();
    return 0;
}
	.file	"tmpxft_00308aa5_00000000-6_speed_test_blocks.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4153:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4153:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z26__device_stub__Z3addPfS_S_PfS_S_
	.type	_Z26__device_stub__Z3addPfS_S_PfS_S_, @function
_Z26__device_stub__Z3addPfS_S_PfS_S_:
.LFB4175:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4175:
	.size	_Z26__device_stub__Z3addPfS_S_PfS_S_, .-_Z26__device_stub__Z3addPfS_S_PfS_S_
	.globl	_Z3addPfS_S_
	.type	_Z3addPfS_S_, @function
_Z3addPfS_S_:
.LFB4176:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3addPfS_S_PfS_S_
	.cfi_endproc
.LFE4176:
	.size	_Z3addPfS_S_, .-_Z3addPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error: %s\n"
.LC2:
	.string	". Elapsed time: "
.LC3:
	.string	"{"
.LC4:
	.string	", "
.LC5:
	.string	"},"
	.text
	.globl	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
	.type	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE, @function
_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE:
.LFB4146:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	clock@PLT
	leaq	8(%rsp), %rdi
	movq	%rax, %r13
	movl	N(%rip), %eax
	leal	0(,%rax,4), %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	movq	%rax, %rbp
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	N(%rip), %eax
	movq	%rdx, 36(%rsp)
	movl	40(%rsp), %esi
	movl	%eax, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z26__device_stub__Z3addPfS_S_PfS_S_
.L9:
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L10
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L10:
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	clock@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC1(%rip), %xmm0
	movq	%xmm0, %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	N(%rip), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4146:
	.size	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE, .-_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
	.section	.rodata.str1.1
.LC6:
	.string	"_Z3addPfS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4178:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4178:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB4257:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L18
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L18:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4257:
	.size	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.text._ZNSt6vectorIfSaIfEED2Ev,"axG",@progbits,_ZNSt6vectorIfSaIfEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEED2Ev
	.type	_ZNSt6vectorIfSaIfEED2Ev, @function
_ZNSt6vectorIfSaIfEED2Ev:
.LFB4504:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L21
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L21:
	ret
	.cfi_endproc
.LFE4504:
	.size	_ZNSt6vectorIfSaIfEED2Ev, .-_ZNSt6vectorIfSaIfEED2Ev
	.weak	_ZNSt6vectorIfSaIfEED1Ev
	.set	_ZNSt6vectorIfSaIfEED1Ev,_ZNSt6vectorIfSaIfEED2Ev
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC7:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4515:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L24
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L29
	leaq	.LC7(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L24:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L26
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L26:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
.L29:
	call	__stack_chk_fail@PLT
.L27:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4515:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata._ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_.str1.1,"aMS",@progbits,1
.LC8:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_
	.type	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_, @function
_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_:
.LFB4826:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rcx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r14
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	subq	%r14, %rbx
	sarq	$2, %rbx
	cmpq	%rcx, %rbx
	jne	.L31
	leaq	.LC8(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L31:
	cmpq	%r14, (%rsp)
	movl	$1, %eax
	movq	%rsi, %r15
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	movq	%rsi, %rbp
	addq	%rax, %rbx
	setc	%al
	subq	%r14, %r15
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L41
	xorl	%r12d, %r12d
	testq	%rbx, %rbx
	je	.L36
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L35
.L41:
	movq	%rcx, %rbx
.L35:
	leaq	0(,%rbx,4), %rdi
	movq	%rdx, 8(%rsp)
	call	_Znwm@PLT
	movq	8(%rsp), %rdx
	movq	%rax, %r12
.L36:
	movss	(%rdx), %xmm0
	movss	%xmm0, (%r12,%r15)
	testq	%r15, %r15
	jle	.L37
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
.L37:
	movq	(%rsp), %rax
	leaq	4(%r12,%r15), %rdx
	subq	%rbp, %rax
	testq	%rax, %rax
	jle	.L38
	movq	%rdx, %rdi
	movq	%rbp, %rsi
	movq	%rax, %rcx
	rep movsb
.L38:
	leaq	(%rdx,%rax), %rbp
	testq	%r14, %r14
	je	.L39
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L39:
	leaq	(%r12,%rbx,4), %rax
	movq	%r12, 0(%r13)
	movq	%rbp, 8(%r13)
	movq	%rax, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4826:
	.size	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_, .-_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_
	.text
	.globl	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE
	.type	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE, @function
_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE:
.LFB4129:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4129
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	movq	%rbp, %rdi
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rsi
	leaq	16(%rsp), %r13
.LEHB0:
	call	_ZNSirsERi@PLT
.LEHE0:
	xorl	%eax, %eax
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rax, 16(%rbx)
.L49:
	movl	12(%rsp), %eax
	cmpl	%r12d, %eax
	jle	.L59
	movq	%r13, %rsi
	movq	%rbp, %rdi
.LEHB1:
	call	_ZNSirsERi@PLT
	cvtsi2ssl	16(%rsp), %xmm0
	movq	8(%rbx), %rsi
	movss	%xmm0, 20(%rsp)
	cmpq	16(%rbx), %rsi
	je	.L50
	movss	%xmm0, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rbx)
	jmp	.L51
.L50:
	leaq	20(%rsp), %rdx
	movq	%rbx, %rdi
	call	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_
.LEHE1:
.L51:
	incl	%r12d
	jmp	.L49
.L59:
	movl	%eax, N(%rip)
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
	jmp	.L57
.L56:
	endbr64
	movq	%rax, %rbp
.L53:
	movq	%rbx, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L57
	movq	%rbp, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L57:
	call	__stack_chk_fail@PLT
.L55:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4129:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4129:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4129-.LLSDACSB4129
.LLSDACSB4129:
	.uleb128 .LEHB0-.LFB4129
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4129
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L56-.LFB4129
	.uleb128 0
	.uleb128 .LEHB2-.LFB4129
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4129:
	.text
	.size	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE, .-_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE
	.section	.rodata.str1.1
.LC9:
	.string	"file name: "
.LC10:
	.string	"Sample count: "
.LC11:
	.string	"stoi"
.LC12:
	.string	"result.txt"
.LC13:
	.string	"Sample \342\204\226"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4147:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4147
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r13, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	leaq	.LC9(%rip), %rsi
	subq	$1208, %rsp
	.cfi_def_cfa_offset 1264
	movq	%fs:40, %rax
	movq	%rax, 1192(%rsp)
	xorl	%eax, %eax
	leaq	104(%rsp), %r14
.LEHB3:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC10(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	128(%rsp), %rax
	movq	8(%rbx), %rsi
	movq	%r14, %rdx
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE3:
	leaq	56(%rsp), %rax
	movq	16(%rbx), %rsi
	movq	%rax, 40(%rsp)
	leaq	672(%rsp), %rax
	movq	40(%rsp), %rdx
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB4:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE4:
	call	__errno_location@PLT
	xorl	%ecx, %ecx
	movl	$10, %edx
	movq	%r14, %rsi
	movq	%rax, %r15
	movq	672(%rsp), %rbp
	movl	(%rax), %eax
	movl	%ecx, (%r15)
	movq	%rbp, %rdi
	movl	%eax, 80(%rsp)
	call	__isoc23_strtol@PLT
	cmpq	104(%rsp), %rbp
	movq	%rax, %rbx
	leaq	80(%rsp), %rax
	movq	%rax, 32(%rsp)
	jne	.L61
	movq	1192(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L84
	leaq	.LC11(%rip), %rdi
.LEHB5:
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L61:
	cmpl	$34, (%r15)
	je	.L63
	movl	$2147483648, %eax
	movl	$4294967295, %edx
	addq	%rbx, %rax
	cmpq	%rax, %rdx
	jnb	.L64
.L63:
	movq	1192(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L84
	leaq	.LC11(%rip), %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE5:
.L64:
	movq	32(%rsp), %rdi
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	xorl	%edx, %edx
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	%rdx, 56(%rsp)
	movq	%rdx, 64(%rsp)
	movq	%rdx, 72(%rsp)
	movl	$8, %edx
.LEHB6:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@PLT
.LEHE6:
	jmp	.L87
.L81:
	endbr64
	movq	%rax, %rbx
.L67:
	movq	32(%rsp), %rdi
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L68
.L87:
	leaq	160(%rsp), %rax
	movl	$16, %edx
	leaq	.LC12(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB7:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE7:
	xorl	%ebp, %ebp
	leaq	.LC13(%rip), %r15
.L69:
	cmpl	%ebx, %ebp
	jge	.L88
	movq	%r15, %rsi
	movq	%r13, %rdi
.LEHB8:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebp, %esi
	call	_ZNSolsEi@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE
	movq	88(%rsp), %rdi
	movq	64(%rsp), %rcx
	xorl	%eax, %eax
	movq	56(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movq	%rdi, 64(%rsp)
	movq	96(%rsp), %rdi
	movq	80(%rsp), %r12
	movq	%rsi, 104(%rsp)
	movq	%rdi, 72(%rsp)
	movq	%r14, %rdi
	movq	%rcx, 112(%rsp)
	movq	%rdx, 120(%rsp)
	movq	%rax, 80(%rsp)
	movq	%rax, 96(%rsp)
	movq	%r12, 56(%rsp)
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	32(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	16(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
	incl	%ebp
	jmp	.L69
.L88:
	movq	16(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE8:
	movq	16(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	40(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	1192(%rsp), %rax
	subq	%fs:40, %rax
	je	.L75
	jmp	.L84
.L80:
	endbr64
	movq	%rax, %rbx
.L71:
	movq	16(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L72
.L79:
	endbr64
	movq	%rax, %rbx
.L72:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L73
.L78:
	endbr64
	movq	%rax, %rbx
.L73:
	movq	40(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L68
.L77:
	endbr64
	movq	%rax, %rbx
.L68:
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	1192(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L84
	movq	%rbx, %rdi
.LEHB9:
	call	_Unwind_Resume@PLT
.LEHE9:
.L84:
	call	__stack_chk_fail@PLT
.L75:
	addq	$1208, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4147:
	.section	.gcc_except_table
.LLSDA4147:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4147-.LLSDACSB4147
.LLSDACSB4147:
	.uleb128 .LEHB3-.LFB4147
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB4-.LFB4147
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L77-.LFB4147
	.uleb128 0
	.uleb128 .LEHB5-.LFB4147
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L81-.LFB4147
	.uleb128 0
	.uleb128 .LEHB6-.LFB4147
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L78-.LFB4147
	.uleb128 0
	.uleb128 .LEHB7-.LFB4147
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L79-.LFB4147
	.uleb128 0
	.uleb128 .LEHB8-.LFB4147
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L80-.LFB4147
	.uleb128 0
	.uleb128 .LEHB9-.LFB4147
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
.LLSDACSE4147:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	N
	.bss
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.zero	4
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1093567616
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<fstream>
#include<iostream>
#include<vector>
#include<ctime>
#include<cmath>

using namespace std;

int N;

vector<float> readVector(ifstream &fin)
{
    
    //fin.open();

    int n;
    int c;
    fin>>n;

    vector<float> result;
    for (int i=0;i<n;i++){
        fin>>c;
        result.push_back(c);        
    }
    N=n;
    return result;
}

__global__ void add(float*a, float*b, float*c) {
    c[blockIdx.x] = sinf(cosf(sinf(a[blockIdx.x]))) + sinf(cosf(sinf(b[blockIdx.x])));
}

void doIt(float* sample,ofstream &fout){
    clock_t begin=clock();

    float *a,*b,*c;  //host variables
    float *d_a, *d_b, *d_c; //device variables
    int size=N*sizeof(float);

    hipMalloc((void**)&d_a, size);
    hipMalloc((void**)&d_b, size);
    hipMalloc((void**)&d_c, size);

    //a = (int *)malloc(size);
    a=sample;

    //b = (int *)malloc(size);
    b=sample;

    c = (float *)malloc(size);

    hipMemcpy(d_a, a, size, hipMemcpyHostToDevice);
    hipMemcpy(d_b, b, size, hipMemcpyHostToDevice);

    //launch kernel for N blocks
    add<<<N,1>>>(d_a,d_b,d_c);
    
    hipMemcpy(c, d_c, size, hipMemcpyDeviceToHost);

    hipDeviceSynchronize();
    hipError_t error=hipGetLastError();

    if(error!=hipSuccess){
        printf("Error: %s\n",hipGetErrorString(error));
    }

    /*for (int i=0;i<N;i++)
    {
        std::cout<<a[i]<<"+"<<b[i]<<"="<<c[i]<<std::endl;
    }
    */
   
    //free(a);
    //free(b);
    free(c);
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);

    clock_t end=clock();
    double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
    cout<<". Elapsed time: "<<elapsed_secs<<endl;
    fout<<"{"<<N<<", "<<elapsed_secs<<"},";
}



int main(int argc, char ** argv)
{
    cout<<"file name: "<<argv[1]<<endl;
    cout<<"Sample count: "<<argv[2]<<endl;
    string fileName=argv[1];
    int sample_count=stoi(argv[2]);
    //cout<<"Sample count: "<<sample_count<<endl;
    vector<float> sample;

    ifstream fin(fileName);
    ofstream fout("result.txt");


    for (int i=0;i<sample_count;i++){
        cout<<"Sample №"<<i;
        sample=readVector(fin);
        doIt(&sample[0],fout);
        
    }
    fout.close();
    return 0;
}
	.text
	.file	"speed_test_blocks.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE # -- Begin function _Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE
	.type	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE,@function
_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE: # @_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	leaq	12(%rsp), %r15
	movq	%rsi, %rdi
	movq	%r15, %rsi
	callq	_ZNSirsERi
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	movl	(%r15), %eax
	testl	%eax, %eax
	jle	.LBB0_7
# %bb.1:                                # %.lr.ph
	xorl	%ebp, %ebp
	leaq	8(%rsp), %r15
	leaq	4(%rsp), %r12
.LBB0_2:                                # =>This Inner Loop Header: Depth=1
.Ltmp0:
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZNSirsERi
.Ltmp1:
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ssl	8(%rsp), %xmm0
	movss	%xmm0, 4(%rsp)
	movq	8(%rbx), %rsi
	cmpq	16(%rbx), %rsi
	je	.LBB0_5
# %bb.4:                                #   in Loop: Header=BB0_2 Depth=1
	movss	%xmm0, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rbx)
	jmp	.LBB0_6
.LBB0_5:                                #   in Loop: Header=BB0_2 Depth=1
.Ltmp3:
	movq	%rbx, %rdi
	movq	%r12, %rdx
	callq	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_
.Ltmp4:
.LBB0_6:                                # %_ZNSt6vectorIfSaIfEE9push_backEOf.exit
                                        #   in Loop: Header=BB0_2 Depth=1
	incl	%ebp
	movl	12(%rsp), %eax
	cmpl	%eax, %ebp
	jl	.LBB0_2
.LBB0_7:                                # %._crit_edge
	movl	%eax, N(%rip)
	movq	%rbx, %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_9:
	.cfi_def_cfa_offset 64
.Ltmp5:
	jmp	.LBB0_10
.LBB0_8:
.Ltmp2:
.LBB0_10:
	movq	%rax, %r14
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB0_12
# %bb.11:
	callq	_ZdlPv
.LBB0_12:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end0:
	.size	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE, .Lfunc_end0-_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Lfunc_end0-.Ltmp4             #   Call between .Ltmp4 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z18__device_stub__addPfS_S_    # -- Begin function _Z18__device_stub__addPfS_S_
	.type	_Z18__device_stub__addPfS_S_,@function
_Z18__device_stub__addPfS_S_:           # @_Z18__device_stub__addPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__addPfS_S_, .Lfunc_end1-_Z18__device_stub__addPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
.LCPI2_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
	.type	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE,@function
_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE: # @_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r13
	callq	clock
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	N(%rip), %eax
	shll	$2, %eax
	movslq	%eax, %r12
	leaq	32(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	N(%rip), %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z18__device_stub__addPfS_S_
.LBB2_2:
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_4
# %bb.3:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_4:
	movq	%r15, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	callq	clock
	subq	8(%rsp), %rax                   # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	N(%rip), %esi
	movq	%rbx, %rdi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.4, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE, .Lfunc_end2-_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI3_0:
	.zero	16
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1096, %rsp                     # imm = 0x448
	.cfi_def_cfa_offset 1152
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rbx), %r14
	testq	%r14, %r14
	je	.LBB3_2
# %bb.1:
	movq	%r14, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_3
.LBB3_2:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_3:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rbx), %r14
	testq	%r14, %r14
	je	.LBB3_5
# %bb.4:
	movq	%r14, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_6
.LBB3_5:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit27
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rbx), %rsi
	leaq	32(%rsp), %rdi
	leaq	64(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	movq	16(%rbx), %rsi
.Ltmp6:
	leaq	64(%rsp), %rdi
	movq	%rsp, %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp7:
# %bb.7:
	movq	64(%rsp), %r15
	callq	__errno_location
	movq	%rax, %r14
	movl	(%rax), %ebp
	movl	$0, (%rax)
	leaq	584(%rsp), %r12
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%r15, (%r12)
	je	.LBB3_33
# %bb.8:
	movq	%rax, %rbx
	movslq	%ebx, %rax
	cmpq	%rbx, %rax
	jne	.LBB3_35
# %bb.9:
	movl	(%r14), %eax
	cmpl	$34, %eax
	je	.LBB3_35
# %bb.10:
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:
	movl	%ebp, (%r14)
.LBB3_12:
	leaq	80(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB3_14
# %bb.13:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB3_14:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
.Ltmp9:
	leaq	64(%rsp), %rdi
	leaq	32(%rsp), %rsi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode
.Ltmp10:
# %bb.15:
.Ltmp12:
	leaq	584(%rsp), %rdi
	movl	$.L.str.7, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp13:
# %bb.16:                               # %.preheader
	xorl	%r15d, %r15d
	testl	%ebx, %ebx
	jle	.LBB3_26
# %bb.17:                               # %.lr.ph.preheader
	leaq	64(%rsp), %r13
	leaq	584(%rsp), %rbp
	xorl	%r14d, %r14d
	xorl	%r12d, %r12d
.LBB3_18:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
.Ltmp15:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp16:
# %bb.19:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit31
                                        #   in Loop: Header=BB3_18 Depth=1
.Ltmp17:
	movl	$_ZSt4cout, %edi
	movq	%r14, %r12
	movl	%r15d, %esi
	callq	_ZNSolsEi
.Ltmp18:
# %bb.20:                               #   in Loop: Header=BB3_18 Depth=1
.Ltmp19:
	movq	%rsp, %rdi
	movq	%r13, %rsi
	callq	_Z10readVectorRSt14basic_ifstreamIcSt11char_traitsIcEE
.Ltmp20:
# %bb.21:                               #   in Loop: Header=BB3_18 Depth=1
	movq	(%rsp), %r12
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%rsp)
	movq	$0, 16(%rsp)
	testq	%r14, %r14
	je	.LBB3_24
# %bb.22:                               # %_ZNSt6vectorIfSaIfEEaSEOS1_.exit
                                        #   in Loop: Header=BB3_18 Depth=1
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_24
# %bb.23:                               #   in Loop: Header=BB3_18 Depth=1
	callq	_ZdlPv
.LBB3_24:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit
                                        #   in Loop: Header=BB3_18 Depth=1
.Ltmp22:
	movq	%r12, %rdi
	movq	%rbp, %rsi
	callq	_Z4doItPfRSt14basic_ofstreamIcSt11char_traitsIcEE
.Ltmp23:
# %bb.25:                               #   in Loop: Header=BB3_18 Depth=1
	incl	%r15d
	movq	%r12, %r14
	cmpl	%r15d, %ebx
	jne	.LBB3_18
	jmp	.LBB3_27
.LBB3_26:
	xorl	%r12d, %r12d
.LBB3_27:                               # %._crit_edge
.Ltmp25:
	leaq	584(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp26:
# %bb.28:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	592(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 584(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	832(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	testq	%r12, %r12
	je	.LBB3_30
# %bb.29:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB3_30:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit33
	leaq	48(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB3_32
# %bb.31:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i34
	callq	_ZdlPv
.LBB3_32:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit36
	xorl	%eax, %eax
	addq	$1096, %rsp                     # imm = 0x448
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_33:
	.cfi_def_cfa_offset 1152
.Ltmp30:
	movl	$.L.str.9, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp31:
# %bb.34:
.LBB3_35:                               # %.critedge.i.i
.Ltmp28:
	movl	$.L.str.9, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp29:
# %bb.36:
.LBB3_37:
.Ltmp27:
	jmp	.LBB3_47
.LBB3_38:                               # %.thread49
.Ltmp14:
	movq	%rax, %rbx
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	jmp	.LBB3_51
.LBB3_39:                               # %.thread
.Ltmp11:
	jmp	.LBB3_41
.LBB3_40:
.Ltmp8:
.LBB3_41:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit38
	movq	%rax, %rbx
	jmp	.LBB3_51
.LBB3_42:
.Ltmp32:
	movq	%rax, %rbx
	cmpl	$0, (%r14)
	jne	.LBB3_44
# %bb.43:
	movl	%ebp, (%r14)
.LBB3_44:                               # %_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i
	leaq	80(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	jne	.LBB3_50
	jmp	.LBB3_51
.LBB3_45:
.Ltmp21:
	movq	%rax, %rbx
	jmp	.LBB3_48
.LBB3_46:
.Ltmp24:
.LBB3_47:
	movq	%rax, %rbx
	movq	%r12, %r14
.LBB3_48:
	leaq	584(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	testq	%r14, %r14
	je	.LBB3_51
# %bb.49:
	movq	%r14, %rdi
.LBB3_50:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit38
	callq	_ZdlPv
.LBB3_51:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit38
	leaq	48(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB3_53
# %bb.52:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i39
	callq	_ZdlPv
.LBB3_53:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit41
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp6-.Lfunc_begin1           #   Call between .Lfunc_begin1 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin1           # >> Call Site 2 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin1           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin1           # >> Call Site 3 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin1          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin1          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp18-.Ltmp15                #   Call between .Ltmp15 and .Ltmp18
	.uleb128 .Ltmp24-.Lfunc_begin1          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin1          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Ltmp23-.Ltmp22                #   Call between .Ltmp22 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin1          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin1          # >> Call Site 8 <<
	.uleb128 .Ltmp26-.Ltmp25                #   Call between .Ltmp25 and .Ltmp26
	.uleb128 .Ltmp27-.Lfunc_begin1          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin1          # >> Call Site 9 <<
	.uleb128 .Ltmp29-.Ltmp30                #   Call between .Ltmp30 and .Ltmp29
	.uleb128 .Ltmp32-.Lfunc_begin1          #     jumps to .Ltmp32
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin1          # >> Call Site 10 <<
	.uleb128 .Lfunc_end3-.Ltmp29            #   Call between .Ltmp29 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB4_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB4_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.11, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end4:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end4-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_ # -- Begin function _ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_,@function
_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_: # @_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.10, %edx
	callq	_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB5_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIfE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB5_3
.LBB5_1:
	xorl	%ebp, %ebp
.LBB5_3:                                # %_ZNSt12_Vector_baseIfSaIfEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB5_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB5_5:                                # %_ZNSt6vectorIfSaIfEE11_S_relocateEPfS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB5_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB5_7:                                # %_ZNSt6vectorIfSaIfEE11_S_relocateEPfS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB5_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB5_9:                                # %_ZNSt12_Vector_baseIfSaIfEE13_M_deallocateEPfm.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_, .Lfunc_end5-_ZNSt6vectorIfSaIfEE17_M_realloc_insertIJfEEEvN9__gnu_cxx17__normal_iteratorIPfS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB6_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB6_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end6:
	.size	_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc, .Lfunc_end6-_ZNKSt6vectorIfSaIfEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIfE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIfE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIfE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIfE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIfE8allocateEmPKv,@function
_ZNSt15__new_allocatorIfE8allocateEmPKv: # @_ZNSt15__new_allocatorIfE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB7_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB7_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB7_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB7_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end7:
	.size	_ZNSt15__new_allocatorIfE8allocateEmPKv, .Lfunc_end7-_ZNSt15__new_allocatorIfE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB8_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB8_3
.LBB8_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB8_3:
	testq	%r14, %r14
	je	.LBB8_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB8_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB8_7
.LBB8_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB8_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end8-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	N,@object                       # @N
	.bss
	.globl	N
	.p2align	2, 0x0
N:
	.long	0                               # 0x0
	.size	N, 4

	.type	_Z3addPfS_S_,@object            # @_Z3addPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPfS_S_
	.p2align	3, 0x0
_Z3addPfS_S_:
	.quad	_Z18__device_stub__addPfS_S_
	.size	_Z3addPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error: %s\n"
	.size	.L.str, 11

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	". Elapsed time: "
	.size	.L.str.1, 17

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"{"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	", "
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"},"
	.size	.L.str.4, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"file name: "
	.size	.L.str.5, 12

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Sample count: "
	.size	.L.str.6, 15

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"result.txt"
	.size	.L.str.7, 11

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Sample \342\204\226"
	.size	.L.str.8, 11

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"stoi"
	.size	.L.str.9, 5

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.10, 26

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.11, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPfS_S_"
	.size	.L__unnamed_1, 13

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z18__device_stub__addPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z3addPfS_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPfS_S_            ; -- Begin function _Z3addPfS_S_
	.globl	_Z3addPfS_S_
	.p2align	8
	.type	_Z3addPfS_S_,@function
_Z3addPfS_S_:                           ; @_Z3addPfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s8, s15
	s_mov_b32 s9, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s2
	s_addc_u32 s5, s5, s3
	s_load_b32 s4, s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f32_e64 s5, 0x48000000, |s4|
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_and_b32 s5, s4, 0x7fffffff
	s_cbranch_vccz .LBB0_2
; %bb.1:
	s_and_b32 s8, s5, 0x7fffff
	s_lshr_b32 s10, s5, 23
	s_bitset1_b32 s8, 23
	s_addk_i32 s10, 0xff88
	s_mul_hi_u32 s11, s8, 0xfe5163ab
	s_mul_i32 s12, s8, 0x3c439041
	s_mul_hi_u32 s13, s8, 0x3c439041
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s13
	s_mul_i32 s13, s8, 0xdb629599
	s_mul_hi_u32 s14, s8, 0xdb629599
	s_add_u32 s12, s12, s13
	s_addc_u32 s13, 0, s14
	s_mul_i32 s14, s8, 0xf534ddc0
	s_mul_hi_u32 s15, s8, 0xf534ddc0
	s_add_u32 s13, s13, s14
	s_addc_u32 s14, 0, s15
	s_mul_i32 s15, s8, 0xfc2757d1
	s_mul_hi_u32 s16, s8, 0xfc2757d1
	s_add_u32 s14, s14, s15
	s_addc_u32 s15, 0, s16
	s_mul_i32 s16, s8, 0x4e441529
	s_mul_hi_u32 s17, s8, 0x4e441529
	s_add_u32 s15, s15, s16
	s_addc_u32 s16, 0, s17
	s_cmp_gt_u32 s10, 63
	s_mul_i32 s17, s8, 0xfe5163ab
	s_mul_hi_u32 s18, s8, 0xa2f9836e
	s_mul_i32 s8, s8, 0xa2f9836e
	s_cselect_b32 s19, s12, s14
	s_cselect_b32 s11, s11, s13
	s_cselect_b32 s12, s17, s12
	s_add_u32 s8, s16, s8
	s_addc_u32 s16, 0, s18
	s_cmp_gt_u32 s10, 63
	s_cselect_b32 s17, 0xffffffc0, 0
	s_cselect_b32 s13, s13, s15
	s_cselect_b32 s8, s14, s8
	s_cselect_b32 s14, s15, s16
	s_add_i32 s17, s17, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s17, 31
	s_cselect_b32 s10, 0xffffffe0, 0
	s_cselect_b32 s15, s13, s8
	s_cselect_b32 s8, s8, s14
	s_cselect_b32 s13, s19, s13
	s_cselect_b32 s14, s11, s19
	s_cselect_b32 s11, s12, s11
	s_add_i32 s10, s10, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s10, 31
	s_cselect_b32 s12, 0xffffffe0, 0
	s_cselect_b32 s8, s15, s8
	s_cselect_b32 s15, s13, s15
	s_cselect_b32 s13, s14, s13
	s_cselect_b32 s11, s11, s14
	s_add_i32 s12, s12, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s10, 32, s12
	s_cmp_eq_u32 s12, 0
	v_mov_b32_e32 v0, s10
	s_cselect_b32 s12, -1, 0
	v_alignbit_b32 v1, s8, s15, v0
	v_alignbit_b32 v2, s15, s13, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s10, v1
	v_cndmask_b32_e64 v1, v2, s15, s12
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s8, s8, s10
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v2, s8, v1, 30
	s_bfe_u32 s10, s8, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s14, 0, s10
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v2, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v3, v2
	v_min_u32_e32 v3, 32, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v5, 23, v3
	v_alignbit_b32 v0, s13, s11, v0
	v_sub_nc_u32_e32 v4, 31, v3
	v_cndmask_b32_e64 v0, v0, s13, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v1, v1, v0, 30
	v_alignbit_b32 v0, v0, s11, 30
	s_lshr_b32 s11, s8, 29
	s_lshr_b32 s8, s8, 30
	s_lshl_b32 s11, s11, 31
	v_xor_b32_e32 v1, s14, v1
	v_xor_b32_e32 v0, s14, v0
	s_or_b32 s12, s11, 0.5
	s_add_i32 s8, s10, s8
	v_sub_nc_u32_e32 v5, s12, v5
	v_alignbit_b32 v2, v2, v1, v4
	v_alignbit_b32 v0, v1, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v1, v2, v0, 9
	v_clz_i32_u32_e32 v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v4, 32, v4
	v_sub_nc_u32_e32 v6, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v0, v1, v0, v6
	v_lshrrev_b32_e32 v1, 9, v2
	v_lshrrev_b32_e32 v0, 9, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_or_b32_e32 v1, v1, v5
	v_add_nc_u32_e32 v3, v4, v3
	v_lshlrev_b32_e32 v2, 23, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v0, v0, v2
	v_mul_f32_e32 v2, 0x3fc90fda, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 0x33000000, v0
	v_fma_f32 v3, 0x3fc90fda, v1, -v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v0, s11, v0
	v_fmamk_f32 v1, v1, 0x33a22168, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, 0x3fc90fda, v0
	v_add_f32_e32 v0, v2, v1
	s_branch .LBB0_3
.LBB0_2:
	s_mov_b32 s9, -1
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $vgpr0
.LBB0_3:                                ; %Flow70
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB0_5
; %bb.4:
	v_mul_f32_e64 v0, 0x3f22f983, |s4|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v1, v0
	v_fma_f32 v0, 0xbfc90fda, v1, |s4|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v1, 0xb3a22168, v0
	v_fmamk_f32 v0, v1, 0xa7c234c4, v0
	v_cvt_i32_f32_e32 v1, v1
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v1, s8
.LBB0_6:                                ; %_ZL4sinff.exit
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v2, v0, v0 :: v_dual_lshlrev_b32 v5, 30, v1
	s_mov_b32 s8, 0xb94c1982
	s_mov_b32 s9, 0x37d75334
	s_xor_b32 s5, s5, s4
	v_fmaak_f32 v3, s8, v2, 0x3c0881c4
	v_and_b32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmaak_f32 v3, v2, v3, 0xbe2aaa9d
	v_fmaak_f32 v4, s9, v2, 0xbab64f3b
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v3, v2, v3
	v_fmaak_f32 v4, v2, v4, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v0, v0, v3 :: v_dual_and_b32 v3, 0x80000000, v5
	v_fmaak_f32 v4, v2, v4, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, s5, v3
	v_fma_f32 v2, v2, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v2, v0, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, s4, 0x1f8
	v_xor_b32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, 0x7fc00000, v0, vcc_lo
	v_cmp_ngt_f32_e64 s4, 0x48000000, |v0|
	v_readfirstlane_b32 s5, v0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s4
	s_mov_b32 s4, 0
	s_cbranch_vccz .LBB0_8
; %bb.7:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_bitset0_b32 s5, 31
	s_and_b32 s8, s5, 0x7fffff
	s_lshr_b32 s5, s5, 23
	s_bitset1_b32 s8, 23
	s_addk_i32 s5, 0xff88
	s_mul_hi_u32 s9, s8, 0xfe5163ab
	s_mul_i32 s10, s8, 0x3c439041
	s_mul_hi_u32 s11, s8, 0x3c439041
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s8, 0xdb629599
	s_mul_hi_u32 s12, s8, 0xdb629599
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_mul_i32 s12, s8, 0xf534ddc0
	s_mul_hi_u32 s13, s8, 0xf534ddc0
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s13
	s_mul_i32 s13, s8, 0xfc2757d1
	s_mul_hi_u32 s14, s8, 0xfc2757d1
	s_add_u32 s12, s12, s13
	s_addc_u32 s13, 0, s14
	s_mul_i32 s14, s8, 0x4e441529
	s_mul_hi_u32 s15, s8, 0x4e441529
	s_add_u32 s13, s13, s14
	s_addc_u32 s14, 0, s15
	s_cmp_gt_u32 s5, 63
	s_mul_i32 s15, s8, 0xfe5163ab
	s_mul_hi_u32 s16, s8, 0xa2f9836e
	s_mul_i32 s8, s8, 0xa2f9836e
	s_cselect_b32 s17, s10, s12
	s_cselect_b32 s9, s9, s11
	s_cselect_b32 s10, s15, s10
	s_add_u32 s8, s14, s8
	s_addc_u32 s14, 0, s16
	s_cmp_gt_u32 s5, 63
	s_cselect_b32 s15, 0xffffffc0, 0
	s_cselect_b32 s11, s11, s13
	s_cselect_b32 s8, s12, s8
	s_cselect_b32 s12, s13, s14
	s_add_i32 s15, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s15, 31
	s_cselect_b32 s5, 0xffffffe0, 0
	s_cselect_b32 s13, s11, s8
	s_cselect_b32 s8, s8, s12
	s_cselect_b32 s11, s17, s11
	s_cselect_b32 s12, s9, s17
	s_cselect_b32 s9, s10, s9
	s_add_i32 s5, s5, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s5, 31
	s_cselect_b32 s10, 0xffffffe0, 0
	s_cselect_b32 s8, s13, s8
	s_cselect_b32 s13, s11, s13
	s_cselect_b32 s11, s12, s11
	s_cselect_b32 s9, s9, s12
	s_add_i32 s10, s10, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s5, 32, s10
	s_cmp_eq_u32 s10, 0
	v_mov_b32_e32 v1, s5
	s_cselect_b32 s10, -1, 0
	v_alignbit_b32 v2, s8, s13, v1
	v_alignbit_b32 v3, s13, s11, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s5, v2
	v_cndmask_b32_e64 v2, v3, s13, s10
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s5, s8, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v3, s5, v2, 30
	s_bfe_u32 s8, s5, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s12, 0, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v3, s12, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v4, v3
	v_min_u32_e32 v4, 32, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 23, v4
	v_alignbit_b32 v1, s11, s9, v1
	v_sub_nc_u32_e32 v5, 31, v4
	v_cndmask_b32_e64 v1, v1, s11, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v2, v2, v1, 30
	v_alignbit_b32 v1, v1, s9, 30
	s_lshr_b32 s9, s5, 29
	s_lshr_b32 s5, s5, 30
	s_lshl_b32 s9, s9, 31
	v_xor_b32_e32 v2, s12, v2
	v_xor_b32_e32 v1, s12, v1
	s_or_b32 s10, s9, 0.5
	s_add_i32 s5, s8, s5
	v_sub_nc_u32_e32 v6, s10, v6
	v_alignbit_b32 v3, v3, v2, v5
	v_alignbit_b32 v1, v2, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v2, v3, v1, 9
	v_clz_i32_u32_e32 v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v5, 32, v5
	v_sub_nc_u32_e32 v7, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v1, v2, v1, v7
	v_lshrrev_b32_e32 v2, 9, v3
	v_lshrrev_b32_e32 v1, 9, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_or_b32_e32 v2, v2, v6
	v_add_nc_u32_e32 v4, v5, v4
	v_lshlrev_b32_e32 v3, 23, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v1, v1, v3
	v_mul_f32_e32 v3, 0x3fc90fda, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, 0x33000000, v1
	v_fma_f32 v4, 0x3fc90fda, v2, -v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v1, s9, v1
	v_fmamk_f32 v2, v2, 0x33a22168, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 0x3fc90fda, v1
	v_add_f32_e32 v1, v3, v2
	s_branch .LBB0_9
.LBB0_8:
	s_mov_b32 s4, -1
                                        ; implicit-def: $sgpr5
                                        ; implicit-def: $vgpr1
.LBB0_9:                                ; %Flow69
	s_load_b64 s[0:1], s[0:1], 0x10
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB0_11
; %bb.10:
	v_mul_f32_e64 v1, 0x3f22f983, |v0|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v2, v1
	v_fma_f32 v1, 0xbfc90fda, v2, |v0|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v1, v2, 0xb3a22168, v1
	v_fmamk_f32 v1, v2, 0xa7c234c4, v1
	v_cvt_i32_f32_e32 v2, v2
	s_branch .LBB0_12
.LBB0_11:
	v_mov_b32_e32 v2, s5
.LBB0_12:                               ; %_ZL4cosff.exit
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v3, v1, v1 :: v_dual_and_b32 v6, 1, v2
	s_mov_b32 s4, 0xb94c1982
	s_mov_b32 s5, 0x37d75334
	v_lshlrev_b32_e32 v2, 30, v2
	v_fmaak_f32 v4, s4, v3, 0x3c0881c4
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v2, 0x80000000, v2
	v_fmaak_f32 v4, v3, v4, 0xbe2aaa9d
	v_fmaak_f32 v5, s5, v3, 0xbab64f3b
	s_mov_b32 s5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v4, v3, v4
	v_fmaak_f32 v5, v3, v5, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v1, v4
	v_fmaak_f32 v5, v3, v5, 0xbf000004
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, v3, v5, 1.0
	v_cndmask_b32_e64 v1, -v1, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_cndmask_b32_e32 v0, 0x7fc00000, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s4, 0x48000000, |v0|
	v_readfirstlane_b32 s8, v0
	s_and_b32 vcc_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s4, s8, 0x7fffffff
	s_cbranch_vccz .LBB0_14
; %bb.13:
	s_and_b32 s8, s4, 0x7fffff
	s_lshr_b32 s9, s4, 23
	s_bitset1_b32 s8, 23
	s_addk_i32 s9, 0xff88
	s_mul_hi_u32 s10, s8, 0xfe5163ab
	s_mul_i32 s11, s8, 0x3c439041
	s_mul_hi_u32 s12, s8, 0x3c439041
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_mul_i32 s12, s8, 0xdb629599
	s_mul_hi_u32 s13, s8, 0xdb629599
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s13
	s_mul_i32 s13, s8, 0xf534ddc0
	s_mul_hi_u32 s14, s8, 0xf534ddc0
	s_add_u32 s12, s12, s13
	s_addc_u32 s13, 0, s14
	s_mul_i32 s14, s8, 0xfc2757d1
	s_mul_hi_u32 s15, s8, 0xfc2757d1
	s_add_u32 s13, s13, s14
	s_addc_u32 s14, 0, s15
	s_mul_i32 s15, s8, 0x4e441529
	s_mul_hi_u32 s16, s8, 0x4e441529
	s_add_u32 s14, s14, s15
	s_addc_u32 s15, 0, s16
	s_cmp_gt_u32 s9, 63
	s_mul_i32 s16, s8, 0xfe5163ab
	s_mul_hi_u32 s17, s8, 0xa2f9836e
	s_mul_i32 s8, s8, 0xa2f9836e
	s_cselect_b32 s18, s11, s13
	s_cselect_b32 s10, s10, s12
	s_cselect_b32 s11, s16, s11
	s_add_u32 s8, s15, s8
	s_addc_u32 s15, 0, s17
	s_cmp_gt_u32 s9, 63
	s_cselect_b32 s16, 0xffffffc0, 0
	s_cselect_b32 s12, s12, s14
	s_cselect_b32 s8, s13, s8
	s_cselect_b32 s13, s14, s15
	s_add_i32 s16, s16, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s16, 31
	s_cselect_b32 s9, 0xffffffe0, 0
	s_cselect_b32 s14, s12, s8
	s_cselect_b32 s8, s8, s13
	s_cselect_b32 s12, s18, s12
	s_cselect_b32 s13, s10, s18
	s_cselect_b32 s10, s11, s10
	s_add_i32 s9, s9, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s9, 31
	s_cselect_b32 s11, 0xffffffe0, 0
	s_cselect_b32 s8, s14, s8
	s_cselect_b32 s14, s12, s14
	s_cselect_b32 s12, s13, s12
	s_cselect_b32 s10, s10, s13
	s_add_i32 s11, s11, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s9, 32, s11
	s_cmp_eq_u32 s11, 0
	v_mov_b32_e32 v1, s9
	s_cselect_b32 s11, -1, 0
	v_alignbit_b32 v2, s8, s14, v1
	v_alignbit_b32 v3, s14, s12, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s9, v2
	v_cndmask_b32_e64 v2, v3, s14, s11
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s8, s8, s9
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v3, s8, v2, 30
	s_bfe_u32 s9, s8, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s13, 0, s9
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v3, s13, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v4, v3
	v_min_u32_e32 v4, 32, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 23, v4
	v_alignbit_b32 v1, s12, s10, v1
	v_sub_nc_u32_e32 v5, 31, v4
	v_cndmask_b32_e64 v1, v1, s12, s11
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v2, v2, v1, 30
	v_alignbit_b32 v1, v1, s10, 30
	s_lshr_b32 s10, s8, 29
	s_lshr_b32 s8, s8, 30
	s_lshl_b32 s10, s10, 31
	v_xor_b32_e32 v2, s13, v2
	v_xor_b32_e32 v1, s13, v1
	s_or_b32 s11, s10, 0.5
	s_add_i32 s8, s9, s8
	v_sub_nc_u32_e32 v6, s11, v6
	v_alignbit_b32 v3, v3, v2, v5
	v_alignbit_b32 v1, v2, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v2, v3, v1, 9
	v_clz_i32_u32_e32 v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v5, 32, v5
	v_sub_nc_u32_e32 v7, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v1, v2, v1, v7
	v_lshrrev_b32_e32 v2, 9, v3
	v_lshrrev_b32_e32 v1, 9, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_or_b32_e32 v2, v2, v6
	v_add_nc_u32_e32 v4, v5, v4
	v_lshlrev_b32_e32 v3, 23, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v1, v1, v3
	v_mul_f32_e32 v3, 0x3fc90fda, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, 0x33000000, v1
	v_fma_f32 v4, 0x3fc90fda, v2, -v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v1, s10, v1
	v_fmamk_f32 v2, v2, 0x33a22168, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 0x3fc90fda, v1
	v_add_f32_e32 v1, v3, v2
	s_branch .LBB0_15
.LBB0_14:
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $vgpr1
.LBB0_15:                               ; %Flow68
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_17
; %bb.16:
	v_mul_f32_e64 v1, 0x3f22f983, |v0|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v2, v1
	v_fma_f32 v1, 0xbfc90fda, v2, |v0|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v1, v2, 0xb3a22168, v1
	v_fmamk_f32 v1, v2, 0xa7c234c4, v1
	v_cvt_i32_f32_e32 v2, v2
	s_branch .LBB0_18
.LBB0_17:
	v_mov_b32_e32 v2, s8
.LBB0_18:                               ; %_ZL4sinff.exit18
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_load_b32 s5, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f32_e64 s6, 0x48000000, |s5|
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_and_b32 s6, s5, 0x7fffffff
	s_cbranch_vccz .LBB0_20
; %bb.19:
	s_and_b32 s7, s6, 0x7fffff
	s_lshr_b32 s8, s6, 23
	s_bitset1_b32 s7, 23
	s_addk_i32 s8, 0xff88
	s_mul_hi_u32 s9, s7, 0xfe5163ab
	s_mul_i32 s10, s7, 0x3c439041
	s_mul_hi_u32 s11, s7, 0x3c439041
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s7, 0xdb629599
	s_mul_hi_u32 s12, s7, 0xdb629599
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_mul_i32 s12, s7, 0xf534ddc0
	s_mul_hi_u32 s13, s7, 0xf534ddc0
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s13
	s_mul_i32 s13, s7, 0xfc2757d1
	s_mul_hi_u32 s14, s7, 0xfc2757d1
	s_add_u32 s12, s12, s13
	s_addc_u32 s13, 0, s14
	s_mul_i32 s14, s7, 0x4e441529
	s_mul_hi_u32 s15, s7, 0x4e441529
	s_add_u32 s13, s13, s14
	s_addc_u32 s14, 0, s15
	s_cmp_gt_u32 s8, 63
	s_mul_i32 s15, s7, 0xfe5163ab
	s_mul_hi_u32 s16, s7, 0xa2f9836e
	s_mul_i32 s7, s7, 0xa2f9836e
	s_cselect_b32 s17, s10, s12
	s_cselect_b32 s9, s9, s11
	s_cselect_b32 s10, s15, s10
	s_add_u32 s7, s14, s7
	s_addc_u32 s14, 0, s16
	s_cmp_gt_u32 s8, 63
	s_cselect_b32 s15, 0xffffffc0, 0
	s_cselect_b32 s11, s11, s13
	s_cselect_b32 s7, s12, s7
	s_cselect_b32 s12, s13, s14
	s_add_i32 s15, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s15, 31
	s_cselect_b32 s8, 0xffffffe0, 0
	s_cselect_b32 s13, s11, s7
	s_cselect_b32 s7, s7, s12
	s_cselect_b32 s11, s17, s11
	s_cselect_b32 s12, s9, s17
	s_cselect_b32 s9, s10, s9
	s_add_i32 s8, s8, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s8, 31
	s_cselect_b32 s10, 0xffffffe0, 0
	s_cselect_b32 s7, s13, s7
	s_cselect_b32 s13, s11, s13
	s_cselect_b32 s11, s12, s11
	s_cselect_b32 s9, s9, s12
	s_add_i32 s10, s10, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s8, 32, s10
	s_cmp_eq_u32 s10, 0
	v_mov_b32_e32 v3, s8
	s_cselect_b32 s10, -1, 0
	v_alignbit_b32 v4, s7, s13, v3
	v_alignbit_b32 v5, s13, s11, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s8, v4
	v_cndmask_b32_e64 v4, v5, s13, s10
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s7, s7, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v5, s7, v4, 30
	s_bfe_u32 s12, s7, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s8, 0, s12
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v5, s8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v6, v5
	v_min_u32_e32 v6, 32, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 23, v6
	v_alignbit_b32 v3, s11, s9, v3
	v_sub_nc_u32_e32 v7, 31, v6
	v_cndmask_b32_e64 v3, v3, s11, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v4, v4, v3, 30
	v_alignbit_b32 v3, v3, s9, 30
	v_xor_b32_e32 v4, s8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_xor_b32_e32 v3, s8, v3
	s_lshr_b32 s8, s7, 29
	s_lshr_b32 s7, s7, 30
	s_lshl_b32 s8, s8, 31
	v_alignbit_b32 v5, v5, v4, v7
	v_alignbit_b32 v3, v4, v3, v7
	s_or_b32 s9, s8, 0.5
	s_add_i32 s7, s12, s7
	v_sub_nc_u32_e32 v8, s9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v4, v5, v3, 9
	v_clz_i32_u32_e32 v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, 32, v7
	v_sub_nc_u32_e32 v9, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v3, v4, v3, v9
	v_lshrrev_b32_e32 v4, 9, v5
	v_lshrrev_b32_e32 v3, 9, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_or_b32_e32 v4, v4, v8
	v_add_nc_u32_e32 v6, v7, v6
	v_lshlrev_b32_e32 v5, 23, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v3, v3, v5
	v_mul_f32_e32 v5, 0x3fc90fda, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 0x33000000, v3
	v_fma_f32 v6, 0x3fc90fda, v4, -v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v3, s8, v3
	v_fmamk_f32 v4, v4, 0x33a22168, v6
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, 0x3fc90fda, v3
	v_add_f32_e32 v3, v5, v4
	s_branch .LBB0_21
.LBB0_20:
	s_mov_b32 s8, -1
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $vgpr3
.LBB0_21:                               ; %Flow67
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_23
; %bb.22:
	v_mul_f32_e64 v3, 0x3f22f983, |s5|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v4, v3
	v_fma_f32 v3, 0xbfc90fda, v4, |s5|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v3, v4, 0xb3a22168, v3
	v_fmamk_f32 v3, v4, 0xa7c234c4, v3
	v_cvt_i32_f32_e32 v4, v4
	s_branch .LBB0_24
.LBB0_23:
	v_mov_b32_e32 v4, s7
.LBB0_24:                               ; %_ZL4sinff.exit26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v5, v3, v3 :: v_dual_lshlrev_b32 v8, 30, v4
	s_mov_b32 s7, 0xb94c1982
	s_mov_b32 s8, 0x37d75334
	s_xor_b32 s6, s6, s5
	v_fmaak_f32 v6, s7, v5, 0x3c0881c4
	v_and_b32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmaak_f32 v6, v5, v6, 0xbe2aaa9d
	v_fmaak_f32 v7, s8, v5, 0xbab64f3b
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v6, v5, v6
	v_fmaak_f32 v7, v5, v7, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v3, v3, v6 :: v_dual_and_b32 v6, 0x80000000, v8
	v_fmaak_f32 v7, v5, v7, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, s6, v6
	v_fma_f32 v5, v5, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v5, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, s5, 0x1f8
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, 0x7fc00000, v3, vcc_lo
	v_cmp_ngt_f32_e64 s5, 0x48000000, |v3|
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_cbranch_vccz .LBB0_26
; %bb.25:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_bitset0_b32 s6, 31
	s_and_b32 s7, s6, 0x7fffff
	s_lshr_b32 s6, s6, 23
	s_bitset1_b32 s7, 23
	s_addk_i32 s6, 0xff88
	s_mul_hi_u32 s8, s7, 0xfe5163ab
	s_mul_i32 s9, s7, 0x3c439041
	s_mul_hi_u32 s10, s7, 0x3c439041
	s_add_u32 s8, s8, s9
	s_addc_u32 s9, 0, s10
	s_mul_i32 s10, s7, 0xdb629599
	s_mul_hi_u32 s11, s7, 0xdb629599
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s7, 0xf534ddc0
	s_mul_hi_u32 s12, s7, 0xf534ddc0
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_mul_i32 s12, s7, 0xfc2757d1
	s_mul_hi_u32 s13, s7, 0xfc2757d1
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s13
	s_mul_i32 s13, s7, 0x4e441529
	s_mul_hi_u32 s14, s7, 0x4e441529
	s_add_u32 s12, s12, s13
	s_addc_u32 s13, 0, s14
	s_cmp_gt_u32 s6, 63
	s_mul_i32 s14, s7, 0xfe5163ab
	s_mul_hi_u32 s15, s7, 0xa2f9836e
	s_mul_i32 s7, s7, 0xa2f9836e
	s_cselect_b32 s16, s9, s11
	s_cselect_b32 s8, s8, s10
	s_cselect_b32 s9, s14, s9
	s_add_u32 s7, s13, s7
	s_addc_u32 s13, 0, s15
	s_cmp_gt_u32 s6, 63
	s_cselect_b32 s14, 0xffffffc0, 0
	s_cselect_b32 s10, s10, s12
	s_cselect_b32 s7, s11, s7
	s_cselect_b32 s11, s12, s13
	s_add_i32 s14, s14, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s14, 31
	s_cselect_b32 s6, 0xffffffe0, 0
	s_cselect_b32 s12, s10, s7
	s_cselect_b32 s7, s7, s11
	s_cselect_b32 s10, s16, s10
	s_cselect_b32 s11, s8, s16
	s_cselect_b32 s8, s9, s8
	s_add_i32 s6, s6, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s6, 31
	s_cselect_b32 s9, 0xffffffe0, 0
	s_cselect_b32 s7, s12, s7
	s_cselect_b32 s12, s10, s12
	s_cselect_b32 s10, s11, s10
	s_cselect_b32 s8, s8, s11
	s_add_i32 s9, s9, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s6, 32, s9
	s_cmp_eq_u32 s9, 0
	v_mov_b32_e32 v4, s6
	s_cselect_b32 s9, -1, 0
	v_alignbit_b32 v5, s7, s12, v4
	v_alignbit_b32 v6, s12, s10, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v5
	v_cndmask_b32_e64 v5, v6, s12, s9
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s6, s7, s6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v6, s6, v5, 30
	s_bfe_u32 s7, s6, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s11, 0, s7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v6, s11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v7, v6
	v_min_u32_e32 v7, 32, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v9, 23, v7
	v_alignbit_b32 v4, s10, s8, v4
	v_sub_nc_u32_e32 v8, 31, v7
	v_cndmask_b32_e64 v4, v4, s10, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v5, v5, v4, 30
	v_alignbit_b32 v4, v4, s8, 30
	s_lshr_b32 s8, s6, 29
	s_lshr_b32 s6, s6, 30
	s_lshl_b32 s8, s8, 31
	v_xor_b32_e32 v5, s11, v5
	v_xor_b32_e32 v4, s11, v4
	s_or_b32 s9, s8, 0.5
	s_add_i32 s6, s7, s6
	v_sub_nc_u32_e32 v9, s9, v9
	v_alignbit_b32 v6, v6, v5, v8
	v_alignbit_b32 v4, v5, v4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v5, v6, v4, 9
	v_clz_i32_u32_e32 v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v8, 32, v8
	v_sub_nc_u32_e32 v10, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v4, v5, v4, v10
	v_lshrrev_b32_e32 v5, 9, v6
	v_lshrrev_b32_e32 v4, 9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_or_b32_e32 v5, v5, v9
	v_add_nc_u32_e32 v7, v8, v7
	v_lshlrev_b32_e32 v6, 23, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v4, v4, v6
	v_mul_f32_e32 v6, 0x3fc90fda, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, 0x33000000, v4
	v_fma_f32 v7, 0x3fc90fda, v5, -v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, s8, v4
	v_fmamk_f32 v5, v5, 0x33a22168, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, 0x3fc90fda, v4
	v_add_f32_e32 v4, v6, v5
	s_branch .LBB0_27
.LBB0_26:
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $vgpr4
.LBB0_27:                               ; %Flow66
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_29
; %bb.28:
	v_mul_f32_e64 v4, 0x3f22f983, |v3|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v5, v4
	v_fma_f32 v4, 0xbfc90fda, v5, |v3|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v4, v5, 0xb3a22168, v4
	v_fmamk_f32 v4, v5, 0xa7c234c4, v4
	v_cvt_i32_f32_e32 v5, v5
	s_branch .LBB0_30
.LBB0_29:
	v_mov_b32_e32 v5, s6
.LBB0_30:                               ; %_ZL4cosff.exit32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v6, v4, v4 :: v_dual_and_b32 v9, 1, v5
	s_mov_b32 s5, 0xb94c1982
	s_mov_b32 s6, 0x37d75334
	v_lshlrev_b32_e32 v5, 30, v5
	v_fmaak_f32 v7, s5, v6, 0x3c0881c4
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v5, 0x80000000, v5
	v_fmaak_f32 v7, v6, v7, 0xbe2aaa9d
	v_fmaak_f32 v8, s6, v6, 0xbab64f3b
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, v6, v7
	v_fmaak_f32 v8, v6, v8, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v4, v7
	v_fmaak_f32 v8, v6, v8, 0xbf000004
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, v6, v8, 1.0
	v_cndmask_b32_e64 v4, -v4, v6, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v5, v4
	v_cndmask_b32_e32 v3, 0x7fc00000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s5, 0x48000000, |v3|
	v_readfirstlane_b32 s7, v3
	s_and_b32 vcc_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s5, s7, 0x7fffffff
	s_cbranch_vccz .LBB0_32
; %bb.31:
	s_and_b32 s7, s5, 0x7fffff
	s_lshr_b32 s8, s5, 23
	s_bitset1_b32 s7, 23
	s_addk_i32 s8, 0xff88
	s_mul_hi_u32 s9, s7, 0xfe5163ab
	s_mul_i32 s10, s7, 0x3c439041
	s_mul_hi_u32 s11, s7, 0x3c439041
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s7, 0xdb629599
	s_mul_hi_u32 s12, s7, 0xdb629599
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_mul_i32 s12, s7, 0xf534ddc0
	s_mul_hi_u32 s13, s7, 0xf534ddc0
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s13
	s_mul_i32 s13, s7, 0xfc2757d1
	s_mul_hi_u32 s14, s7, 0xfc2757d1
	s_add_u32 s12, s12, s13
	s_addc_u32 s13, 0, s14
	s_mul_i32 s14, s7, 0x4e441529
	s_mul_hi_u32 s15, s7, 0x4e441529
	s_add_u32 s13, s13, s14
	s_addc_u32 s14, 0, s15
	s_cmp_gt_u32 s8, 63
	s_mul_i32 s15, s7, 0xfe5163ab
	s_mul_hi_u32 s16, s7, 0xa2f9836e
	s_mul_i32 s7, s7, 0xa2f9836e
	s_cselect_b32 s17, s10, s12
	s_cselect_b32 s9, s9, s11
	s_cselect_b32 s10, s15, s10
	s_add_u32 s7, s14, s7
	s_addc_u32 s14, 0, s16
	s_cmp_gt_u32 s8, 63
	s_cselect_b32 s15, 0xffffffc0, 0
	s_cselect_b32 s11, s11, s13
	s_cselect_b32 s7, s12, s7
	s_cselect_b32 s12, s13, s14
	s_add_i32 s15, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s15, 31
	s_cselect_b32 s8, 0xffffffe0, 0
	s_cselect_b32 s13, s11, s7
	s_cselect_b32 s7, s7, s12
	s_cselect_b32 s11, s17, s11
	s_cselect_b32 s12, s9, s17
	s_cselect_b32 s9, s10, s9
	s_add_i32 s8, s8, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s8, 31
	s_cselect_b32 s10, 0xffffffe0, 0
	s_cselect_b32 s7, s13, s7
	s_cselect_b32 s13, s11, s13
	s_cselect_b32 s11, s12, s11
	s_cselect_b32 s9, s9, s12
	s_add_i32 s10, s10, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s8, 32, s10
	s_cmp_eq_u32 s10, 0
	v_mov_b32_e32 v4, s8
	s_cselect_b32 s10, -1, 0
	v_alignbit_b32 v5, s7, s13, v4
	v_alignbit_b32 v6, s13, s11, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s8, v5
	v_cndmask_b32_e64 v5, v6, s13, s10
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s7, s7, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v6, s7, v5, 30
	s_bfe_u32 s8, s7, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s12, 0, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v6, s12, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v7, v6
	v_min_u32_e32 v7, 32, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v9, 23, v7
	v_alignbit_b32 v4, s11, s9, v4
	v_sub_nc_u32_e32 v8, 31, v7
	v_cndmask_b32_e64 v4, v4, s11, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v5, v5, v4, 30
	v_alignbit_b32 v4, v4, s9, 30
	s_lshr_b32 s9, s7, 29
	s_lshr_b32 s7, s7, 30
	s_lshl_b32 s9, s9, 31
	v_xor_b32_e32 v5, s12, v5
	v_xor_b32_e32 v4, s12, v4
	s_or_b32 s10, s9, 0.5
	s_add_i32 s7, s8, s7
	v_sub_nc_u32_e32 v9, s10, v9
	v_alignbit_b32 v6, v6, v5, v8
	v_alignbit_b32 v4, v5, v4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v5, v6, v4, 9
	v_clz_i32_u32_e32 v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v8, 32, v8
	v_sub_nc_u32_e32 v10, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v4, v5, v4, v10
	v_lshrrev_b32_e32 v5, 9, v6
	v_lshrrev_b32_e32 v4, 9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_or_b32_e32 v5, v5, v9
	v_add_nc_u32_e32 v7, v8, v7
	v_lshlrev_b32_e32 v6, 23, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v4, v4, v6
	v_mul_f32_e32 v6, 0x3fc90fda, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, 0x33000000, v4
	v_fma_f32 v7, 0x3fc90fda, v5, -v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, s9, v4
	v_fmamk_f32 v5, v5, 0x33a22168, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, 0x3fc90fda, v4
	v_add_f32_e32 v4, v6, v5
	s_branch .LBB0_33
.LBB0_32:
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $vgpr4
.LBB0_33:                               ; %Flow
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_35
; %bb.34:
	v_mul_f32_e64 v4, 0x3f22f983, |v3|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v5, v4
	v_fma_f32 v4, 0xbfc90fda, v5, |v3|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v4, v5, 0xb3a22168, v4
	v_fmamk_f32 v4, v5, 0xa7c234c4, v4
	v_cvt_i32_f32_e32 v5, v5
	s_branch .LBB0_36
.LBB0_35:
	v_mov_b32_e32 v5, s7
.LBB0_36:                               ; %_ZL4sinff.exit40
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mul_f32 v6, v1, v1 :: v_dual_mul_f32 v9, v4, v4
	s_mov_b32 s6, 0x37d75334
	v_lshlrev_b32_e32 v8, 30, v2
	v_xor_b32_e32 v7, s4, v0
	s_mov_b32 s4, 0xb94c1982
	v_fmaak_f32 v13, s6, v9, 0xbab64f3b
	v_fmaak_f32 v11, s6, v6, 0xbab64f3b
	v_and_b32_e32 v8, 0x80000000, v8
	v_fmaak_f32 v12, s4, v9, 0x3c0881c4
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v7, v7, v8
	v_fmaak_f32 v8, v6, v11, 0x3d2aabf7
	v_fmaak_f32 v11, v9, v12, 0xbe2aaa9d
	v_fmaak_f32 v10, s4, v6, 0x3c0881c4
	v_fmaak_f32 v12, v9, v13, 0x3d2aabf7
	v_dual_fmaak_f32 v8, v6, v8, 0xbf000004 :: v_dual_mul_f32 v11, v9, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmaak_f32 v10, v6, v10, 0xbe2aaa9d
	v_fmaak_f32 v12, v9, v12, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v10, v6, v10
	v_fma_f32 v6, v6, v8, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v8, v9, v12, 1.0
	v_fmac_f32_e32 v1, v1, v10
	v_and_b32_e32 v2, 1, v2
	v_lshlrev_b32_e32 v10, 30, v5
	v_dual_fmac_f32 v4, v4, v11 :: v_dual_and_b32 v5, 1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	v_and_b32_e32 v9, 0x80000000, v10
	v_xor_b32_e32 v10, s5, v3
	v_cndmask_b32_e32 v1, v6, v1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v7, v1
	v_cndmask_b32_e32 v2, v8, v4, vcc_lo
	v_xor_b32_e32 v4, v10, v9
	v_cmp_class_f32_e64 vcc_lo, v0, 0x1f8
	v_xor_b32_e32 v2, v4, v2
	v_cndmask_b32_e32 v0, 0x7fc00000, v1, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x1f8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0x7fc00000, v2, vcc_lo
	v_dual_add_f32 v0, v0, v1 :: v_dual_mov_b32 v1, 0
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPfS_S_, .Lfunc_end0-_Z3addPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5596
; NumSgprs: 22
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z3addPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
