#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stdio.h>
#include <errno.h>
#include <unistd.h>
#include <stdlib.h>
#include <arpa/inet.h>
#include <math.h>
#include "cs_cuda.h"
#include "cs_dbg.h"
#include "cs_helper.h"
#include "cs_edge_detect.h"
#include "cs_copy_box.h"

// #define CUDA_DBG
// #define CUDA_DBG1

__global__ void d_do_edge_detection ( int *fdp, int *tdp, int tbl_size, 
	int cx, int cy, int ex, int ey, int xy_size, int exy_size )
{
	int t_idx = blockIdx.x * blockDim.x + threadIdx.x;
	int *ofdp, mea, *fp, x, y, block, sum, i, j ;
	double d ;

	ofdp = fdp ;
	while ( t_idx < tbl_size )
	{
		fdp = ofdp ;
		i = t_idx % xy_size ;
		y = i / cx ;
		x = i % cx ;

		if (( y >= ey ) && ( x >= ex ) && (( cy - y ) > ey ) && (( cx -x ) > ex )) 
		{
			mea = fdp[ t_idx ] ;

			block = t_idx / xy_size ;
			fdp += block * xy_size ;

			sum = 0 ;
			for ( j = -ey ; j <= ey ; j++ )
			{
				fp = fdp + ( y + j ) * cx + ( x - ex ) ;

				for ( i = -ex ; i <= ex ; i++ )
				{
					sum += *fp++ ;
				} 
			}

			sum -= mea ;

			// exy_size take out the one in the center already ...

			d = ((( double ) sum ) / (( double ) exy_size )) ;
		
			// round up

			tdp [ t_idx ] = (( int )( d + 0.5 )) - mea ;

		} else
			tdp [ t_idx ] = 0 ;

		t_idx += CUDA_MAX_THREADS ;
	}		
}

// edge_x/y are from the center of the edge box on each side
// fromp will have the final data ... since we do the copy box

int
h_do_edge_detection ( int *fromp, int *top, int tbl_size, int cube_x,
	int cube_y, int edge_x, int edge_y )
{
	int nThreadsPerBlock = 512;
	int nBlocks ; // = ( tbl_size + ( nThreadsPerBlock - 1 ))/nThreadsPerBlock ;
	int cube_xy = cube_y * cube_x ;
	int edge_xy = ( edge_x * 2 + 1 ) * ( edge_y * 2 + 1 ) - 1 ;

#ifdef CUDA_DBG1 
	fprintf(stderr, "%s: f %p t %p tblsize %d cube %d %d edge %d %d\n",
		__func__, fromp, top, tbl_size, cube_x, cube_y, edge_x, edge_y ) ;
#endif 

	if ( tbl_size % cube_xy )
	{
		fprintf(stderr, "%s: error size %d cube %d \n", __func__,
			tbl_size, cube_xy ) ;
		return ( 0 ) ;
	}

	if ((( cube_x - ( edge_x * 2 + 1 )) < 0 ) ||
		(( cube_y - ( edge_y * 2 + 1 )) < 0 ))
	{
		fprintf(stderr, "%s: error cube %d %d edge %d %d\n",
			__func__, cube_x, cube_y, edge_x, edge_y ) ;
		return ( 0 ) ;
	}

	h_block_adj ( tbl_size, nThreadsPerBlock, &nBlocks ) ;

	d_do_edge_detection <<< nBlocks, nThreadsPerBlock >>> (
		fromp, top, tbl_size, cube_x, cube_y, edge_x, edge_y,
		cube_xy, edge_xy ) ;

	cudaThreadSynchronize() ;

#ifdef CUDA_DBG 
	dbg_p_d_data_i("edge_detect", top, tbl_size ) ; 
#endif 
	
	if ( !h_do_copy_box ( top, fromp, tbl_size, cube_x,
		cube_y, edge_x, edge_y ))
	{
		return ( 0 ) ;
	}

	return ( 1 ) ;
}

	.file	"tmpxft_00368f56_00000000-6_cs_edge_detect.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2049:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2049:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z48__device_stub__Z19d_do_edge_detectionPiS_iiiiiiiPiS_iiiiiii
	.type	_Z48__device_stub__Z19d_do_edge_detectionPiS_iiiiiiiPiS_iiiiiii, @function
_Z48__device_stub__Z19d_do_edge_detectionPiS_iiiiiiiPiS_iiiiiii:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z19d_do_edge_detectionPiS_iiiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 208
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z48__device_stub__Z19d_do_edge_detectionPiS_iiiiiiiPiS_iiiiiii, .-_Z48__device_stub__Z19d_do_edge_detectionPiS_iiiiiiiPiS_iiiiiii
	.globl	_Z19d_do_edge_detectionPiS_iiiiiii
	.type	_Z19d_do_edge_detectionPiS_iiiiiii, @function
_Z19d_do_edge_detectionPiS_iiiiiii:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z19d_do_edge_detectionPiS_iiiiiiiPiS_iiiiiii
	.cfi_endproc
.LFE2072:
	.size	_Z19d_do_edge_detectionPiS_iiiiiii, .-_Z19d_do_edge_detectionPiS_iiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"h_do_edge_detection"
.LC1:
	.string	"%s: error size %d cube %d \n"
.LC2:
	.string	"%s: error cube %d %d edge %d %d\n"
	.text
	.globl	_Z19h_do_edge_detectionPiS_iiiii
	.type	_Z19h_do_edge_detectionPiS_iiiii, @function
_Z19h_do_edge_detectionPiS_iiiii:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	imull	%ecx, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	%edx, 24(%rsp)
	movl	144(%rsp), %r15d
	movq	%rdi, 8(%rsp)
	movq	%rsi, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movl	%edx, %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	je	.L9
	movl	24(%rsp), %r8d
	movl	%ebx, %r9d
	movl	$2, %esi
	xorl	%eax, %eax
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L10
.L9:
	leal	1(%r9,%r9), %r14d
	movl	%ecx, %ebp
	movl	%r8d, %r12d
	movl	%r9d, %r13d
	cmpl	%r14d, %ecx
	jl	.L11
	leal	1(%r15,%r15), %r11d
	cmpl	%r11d, %r8d
	jge	.L12
.L11:
	pushq	%r15
	.cfi_def_cfa_offset 152
	movq	stderr(%rip), %rdi
	movl	%ebp, %r8d
	movl	%r12d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 160
	leaq	.LC0(%rip), %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rdx
	call	__fprintf_chk@PLT
	popq	%rdi
	.cfi_def_cfa_offset 152
	popq	%r8
	.cfi_def_cfa_offset 144
.L10:
	xorl	%eax, %eax
	jmp	.L8
.L12:
	movl	24(%rsp), %edi
	leaq	44(%rsp), %rdx
	movl	$512, %esi
	movl	%r11d, 28(%rsp)
	call	_Z11h_block_adjiiPi@PLT
	movl	44(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$8388609, %edx
	movl	$1, %ecx
	movl	%eax, 48(%rsp)
	salq	$9, %rdx
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movl	28(%rsp), %r11d
	testl	%eax, %eax
	jne	.L14
	imull	%r11d, %r14d
	pushq	%rsi
	.cfi_def_cfa_offset 152
	movl	%r13d, %r9d
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	decl	%r14d
	pushq	%r14
	.cfi_def_cfa_offset 160
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	%r15
	.cfi_def_cfa_offset 176
	movl	56(%rsp), %edx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z48__device_stub__Z19d_do_edge_detectionPiS_iiiiiiiPiS_iiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 144
.L14:
	call	cudaThreadSynchronize@PLT
	movl	%ebp, %ecx
	movl	%r13d, %r9d
	movl	%r12d, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	movl	40(%rsp), %edx
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z13h_do_copy_boxPiS_iiiii@PLT
	popq	%rdx
	.cfi_def_cfa_offset 152
	popq	%rcx
	.cfi_def_cfa_offset 144
	testl	%eax, %eax
	setne	%al
	movzbl	%al, %eax
.L8:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2046:
	.size	_Z19h_do_edge_detectionPiS_iiiii, .-_Z19h_do_edge_detectionPiS_iiiii
	.section	.rodata.str1.1
.LC3:
	.string	"_Z19d_do_edge_detectionPiS_iiiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2074:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19d_do_edge_detectionPiS_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2074:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stdio.h>
#include <errno.h>
#include <unistd.h>
#include <stdlib.h>
#include <arpa/inet.h>
#include <math.h>
#include "cs_cuda.h"
#include "cs_dbg.h"
#include "cs_helper.h"
#include "cs_edge_detect.h"
#include "cs_copy_box.h"

// #define CUDA_DBG
// #define CUDA_DBG1

__global__ void d_do_edge_detection ( int *fdp, int *tdp, int tbl_size, 
	int cx, int cy, int ex, int ey, int xy_size, int exy_size )
{
	int t_idx = blockIdx.x * blockDim.x + threadIdx.x;
	int *ofdp, mea, *fp, x, y, block, sum, i, j ;
	double d ;

	ofdp = fdp ;
	while ( t_idx < tbl_size )
	{
		fdp = ofdp ;
		i = t_idx % xy_size ;
		y = i / cx ;
		x = i % cx ;

		if (( y >= ey ) && ( x >= ex ) && (( cy - y ) > ey ) && (( cx -x ) > ex )) 
		{
			mea = fdp[ t_idx ] ;

			block = t_idx / xy_size ;
			fdp += block * xy_size ;

			sum = 0 ;
			for ( j = -ey ; j <= ey ; j++ )
			{
				fp = fdp + ( y + j ) * cx + ( x - ex ) ;

				for ( i = -ex ; i <= ex ; i++ )
				{
					sum += *fp++ ;
				} 
			}

			sum -= mea ;

			// exy_size take out the one in the center already ...

			d = ((( double ) sum ) / (( double ) exy_size )) ;
		
			// round up

			tdp [ t_idx ] = (( int )( d + 0.5 )) - mea ;

		} else
			tdp [ t_idx ] = 0 ;

		t_idx += CUDA_MAX_THREADS ;
	}		
}

// edge_x/y are from the center of the edge box on each side
// fromp will have the final data ... since we do the copy box

int
h_do_edge_detection ( int *fromp, int *top, int tbl_size, int cube_x,
	int cube_y, int edge_x, int edge_y )
{
	int nThreadsPerBlock = 512;
	int nBlocks ; // = ( tbl_size + ( nThreadsPerBlock - 1 ))/nThreadsPerBlock ;
	int cube_xy = cube_y * cube_x ;
	int edge_xy = ( edge_x * 2 + 1 ) * ( edge_y * 2 + 1 ) - 1 ;

#ifdef CUDA_DBG1 
	fprintf(stderr, "%s: f %p t %p tblsize %d cube %d %d edge %d %d\n",
		__func__, fromp, top, tbl_size, cube_x, cube_y, edge_x, edge_y ) ;
#endif 

	if ( tbl_size % cube_xy )
	{
		fprintf(stderr, "%s: error size %d cube %d \n", __func__,
			tbl_size, cube_xy ) ;
		return ( 0 ) ;
	}

	if ((( cube_x - ( edge_x * 2 + 1 )) < 0 ) ||
		(( cube_y - ( edge_y * 2 + 1 )) < 0 ))
	{
		fprintf(stderr, "%s: error cube %d %d edge %d %d\n",
			__func__, cube_x, cube_y, edge_x, edge_y ) ;
		return ( 0 ) ;
	}

	h_block_adj ( tbl_size, nThreadsPerBlock, &nBlocks ) ;

	d_do_edge_detection <<< nBlocks, nThreadsPerBlock >>> (
		fromp, top, tbl_size, cube_x, cube_y, edge_x, edge_y,
		cube_xy, edge_xy ) ;

	hipDeviceSynchronize() ;

#ifdef CUDA_DBG 
	dbg_p_d_data_i("edge_detect", top, tbl_size ) ; 
#endif 
	
	if ( !h_do_copy_box ( top, fromp, tbl_size, cube_x,
		cube_y, edge_x, edge_y ))
	{
		return ( 0 ) ;
	}

	return ( 1 ) ;
}

	.text
	.file	"cs_edge_detect.hip"
	.globl	_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii # -- Begin function _Z34__device_stub__d_do_edge_detectionPiS_iiiiiii
	.type	_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii,@function
_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii: # @_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19d_do_edge_detectionPiS_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii, .Lfunc_end0-_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19h_do_edge_detectionPiS_iiiii # -- Begin function _Z19h_do_edge_detectionPiS_iiiii
	.type	_Z19h_do_edge_detectionPiS_iiiii,@function
_Z19h_do_edge_detectionPiS_iiiii:       # @_Z19h_do_edge_detectionPiS_iiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r10d
	movl	%r8d, %r11d
	imull	%ecx, %r11d
	movl	%edx, %eax
	cltd
	idivl	%r11d
	testl	%edx, %edx
	jne	.LBB1_1
# %bb.2:
	movl	%r9d, %ebx
	movl	96(%rsp), %edx
	leal	(%rbx,%rbx), %eax
	cmpl	%ecx, %eax
	jge	.LBB1_4
# %bb.3:
	leal	(%rdx,%rdx), %eax
	cmpl	%r8d, %eax
	jge	.LBB1_4
# %bb.5:
	movl	%r11d, 32(%rsp)                 # 4-byte Spill
	movq	%rdi, %r13
	movl	%r8d, %r12d
	movl	%ecx, %r14d
	movq	%rsi, %r15
	leaq	36(%rsp), %rbp
	movl	%r10d, %edi
	movl	$512, %esi                      # imm = 0x200
	movq	%rbp, %rdx
	movl	%r10d, 28(%rsp)                 # 4-byte Spill
	callq	_Z11h_block_adjiiPi
	movl	(%rbp), %edi
	movl	96(%rsp), %ebp
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:
	leal	1(,%rbx,2), %eax
	leal	1(,%rbp,2), %ecx
	imull	%eax, %ecx
	decl	%ecx
	movl	%ecx, 16(%rsp)
	movl	32(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 8(%rsp)
	movl	%ebp, (%rsp)
	movq	%r13, %rdi
	movq	%r15, %rsi
	movl	28(%rsp), %edx                  # 4-byte Reload
	movl	%r14d, %ecx
	movl	%r12d, %r8d
	movl	%ebx, %r9d
	callq	_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii
.LBB1_7:
	callq	hipDeviceSynchronize
	movl	%ebp, (%rsp)
	movq	%r15, %rdi
	movq	%r13, %rsi
	movl	28(%rsp), %edx                  # 4-byte Reload
	movl	%r14d, %ecx
	movl	%r12d, %r8d
	movl	%ebx, %r9d
	callq	_Z13h_do_copy_boxPiS_iiiii
	xorl	%r13d, %r13d
	testl	%eax, %eax
	setne	%r13b
.LBB1_8:
	movl	%r13d, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 96
	movq	stderr(%rip), %rdi
	xorl	%r13d, %r13d
	movl	$.L.str, %esi
	movl	$.L__func__._Z19h_do_edge_detectionPiS_iiiii, %edx
	movl	%r10d, %ecx
	movl	%r11d, %r8d
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_8
.LBB1_4:
	movq	stderr(%rip), %rdi
	movl	%edx, (%rsp)
	xorl	%r13d, %r13d
	movl	$.L.str.1, %esi
	movl	$.L__func__._Z19h_do_edge_detectionPiS_iiiii, %edx
	movl	%ebx, %r9d
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_8
.Lfunc_end1:
	.size	_Z19h_do_edge_detectionPiS_iiiii, .Lfunc_end1-_Z19h_do_edge_detectionPiS_iiiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19d_do_edge_detectionPiS_iiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19d_do_edge_detectionPiS_iiiiiii,@object # @_Z19d_do_edge_detectionPiS_iiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z19d_do_edge_detectionPiS_iiiiiii
	.p2align	3, 0x0
_Z19d_do_edge_detectionPiS_iiiiiii:
	.quad	_Z34__device_stub__d_do_edge_detectionPiS_iiiiiii
	.size	_Z19d_do_edge_detectionPiS_iiiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%s: error size %d cube %d \n"
	.size	.L.str, 28

	.type	.L__func__._Z19h_do_edge_detectionPiS_iiiii,@object # @__func__._Z19h_do_edge_detectionPiS_iiiii
.L__func__._Z19h_do_edge_detectionPiS_iiiii:
	.asciz	"h_do_edge_detection"
	.size	.L__func__._Z19h_do_edge_detectionPiS_iiiii, 20

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%s: error cube %d %d edge %d %d\n"
	.size	.L.str.1, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19d_do_edge_detectionPiS_iiiiiii"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__d_do_edge_detectionPiS_iiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19d_do_edge_detectionPiS_iiiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19d_do_edge_detectionPiS_iiiiiii ; -- Begin function _Z19d_do_edge_detectionPiS_iiiiiii
	.globl	_Z19d_do_edge_detectionPiS_iiiiiii
	.p2align	8
	.type	_Z19d_do_edge_detectionPiS_iiiiiii,@function
_Z19d_do_edge_detectionPiS_iiiiiii:     ; @_Z19d_do_edge_detectionPiS_iiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_12
; %bb.1:                                ; %.lr.ph84
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x20
	s_load_b128 s[12:15], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s2, 0, s8
	s_cmp_gt_i32 s8, -1
	v_cvt_f64_i32_e32 v[3:4], s10
	s_cselect_b32 s3, -1, 0
	s_cmp_gt_i32 s7, -1
	s_mov_b32 s10, 0
	s_cselect_b32 s11, -1, 0
	s_ashr_i32 s16, s5, 31
	s_ashr_i32 s0, s9, 31
	s_add_i32 s17, s5, s16
	s_add_i32 s1, s9, s0
	s_xor_b32 s17, s17, s16
	s_xor_b32 s9, s1, s0
	v_cvt_f32_u32_e32 v2, s17
	v_cvt_f32_u32_e32 v0, s9
	s_sub_i32 s1, 0, s17
	s_sub_i32 s0, 0, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v2, v2
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v2
	v_mul_lo_u32 v6, s1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v2, v6
	v_dual_mul_f32 v0, 0x4f7ffffe, v0 :: v_dual_add_nc_u32 v9, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v5, s0, v0
	s_lshl_b32 s0, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s18, s0, 1
	v_mul_hi_u32 v5, v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v5
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_7 Depth 3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v1, v2
	v_xor_b32_e32 v5, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v0
	v_mul_lo_u32 v6, v6, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v6
	v_subrev_nc_u32_e32 v6, s9, v5
	v_cmp_le_u32_e32 vcc_lo, s9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_subrev_nc_u32_e32 v6, s9, v5
	v_cmp_le_u32_e32 vcc_lo, s9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_xor_b32_e32 v5, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v5, v2
	v_ashrrev_i32_e32 v5, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v7, v5
	v_xor_b32_e32 v6, v6, v5
	v_xor_b32_e32 v5, s16, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v8, v6, v9
	v_mul_lo_u32 v10, v8, s17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, v6, v10
	v_add_nc_u32_e32 v10, 1, v8
	v_subrev_nc_u32_e32 v11, s17, v6
	v_cmp_le_u32_e32 vcc_lo, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_cndmask_b32_e32 v6, v6, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, 1, v8
	v_cmp_le_u32_e32 vcc_lo, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v8, v10, vcc_lo
	v_xor_b32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v10, v6, v5
	v_mul_lo_u32 v5, v10, s5
	v_cmp_le_i32_e32 vcc_lo, s8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v7, v5
	v_sub_nc_u32_e32 v5, s6, v10
	v_cmp_le_i32_e64 s0, s7, v8
	v_sub_nc_u32_e32 v6, s5, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s1, s8, v5
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, s7, v6
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_and_b32 s0, s0, s1
	s_and_b32 s1, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_11
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v11, vcc_lo, s12, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s13, v6, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s3
	global_load_b32 v2, v[11:12], off
	v_mov_b32_e32 v11, 0
	s_cbranch_vccnz .LBB0_10
; %bb.4:                                ; %.lr.ph79
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_sub_nc_u32_e32 v7, v1, v7
	v_subrev_nc_u32_e32 v11, s7, v8
	s_mov_b32 s1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[12:13], 2, v[11:12]
	v_mov_b32_e32 v11, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s12, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v7, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, v8, v13, vcc_lo
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_7 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccnz .LBB0_8
; %bb.6:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_5 Depth=2
	v_add_nc_u32_e32 v7, s1, v10
	s_mov_b32 s19, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v7, s5
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, v12, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v13, v8, vcc_lo
.LBB0_7:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v14, v[7:8], off
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_add_i32 s19, s19, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s19, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, v14, v11
	s_cbranch_scc1 .LBB0_7
.LBB0_8:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_add_i32 s19, s1, 1
	s_cmp_lg_u32 s1, s8
	s_cbranch_scc0 .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s1, s19
	s_branch .LBB0_5
.LBB0_10:                               ; %._crit_edge80
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v11, v2
	v_cvt_f64_i32_e32 v[7:8], v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[10:11], null, v[3:4], v[3:4], v[7:8]
	v_rcp_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_div_scale_f64 v[14:15], vcc_lo, v[7:8], v[3:4], v[7:8]
	v_mul_f64 v[16:17], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[10:11], v[16:17], v[14:15]
	v_div_fmas_f64 v[10:11], v[10:11], v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[7:8], v[10:11], v[3:4], v[7:8]
	v_add_f64 v[7:8], v[7:8], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v7, v[7:8]
	v_sub_nc_u32_e32 v2, v7, v2
.LBB0_11:                               ; %Flow117
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, 0x1fffe00, v1
	v_add_co_u32 v5, s0, s14, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, s0, s15, v6, s0
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	global_store_b32 v[5:6], v2, off
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_2
.LBB0_12:                               ; %._crit_edge85
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19d_do_edge_detectionPiS_iiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19d_do_edge_detectionPiS_iiiiiii, .Lfunc_end0-_Z19d_do_edge_detectionPiS_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 996
; NumSgprs: 22
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19d_do_edge_detectionPiS_iiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z19d_do_edge_detectionPiS_iiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
