#include <iostream>
#include <cmath>
#include <vector>
#include <random>
#include <cassert>

#define GPU_CHECK(ans) { gpuAssert((ans), __FILE__, __LINE__); }

constexpr auto VECTOR_LENGTH = 1024u * 2;
constexpr auto EPS = 1e-4f;

inline void gpuAssert(cudaError_t code, const char *file, int line,
                      bool abort = true) {
  if (code != cudaSuccess) {
    std::cout << "GPUassert: " << cudaGetErrorString(code) << " " << file << ":"
              << line << "\n";
    if (abort) {
      std::exit(code);
    }
  }
}

void addHost(const std::vector<float> &A, const std::vector<float> &B,
        std::vector<float> &C) {
  assert(A.size() == B.size() && B.size() == C.size());
  for (auto i = 0u; i < A.size(); ++i) {
    C[i] = A[i] + B[i];
  }
}

__global__ void saxpy(const float *A, const float *B, float *C) {
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  C[i] = A[i] + B[i];
}

void addGPU(const std::vector<float> &A, const std::vector<float> &B,
        std::vector<float> &C) {
  float *A_gpu, *B_gpu, *C_gpu;
  auto byte_size = VECTOR_LENGTH * sizeof(float);
  GPU_CHECK(cudaMalloc(&A_gpu, byte_size));
  GPU_CHECK(cudaMalloc(&B_gpu, byte_size));
  GPU_CHECK(cudaMalloc(&C_gpu, byte_size));

  GPU_CHECK(cudaMemcpy(A_gpu, A.data(), byte_size, cudaMemcpyHostToDevice));
  GPU_CHECK(cudaMemcpy(B_gpu, B.data(), byte_size, cudaMemcpyHostToDevice));
  GPU_CHECK(cudaMemcpy(C_gpu, C.data(), byte_size, cudaMemcpyHostToDevice));

  saxpy<<<2, VECTOR_LENGTH / 2>>>(A_gpu, B_gpu, C_gpu);

  GPU_CHECK(cudaMemcpy(C.data(), C_gpu, byte_size, cudaMemcpyDeviceToHost));
}

bool verify(const std::vector<float> &A, const std::vector<float> &B,
            const std::vector<float> &C) {
  for (auto i = 0u; i < VECTOR_LENGTH; ++i) {
    if (A[i] + B[i] - C[i] > EPS) {
      std::cout << "ERROR! Index " << i << "\n";
      std::cout << A[i] + B[i] << "  " << C[i] << "\n";
      return false;
    }
  }
  return true;
}

int main() {
  std::random_device rd{};
  std::mt19937 gen{rd()};
  std::normal_distribution<float> dist{5, 2};

  std::vector<float> A(VECTOR_LENGTH), B(VECTOR_LENGTH), C(VECTOR_LENGTH);

  for (auto i = 0u; i < VECTOR_LENGTH; ++i) {
    A[i] = dist(gen);
    B[i] = dist(gen);
    C[i] = M_PI;
  }
  addHost(A, B, C);
  if (!verify(A, B, C)) {
    return 1;
  }
  std::cout << "Host verified\n";

  std::fill(C.begin(), C.end(), M_PI);

  addGPU(A, B, C);
  if (!verify(A, B, C)) {
    return 1;
  }
  std::cout << "GPU verified\n";

  return 0;
}

	.file	"tmpxft_0021e5ed_00000000-6_vector_add.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4726:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4726:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: "
.LC1:
	.string	" "
.LC2:
	.string	":"
.LC3:
	.string	"\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB4719:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	leaq	.LC0(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edi, %ebx
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %r14
	call	cudaGetErrorString@PLT
	movq	%r14, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	ret
	.cfi_endproc
.LFE4719:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z7addHostRKSt6vectorIfSaIfEES3_RS1_
	.type	_Z7addHostRKSt6vectorIfSaIfEES3_RS1_, @function
_Z7addHostRKSt6vectorIfSaIfEES3_RS1_:
.LFB4720:
	.cfi_startproc
	endbr64
	movq	(%rdi), %r8
	movq	8(%rdi), %rax
	xorl	%edi, %edi
	subq	%r8, %rax
	sarq	$2, %rax
.L13:
	movl	%edi, %ecx
	cmpq	%rax, %rcx
	jnb	.L15
	movq	(%rsi), %r10
	movq	(%rdx), %r9
	incl	%edi
	movss	(%r10,%rcx,4), %xmm0
	addss	(%r8,%rcx,4), %xmm0
	movss	%xmm0, (%r9,%rcx,4)
	jmp	.L13
.L15:
	ret
	.cfi_endproc
.LFE4720:
	.size	_Z7addHostRKSt6vectorIfSaIfEES3_RS1_, .-_Z7addHostRKSt6vectorIfSaIfEES3_RS1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"ERROR! Index "
.LC6:
	.string	"  "
	.text
	.globl	_Z6verifyRKSt6vectorIfSaIfEES3_S3_
	.type	_Z6verifyRKSt6vectorIfSaIfEES3_S3_, @function
_Z6verifyRKSt6vectorIfSaIfEES3_S3_:
.LFB4722:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rcx
	movq	(%rsi), %rax
	movq	(%rdx), %rdx
.L20:
	movss	(%rcx,%rbx,4), %xmm0
	addss	(%rax,%rbx,4), %xmm0
	subss	(%rdx,%rbx,4), %xmm0
	comiss	.LC4(%rip), %xmm0
	jbe	.L23
	leaq	_ZSt4cout(%rip), %r12
	leaq	.LC5(%rip), %rsi
	movq	%r12, %rdi
	leaq	.LC3(%rip), %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	0(%r13), %rdx
	movq	(%r14), %rax
	movq	%r12, %rdi
	movss	(%rdx,%rbx,4), %xmm0
	addss	(%rax,%rbx,4), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	(%r15), %rax
	cvtss2sd	(%rax,%rbx,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%eax, %eax
	jmp	.L16
.L23:
	incq	%rbx
	cmpq	$2048, %rbx
	jne	.L20
	movb	$1, %al
.L16:
	popq	%rdx
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4722:
	.size	_Z6verifyRKSt6vectorIfSaIfEES3_S3_, .-_Z6verifyRKSt6vectorIfSaIfEES3_S3_
	.globl	_Z30__device_stub__Z5saxpyPKfS0_PfPKfS0_Pf
	.type	_Z30__device_stub__Z5saxpyPKfS0_PfPKfS0_Pf, @function
_Z30__device_stub__Z5saxpyPKfS0_PfPKfS0_Pf:
.LFB4748:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5saxpyPKfS0_Pf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L25:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4748:
	.size	_Z30__device_stub__Z5saxpyPKfS0_PfPKfS0_Pf, .-_Z30__device_stub__Z5saxpyPKfS0_PfPKfS0_Pf
	.globl	_Z5saxpyPKfS0_Pf
	.type	_Z5saxpyPKfS0_Pf, @function
_Z5saxpyPKfS0_Pf:
.LFB4749:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z5saxpyPKfS0_PfPKfS0_Pf
	.cfi_endproc
.LFE4749:
	.size	_Z5saxpyPKfS0_Pf, .-_Z5saxpyPKfS0_Pf
	.section	.rodata.str1.1
.LC7:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/JakubSosnovec/CudaExamples/master/src/vector_add.cu"
	.text
	.globl	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_
	.type	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_, @function
_Z6addGPURKSt6vectorIfSaIfEES3_RS1_:
.LFB4721:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	movl	$8192, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	.LC7(%rip), %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$40, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	16(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$41, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	24(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$42, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	0(%r13), %rsi
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$8192, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$44, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%r12), %rsi
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$8192, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$45, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	0(%rbp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$8192, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$46, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147483649, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z30__device_stub__Z5saxpyPKfS0_PfPKfS0_Pf
.L31:
	movq	24(%rsp), %rsi
	movq	0(%rbp), %rdi
	movl	$2, %ecx
	movl	$8192, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$50, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4721:
	.size	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_, .-_Z6addGPURKSt6vectorIfSaIfEES3_RS1_
	.section	.rodata.str1.1
.LC8:
	.string	"_Z5saxpyPKfS0_Pf"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4751:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5saxpyPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4751:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIfSaIfEEC2EmRKS0_.str1.1,"aMS",@progbits,1
.LC9:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIfSaIfEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIfSaIfEEC5EmRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEEC2EmRKS0_
	.type	_ZNSt6vectorIfSaIfEEC2EmRKS0_, @function
_ZNSt6vectorIfSaIfEEC2EmRKS0_:
.LFB5089:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpq	%rsi, %rax
	jnb	.L37
	leaq	.LC9(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L37:
	xorl	%eax, %eax
	movq	%rdi, %rbx
	leaq	0(,%rsi,4), %r12
	movq	%rsi, %rbp
	movq	%rax, (%rdi)
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	xorl	%eax, %eax
	testq	%rsi, %rsi
	je	.L38
	movq	%r12, %rdi
	call	_Znwm@PLT
.L38:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L39
	movl	$0x00000000, (%rax)
	addq	$4, %rax
	decq	%rbp
	je	.L39
.L40:
	cmpq	%rax, %r12
	je	.L39
	movl	$0x00000000, (%rax)
	addq	$4, %rax
	jmp	.L40
.L39:
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5089:
	.size	_ZNSt6vectorIfSaIfEEC2EmRKS0_, .-_ZNSt6vectorIfSaIfEEC2EmRKS0_
	.weak	_ZNSt6vectorIfSaIfEEC1EmRKS0_
	.set	_ZNSt6vectorIfSaIfEEC1EmRKS0_,_ZNSt6vectorIfSaIfEEC2EmRKS0_
	.section	.text._ZNSt6vectorIfSaIfEED2Ev,"axG",@progbits,_ZNSt6vectorIfSaIfEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEED2Ev
	.type	_ZNSt6vectorIfSaIfEED2Ev, @function
_ZNSt6vectorIfSaIfEED2Ev:
.LFB5092:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L51
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L51:
	ret
	.cfi_endproc
.LFE5092:
	.size	_ZNSt6vectorIfSaIfEED2Ev, .-_ZNSt6vectorIfSaIfEED2Ev
	.weak	_ZNSt6vectorIfSaIfEED1Ev
	.set	_ZNSt6vectorIfSaIfEED1Ev,_ZNSt6vectorIfSaIfEED2Ev
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat
	.align 2
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, @function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv:
.LFB5515:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	xorl	%edx, %edx
	movl	$2567483615, %edi
.L55:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	3168(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L54
	movq	%rdi, %rcx
.L54:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$227, %rdx
	jne	.L55
	movl	$2567483615, %edi
.L57:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	-1824(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L56
	movq	%rdi, %rcx
.L56:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$623, %rdx
	jne	.L57
	movq	4984(%rax), %rdx
	movq	(%rax), %rcx
	andq	$-2147483648, %rdx
	andl	$2147483647, %ecx
	orq	%rcx, %rdx
	movq	%rdx, %rcx
	shrq	%rcx
	xorq	3168(%rax), %rcx
	andl	$1, %edx
	je	.L58
	movl	$2567483615, %edx
.L58:
	xorq	%rcx, %rdx
	movq	%rdx, 4984(%rax)
	xorl	%edx, %edx
	movq	%rdx, 4992(%rax)
	ret
	.cfi_endproc
.LFE5515:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.section	.text._ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.type	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_, @function
_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_:
.LFB5470:
	.cfi_startproc
	endbr64
	cmpq	$623, 4992(%rdi)
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	jbe	.L71
	call	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
.L71:
	movq	4992(%rbx), %rax
	leaq	1(%rax), %rdx
	movq	(%rbx,%rax,8), %rax
	movq	%rdx, 4992(%rbx)
	movq	%rax, %rdx
	shrq	$11, %rdx
	movl	%edx, %edx
	xorq	%rdx, %rax
	movq	%rax, %rdx
	salq	$7, %rdx
	andl	$2636928640, %edx
	xorq	%rdx, %rax
	movq	%rax, %rdx
	salq	$15, %rdx
	andl	$4022730752, %edx
	xorq	%rdx, %rax
	movq	%rax, %rdx
	shrq	$18, %rdx
	xorq	%rdx, %rax
	js	.L72
	cvtsi2ssq	%rax, %xmm0
	jmp	.L73
.L72:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2ssq	%rdx, %xmm0
	addss	%xmm0, %xmm0
.L73:
	xorps	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	mulss	.LC12(%rip), %xmm0
	comiss	.LC13(%rip), %xmm0
	jb	.L70
	movss	.LC11(%rip), %xmm0
.L70:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5470:
	.size	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_, .-_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.text
	.align 2
	.type	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE.isra.0, @function
_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE.isra.0:
.LFB5542:
	.cfi_startproc
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	cmpb	$0, 12(%rdi)
	movss	%xmm0, 16(%rsp)
	movss	%xmm1, 20(%rsp)
	je	.L82
	movb	$0, 12(%rdi)
	movss	8(%rdi), %xmm1
	jmp	.L79
.L86:
	xorps	%xmm0, %xmm0
	ucomiss	%xmm0, %xmm2
	jp	.L81
	jne	.L81
.L82:
	movq	%rbp, %rdi
	call	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	movq	%rbp, %rdi
	addss	%xmm0, %xmm0
	subss	.LC13(%rip), %xmm0
	movss	%xmm0, 12(%rsp)
	call	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	movss	12(%rsp), %xmm2
	addss	%xmm0, %xmm0
	mulss	%xmm2, %xmm2
	movaps	%xmm0, %xmm1
	subss	.LC13(%rip), %xmm1
	movaps	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	addss	%xmm0, %xmm2
	comiss	.LC13(%rip), %xmm2
	ja	.L82
	jmp	.L86
.L81:
	movaps	%xmm2, %xmm0
	movss	%xmm1, 28(%rsp)
	movss	%xmm2, 24(%rsp)
	call	logf@PLT
	mulss	.LC14(%rip), %xmm0
	movss	24(%rsp), %xmm2
	divss	%xmm2, %xmm0
	call	sqrtf@PLT
	movss	12(%rsp), %xmm2
	movss	28(%rsp), %xmm1
	movb	$1, 12(%rbx)
	mulss	%xmm0, %xmm2
	mulss	%xmm0, %xmm1
	movss	%xmm2, 8(%rbx)
.L79:
	mulss	20(%rsp), %xmm1
	movss	16(%rsp), %xmm0
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	addss	%xmm1, %xmm0
	ret
	.cfi_endproc
.LFE5542:
	.size	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE.isra.0, .-_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE.isra.0
	.section	.rodata.str1.1
.LC15:
	.string	"default"
.LC19:
	.string	"Host verified\n"
.LC20:
	.string	"GPU verified\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4723:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4723
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4152
	orq	$0, (%rsp)
	subq	$4096, %rsp
	.cfi_def_cfa_offset 8248
	orq	$0, (%rsp)
	subq	$1944, %rsp
	.cfi_def_cfa_offset 10192
	leaq	7+.LC15(%rip), %rdx
	leaq	-7(%rdx), %rsi
	leaq	5136(%rsp), %rdi
	leaq	5120(%rsp), %rbx
	movq	%fs:40, %rax
	movq	%rax, 10120(%rsp)
	xorl	%eax, %eax
	movq	%rdi, 5120(%rsp)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	5120(%rsp), %rax
	movq	%rbx, %rsi
	movq	$7, 5128(%rsp)
	movb	$0, 7(%rax)
	leaq	120(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@PLT
.LEHE0:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	8(%rsp), %rdi
.LEHB1:
	call	_ZNSt13random_device9_M_getvalEv@PLT
	movl	%eax, %eax
	movl	$1, %edx
	movq	%rax, 5120(%rsp)
	jmp	.L91
.L108:
	endbr64
	movq	%rax, %rbp
.L89:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	movq	10120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L117
	jmp	.L114
.L91:
	movq	-8(%rbx,%rdx,8), %rax
	movq	%rax, %rcx
	shrq	$30, %rcx
	xorq	%rcx, %rax
	imulq	$1812433253, %rax, %rax
	addl	%edx, %eax
	movq	%rax, (%rbx,%rdx,8)
	incq	%rdx
	cmpq	$624, %rdx
	jne	.L91
	leaq	96(%rsp), %r14
	leaq	48(%rsp), %r12
	movl	$2048, %esi
	movabsq	$4611686019511615488, %rax
	movq	%r14, %rdx
	movq	%r12, %rdi
	movq	%rax, 32(%rsp)
	movq	$624, 10112(%rsp)
	movl	$0x00000000, 40(%rsp)
	movb	$0, 44(%rsp)
	call	_ZNSt6vectorIfSaIfEEC1EmRKS0_
.LEHE1:
	leaq	72(%rsp), %r13
	movq	%r14, %rdx
	movl	$2048, %esi
	movq	%r13, %rdi
.LEHB2:
	call	_ZNSt6vectorIfSaIfEEC1EmRKS0_
.LEHE2:
	leaq	31(%rsp), %rdx
	movl	$2048, %esi
	movq	%r14, %rdi
.LEHB3:
	call	_ZNSt6vectorIfSaIfEEC1EmRKS0_
.LEHE3:
	xorl	%ebp, %ebp
.L92:
	leaq	32(%rsp), %r15
	movss	.LC16(%rip), %xmm1
	movss	.LC17(%rip), %xmm0
	movq	%rbx, %rsi
	movq	%r15, %rdi
	call	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE.isra.0
	movq	48(%rsp), %rdx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movss	.LC16(%rip), %xmm1
	movss	%xmm0, (%rdx,%rbp)
	movss	.LC17(%rip), %xmm0
	call	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE.isra.0
	movq	72(%rsp), %rdx
	movq	96(%rsp), %r15
	movss	%xmm0, (%rdx,%rbp)
	movl	$0x40490fdb, (%r15,%rbp)
	addq	$4, %rbp
	cmpq	$8192, %rbp
	jne	.L92
	movq	%r12, %rdi
	movq	%r14, %rdx
	movq	%r13, %rsi
	call	_Z7addHostRKSt6vectorIfSaIfEES3_RS1_
	movq	%r12, %rdi
.LEHB4:
	call	_Z6verifyRKSt6vectorIfSaIfEES3_S3_
	testb	%al, %al
	jne	.L93
.L97:
	movl	$1, %ebx
	jmp	.L94
.L93:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC19(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	104(%rsp), %rax
.L95:
	cmpq	%r15, %rax
	je	.L118
	movl	$0x40490fdb, (%r15)
	addq	$4, %r15
	jmp	.L95
.L118:
	movq	%r14, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_
	movq	%r14, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_Z6verifyRKSt6vectorIfSaIfEES3_S3_
	testb	%al, %al
	je	.L97
	leaq	.LC20(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.LEHE4:
	xorl	%ebx, %ebx
.L94:
	movq	%r14, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	%r13, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	%r12, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt13random_device7_M_finiEv@PLT
	movq	10120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L103
	jmp	.L114
.L107:
	endbr64
	movq	%rax, %rbx
.L98:
	movq	%r14, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L99
.L106:
	endbr64
	movq	%rax, %rbx
.L99:
	movq	%r13, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L100
.L105:
	endbr64
	movq	%rax, %rbx
.L100:
	movq	%r12, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L101
.L104:
	endbr64
	movq	%rax, %rbx
.L101:
	movq	8(%rsp), %rdi
	call	_ZNSt13random_device7_M_finiEv@PLT
	movq	%rbx, %rdi
	movq	10120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L114
.L117:
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L114:
	call	__stack_chk_fail@PLT
.L103:
	addq	$10136, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4723:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4723:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4723-.LLSDACSB4723
.LLSDACSB4723:
	.uleb128 .LEHB0-.LFB4723
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L108-.LFB4723
	.uleb128 0
	.uleb128 .LEHB1-.LFB4723
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L104-.LFB4723
	.uleb128 0
	.uleb128 .LEHB2-.LFB4723
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L105-.LFB4723
	.uleb128 0
	.uleb128 .LEHB3-.LFB4723
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L106-.LFB4723
	.uleb128 0
	.uleb128 .LEHB4-.LFB4723
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L107-.LFB4723
	.uleb128 0
	.uleb128 .LEHB5-.LFB4723
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE4723:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	953267991
	.align 4
.LC11:
	.long	1065353215
	.align 4
.LC12:
	.long	796917760
	.align 4
.LC13:
	.long	1065353216
	.align 4
.LC14:
	.long	-1073741824
	.align 4
.LC16:
	.long	1073741824
	.align 4
.LC17:
	.long	1084227584
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>
#include <vector>
#include <random>
#include <cassert>

#define GPU_CHECK(ans) { gpuAssert((ans), __FILE__, __LINE__); }

constexpr auto VECTOR_LENGTH = 1024u * 2;
constexpr auto EPS = 1e-4f;

inline void gpuAssert(hipError_t code, const char *file, int line,
                      bool abort = true) {
  if (code != hipSuccess) {
    std::cout << "GPUassert: " << hipGetErrorString(code) << " " << file << ":"
              << line << "\n";
    if (abort) {
      std::exit(code);
    }
  }
}

void addHost(const std::vector<float> &A, const std::vector<float> &B,
        std::vector<float> &C) {
  assert(A.size() == B.size() && B.size() == C.size());
  for (auto i = 0u; i < A.size(); ++i) {
    C[i] = A[i] + B[i];
  }
}

__global__ void saxpy(const float *A, const float *B, float *C) {
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  C[i] = A[i] + B[i];
}

void addGPU(const std::vector<float> &A, const std::vector<float> &B,
        std::vector<float> &C) {
  float *A_gpu, *B_gpu, *C_gpu;
  auto byte_size = VECTOR_LENGTH * sizeof(float);
  GPU_CHECK(hipMalloc(&A_gpu, byte_size));
  GPU_CHECK(hipMalloc(&B_gpu, byte_size));
  GPU_CHECK(hipMalloc(&C_gpu, byte_size));

  GPU_CHECK(hipMemcpy(A_gpu, A.data(), byte_size, hipMemcpyHostToDevice));
  GPU_CHECK(hipMemcpy(B_gpu, B.data(), byte_size, hipMemcpyHostToDevice));
  GPU_CHECK(hipMemcpy(C_gpu, C.data(), byte_size, hipMemcpyHostToDevice));

  saxpy<<<2, VECTOR_LENGTH / 2>>>(A_gpu, B_gpu, C_gpu);

  GPU_CHECK(hipMemcpy(C.data(), C_gpu, byte_size, hipMemcpyDeviceToHost));
}

bool verify(const std::vector<float> &A, const std::vector<float> &B,
            const std::vector<float> &C) {
  for (auto i = 0u; i < VECTOR_LENGTH; ++i) {
    if (A[i] + B[i] - C[i] > EPS) {
      std::cout << "ERROR! Index " << i << "\n";
      std::cout << A[i] + B[i] << "  " << C[i] << "\n";
      return false;
    }
  }
  return true;
}

int main() {
  std::random_device rd{};
  std::mt19937 gen{rd()};
  std::normal_distribution<float> dist{5, 2};

  std::vector<float> A(VECTOR_LENGTH), B(VECTOR_LENGTH), C(VECTOR_LENGTH);

  for (auto i = 0u; i < VECTOR_LENGTH; ++i) {
    A[i] = dist(gen);
    B[i] = dist(gen);
    C[i] = M_PI;
  }
  addHost(A, B, C);
  if (!verify(A, B, C)) {
    return 1;
  }
  std::cout << "Host verified\n";

  std::fill(C.begin(), C.end(), M_PI);

  addGPU(A, B, C);
  if (!verify(A, B, C)) {
    return 1;
  }
  std::cout << "GPU verified\n";

  return 0;
}

	.text
	.file	"vector_add.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z7addHostRKSt6vectorIfSaIfEES3_RS1_ # -- Begin function _Z7addHostRKSt6vectorIfSaIfEES3_RS1_
	.type	_Z7addHostRKSt6vectorIfSaIfEES3_RS1_,@function
_Z7addHostRKSt6vectorIfSaIfEES3_RS1_:   # @_Z7addHostRKSt6vectorIfSaIfEES3_RS1_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	8(%rdi), %rcx
	subq	%rax, %rcx
	je	.LBB0_3
# %bb.1:                                # %.lr.ph
	sarq	$2, %rcx
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	xorl	%edi, %edi
.LBB0_2:                                # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rdi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi,%rdi,4), %xmm0
	movss	%xmm0, (%rdx,%rdi,4)
	incq	%rdi
	movl	%edi, %r8d
	cmpq	%r8, %rcx
	ja	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z7addHostRKSt6vectorIfSaIfEES3_RS1_, .Lfunc_end0-_Z7addHostRKSt6vectorIfSaIfEES3_RS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__saxpyPKfS0_Pf # -- Begin function _Z20__device_stub__saxpyPKfS0_Pf
	.type	_Z20__device_stub__saxpyPKfS0_Pf,@function
_Z20__device_stub__saxpyPKfS0_Pf:       # @_Z20__device_stub__saxpyPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5saxpyPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__saxpyPKfS0_Pf, .Lfunc_end1-_Z20__device_stub__saxpyPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_ # -- Begin function _Z6addGPURKSt6vectorIfSaIfEES3_RS1_
	.type	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_,@function
_Z6addGPURKSt6vectorIfSaIfEES3_RS1_:    # @_Z6addGPURKSt6vectorIfSaIfEES3_RS1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r12
	leaq	16(%rsp), %rbp
	movl	$8192, %esi                     # imm = 0x2000
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	$.L.str, %esi
	movl	%eax, %edi
	movl	$42, %edx
	movl	$1, %ecx
	callq	_Z9gpuAssert10hipError_tPKcib
	leaq	8(%rsp), %r13
	movl	$8192, %esi                     # imm = 0x2000
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$.L.str, %esi
	movl	%eax, %edi
	movl	$43, %edx
	movl	$1, %ecx
	callq	_Z9gpuAssert10hipError_tPKcib
	movq	%rsp, %r15
	movl	$8192, %esi                     # imm = 0x2000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$.L.str, %esi
	movl	%eax, %edi
	movl	$44, %edx
	movl	$1, %ecx
	callq	_Z9gpuAssert10hipError_tPKcib
	movq	(%rbp), %rdi
	movq	(%r12), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str, %esi
	movl	%eax, %edi
	movl	$46, %edx
	movl	$1, %ecx
	callq	_Z9gpuAssert10hipError_tPKcib
	movq	(%r13), %rdi
	movq	(%r14), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str, %esi
	movl	%eax, %edi
	movl	$47, %edx
	movl	$1, %ecx
	callq	_Z9gpuAssert10hipError_tPKcib
	movq	(%r15), %rdi
	movq	(%rbx), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str, %esi
	movl	%eax, %edi
	movl	$48, %edx
	movl	$1, %ecx
	callq	_Z9gpuAssert10hipError_tPKcib
	movabsq	$4294967298, %rdi               # imm = 0x100000002
	leaq	1022(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z20__device_stub__saxpyPKfS0_Pf
.LBB2_2:
	movq	(%rbx), %rdi
	movq	(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str, %esi
	movl	%eax, %edi
	movl	$52, %edx
	movl	$1, %ecx
	callq	_Z9gpuAssert10hipError_tPKcib
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_, .Lfunc_end2-_Z6addGPURKSt6vectorIfSaIfEES3_RS1_
	.cfi_endproc
                                        # -- End function
	.section	.text._Z9gpuAssert10hipError_tPKcib,"axG",@progbits,_Z9gpuAssert10hipError_tPKcib,comdat
	.weak	_Z9gpuAssert10hipError_tPKcib   # -- Begin function _Z9gpuAssert10hipError_tPKcib
	.type	_Z9gpuAssert10hipError_tPKcib,@function
_Z9gpuAssert10hipError_tPKcib:          # @_Z9gpuAssert10hipError_tPKcib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testl	%edi, %edi
	je	.LBB3_8
# %bb.1:
	movl	%ecx, %ebp
	movl	%edx, %r14d
	movq	%rsi, %r15
	movl	%edi, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB3_2
# %bb.3:
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_4
.LBB3_2:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_4:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testq	%r15, %r15
	je	.LBB3_5
# %bb.6:
	movq	%r15, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_7
.LBB3_5:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_7:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit6
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testb	%bpl, %bpl
	jne	.LBB3_9
.LBB3_8:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_9:
	.cfi_def_cfa_offset 48
	movl	%ebx, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z9gpuAssert10hipError_tPKcib, .Lfunc_end3-_Z9gpuAssert10hipError_tPKcib
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6verifyRKSt6vectorIfSaIfEES3_S3_
.LCPI4_0:
	.long	0x38d1b717                      # float 9.99999974E-5
	.text
	.globl	_Z6verifyRKSt6vectorIfSaIfEES3_S3_
	.type	_Z6verifyRKSt6vectorIfSaIfEES3_S3_,@function
_Z6verifyRKSt6vectorIfSaIfEES3_S3_:     # @_Z6verifyRKSt6vectorIfSaIfEES3_S3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	(%rdi), %rax
	movq	(%rsi), %rcx
	movq	(%rdx), %rdx
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	(%rcx), %xmm0
	subss	(%rdx), %xmm0
	xorl	%r14d, %r14d
	ucomiss	.LCPI4_0(%rip), %xmm0
	jbe	.LBB4_2
# %bb.1:
	xorl	%r13d, %r13d
	jmp	.LBB4_6
.LBB4_2:                                # %.lr.ph.preheader
	movss	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB4_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$2047, %r14                     # imm = 0x7FF
	je	.LBB4_7
# %bb.4:                                #   in Loop: Header=BB4_3 Depth=1
	movss	4(%rax,%r14,4), %xmm1           # xmm1 = mem[0],zero,zero,zero
	addss	4(%rcx,%r14,4), %xmm1
	subss	4(%rdx,%r14,4), %xmm1
	incq	%r14
	ucomiss	%xmm0, %xmm1
	jbe	.LBB4_3
# %bb.5:                                # %._crit_edge.loopexit
	leaq	-1(%r14), %rax
	cmpq	$2047, %rax                     # imm = 0x7FF
	setae	%r13b
.LBB4_6:                                # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movss	(%rax,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movq	(%r15), %rax
	addss	(%rax,%r14,4), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r14,4), %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB4_8
.LBB4_7:                                # %.loopexit.loopexit
	setae	%r13b
.LBB4_8:                                # %.loopexit
	movl	%r13d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z6verifyRKSt6vectorIfSaIfEES3_S3_, .Lfunc_end4-_Z6verifyRKSt6vectorIfSaIfEES3_S3_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$10088, %rsp                    # imm = 0x2768
	.cfi_def_cfa_offset 10144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	5088(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt13random_deviceC2Ev
.Ltmp0:
	movq	%rbx, %rdi
	callq	_ZNSt13random_device9_M_getvalEv
.Ltmp1:
# %bb.1:                                # %_ZNSt13random_deviceclEv.exit
	movl	%eax, %eax
	movq	%rax, 88(%rsp)
	movl	$1, %ecx
.LBB5_2:                                # =>This Inner Loop Header: Depth=1
	movq	%rax, %rdx
	shrq	$30, %rdx
	xorl	%eax, %edx
	imull	$1812433253, %edx, %eax         # imm = 0x6C078965
	addl	%ecx, %eax
	movq	%rax, 88(%rsp,%rcx,8)
	incq	%rcx
	cmpq	$624, %rcx                      # imm = 0x270
	jne	.LBB5_2
# %bb.3:
	movq	$624, 5080(%rsp)                # imm = 0x270
	movabsq	$4611686019511615488, %rax      # imm = 0x4000000040A00000
	movq	%rax, 72(%rsp)
	movl	$0, 80(%rsp)
	movb	$0, 84(%rsp)
.Ltmp3:
	movl	$8192, %edi                     # imm = 0x2000
	callq	_Znwm
.Ltmp4:
# %bb.4:
	movq	%rax, %rbx
	movq	%rax, 48(%rsp)
	movq	%rax, %r14
	addq	$8192, %r14                     # imm = 0x2000
	movq	%r14, 64(%rsp)
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r14, 56(%rsp)
.Ltmp6:
	movl	$8192, %edi                     # imm = 0x2000
	callq	_Znwm
.Ltmp7:
# %bb.5:
	movq	%rax, %r14
	movq	%rax, 24(%rsp)
	movq	%rax, %r15
	addq	$8192, %r15                     # imm = 0x2000
	movq	%r15, 40(%rsp)
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, 32(%rsp)
.Ltmp9:
	movl	$8192, %edi                     # imm = 0x2000
	callq	_Znwm
.Ltmp10:
# %bb.6:
	movq	%rax, %r15
	movq	%rax, (%rsp)
	movq	%rax, %r12
	addq	$8192, %r12                     # imm = 0x2000
	movq	%r12, 16(%rsp)
	xorl	%ebp, %ebp
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r12, 8(%rsp)
	leaq	88(%rsp), %r12
	leaq	72(%rsp), %r13
.LBB5_7:                                # =>This Inner Loop Header: Depth=1
.Ltmp12:
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	callq	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE
.Ltmp13:
# %bb.8:                                # %_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_.exit
                                        #   in Loop: Header=BB5_7 Depth=1
	movss	%xmm0, (%rbx,%rbp,4)
.Ltmp14:
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	callq	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE
.Ltmp15:
# %bb.9:                                # %_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_.exit24
                                        #   in Loop: Header=BB5_7 Depth=1
	movss	%xmm0, (%r14,%rbp,4)
	movl	$1078530011, (%r15,%rbp,4)      # imm = 0x40490FDB
	incq	%rbp
	cmpq	$2048, %rbp                     # imm = 0x800
	jne	.LBB5_7
# %bb.10:                               # %.lr.ph.i.preheader
	xorl	%eax, %eax
.LBB5_11:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%r14,%rax,4), %xmm0
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	cmpq	$2048, %rax                     # imm = 0x800
	jne	.LBB5_11
# %bb.12:                               # %_Z7addHostRKSt6vectorIfSaIfEES3_RS1_.exit
.Ltmp17:
	leaq	48(%rsp), %rdi
	leaq	24(%rsp), %rsi
	movq	%rsp, %rdx
	callq	_Z6verifyRKSt6vectorIfSaIfEES3_S3_
.Ltmp18:
# %bb.13:
	movl	$1, %ebp
	testb	%al, %al
	je	.LBB5_21
# %bb.14:
.Ltmp19:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp20:
# %bb.15:                               # %.lr.ph.i.i.i.i.preheader
	xorl	%eax, %eax
.LBB5_16:                               # %.lr.ph.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1078530011, (%r15,%rax)        # imm = 0x40490FDB
	addq	$4, %rax
	cmpq	$8192, %rax                     # imm = 0x2000
	jne	.LBB5_16
# %bb.17:                               # %_ZSt4fillIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEEdEvT_S7_RKT0_.exit
.Ltmp21:
	leaq	48(%rsp), %rdi
	leaq	24(%rsp), %rsi
	movq	%rsp, %rdx
	callq	_Z6addGPURKSt6vectorIfSaIfEES3_RS1_
.Ltmp22:
# %bb.18:
.Ltmp23:
	leaq	48(%rsp), %rdi
	leaq	24(%rsp), %rsi
	movq	%rsp, %rdx
	callq	_Z6verifyRKSt6vectorIfSaIfEES3_S3_
.Ltmp24:
# %bb.19:
	testb	%al, %al
	je	.LBB5_21
# %bb.20:
	xorl	%ebp, %ebp
.Ltmp25:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp26:
.LBB5_21:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit29
	movq	%r15, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
.Ltmp31:
	leaq	5088(%rsp), %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp32:
# %bb.22:                               # %_ZNSt13random_deviceD2Ev.exit
	movl	%ebp, %eax
	addq	$10088, %rsp                    # imm = 0x2768
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_23:
	.cfi_def_cfa_offset 10144
.Ltmp33:
	jmp	.LBB5_24
.LBB5_25:
.Ltmp11:
	movq	%rax, %r12
	jmp	.LBB5_33
.LBB5_26:
.Ltmp8:
	movq	%rax, %r12
	jmp	.LBB5_34
.LBB5_27:
.Ltmp5:
	jmp	.LBB5_29
.LBB5_28:
.Ltmp2:
.LBB5_29:
	movq	%rax, %r12
	jmp	.LBB5_35
.LBB5_30:
.Ltmp27:
	jmp	.LBB5_32
.LBB5_31:
.Ltmp16:
.LBB5_32:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit31
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB5_33:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit33
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB5_34:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit35
	movq	%rbx, %rdi
	callq	_ZdlPv
.LBB5_35:
.Ltmp28:
	leaq	5088(%rsp), %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp29:
# %bb.36:                               # %_ZNSt13random_deviceD2Ev.exit36
	movq	%r12, %rdi
	callq	_Unwind_Resume@PLT
.LBB5_37:
.Ltmp30:
.LBB5_24:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table5:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp9-.Ltmp7                  #   Call between .Ltmp7 and .Ltmp9
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 7 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp10-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp12-.Ltmp10                #   Call between .Ltmp10 and .Ltmp12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp15-.Ltmp12                #   Call between .Ltmp12 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp26-.Ltmp17                #   Call between .Ltmp17 and .Ltmp26
	.uleb128 .Ltmp27-.Lfunc_begin0          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp31-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp32-.Ltmp31                #   Call between .Ltmp31 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp29-.Ltmp28                #   Call between .Ltmp28 and .Ltmp29
	.uleb128 .Ltmp30-.Lfunc_begin0          #     jumps to .Ltmp30
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp29-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Lfunc_end5-.Ltmp29            #   Call between .Ltmp29 and .Lfunc_end5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt13random_deviceC2Ev,"axG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.weak	_ZNSt13random_deviceC2Ev        # -- Begin function _ZNSt13random_deviceC2Ev
	.p2align	1, 0x90
	.type	_ZNSt13random_deviceC2Ev,@function
_ZNSt13random_deviceC2Ev:               # @_ZNSt13random_deviceC2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	leaq	16(%rsp), %r15
	movq	%r15, -16(%r15)
	movq	%rsp, %r14
	movl	$.L.str.9, %esi
	movl	$.L.str.9+7, %edx
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp34:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp35:
# %bb.1:
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB6_3
# %bb.2:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB6_3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB6_4:
	.cfi_def_cfa_offset 64
.Ltmp36:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB6_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4
	callq	_ZdlPv
.LBB6_6:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end6:
	.size	_ZNSt13random_deviceC2Ev, .Lfunc_end6-_ZNSt13random_deviceC2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZNSt13random_deviceC2Ev,"aG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.p2align	2, 0x0
GCC_except_table6:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp34-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp34
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp35-.Ltmp34                #   Call between .Ltmp34 and .Ltmp35
	.uleb128 .Ltmp36-.Lfunc_begin1          #     jumps to .Ltmp36
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Lfunc_end6-.Ltmp35            #   Call between .Ltmp35 and .Lfunc_end6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB7_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB7_3
.LBB7_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB7_3:
	testq	%r14, %r14
	je	.LBB7_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB7_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB7_7
.LBB7_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB7_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end7-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end8:
	.size	__clang_call_terminate, .Lfunc_end8-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE
.LCPI9_0:
	.long	0xbf800000                      # float -1
.LCPI9_1:
	.long	0x3f800000                      # float 1
.LCPI9_2:
	.long	0xc0000000                      # float -2
.LCPI9_3:
	.long	0x00000000                      # float 0
	.section	.text._ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE,"axG",@progbits,_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE,comdat
	.weak	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE
	.p2align	1, 0x90
	.type	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE,@function
_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE: # @_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rdi, %r14
	cmpb	$0, 12(%rdi)
	je	.LBB9_1
# %bb.9:
	movb	$0, 12(%r14)
	movss	8(%r14), %xmm1                  # xmm1 = mem[0],zero,zero,zero
	jmp	.LBB9_8
.LBB9_1:
	movq	%rsi, %r15
.LBB9_2:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	movaps	%xmm0, %xmm1
	addss	%xmm0, %xmm1
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm1
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movq	%r15, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	addss	%xmm0, %xmm0
	addss	.LCPI9_0(%rip), %xmm0
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm1
	movaps	%xmm0, %xmm2
	mulss	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	ucomiss	.LCPI9_1(%rip), %xmm2
	ja	.LBB9_2
# %bb.3:                                # %.preheader
                                        #   in Loop: Header=BB9_2 Depth=1
	ucomiss	.LCPI9_3(%rip), %xmm2
	jne	.LBB9_4
	jnp	.LBB9_2
.LBB9_4:
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movaps	%xmm2, %xmm0
	movss	%xmm2, 8(%rsp)                  # 4-byte Spill
	callq	logf
	mulss	.LCPI9_2(%rip), %xmm0
	divss	8(%rsp), %xmm0                  # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	ucomiss	%xmm1, %xmm0
	jb	.LBB9_6
# %bb.5:
	sqrtss	%xmm0, %xmm0
	jmp	.LBB9_7
.LBB9_6:                                # %call.sqrt
	callq	sqrtf
.LBB9_7:                                # %.split
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
	movss	%xmm1, 8(%r14)
	movb	$1, 12(%r14)
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
.LBB9_8:
	mulss	4(%rbx), %xmm1
	addss	(%rbx), %xmm1
	movaps	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE, .Lfunc_end9-_ZNSt19normal_distributionIfEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEfRT_RKNS0_10param_typeE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
.LCPI10_0:
	.long	0x4f800000                      # float 4.2949673E+9
.LCPI10_1:
	.long	0x40000000                      # float 2
.LCPI10_2:
	.long	0x5f000000                      # float 9.22337203E+18
.LCPI10_3:
	.long	0x3f800000                      # float 1
	.section	.text._ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.type	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,@function
_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_: # @_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	flds	.LCPI10_0(%rip)
	fstpt	(%rsp)
	callq	logl
	fstpt	36(%rsp)                        # 10-byte Folded Spill
	flds	.LCPI10_1(%rip)
	fstpt	(%rsp)
	callq	logl
	fldt	36(%rsp)                        # 10-byte Folded Reload
	fdivp	%st, %st(1)
	flds	.LCPI10_2(%rip)
	xorl	%ecx, %ecx
	fxch	%st(1)
	fucomi	%st(1), %st
	fldz
	fcmovnb	%st(2), %st
	fstp	%st(2)
	fsubp	%st, %st(1)
	setae	%cl
	fnstcw	28(%rsp)
	movzwl	28(%rsp), %eax
	orl	$3072, %eax                     # imm = 0xC00
	movw	%ax, 30(%rsp)
	fldcw	30(%rsp)
	fistpll	48(%rsp)
	fldcw	28(%rsp)
	shlq	$63, %rcx
	xorq	48(%rsp), %rcx
	leaq	23(%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r14
	cmpq	$1, %rax
	adcq	$0, %r14
	xorps	%xmm0, %xmm0
	movss	.LCPI10_3(%rip), %xmm2          # xmm2 = mem[0],zero,zero,zero
.LBB10_1:                               # %select.unfold
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm2, 32(%rsp)                 # 4-byte Spill
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	testq	%rax, %rax
	js	.LBB10_2
# %bb.3:                                # %select.unfold
                                        #   in Loop: Header=BB10_1 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	jmp	.LBB10_4
.LBB10_2:                               #   in Loop: Header=BB10_1 Depth=1
	movq	%rax, %rcx
	shrq	%rcx
	andl	$1, %eax
	orq	%rcx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB10_4:                               # %select.unfold
                                        #   in Loop: Header=BB10_1 Depth=1
	movss	32(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm0
	movss	36(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	mulss	.LCPI10_0(%rip), %xmm2
	decq	%r14
	jne	.LBB10_1
# %bb.5:
	divss	%xmm2, %xmm0
	ucomiss	.LCPI10_3(%rip), %xmm0
	jae	.LBB10_7
# %bb.6:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB10_7:
	.cfi_def_cfa_offset 80
	movss	.LCPI10_3(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	nextafterf                      # TAILCALL
.Lfunc_end10:
	.size	_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_, .Lfunc_end10-_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,@function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	4992(%rdi), %rax
	cmpq	$624, %rax                      # imm = 0x270
	jb	.LBB11_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	movq	4992(%rbx), %rax
.LBB11_2:
	leaq	1(%rax), %rcx
	movq	%rcx, 4992(%rbx)
	movq	(%rbx,%rax,8), %rax
	movq	%rax, %rcx
	shrq	$11, %rcx
	movl	%ecx, %ecx
	xorq	%rax, %rcx
	movl	%ecx, %eax
	shll	$7, %eax
	andl	$-1658038656, %eax              # imm = 0x9D2C5680
	xorq	%rcx, %rax
	movl	%eax, %ecx
	shll	$15, %ecx
	andl	$-272236544, %ecx               # imm = 0xEFC60000
	xorq	%rax, %rcx
	movq	%rcx, %rax
	shrq	$18, %rax
	xorq	%rcx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv, .Lfunc_end11-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,@function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.cfi_startproc
# %bb.0:
	movl	$2567483615, %eax               # imm = 0x9908B0DF
	movq	(%rdi), %rdx
	xorl	%ecx, %ecx
.LBB12_1:                               # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	8(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	3176(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negl	%esi
	andl	%eax, %esi
	xorq	%r8, %rsi
	movq	%rsi, (%rdi,%rcx,8)
	leaq	1(%rcx), %rsi
	movq	%rsi, %rcx
	cmpq	$227, %rsi
	jne	.LBB12_1
# %bb.2:                                # %.preheader.preheader
	movq	1816(%rdi), %rdx
	movl	$228, %ecx
.LBB12_3:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	-1824(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negl	%esi
	andl	%eax, %esi
	xorq	%r8, %rsi
	movq	%rsi, -8(%rdi,%rcx,8)
	incq	%rcx
	cmpq	$624, %rcx                      # imm = 0x270
	jne	.LBB12_3
# %bb.4:
	movq	$-2147483648, %rcx              # imm = 0x80000000
	andq	4984(%rdi), %rcx
	movq	(%rdi), %rdx
	movl	%edx, %esi
	andl	$2147483646, %esi               # imm = 0x7FFFFFFE
	orq	%rcx, %rsi
	shrq	%rsi
	xorq	3168(%rdi), %rsi
	andl	$1, %edx
	negl	%edx
	andl	%eax, %edx
	xorq	%rsi, %rdx
	movq	%rdx, 4984(%rdi)
	movq	$0, 4992(%rdi)
	retq
.Lfunc_end12:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .Lfunc_end12-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB13_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB13_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5saxpyPKfS0_Pf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end13:
	.size	__hip_module_ctor, .Lfunc_end13-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB14_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB14_2:
	retq
.Lfunc_end14:
	.size	__hip_module_dtor, .Lfunc_end14-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5saxpyPKfS0_Pf,@object        # @_Z5saxpyPKfS0_Pf
	.section	.rodata,"a",@progbits
	.globl	_Z5saxpyPKfS0_Pf
	.p2align	3, 0x0
_Z5saxpyPKfS0_Pf:
	.quad	_Z20__device_stub__saxpyPKfS0_Pf
	.size	_Z5saxpyPKfS0_Pf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/JakubSosnovec/CudaExamples/master/src/vector_add.hip"
	.size	.L.str, 115

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"ERROR! Index "
	.size	.L.str.1, 14

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"  "
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Host verified\n"
	.size	.L.str.4, 15

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GPU verified\n"
	.size	.L.str.5, 14

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPUassert: "
	.size	.L.str.6, 12

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" "
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	":"
	.size	.L.str.8, 2

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"default"
	.size	.L.str.9, 8

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5saxpyPKfS0_Pf"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__saxpyPKfS0_Pf
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z5saxpyPKfS0_Pf
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5saxpyPKfS0_Pf        ; -- Begin function _Z5saxpyPKfS0_Pf
	.globl	_Z5saxpyPKfS0_Pf
	.p2align	8
	.type	_Z5saxpyPKfS0_Pf,@function
_Z5saxpyPKfS0_Pf:                       ; @_Z5saxpyPKfS0_Pf
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5saxpyPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5saxpyPKfS0_Pf, .Lfunc_end0-_Z5saxpyPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5saxpyPKfS0_Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5saxpyPKfS0_Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
