<p>I have a Makefile building many C files with long long command lines and we've cleaned up the output by having rules such as:</p>

<pre><code>.c${MT}.doj:

        @echo "Compiling $&lt;";\
         $(COMPILER) $(COPTS) -c -o $@ $&lt;
</code></pre>

<p>Now this is great as the @ suppresses the compilation line being emitted.
But when we get an error, all we get is the error message, no command line.
Can anyone think of a "neat" way to emit the command line?
All I can think of doing is echoing it to a file and have a higher level make catch the error and cat the file. Hacky I know.</p>

Tested and it worked (GNU make in Linux):
```
```
.c${MT}.doj:
     @echo "Compiling $<";\
          $(COMPILER) $(COPTS) -c -o $@ $<  \
          || echo "Error in command: $(COMPILER) $(COPTS) -c -o $@ $<" \
          && false
```
```