return {
[0x00]={instructions.BRK, addressing_modes.immediate},
[0x01]={instructions.ORA, addressing_modes.zero_page_x_indirect},
[0x02]={instructions.NOP, addressing_modes.zero_page},
[0x03]={instructions.NOP, addressing_modes.implied},
[0x04]={instructions.TSB, addressing_modes.zero_page},
[0x05]={instructions.ORA, addressing_modes.zero_page},
[0x06]={instructions.ASL, addressing_modes.zero_page},
[0x07]={instructions.RMB, addressing_modes.zero_page, 0},
[0x08]={instructions.PHP, addressing_modes.implied},
[0x09]={instructions.ORA, addressing_modes.immediate},
[0x0A]={instructions.ASL, addressing_modes.implied_a},
[0x0B]={instructions.NOP, addressing_modes.implied},
[0x0C]={instructions.TSB, addressing_modes.absolute},
[0x0D]={instructions.ORA, addressing_modes.absolute},
[0x0E]={instructions.ASL, addressing_modes.absolute},
[0x0F]={instructions.BBR, addressing_modes.relative_bit_branch, 0},
[0x10]={instructions.Branch, addressing_modes.relative, "P_N_BIT", "0"},
[0x11]={instructions.ORA, addressing_modes.zero_page_indirect_y},
[0x12]={instructions.ORA, addressing_modes.zero_page_indirect},
[0x13]={instructions.NOP, addressing_modes.implied},
[0x14]={instructions.TRB, addressing_modes.zero_page},
[0x15]={instructions.ORA, addressing_modes.zero_page_x},
[0x16]={instructions.ASL, addressing_modes.zero_page_x},
[0x17]={instructions.RMB, addressing_modes.zero_page, 1},
[0x18]={instructions.CLC, addressing_modes.implied},
[0x19]={instructions.ORA, addressing_modes.absolute_y},
[0x1A]={instructions.INC, addressing_modes.implied_a},
[0x1B]={instructions.NOP, addressing_modes.implied},
[0x1C]={instructions.TRB, addressing_modes.absolute},
[0x1D]={instructions.ORA, addressing_modes.absolute_x},
[0x1E]={instructions.ASL, addressing_modes.absolute_x},
[0x1F]={instructions.BBR, addressing_modes.relative_bit_branch, 1},
[0x20]={instructions.JSR, nil}, -- deliberately nil addressing mode!
[0x21]={instructions.AND, addressing_modes.zero_page_x_indirect},
[0x22]={instructions.NOP, addressing_modes.zero_page},
[0x23]={instructions.NOP, addressing_modes.implied},
[0x24]={instructions.BIT, addressing_modes.zero_page},
[0x25]={instructions.AND, addressing_modes.zero_page},
[0x26]={instructions.ROL, addressing_modes.zero_page},
[0x27]={instructions.RMB, addressing_modes.zero_page, 2},
[0x28]={instructions.PLP, addressing_modes.implied},
[0x29]={instructions.AND, addressing_modes.immediate},
[0x2A]={instructions.ROL, addressing_modes.implied_a},
[0x2B]={instructions.NOP, addressing_modes.implied},
[0x2C]={instructions.BIT, addressing_modes.absolute},
[0x2D]={instructions.AND, addressing_modes.absolute},
[0x2E]={instructions.ROL, addressing_modes.absolute},
[0x2F]={instructions.BBR, addressing_modes.relative_bit_branch, 2},
[0x30]={instructions.Branch, addressing_modes.relative, "P_N_BIT", "P_N_BIT"},
[0x31]={instructions.AND, addressing_modes.zero_page_indirect_y},
[0x32]={instructions.AND, addressing_modes.zero_page_indirect},
[0x33]={instructions.NOP, addressing_modes.implied},
[0x34]={instructions.BIT, addressing_modes.zero_page_x},
[0x35]={instructions.AND, addressing_modes.zero_page_x},
[0x36]={instructions.ROL, addressing_modes.zero_page_x},
[0x37]={instructions.RMB, addressing_modes.zero_page, 3},
[0x38]={instructions.SEC, addressing_modes.implied},
[0x39]={instructions.AND, addressing_modes.absolute_y},
[0x3A]={instructions.DEC, addressing_modes.implied_a},
[0x3B]={instructions.NOP, addressing_modes.implied},
[0x3C]={instructions.BIT, addressing_modes.absolute_x},
[0x3D]={instructions.AND, addressing_modes.absolute_x},
[0x3E]={instructions.ROL, addressing_modes.absolute_x},
[0x3F]={instructions.BBR, addressing_modes.relative_bit_branch, 3},
[0x40]={instructions.RTI, addressing_modes.implied},
[0x41]={instructions.EOR, addressing_modes.zero_page_x_indirect},
[0x42]={instructions.NOP, addressing_modes.zero_page},
[0x43]={instructions.NOP, addressing_modes.implied},
[0x44]={instructions.NOP, addressing_modes.zero_page},
[0x45]={instructions.EOR, addressing_modes.zero_page},
[0x46]={instructions.LSR, addressing_modes.zero_page},
[0x47]={instructions.RMB, addressing_modes.zero_page, 4},
[0x48]={instructions.PHA, addressing_modes.implied},
[0x49]={instructions.EOR, addressing_modes.immediate},
[0x4A]={instructions.LSR, addressing_modes.implied_a},
[0x4B]={instructions.NOP, addressing_modes.implied},
[0x4C]={instructions.JMP, addressing_modes.absolute},
[0x4D]={instructions.EOR, addressing_modes.absolute},
[0x4E]={instructions.LSR, addressing_modes.absolute},
[0x4F]={instructions.BBR, addressing_modes.relative_bit_branch, 4},
[0x50]={instructions.Branch, addressing_modes.relative, "P_V_BIT", "0"},
[0x51]={instructions.EOR, addressing_modes.zero_page_indirect_y},
[0x52]={instructions.EOR, addressing_modes.zero_page_indirect},
[0x53]={instructions.NOP, addressing_modes.implied},
[0x54]={instructions.NOP, addressing_modes.zero_page_x},
[0x55]={instructions.EOR, addressing_modes.zero_page_x},
[0x56]={instructions.LSR, addressing_modes.zero_page_x},
[0x57]={instructions.RMB, addressing_modes.zero_page, 5},
[0x58]={instructions.CLI, addressing_modes.implied},
[0x59]={instructions.EOR, addressing_modes.absolute_y},
[0x5A]={instructions.PHY, addressing_modes.implied},
[0x5B]={instructions.NOP, addressing_modes.implied},
[0x5C]={instructions.NOP, addressing_modes.absolute},
[0x5D]={instructions.EOR, addressing_modes.absolute_x},
[0x5E]={instructions.LSR, addressing_modes.absolute_x},
[0x5F]={instructions.BBR, addressing_modes.relative_bit_branch, 5},
[0x60]={instructions.RTS, addressing_modes.implied},
[0x61]={instructions.ADC, addressing_modes.zero_page_x_indirect},
[0x62]={instructions.NOP, addressing_modes.zero_page},
[0x63]={instructions.NOP, addressing_modes.implied},
[0x64]={instructions.STZ, addressing_modes.zero_page},
[0x65]={instructions.ADC, addressing_modes.zero_page},
[0x66]={instructions.ROR, addressing_modes.zero_page},
[0x67]={instructions.RMB, addressing_modes.zero_page, 6},
[0x68]={instructions.PLA, addressing_modes.implied},
[0x69]={instructions.ADC, addressing_modes.immediate},
[0x6A]={instructions.ROR, addressing_modes.implied_a},
[0x6B]={instructions.NOP, addressing_modes.implied},
[0x6C]={instructions.JMP, addressing_modes.absolute_indirect},
[0x6D]={instructions.ADC, addressing_modes.absolute},
[0x6E]={instructions.ROR, addressing_modes.absolute},
[0x6F]={instructions.BBR, addressing_modes.relative_bit_branch, 6},
[0x70]={instructions.Branch, addressing_modes.relative, "P_V_BIT", "P_V_BIT"},
[0x71]={instructions.ADC, addressing_modes.zero_page_indirect_y},
[0x72]={instructions.ADC, addressing_modes.zero_page_indirect},
[0x73]={instructions.NOP, addressing_modes.implied},
[0x74]={instructions.STZ, addressing_modes.zero_page_x},
[0x75]={instructions.ADC, addressing_modes.zero_page_x},
[0x76]={instructions.ROR, addressing_modes.zero_page_x},
[0x77]={instructions.RMB, addressing_modes.zero_page, 7},
[0x78]={instructions.SEI, addressing_modes.implied},
[0x79]={instructions.ADC, addressing_modes.absolute_y},
[0x7A]={instructions.PLY, addressing_modes.implied},
[0x7B]={instructions.NOP, addressing_modes.implied},
[0x7C]={instructions.JMP, addressing_modes.absolute_x_indirect},
[0x7D]={instructions.ADC, addressing_modes.absolute_x},
[0x7E]={instructions.ROR, addressing_modes.absolute_x},
[0x7F]={instructions.BBR, addressing_modes.relative_bit_branch, 7},
[0x80]={instructions.Branch, addressing_modes.relative, "0", "0"},
[0x81]={instructions.STA, addressing_modes.zero_page_x_indirect},
[0x82]={instructions.NOP, addressing_modes.zero_page},
[0x83]={instructions.NOP, addressing_modes.implied},
[0x84]={instructions.STY, addressing_modes.zero_page},
[0x85]={instructions.STA, addressing_modes.zero_page},
[0x86]={instructions.STX, addressing_modes.zero_page},
[0x87]={instructions.SMB, addressing_modes.zero_page, 0},
[0x88]={instructions.DEC, addressing_modes.implied_y},
[0x89]={instructions.BIT_immediate, addressing_modes.immediate},
[0x8A]={instructions.TXA, addressing_modes.implied},
[0x8B]={instructions.NOP, addressing_modes.implied},
[0x8C]={instructions.STY, addressing_modes.absolute},
[0x8D]={instructions.STA, addressing_modes.absolute},
[0x8E]={instructions.STX, addressing_modes.absolute},
[0x8F]={instructions.BBS, addressing_modes.relative_bit_branch, 0},
[0x90]={instructions.Branch, addressing_modes.relative, "P_C_BIT", "0"},
[0x91]={instructions.STA, addressing_modes.zero_page_indirect_y},
[0x92]={instructions.STA, addressing_modes.zero_page_indirect},
[0x93]={instructions.NOP, addressing_modes.implied},
[0x94]={instructions.STY, addressing_modes.zero_page_x},
[0x95]={instructions.STA, addressing_modes.zero_page_x},
[0x96]={instructions.STX, addressing_modes.zero_page_y},
[0x97]={instructions.SMB, addressing_modes.zero_page, 1},
[0x98]={instructions.TYA, addressing_modes.implied},
[0x99]={instructions.STA, addressing_modes.absolute_y},
[0x9A]={instructions.TXS, addressing_modes.implied},
[0x9B]={instructions.NOP, addressing_modes.implied},
[0x9C]={instructions.STZ, addressing_modes.absolute},
[0x9D]={instructions.STA, addressing_modes.absolute_x},
[0x9E]={instructions.STZ, addressing_modes.absolute_x},
[0x9F]={instructions.BBS, addressing_modes.relative_bit_branch, 1},
[0xA0]={instructions.LDY, addressing_modes.immediate},
[0xA1]={instructions.LDA, addressing_modes.zero_page_x_indirect},
[0xA2]={instructions.LDX, addressing_modes.immediate},
[0xA3]={instructions.NOP, addressing_modes.implied},
[0xA4]={instructions.LDY, addressing_modes.zero_page},
[0xA5]={instructions.LDA, addressing_modes.zero_page},
[0xA6]={instructions.LDX, addressing_modes.zero_page},
[0xA7]={instructions.SMB, addressing_modes.zero_page, 2},
[0xA8]={instructions.TAY, addressing_modes.implied},
[0xA9]={instructions.LDA, addressing_modes.immediate},
[0xAA]={instructions.TAX, addressing_modes.implied},
[0xAB]={instructions.NOP, addressing_modes.implied},
[0xAC]={instructions.LDY, addressing_modes.absolute},
[0xAD]={instructions.LDA, addressing_modes.absolute},
[0xAE]={instructions.LDX, addressing_modes.absolute},
[0xAF]={instructions.BBS, addressing_modes.relative_bit_branch, 2},
[0xB0]={instructions.Branch, addressing_modes.relative, "P_C_BIT", "P_C_BIT"},
[0xB1]={instructions.LDA, addressing_modes.zero_page_indirect_y},
[0xB2]={instructions.LDA, addressing_modes.zero_page_indirect},
[0xB3]={instructions.NOP, addressing_modes.implied},
[0xB4]={instructions.LDY, addressing_modes.zero_page_x},
[0xB5]={instructions.LDA, addressing_modes.zero_page_x},
[0xB6]={instructions.LDX, addressing_modes.zero_page_y},
[0xB7]={instructions.SMB, addressing_modes.zero_page, 3},
[0xB8]={instructions.CLV, addressing_modes.implied},
[0xB9]={instructions.LDA, addressing_modes.absolute_y},
[0xBA]={instructions.TSX, addressing_modes.implied},
[0xBB]={instructions.NOP, addressing_modes.implied},
[0xBC]={instructions.LDY, addressing_modes.absolute_x},
[0xBD]={instructions.LDA, addressing_modes.absolute_x},
[0xBE]={instructions.LDX, addressing_modes.absolute_y},
[0xBF]={instructions.BBS, addressing_modes.relative_bit_branch, 3},
[0xC0]={instructions.CPY, addressing_modes.immediate},
[0xC1]={instructions.CMP, addressing_modes.zero_page_x_indirect},
[0xC2]={instructions.NOP, addressing_modes.immediate},
[0xC3]={instructions.NOP, addressing_modes.implied},
[0xC4]={instructions.CPY, addressing_modes.zero_page},
[0xC5]={instructions.CMP, addressing_modes.zero_page},
[0xC6]={instructions.DEC, addressing_modes.zero_page},
[0xC7]={instructions.SMB, addressing_modes.zero_page, 4},
[0xC8]={instructions.INC, addressing_modes.implied_y},
[0xC9]={instructions.CMP, addressing_modes.immediate},
[0xCA]={instructions.DEC, addressing_modes.implied_x},
[0xCB]={instructions.WAI, addressing_modes.implied},
[0xCC]={instructions.CPY, addressing_modes.absolute},
[0xCD]={instructions.CMP, addressing_modes.absolute},
[0xCE]={instructions.DEC, addressing_modes.absolute},
[0xCF]={instructions.BBS, addressing_modes.relative_bit_branch, 4},
[0xD0]={instructions.Branch, addressing_modes.relative, "P_Z_BIT", "0"},
[0xD1]={instructions.CMP, addressing_modes.zero_page_indirect_y},
[0xD2]={instructions.CMP, addressing_modes.zero_page_indirect},
[0xD3]={instructions.NOP, addressing_modes.implied},
[0xD4]={instructions.NOP, addressing_modes.zero_page_x},
[0xD5]={instructions.CMP, addressing_modes.zero_page_x},
[0xD6]={instructions.DEC, addressing_modes.zero_page_x},
[0xD7]={instructions.SMB, addressing_modes.zero_page, 5},
[0xD8]={instructions.CLD, addressing_modes.implied},
[0xD9]={instructions.CMP, addressing_modes.absolute_y},
[0xDA]={instructions.PHX, addressing_modes.implied},
[0xDB]={instructions.STP, addressing_modes.implied},
[0xDC]={instructions.NOP, addressing_modes.absolute_x},
[0xDD]={instructions.CMP, addressing_modes.absolute_x},
[0xDE]={instructions.DEC, addressing_modes.absolute_x},
[0xDF]={instructions.BBS, addressing_modes.relative_bit_branch, 5},
[0xE0]={instructions.CPX, addressing_modes.immediate},
[0xE1]={instructions.SBC, addressing_modes.zero_page_x_indirect},
[0xE2]={instructions.NOP, addressing_modes.immediate},
[0xE3]={instructions.NOP, addressing_modes.implied},
[0xE4]={instructions.CPX, addressing_modes.zero_page},
[0xE5]={instructions.SBC, addressing_modes.zero_page},
[0xE6]={instructions.INC, addressing_modes.zero_page},
[0xE7]={instructions.SMB, addressing_modes.zero_page, 6},
[0xE8]={instructions.INC, addressing_modes.implied_x},
[0xE9]={instructions.SBC, addressing_modes.immediate},
[0xEA]={instructions.NOP, addressing_modes.implied},
[0xEB]={instructions.NOP, addressing_modes.implied},
[0xEC]={instructions.CPX, addressing_modes.absolute},
[0xED]={instructions.SBC, addressing_modes.absolute},
[0xEE]={instructions.INC, addressing_modes.absolute},
[0xEF]={instructions.BBS, addressing_modes.relative_bit_branch, 6},
[0xF0]={instructions.Branch, addressing_modes.relative, "P_Z_BIT", "P_Z_BIT"},
[0xF1]={instructions.SBC, addressing_modes.zero_page_indirect_y},
[0xF2]={instructions.SBC, addressing_modes.zero_page_indirect},
[0xF3]={instructions.NOP, addressing_modes.implied},
[0xF4]={instructions.NOP, addressing_modes.zero_page_x},
[0xF5]={instructions.SBC, addressing_modes.zero_page_x},
[0xF6]={instructions.INC, addressing_modes.zero_page_x},
[0xF7]={instructions.SMB, addressing_modes.zero_page, 7},
[0xF8]={instructions.SED, addressing_modes.implied},
[0xF9]={instructions.SBC, addressing_modes.absolute_y},
[0xFA]={instructions.PLX, addressing_modes.implied},
[0xFB]={instructions.NOP, addressing_modes.implied},
[0xFC]={instructions.NOP, addressing_modes.absolute_x},
[0xFD]={instructions.SBC, addressing_modes.absolute_x},
[0xFE]={instructions.INC, addressing_modes.absolute_x},
[0xFF]={instructions.BBS, addressing_modes.relative_bit_branch, 7},
}
