
verilua "appendTasks" {
    function ()
        local clock = dut.clock:chdl()
        
        dut.reset = 1
        dut.clock:posedge(10)
        dut.reset = 0

        clock:posedge(10, function ()
            dut.cycles:dump()
            dut.count:dump()
            print()
        end)

        sim.finish()
    end
}